./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/array-fpi/s5if.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/config/AutomizerReach.xml -i ../../sv-benchmarks/c/array-fpi/s5if.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b618695aa08df106816e7defd71220f009a5c8c09539ff7c8c29235c85f2ce8d --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 18:28:12,601 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 18:28:12,604 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 18:28:12,647 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 18:28:12,654 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 18:28:12,656 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 18:28:12,657 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 18:28:12,659 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 18:28:12,665 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 18:28:12,666 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 18:28:12,668 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 18:28:12,670 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 18:28:12,672 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 18:28:12,675 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 18:28:12,676 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 18:28:12,679 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 18:28:12,682 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 18:28:12,683 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 18:28:12,690 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 18:28:12,692 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 18:28:12,694 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 18:28:12,700 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 18:28:12,701 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 18:28:12,702 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 18:28:12,706 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 18:28:12,711 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 18:28:12,711 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 18:28:12,712 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 18:28:12,713 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 18:28:12,714 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 18:28:12,714 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 18:28:12,715 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 18:28:12,717 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 18:28:12,719 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 18:28:12,720 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 18:28:12,721 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 18:28:12,723 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 18:28:12,723 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 18:28:12,723 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 18:28:12,724 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 18:28:12,725 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 18:28:12,726 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf [2022-11-18 18:28:12,758 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 18:28:12,758 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 18:28:12,759 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 18:28:12,759 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 18:28:12,760 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 18:28:12,760 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 18:28:12,761 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 18:28:12,761 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 18:28:12,762 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 18:28:12,762 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 18:28:12,763 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 18:28:12,763 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 18:28:12,763 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 18:28:12,764 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 18:28:12,764 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-18 18:28:12,764 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 18:28:12,764 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-18 18:28:12,764 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 18:28:12,765 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 18:28:12,765 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 18:28:12,765 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-18 18:28:12,765 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 18:28:12,766 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 18:28:12,766 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 18:28:12,766 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 18:28:12,766 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 18:28:12,768 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 18:28:12,768 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-18 18:28:12,768 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 18:28:12,769 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 18:28:12,769 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-18 18:28:12,769 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-18 18:28:12,769 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-18 18:28:12,770 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b618695aa08df106816e7defd71220f009a5c8c09539ff7c8c29235c85f2ce8d [2022-11-18 18:28:13,116 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 18:28:13,144 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 18:28:13,148 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 18:28:13,150 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 18:28:13,151 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 18:28:13,152 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/array-fpi/s5if.c [2022-11-18 18:28:13,232 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/data/732343bf3/109606cbfbb4473482899edfa44c8b66/FLAG3135a0134 [2022-11-18 18:28:13,827 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 18:28:13,828 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/sv-benchmarks/c/array-fpi/s5if.c [2022-11-18 18:28:13,836 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/data/732343bf3/109606cbfbb4473482899edfa44c8b66/FLAG3135a0134 [2022-11-18 18:28:14,180 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/data/732343bf3/109606cbfbb4473482899edfa44c8b66 [2022-11-18 18:28:14,185 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 18:28:14,188 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 18:28:14,190 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 18:28:14,190 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 18:28:14,194 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 18:28:14,194 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,196 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@32a802c6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14, skipping insertion in model container [2022-11-18 18:28:14,196 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,204 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 18:28:14,221 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 18:28:14,441 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/sv-benchmarks/c/array-fpi/s5if.c[587,600] [2022-11-18 18:28:14,471 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 18:28:14,482 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 18:28:14,506 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/sv-benchmarks/c/array-fpi/s5if.c[587,600] [2022-11-18 18:28:14,529 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 18:28:14,544 INFO L208 MainTranslator]: Completed translation [2022-11-18 18:28:14,544 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14 WrapperNode [2022-11-18 18:28:14,544 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 18:28:14,545 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 18:28:14,546 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 18:28:14,546 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 18:28:14,555 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,581 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,603 INFO L138 Inliner]: procedures = 17, calls = 30, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 79 [2022-11-18 18:28:14,603 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 18:28:14,604 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 18:28:14,604 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 18:28:14,605 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 18:28:14,615 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,615 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,617 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,618 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,624 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,640 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,642 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,648 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,651 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 18:28:14,652 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 18:28:14,652 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 18:28:14,652 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 18:28:14,654 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (1/1) ... [2022-11-18 18:28:14,661 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 18:28:14,673 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:14,688 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 18:28:14,707 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 18:28:14,742 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 18:28:14,743 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 18:28:14,743 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 18:28:14,743 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 18:28:14,743 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 18:28:14,743 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 18:28:14,743 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 18:28:14,744 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 18:28:14,744 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 18:28:14,832 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 18:28:14,834 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 18:28:15,068 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 18:28:15,074 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 18:28:15,075 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-18 18:28:15,077 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 06:28:15 BoogieIcfgContainer [2022-11-18 18:28:15,077 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 18:28:15,079 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 18:28:15,080 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 18:28:15,084 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 18:28:15,084 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 06:28:14" (1/3) ... [2022-11-18 18:28:15,085 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@30c23cb4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 06:28:15, skipping insertion in model container [2022-11-18 18:28:15,086 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:28:14" (2/3) ... [2022-11-18 18:28:15,086 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@30c23cb4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 06:28:15, skipping insertion in model container [2022-11-18 18:28:15,086 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 06:28:15" (3/3) ... [2022-11-18 18:28:15,088 INFO L112 eAbstractionObserver]: Analyzing ICFG s5if.c [2022-11-18 18:28:15,110 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 18:28:15,110 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-18 18:28:15,209 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 18:28:15,219 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1bde0848, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 18:28:15,220 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-18 18:28:15,228 INFO L276 IsEmpty]: Start isEmpty. Operand has 19 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:15,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-18 18:28:15,236 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:15,237 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:15,238 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:15,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:15,247 INFO L85 PathProgramCache]: Analyzing trace with hash 356661439, now seen corresponding path program 1 times [2022-11-18 18:28:15,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:15,258 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942767194] [2022-11-18 18:28:15,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:15,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:15,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:15,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:15,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:15,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942767194] [2022-11-18 18:28:15,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1942767194] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:28:15,520 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:28:15,520 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 18:28:15,522 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [492208830] [2022-11-18 18:28:15,524 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:28:15,530 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-18 18:28:15,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:15,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-18 18:28:15,570 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-18 18:28:15,574 INFO L87 Difference]: Start difference. First operand has 19 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:15,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:15,594 INFO L93 Difference]: Finished difference Result 34 states and 46 transitions. [2022-11-18 18:28:15,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-18 18:28:15,597 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-18 18:28:15,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:15,606 INFO L225 Difference]: With dead ends: 34 [2022-11-18 18:28:15,606 INFO L226 Difference]: Without dead ends: 15 [2022-11-18 18:28:15,610 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-18 18:28:15,614 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 22 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:15,615 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 18:28:15,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-11-18 18:28:15,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-11-18 18:28:15,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.2142857142857142) internal successors, (17), 14 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:15,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2022-11-18 18:28:15,677 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 17 transitions. Word has length 11 [2022-11-18 18:28:15,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:15,678 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-11-18 18:28:15,679 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:15,679 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-11-18 18:28:15,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-18 18:28:15,680 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:15,680 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:15,680 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-18 18:28:15,681 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:15,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:15,682 INFO L85 PathProgramCache]: Analyzing trace with hash -452685187, now seen corresponding path program 1 times [2022-11-18 18:28:15,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:15,682 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486418763] [2022-11-18 18:28:15,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:15,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:15,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:15,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:15,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:15,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486418763] [2022-11-18 18:28:15,875 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486418763] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:28:15,875 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:28:15,875 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 18:28:15,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [223311915] [2022-11-18 18:28:15,876 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:28:15,878 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 18:28:15,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:15,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 18:28:15,881 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 18:28:15,882 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:15,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:15,980 INFO L93 Difference]: Finished difference Result 28 states and 34 transitions. [2022-11-18 18:28:15,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 18:28:15,981 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-18 18:28:15,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:15,982 INFO L225 Difference]: With dead ends: 28 [2022-11-18 18:28:15,982 INFO L226 Difference]: Without dead ends: 20 [2022-11-18 18:28:15,983 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 18:28:15,984 INFO L413 NwaCegarLoop]: 7 mSDtfsCounter, 23 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:15,985 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 10 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:28:15,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-11-18 18:28:15,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 17. [2022-11-18 18:28:15,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 1.1875) internal successors, (19), 16 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:15,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2022-11-18 18:28:15,991 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 11 [2022-11-18 18:28:15,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:15,991 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions. [2022-11-18 18:28:15,992 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:15,992 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-11-18 18:28:15,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-18 18:28:15,993 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:15,993 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:15,993 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-18 18:28:15,994 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:15,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:15,994 INFO L85 PathProgramCache]: Analyzing trace with hash 623611495, now seen corresponding path program 1 times [2022-11-18 18:28:15,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:15,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457245377] [2022-11-18 18:28:15,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:15,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:16,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:16,869 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:16,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:16,869 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457245377] [2022-11-18 18:28:16,870 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [457245377] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:28:16,870 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1208669369] [2022-11-18 18:28:16,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:16,870 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:16,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:16,875 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:16,886 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 18:28:16,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:16,978 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-18 18:28:16,985 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:17,086 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 18:28:17,105 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:28:17,193 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 18:28:17,416 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 27 [2022-11-18 18:28:17,553 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:17,553 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:17,959 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:28:17,959 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-11-18 18:28:17,986 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 18:28:17,990 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2022-11-18 18:28:18,000 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-18 18:28:18,022 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:18,023 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1208669369] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:18,023 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 18:28:18,023 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 21 [2022-11-18 18:28:18,024 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1805621079] [2022-11-18 18:28:18,024 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:18,026 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-18 18:28:18,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:18,027 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-18 18:28:18,030 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=333, Unknown=1, NotChecked=0, Total=420 [2022-11-18 18:28:18,030 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 21 states, 21 states have (on average 1.7619047619047619) internal successors, (37), 21 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:18,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:18,404 INFO L93 Difference]: Finished difference Result 47 states and 54 transitions. [2022-11-18 18:28:18,405 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 18:28:18,405 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 1.7619047619047619) internal successors, (37), 21 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-18 18:28:18,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:18,407 INFO L225 Difference]: With dead ends: 47 [2022-11-18 18:28:18,407 INFO L226 Difference]: Without dead ends: 41 [2022-11-18 18:28:18,408 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=145, Invalid=504, Unknown=1, NotChecked=0, Total=650 [2022-11-18 18:28:18,409 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 31 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 40 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:18,410 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 44 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 98 Invalid, 0 Unknown, 40 Unchecked, 0.1s Time] [2022-11-18 18:28:18,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-11-18 18:28:18,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 26. [2022-11-18 18:28:18,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 25 states have (on average 1.28) internal successors, (32), 25 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:18,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 32 transitions. [2022-11-18 18:28:18,419 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 32 transitions. Word has length 16 [2022-11-18 18:28:18,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:18,420 INFO L495 AbstractCegarLoop]: Abstraction has 26 states and 32 transitions. [2022-11-18 18:28:18,420 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 1.7619047619047619) internal successors, (37), 21 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:18,420 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 32 transitions. [2022-11-18 18:28:18,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-18 18:28:18,421 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:18,421 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:18,437 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:18,628 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:18,628 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:18,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:18,629 INFO L85 PathProgramCache]: Analyzing trace with hash 680869797, now seen corresponding path program 1 times [2022-11-18 18:28:18,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:18,630 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294097361] [2022-11-18 18:28:18,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:18,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:18,654 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:28:18,655 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1950888067] [2022-11-18 18:28:18,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:18,655 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:18,655 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:18,656 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:18,675 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 18:28:18,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:18,727 INFO L263 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-18 18:28:18,729 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:18,746 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 18:28:18,788 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:28:18,799 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:18,799 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:18,846 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2022-11-18 18:28:18,850 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2022-11-18 18:28:18,864 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:18,870 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:18,870 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294097361] [2022-11-18 18:28:18,871 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:28:18,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1950888067] [2022-11-18 18:28:18,871 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1950888067] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:18,871 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:28:18,872 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2022-11-18 18:28:18,872 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222731675] [2022-11-18 18:28:18,873 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:18,873 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-18 18:28:18,873 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:18,874 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-18 18:28:18,874 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-18 18:28:18,875 INFO L87 Difference]: Start difference. First operand 26 states and 32 transitions. Second operand has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:18,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:18,965 INFO L93 Difference]: Finished difference Result 38 states and 46 transitions. [2022-11-18 18:28:18,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 18:28:18,966 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-18 18:28:18,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:18,968 INFO L225 Difference]: With dead ends: 38 [2022-11-18 18:28:18,969 INFO L226 Difference]: Without dead ends: 26 [2022-11-18 18:28:18,969 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=72, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:28:18,972 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 9 mSDsluCounter, 25 mSDsCounter, 0 mSdLazyCounter, 44 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 37 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 44 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:18,973 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 37 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 44 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:28:18,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-11-18 18:28:18,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2022-11-18 18:28:18,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 24 states have (on average 1.1666666666666667) internal successors, (28), 24 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:18,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2022-11-18 18:28:18,988 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 16 [2022-11-18 18:28:18,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:18,989 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2022-11-18 18:28:18,993 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 9 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:18,993 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2022-11-18 18:28:18,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-18 18:28:18,994 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:18,995 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:19,002 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:19,201 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:19,201 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:19,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:19,201 INFO L85 PathProgramCache]: Analyzing trace with hash -1137819675, now seen corresponding path program 2 times [2022-11-18 18:28:19,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:19,202 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005118320] [2022-11-18 18:28:19,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:19,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:19,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:19,337 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:19,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:19,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005118320] [2022-11-18 18:28:19,338 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2005118320] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:28:19,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1056178764] [2022-11-18 18:28:19,338 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:28:19,338 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:19,338 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:19,339 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:19,364 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 18:28:19,433 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:28:19,433 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:28:19,434 INFO L263 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 18:28:19,435 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:19,502 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:19,502 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:19,561 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:19,561 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1056178764] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:19,561 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 18:28:19,562 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2022-11-18 18:28:19,562 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803831142] [2022-11-18 18:28:19,562 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:19,562 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 18:28:19,563 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:19,563 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 18:28:19,563 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:28:19,564 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand has 11 states, 11 states have (on average 2.727272727272727) internal successors, (30), 11 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:19,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:19,708 INFO L93 Difference]: Finished difference Result 33 states and 37 transitions. [2022-11-18 18:28:19,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-18 18:28:19,709 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.727272727272727) internal successors, (30), 11 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-11-18 18:28:19,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:19,710 INFO L225 Difference]: With dead ends: 33 [2022-11-18 18:28:19,710 INFO L226 Difference]: Without dead ends: 29 [2022-11-18 18:28:19,710 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=148, Unknown=0, NotChecked=0, Total=210 [2022-11-18 18:28:19,711 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 30 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 120 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:19,712 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 28 Invalid, 120 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:28:19,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-11-18 18:28:19,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 20. [2022-11-18 18:28:19,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 19 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:19,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 22 transitions. [2022-11-18 18:28:19,718 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 22 transitions. Word has length 18 [2022-11-18 18:28:19,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:19,719 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 22 transitions. [2022-11-18 18:28:19,719 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.727272727272727) internal successors, (30), 11 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:19,719 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2022-11-18 18:28:19,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-11-18 18:28:19,720 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:19,720 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:19,731 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:19,926 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:19,926 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:19,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:19,927 INFO L85 PathProgramCache]: Analyzing trace with hash -479454913, now seen corresponding path program 3 times [2022-11-18 18:28:19,927 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:19,927 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286365439] [2022-11-18 18:28:19,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:19,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:19,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:20,011 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:20,012 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:20,012 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286365439] [2022-11-18 18:28:20,012 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [286365439] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:28:20,013 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [100476563] [2022-11-18 18:28:20,013 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:28:20,013 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:20,013 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:20,014 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:20,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 18:28:20,086 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-11-18 18:28:20,086 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:28:20,087 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 18:28:20,088 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:20,150 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:20,150 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:20,196 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:20,197 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [100476563] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:20,197 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 18:28:20,197 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2022-11-18 18:28:20,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67123178] [2022-11-18 18:28:20,197 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:20,198 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 18:28:20,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:20,198 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 18:28:20,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:28:20,199 INFO L87 Difference]: Start difference. First operand 20 states and 22 transitions. Second operand has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 11 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:20,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:20,311 INFO L93 Difference]: Finished difference Result 37 states and 42 transitions. [2022-11-18 18:28:20,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-18 18:28:20,312 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 11 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-11-18 18:28:20,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:20,313 INFO L225 Difference]: With dead ends: 37 [2022-11-18 18:28:20,313 INFO L226 Difference]: Without dead ends: 25 [2022-11-18 18:28:20,313 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2022-11-18 18:28:20,314 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 19 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:20,315 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 31 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:28:20,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-11-18 18:28:20,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 22. [2022-11-18 18:28:20,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 21 states have (on average 1.1428571428571428) internal successors, (24), 21 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:20,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2022-11-18 18:28:20,321 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 24 transitions. Word has length 19 [2022-11-18 18:28:20,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:20,321 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 24 transitions. [2022-11-18 18:28:20,321 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.8181818181818183) internal successors, (31), 11 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:20,321 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 24 transitions. [2022-11-18 18:28:20,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-18 18:28:20,322 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:20,322 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:20,332 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:20,527 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:20,528 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:20,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:20,528 INFO L85 PathProgramCache]: Analyzing trace with hash 634982145, now seen corresponding path program 4 times [2022-11-18 18:28:20,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:20,528 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555322886] [2022-11-18 18:28:20,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:20,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:20,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:21,316 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:21,316 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:21,316 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555322886] [2022-11-18 18:28:21,316 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1555322886] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:28:21,316 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2056850208] [2022-11-18 18:28:21,316 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 18:28:21,317 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:21,317 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:21,320 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:21,345 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 18:28:21,401 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 18:28:21,401 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:28:21,403 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 41 conjunts are in the unsatisfiable core [2022-11-18 18:28:21,408 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:21,438 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 18:28:21,443 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:28:21,484 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 18:28:21,535 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 18:28:21,690 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 27 [2022-11-18 18:28:21,904 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 18:28:21,905 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 41 [2022-11-18 18:28:24,204 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 18:28:24,205 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 58 treesize of output 30 [2022-11-18 18:28:24,250 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:24,250 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:32,123 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 8 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:32,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2056850208] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:32,123 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 18:28:32,124 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 36 [2022-11-18 18:28:32,124 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849897432] [2022-11-18 18:28:32,124 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:32,124 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-18 18:28:32,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:32,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-18 18:28:32,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=1112, Unknown=5, NotChecked=0, Total=1260 [2022-11-18 18:28:32,126 INFO L87 Difference]: Start difference. First operand 22 states and 24 transitions. Second operand has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 36 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:39,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:39,454 INFO L93 Difference]: Finished difference Result 40 states and 46 transitions. [2022-11-18 18:28:39,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-11-18 18:28:39,455 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 36 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-18 18:28:39,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:39,455 INFO L225 Difference]: With dead ends: 40 [2022-11-18 18:28:39,456 INFO L226 Difference]: Without dead ends: 36 [2022-11-18 18:28:39,457 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 552 ImplicationChecksByTransitivity, 17.0s TimeCoverageRelationStatistics Valid=282, Invalid=2160, Unknown=8, NotChecked=0, Total=2450 [2022-11-18 18:28:39,457 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 18 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 267 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 157 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:39,458 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 66 Invalid, 267 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 86 Invalid, 0 Unknown, 157 Unchecked, 0.1s Time] [2022-11-18 18:28:39,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2022-11-18 18:28:39,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 25. [2022-11-18 18:28:39,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 24 states have (on average 1.1666666666666667) internal successors, (28), 24 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:39,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 28 transitions. [2022-11-18 18:28:39,467 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 28 transitions. Word has length 21 [2022-11-18 18:28:39,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:39,467 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 28 transitions. [2022-11-18 18:28:39,468 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 36 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:39,468 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 28 transitions. [2022-11-18 18:28:39,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-18 18:28:39,468 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:39,469 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:39,475 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:39,674 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:39,675 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:39,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:39,675 INFO L85 PathProgramCache]: Analyzing trace with hash 692240447, now seen corresponding path program 1 times [2022-11-18 18:28:39,675 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:39,676 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658667914] [2022-11-18 18:28:39,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:39,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:39,697 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:28:39,697 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1880924723] [2022-11-18 18:28:39,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:39,698 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:39,698 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:39,699 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:39,707 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-18 18:28:39,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:39,779 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-18 18:28:39,781 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:39,838 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 18:28:39,923 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:39,924 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:28:39,973 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:28:39,987 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:39,987 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:40,043 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_190 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_190) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)) 5)) is different from false [2022-11-18 18:28:40,092 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:28:40,093 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 25 [2022-11-18 18:28:40,101 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:28:40,102 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 34 [2022-11-18 18:28:40,106 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:28:40,157 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2022-11-18 18:28:40,158 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:40,158 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658667914] [2022-11-18 18:28:40,158 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:28:40,158 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1880924723] [2022-11-18 18:28:40,158 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1880924723] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:40,159 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:28:40,159 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 15 [2022-11-18 18:28:40,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [774622053] [2022-11-18 18:28:40,159 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:40,160 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-11-18 18:28:40,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:40,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-11-18 18:28:40,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=145, Unknown=3, NotChecked=24, Total=210 [2022-11-18 18:28:40,161 INFO L87 Difference]: Start difference. First operand 25 states and 28 transitions. Second operand has 15 states, 15 states have (on average 2.1333333333333333) internal successors, (32), 15 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:40,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:40,431 INFO L93 Difference]: Finished difference Result 43 states and 50 transitions. [2022-11-18 18:28:40,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 18:28:40,432 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.1333333333333333) internal successors, (32), 15 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-18 18:28:40,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:40,433 INFO L225 Difference]: With dead ends: 43 [2022-11-18 18:28:40,433 INFO L226 Difference]: Without dead ends: 36 [2022-11-18 18:28:40,433 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=212, Unknown=3, NotChecked=30, Total=306 [2022-11-18 18:28:40,434 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 20 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 147 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 147 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 36 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:40,434 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 66 Invalid, 195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 147 Invalid, 0 Unknown, 36 Unchecked, 0.2s Time] [2022-11-18 18:28:40,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2022-11-18 18:28:40,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 33. [2022-11-18 18:28:40,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.15625) internal successors, (37), 32 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:40,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2022-11-18 18:28:40,452 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 21 [2022-11-18 18:28:40,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:40,452 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2022-11-18 18:28:40,452 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.1333333333333333) internal successors, (32), 15 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:40,453 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2022-11-18 18:28:40,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-18 18:28:40,453 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:40,453 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:40,487 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:40,654 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable7 [2022-11-18 18:28:40,654 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:40,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:40,655 INFO L85 PathProgramCache]: Analyzing trace with hash -2075570815, now seen corresponding path program 2 times [2022-11-18 18:28:40,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:40,655 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800409688] [2022-11-18 18:28:40,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:40,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:40,671 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:28:40,672 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [853290969] [2022-11-18 18:28:40,672 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:28:40,672 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:40,672 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:40,673 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:40,687 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-18 18:28:40,763 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:28:40,763 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:28:40,765 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-18 18:28:40,766 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:40,861 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:40,861 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:40,938 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:40,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:40,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800409688] [2022-11-18 18:28:40,938 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:28:40,939 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [853290969] [2022-11-18 18:28:40,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [853290969] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:40,939 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:28:40,939 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 12 [2022-11-18 18:28:40,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769571900] [2022-11-18 18:28:40,940 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:40,940 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-11-18 18:28:40,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:40,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-18 18:28:40,941 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2022-11-18 18:28:40,942 INFO L87 Difference]: Start difference. First operand 33 states and 37 transitions. Second operand has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 12 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:41,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:41,167 INFO L93 Difference]: Finished difference Result 43 states and 48 transitions. [2022-11-18 18:28:41,170 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 18:28:41,170 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 12 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-11-18 18:28:41,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:41,170 INFO L225 Difference]: With dead ends: 43 [2022-11-18 18:28:41,171 INFO L226 Difference]: Without dead ends: 39 [2022-11-18 18:28:41,171 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2022-11-18 18:28:41,172 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 50 mSDsluCounter, 16 mSDsCounter, 0 mSdLazyCounter, 167 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 178 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 167 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:41,172 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 25 Invalid, 178 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 167 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:28:41,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2022-11-18 18:28:41,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 33. [2022-11-18 18:28:41,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.15625) internal successors, (37), 32 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:41,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 37 transitions. [2022-11-18 18:28:41,182 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 37 transitions. Word has length 23 [2022-11-18 18:28:41,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:41,183 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 37 transitions. [2022-11-18 18:28:41,183 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5833333333333335) internal successors, (31), 12 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:41,183 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 37 transitions. [2022-11-18 18:28:41,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-11-18 18:28:41,184 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:41,184 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:41,190 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:41,390 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:41,390 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:41,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:41,390 INFO L85 PathProgramCache]: Analyzing trace with hash -1038837147, now seen corresponding path program 5 times [2022-11-18 18:28:41,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:41,391 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390220742] [2022-11-18 18:28:41,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:41,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:41,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:41,563 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:41,563 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:41,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390220742] [2022-11-18 18:28:41,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1390220742] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:28:41,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1107998600] [2022-11-18 18:28:41,564 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 18:28:41,564 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:41,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:41,565 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:41,587 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-18 18:28:41,651 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-11-18 18:28:41,651 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:28:41,653 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-18 18:28:41,654 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:41,739 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:41,739 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:28:41,807 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:41,807 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1107998600] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:28:41,807 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 18:28:41,807 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 14 [2022-11-18 18:28:41,807 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238967407] [2022-11-18 18:28:41,807 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 18:28:41,808 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-18 18:28:41,808 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:28:41,808 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-18 18:28:41,808 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=129, Unknown=0, NotChecked=0, Total=182 [2022-11-18 18:28:41,809 INFO L87 Difference]: Start difference. First operand 33 states and 37 transitions. Second operand has 14 states, 14 states have (on average 2.7857142857142856) internal successors, (39), 14 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:41,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:28:41,958 INFO L93 Difference]: Finished difference Result 45 states and 51 transitions. [2022-11-18 18:28:41,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 18:28:41,958 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.7857142857142856) internal successors, (39), 14 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-11-18 18:28:41,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:28:41,959 INFO L225 Difference]: With dead ends: 45 [2022-11-18 18:28:41,959 INFO L226 Difference]: Without dead ends: 30 [2022-11-18 18:28:41,959 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 37 SyntacticMatches, 6 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2022-11-18 18:28:41,960 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 28 mSDsluCounter, 28 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 37 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:28:41,960 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 37 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:28:41,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-11-18 18:28:41,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2022-11-18 18:28:41,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 1.1538461538461537) internal successors, (30), 26 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:41,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 30 transitions. [2022-11-18 18:28:41,967 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 30 transitions. Word has length 24 [2022-11-18 18:28:41,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:28:41,967 INFO L495 AbstractCegarLoop]: Abstraction has 27 states and 30 transitions. [2022-11-18 18:28:41,967 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.7857142857142856) internal successors, (39), 14 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:28:41,968 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 30 transitions. [2022-11-18 18:28:41,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-18 18:28:41,968 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:28:41,968 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:28:41,979 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-18 18:28:42,174 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-18 18:28:42,175 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:28:42,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:28:42,175 INFO L85 PathProgramCache]: Analyzing trace with hash -2121994781, now seen corresponding path program 6 times [2022-11-18 18:28:42,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:28:42,175 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075316803] [2022-11-18 18:28:42,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:28:42,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:28:42,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:28:43,319 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:28:43,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:28:43,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075316803] [2022-11-18 18:28:43,320 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2075316803] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:28:43,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1994076794] [2022-11-18 18:28:43,320 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 18:28:43,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:28:43,320 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:28:43,321 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:28:43,343 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-18 18:28:43,423 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-11-18 18:28:43,423 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:28:43,425 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 50 conjunts are in the unsatisfiable core [2022-11-18 18:28:43,430 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:28:43,438 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 18:28:43,474 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:43,475 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 18:28:43,489 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:43,490 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 18:28:43,510 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:43,511 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 18:28:43,624 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:43,625 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 27 [2022-11-18 18:28:43,802 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:43,809 INFO L321 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-11-18 18:28:43,809 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 37 [2022-11-18 18:28:44,083 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:44,088 INFO L321 Elim1Store]: treesize reduction 20, result has 4.8 percent of original size [2022-11-18 18:28:44,088 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 74 treesize of output 54 [2022-11-18 18:28:44,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:28:44,400 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:28:44,400 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 69 treesize of output 35 [2022-11-18 18:28:44,446 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-11-18 18:28:44,446 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:29:13,674 WARN L837 $PredicateComparison]: unable to prove that (and (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse0 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse3 (select .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse1 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse2 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse1 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< 14 (+ .cse0 .cse1 .cse2 .cse3)) (not (= 5 .cse1)) (not (= 5 .cse2)) (not (= 5 .cse0))))))))) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse11 (select .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse6 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse9 (select .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse7 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse8 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse7 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< (+ .cse6 .cse7 .cse8 .cse9) 16) (not (= 5 .cse7)) (not (= 5 .cse8)) (not (= 5 .cse6)))))))))) is different from false [2022-11-18 18:29:14,380 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 4 trivial. 5 not checked. [2022-11-18 18:29:14,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1994076794] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:29:14,380 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 18:29:14,381 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 15, 16] total 43 [2022-11-18 18:29:14,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048777358] [2022-11-18 18:29:14,381 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 18:29:14,381 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-11-18 18:29:14,382 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:29:14,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-11-18 18:29:14,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=1557, Unknown=10, NotChecked=80, Total=1806 [2022-11-18 18:29:14,383 INFO L87 Difference]: Start difference. First operand 27 states and 30 transitions. Second operand has 43 states, 43 states have (on average 1.3953488372093024) internal successors, (60), 43 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:29:17,785 WARN L837 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.offset|) 0) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse0 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse3 (select .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse1 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse2 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse1 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< 14 (+ .cse0 .cse1 .cse2 .cse3)) (not (= 5 .cse1)) (not (= 5 .cse2)) (not (= 5 .cse0))))))))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (not (= |c_ULTIMATE.start_main_~#sum~0#1.base| |c_ULTIMATE.start_main_~a~0#1.base|)) (= |c_ULTIMATE.start_main_~i~0#1| 0) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse11 (select .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse6 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse9 (select .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse7 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse8 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse7 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< (+ .cse6 .cse7 .cse8 .cse9) 16) (not (= 5 .cse7)) (not (= 5 .cse8)) (not (= 5 .cse6)))))))))) is different from false [2022-11-18 18:29:20,442 WARN L837 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.offset|) 0) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse0 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse3 (select .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse1 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse2 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse1 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< 14 (+ .cse0 .cse1 .cse2 .cse3)) (not (= 5 .cse1)) (not (= 5 .cse2)) (not (= 5 .cse0))))))))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (not (= |c_ULTIMATE.start_main_~#sum~0#1.base| |c_ULTIMATE.start_main_~a~0#1.base|)) (<= 1 |c_ULTIMATE.start_main_~i~0#1|) (<= |c_ULTIMATE.start_main_~i~0#1| 1) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse11 (select .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse6 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse9 (select .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse7 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse8 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse7 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< (+ .cse6 .cse7 .cse8 .cse9) 16) (not (= 5 .cse7)) (not (= 5 .cse8)) (not (= 5 .cse6)))))))))) is different from false [2022-11-18 18:29:23,040 WARN L837 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.offset|) 0) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse0 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse3 (select .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse1 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse2 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse1 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< 14 (+ .cse0 .cse1 .cse2 .cse3)) (not (= 5 .cse1)) (not (= 5 .cse2)) (not (= 5 .cse0))))))))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (not (= |c_ULTIMATE.start_main_~#sum~0#1.base| |c_ULTIMATE.start_main_~a~0#1.base|)) (<= 2 |c_ULTIMATE.start_main_~i~0#1|) (<= |c_ULTIMATE.start_main_~i~0#1| 2) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse11 (select .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse6 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse9 (select .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse7 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse8 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse7 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< (+ .cse6 .cse7 .cse8 .cse9) 16) (not (= 5 .cse7)) (not (= 5 .cse8)) (not (= 5 .cse6)))))))))) is different from false [2022-11-18 18:29:25,758 WARN L837 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.offset|) 0) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse0 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse3 (select .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse1 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse2 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse1 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< 14 (+ .cse0 .cse1 .cse2 .cse3)) (not (= 5 .cse1)) (not (= 5 .cse2)) (not (= 5 .cse0))))))))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (not (= |c_ULTIMATE.start_main_~#sum~0#1.base| |c_ULTIMATE.start_main_~a~0#1.base|)) (<= 3 c_~N~0) (<= |c_ULTIMATE.start_main_~i~0#1| 2) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse11 (select .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse6 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse9 (select .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse7 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse8 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse7 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< (+ .cse6 .cse7 .cse8 .cse9) 16) (not (= 5 .cse7)) (not (= 5 .cse8)) (not (= 5 .cse6)))))))))) is different from false [2022-11-18 18:29:28,596 WARN L837 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.offset|) 0) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse0 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse3 (select .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse1 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse2 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse1 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< 14 (+ .cse0 .cse1 .cse2 .cse3)) (not (= 5 .cse1)) (not (= 5 .cse2)) (not (= 5 .cse0))))))))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (not (= |c_ULTIMATE.start_main_~#sum~0#1.base| |c_ULTIMATE.start_main_~a~0#1.base|)) (<= 3 c_~N~0) (<= |c_ULTIMATE.start_main_~i~0#1| 3) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse11 (select .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse6 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse9 (select .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse7 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse8 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse7 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< (+ .cse6 .cse7 .cse8 .cse9) 16) (not (= 5 .cse7)) (not (= 5 .cse8)) (not (= 5 .cse6)))))))))) is different from false [2022-11-18 18:29:31,652 WARN L837 $PredicateComparison]: unable to prove that (and (= (select (select |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.offset|) 0) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse4 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse5 (select .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse0 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse3 (select .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse1 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse2 (select (select (store .cse4 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse5 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse0 .cse1 .cse3))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< 14 (+ .cse0 .cse1 .cse2 .cse3)) (not (= 5 .cse1)) (not (= 5 .cse2)) (not (= 5 .cse0))))))))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (forall ((|ULTIMATE.start_main_~a~0#1.offset| Int) (v_ArrVal_301 (Array Int Int))) (let ((.cse10 (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_ArrVal_301))) (let ((.cse11 (select .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base|))) (let ((.cse6 (select v_ArrVal_301 |ULTIMATE.start_main_~a~0#1.offset|)) (.cse9 (select .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset|))) (let ((.cse7 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 4)))) (let ((.cse8 (select (select (store .cse10 |c_ULTIMATE.start_main_~#sum~0#1.base| (store .cse11 |c_ULTIMATE.start_main_~#sum~0#1.offset| (+ .cse6 .cse7 .cse9))) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |ULTIMATE.start_main_~a~0#1.offset| 8)))) (or (< (+ .cse6 .cse7 .cse8 .cse9) 16) (not (= 5 .cse7)) (not (= 5 .cse8)) (not (= 5 .cse6)))))))))) is different from false [2022-11-18 18:29:41,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:29:41,372 INFO L93 Difference]: Finished difference Result 57 states and 68 transitions. [2022-11-18 18:29:41,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2022-11-18 18:29:41,373 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 1.3953488372093024) internal successors, (60), 43 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-18 18:29:41,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:29:41,374 INFO L225 Difference]: With dead ends: 57 [2022-11-18 18:29:41,374 INFO L226 Difference]: Without dead ends: 51 [2022-11-18 18:29:41,377 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 7 IntricatePredicates, 0 DeprecatedPredicates, 888 ImplicationChecksByTransitivity, 55.0s TimeCoverageRelationStatistics Valid=462, Invalid=3972, Unknown=16, NotChecked=952, Total=5402 [2022-11-18 18:29:41,378 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 25 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 450 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 113 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-18 18:29:41,378 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 106 Invalid, 450 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 298 Invalid, 0 Unknown, 113 Unchecked, 1.7s Time] [2022-11-18 18:29:41,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-11-18 18:29:41,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 30. [2022-11-18 18:29:41,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 1.1724137931034482) internal successors, (34), 29 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:29:41,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 34 transitions. [2022-11-18 18:29:41,389 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 34 transitions. Word has length 26 [2022-11-18 18:29:41,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:29:41,389 INFO L495 AbstractCegarLoop]: Abstraction has 30 states and 34 transitions. [2022-11-18 18:29:41,390 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 1.3953488372093024) internal successors, (60), 43 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:29:41,390 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 34 transitions. [2022-11-18 18:29:41,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-18 18:29:41,390 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:29:41,390 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:29:41,402 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-18 18:29:41,602 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-11-18 18:29:41,602 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:29:41,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:29:41,603 INFO L85 PathProgramCache]: Analyzing trace with hash -2064736479, now seen corresponding path program 3 times [2022-11-18 18:29:41,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:29:41,603 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354497301] [2022-11-18 18:29:41,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:29:41,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:29:41,624 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:29:41,625 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [822026880] [2022-11-18 18:29:41,625 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:29:41,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:29:41,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:29:41,627 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:29:41,660 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-18 18:29:41,731 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-11-18 18:29:41,732 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:29:41,733 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-18 18:29:41,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:29:41,879 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:29:42,432 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:29:42,433 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-18 18:29:42,608 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:29:42,609 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-18 18:29:42,789 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:29:42,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 19 [2022-11-18 18:29:43,073 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 5 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-18 18:29:43,073 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:29:46,767 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:29:46,768 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 27 [2022-11-18 18:29:46,811 INFO L321 Elim1Store]: treesize reduction 8, result has 33.3 percent of original size [2022-11-18 18:29:46,812 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 30 [2022-11-18 18:29:48,958 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-18 18:29:48,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:29:48,958 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354497301] [2022-11-18 18:29:48,958 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:29:48,959 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [822026880] [2022-11-18 18:29:48,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [822026880] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:29:48,959 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:29:48,959 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 16 [2022-11-18 18:29:48,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852478564] [2022-11-18 18:29:48,959 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:29:48,960 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-11-18 18:29:48,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:29:48,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-18 18:29:48,960 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=174, Unknown=4, NotChecked=0, Total=240 [2022-11-18 18:29:48,961 INFO L87 Difference]: Start difference. First operand 30 states and 34 transitions. Second operand has 16 states, 16 states have (on average 2.3125) internal successors, (37), 16 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:29:49,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:29:49,253 INFO L93 Difference]: Finished difference Result 37 states and 42 transitions. [2022-11-18 18:29:49,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-18 18:29:49,254 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.3125) internal successors, (37), 16 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-18 18:29:49,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:29:49,255 INFO L225 Difference]: With dead ends: 37 [2022-11-18 18:29:49,255 INFO L226 Difference]: Without dead ends: 33 [2022-11-18 18:29:49,256 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 34 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=76, Invalid=192, Unknown=4, NotChecked=0, Total=272 [2022-11-18 18:29:49,256 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 9 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 41 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:29:49,257 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 40 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 41 Unchecked, 0.2s Time] [2022-11-18 18:29:49,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-11-18 18:29:49,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 27. [2022-11-18 18:29:49,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 26 states have (on average 1.1538461538461537) internal successors, (30), 26 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:29:49,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 30 transitions. [2022-11-18 18:29:49,266 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 30 transitions. Word has length 26 [2022-11-18 18:29:49,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:29:49,266 INFO L495 AbstractCegarLoop]: Abstraction has 27 states and 30 transitions. [2022-11-18 18:29:49,266 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.3125) internal successors, (37), 16 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:29:49,267 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 30 transitions. [2022-11-18 18:29:49,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-18 18:29:49,267 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:29:49,268 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:29:49,273 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-11-18 18:29:49,471 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-11-18 18:29:49,471 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:29:49,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:29:49,472 INFO L85 PathProgramCache]: Analyzing trace with hash -1441936411, now seen corresponding path program 4 times [2022-11-18 18:29:49,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:29:49,472 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215742653] [2022-11-18 18:29:49,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:29:49,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:29:49,490 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:29:49,490 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [643113618] [2022-11-18 18:29:49,490 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 18:29:49,490 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:29:49,491 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:29:49,510 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:29:49,527 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-18 18:29:49,608 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 18:29:49,608 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:29:49,610 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-18 18:29:49,612 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:29:49,629 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:29:49,705 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:29:49,865 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:29:50,432 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:29:50,650 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:29:50,651 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 21 [2022-11-18 18:29:51,205 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 18:29:51,206 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:29:58,886 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_393 Int) (v_ArrVal_394 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_109| Int)) (let ((.cse0 (+ |v_ULTIMATE.start_main_~i~0#1_109| 1))) (or (< |c_ULTIMATE.start_main_~i~0#1| .cse0) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_393)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_394) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_109| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< .cse0 |c_ULTIMATE.start_main_~i~0#1|)))) is different from false [2022-11-18 18:29:59,072 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 1 proven. 16 refuted. 0 times theorem prover too weak. 1 trivial. 3 not checked. [2022-11-18 18:29:59,072 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:29:59,073 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215742653] [2022-11-18 18:29:59,073 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:29:59,073 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [643113618] [2022-11-18 18:29:59,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [643113618] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:29:59,073 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:29:59,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 19 [2022-11-18 18:29:59,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035208422] [2022-11-18 18:29:59,074 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:29:59,074 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-11-18 18:29:59,074 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:29:59,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-18 18:29:59,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=240, Unknown=6, NotChecked=32, Total=342 [2022-11-18 18:29:59,075 INFO L87 Difference]: Start difference. First operand 27 states and 30 transitions. Second operand has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 19 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:01,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:01,911 INFO L93 Difference]: Finished difference Result 40 states and 45 transitions. [2022-11-18 18:30:01,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-18 18:30:01,911 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 19 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-18 18:30:01,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:01,912 INFO L225 Difference]: With dead ends: 40 [2022-11-18 18:30:01,913 INFO L226 Difference]: Without dead ends: 36 [2022-11-18 18:30:01,913 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 29 SyntacticMatches, 6 SemanticMatches, 21 ConstructedPredicates, 1 IntricatePredicates, 1 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 10.8s TimeCoverageRelationStatistics Valid=98, Invalid=362, Unknown=6, NotChecked=40, Total=506 [2022-11-18 18:30:01,914 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 12 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 53 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:01,914 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 44 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 45 Invalid, 0 Unknown, 53 Unchecked, 0.2s Time] [2022-11-18 18:30:01,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2022-11-18 18:30:01,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 33. [2022-11-18 18:30:01,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:01,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 38 transitions. [2022-11-18 18:30:01,929 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 38 transitions. Word has length 26 [2022-11-18 18:30:01,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:01,929 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 38 transitions. [2022-11-18 18:30:01,930 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.8421052631578947) internal successors, (35), 19 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:01,930 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 38 transitions. [2022-11-18 18:30:01,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-18 18:30:01,931 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:01,931 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:01,944 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-18 18:30:02,136 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:02,137 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:02,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:02,137 INFO L85 PathProgramCache]: Analyzing trace with hash -1384678109, now seen corresponding path program 5 times [2022-11-18 18:30:02,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:02,137 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682240079] [2022-11-18 18:30:02,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:02,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:02,150 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:02,151 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1348685691] [2022-11-18 18:30:02,151 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 18:30:02,151 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:02,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:02,153 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:02,177 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-18 18:30:02,260 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-11-18 18:30:02,260 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:30:02,262 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-18 18:30:02,268 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:02,292 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:30:02,436 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:30:02,710 INFO L321 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-18 18:30:02,710 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:30:02,987 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:30:03,192 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-11-18 18:30:03,271 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 18:30:03,272 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:30:04,737 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 21 [2022-11-18 18:30:04,751 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2022-11-18 18:30:04,905 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 18:30:04,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:30:04,905 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682240079] [2022-11-18 18:30:04,905 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:30:04,905 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1348685691] [2022-11-18 18:30:04,906 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1348685691] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:30:04,906 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:30:04,906 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 16 [2022-11-18 18:30:04,906 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286372351] [2022-11-18 18:30:04,906 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:30:04,907 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-11-18 18:30:04,907 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:30:04,907 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-18 18:30:04,907 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=191, Unknown=1, NotChecked=0, Total=240 [2022-11-18 18:30:04,908 INFO L87 Difference]: Start difference. First operand 33 states and 38 transitions. Second operand has 16 states, 16 states have (on average 2.0625) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:05,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:05,820 INFO L93 Difference]: Finished difference Result 54 states and 63 transitions. [2022-11-18 18:30:05,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 18:30:05,821 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0625) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-11-18 18:30:05,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:05,822 INFO L225 Difference]: With dead ends: 54 [2022-11-18 18:30:05,822 INFO L226 Difference]: Without dead ends: 42 [2022-11-18 18:30:05,822 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 34 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=67, Invalid=274, Unknown=1, NotChecked=0, Total=342 [2022-11-18 18:30:05,823 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 8 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 123 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 123 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:05,823 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 64 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 123 Invalid, 0 Unknown, 46 Unchecked, 0.6s Time] [2022-11-18 18:30:05,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-11-18 18:30:05,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2022-11-18 18:30:05,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 40 states have (on average 1.175) internal successors, (47), 40 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:05,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 47 transitions. [2022-11-18 18:30:05,838 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 47 transitions. Word has length 26 [2022-11-18 18:30:05,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:05,838 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 47 transitions. [2022-11-18 18:30:05,838 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.0625) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:05,838 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 47 transitions. [2022-11-18 18:30:05,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-18 18:30:05,839 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:05,839 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:05,848 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-11-18 18:30:06,043 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:06,044 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:06,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:06,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1377888545, now seen corresponding path program 6 times [2022-11-18 18:30:06,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:06,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317434961] [2022-11-18 18:30:06,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:06,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:06,055 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:06,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1774510679] [2022-11-18 18:30:06,058 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 18:30:06,058 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:06,058 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:06,059 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:06,079 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-18 18:30:06,177 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-11-18 18:30:06,177 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:30:06,178 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-18 18:30:06,179 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:06,943 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:06,944 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:30:07,551 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:07,551 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:30:07,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317434961] [2022-11-18 18:30:07,551 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:30:07,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1774510679] [2022-11-18 18:30:07,552 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1774510679] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:30:07,552 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:30:07,552 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 15 [2022-11-18 18:30:07,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048648874] [2022-11-18 18:30:07,552 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:30:07,553 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-11-18 18:30:07,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:30:07,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-11-18 18:30:07,554 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2022-11-18 18:30:07,554 INFO L87 Difference]: Start difference. First operand 41 states and 47 transitions. Second operand has 15 states, 15 states have (on average 2.6) internal successors, (39), 15 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:09,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:09,478 INFO L93 Difference]: Finished difference Result 66 states and 76 transitions. [2022-11-18 18:30:09,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-18 18:30:09,478 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 15 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-18 18:30:09,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:09,479 INFO L225 Difference]: With dead ends: 66 [2022-11-18 18:30:09,479 INFO L226 Difference]: Without dead ends: 62 [2022-11-18 18:30:09,480 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 36 SyntacticMatches, 5 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=149, Invalid=403, Unknown=0, NotChecked=0, Total=552 [2022-11-18 18:30:09,481 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 52 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 230 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 242 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 230 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:09,481 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [52 Valid, 23 Invalid, 242 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 230 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-11-18 18:30:09,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2022-11-18 18:30:09,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 41. [2022-11-18 18:30:09,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 40 states have (on average 1.175) internal successors, (47), 40 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:09,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 47 transitions. [2022-11-18 18:30:09,512 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 47 transitions. Word has length 28 [2022-11-18 18:30:09,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:09,512 INFO L495 AbstractCegarLoop]: Abstraction has 41 states and 47 transitions. [2022-11-18 18:30:09,512 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.6) internal successors, (39), 15 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:09,513 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 47 transitions. [2022-11-18 18:30:09,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-18 18:30:09,513 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:09,513 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:09,522 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-18 18:30:09,722 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-11-18 18:30:09,723 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:09,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:09,723 INFO L85 PathProgramCache]: Analyzing trace with hash -798779835, now seen corresponding path program 7 times [2022-11-18 18:30:09,723 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:09,723 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288337012] [2022-11-18 18:30:09,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:09,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:09,736 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:09,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [873847114] [2022-11-18 18:30:09,736 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-18 18:30:09,737 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:09,737 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:09,738 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:09,746 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-18 18:30:09,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:30:09,844 INFO L263 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-18 18:30:09,845 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:10,710 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 22 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:10,711 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:30:11,286 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 22 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:11,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:30:11,287 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288337012] [2022-11-18 18:30:11,287 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:30:11,287 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [873847114] [2022-11-18 18:30:11,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [873847114] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:30:11,288 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:30:11,288 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 15 [2022-11-18 18:30:11,289 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425303613] [2022-11-18 18:30:11,289 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:30:11,289 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-11-18 18:30:11,289 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:30:11,290 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-11-18 18:30:11,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2022-11-18 18:30:11,291 INFO L87 Difference]: Start difference. First operand 41 states and 47 transitions. Second operand has 15 states, 15 states have (on average 2.6666666666666665) internal successors, (40), 15 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:12,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:12,284 INFO L93 Difference]: Finished difference Result 73 states and 85 transitions. [2022-11-18 18:30:12,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-18 18:30:12,285 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.6666666666666665) internal successors, (40), 15 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-11-18 18:30:12,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:12,286 INFO L225 Difference]: With dead ends: 73 [2022-11-18 18:30:12,286 INFO L226 Difference]: Without dead ends: 48 [2022-11-18 18:30:12,287 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 38 SyntacticMatches, 5 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=110, Invalid=270, Unknown=0, NotChecked=0, Total=380 [2022-11-18 18:30:12,287 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 68 mSDsluCounter, 14 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 23 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:12,288 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [68 Valid, 23 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-18 18:30:12,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-11-18 18:30:12,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 35. [2022-11-18 18:30:12,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:12,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 40 transitions. [2022-11-18 18:30:12,304 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 40 transitions. Word has length 29 [2022-11-18 18:30:12,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:12,304 INFO L495 AbstractCegarLoop]: Abstraction has 35 states and 40 transitions. [2022-11-18 18:30:12,304 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.6666666666666665) internal successors, (40), 15 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:12,304 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 40 transitions. [2022-11-18 18:30:12,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-18 18:30:12,305 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:12,305 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:12,311 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-11-18 18:30:12,505 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-11-18 18:30:12,505 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:12,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:12,506 INFO L85 PathProgramCache]: Analyzing trace with hash -1338916473, now seen corresponding path program 8 times [2022-11-18 18:30:12,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:12,506 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283185460] [2022-11-18 18:30:12,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:12,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:12,520 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:12,523 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1771382541] [2022-11-18 18:30:12,523 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:30:12,523 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:12,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:12,525 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:12,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-18 18:30:12,627 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:30:12,627 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:30:12,629 INFO L263 TraceCheckSpWp]: Trace formula consists of 163 conjuncts, 28 conjunts are in the unsatisfiable core [2022-11-18 18:30:12,631 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:13,016 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:30:13,298 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:30:13,299 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:30:13,749 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:30:13,750 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:30:14,002 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:30:14,002 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:30:14,277 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:30:14,377 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 13 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 18:30:14,377 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:30:14,643 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_574 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_574) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)))) is different from false [2022-11-18 18:30:14,682 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_574 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_574) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 8 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:30:14,736 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_574 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_574) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 8 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:30:17,795 INFO L321 Elim1Store]: treesize reduction 29, result has 46.3 percent of original size [2022-11-18 18:30:17,796 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 37 [2022-11-18 18:30:17,855 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:30:17,856 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 34 [2022-11-18 18:30:17,871 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:30:18,456 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 2 trivial. 14 not checked. [2022-11-18 18:30:18,456 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:30:18,456 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283185460] [2022-11-18 18:30:18,456 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:30:18,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1771382541] [2022-11-18 18:30:18,457 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1771382541] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:30:18,457 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:30:18,457 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 23 [2022-11-18 18:30:18,457 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642823107] [2022-11-18 18:30:18,457 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:30:18,458 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-11-18 18:30:18,458 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:30:18,458 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-11-18 18:30:18,458 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=318, Unknown=7, NotChecked=114, Total=506 [2022-11-18 18:30:18,459 INFO L87 Difference]: Start difference. First operand 35 states and 40 transitions. Second operand has 23 states, 23 states have (on average 2.0869565217391304) internal successors, (48), 23 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:20,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:20,637 INFO L93 Difference]: Finished difference Result 58 states and 68 transitions. [2022-11-18 18:30:20,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-18 18:30:20,638 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 2.0869565217391304) internal successors, (48), 23 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-11-18 18:30:20,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:20,639 INFO L225 Difference]: With dead ends: 58 [2022-11-18 18:30:20,639 INFO L226 Difference]: Without dead ends: 49 [2022-11-18 18:30:20,639 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 39 SyntacticMatches, 5 SemanticMatches, 26 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=95, Invalid=510, Unknown=7, NotChecked=144, Total=756 [2022-11-18 18:30:20,640 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 17 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 78 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 106 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:20,640 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 78 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 144 Invalid, 0 Unknown, 106 Unchecked, 0.8s Time] [2022-11-18 18:30:20,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-11-18 18:30:20,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2022-11-18 18:30:20,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 48 states have (on average 1.1666666666666667) internal successors, (56), 48 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:20,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 56 transitions. [2022-11-18 18:30:20,664 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 56 transitions. Word has length 31 [2022-11-18 18:30:20,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:20,665 INFO L495 AbstractCegarLoop]: Abstraction has 49 states and 56 transitions. [2022-11-18 18:30:20,665 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 2.0869565217391304) internal successors, (48), 23 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:20,665 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 56 transitions. [2022-11-18 18:30:20,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-18 18:30:20,666 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:20,666 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:20,672 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-11-18 18:30:20,872 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-11-18 18:30:20,872 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:20,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:20,873 INFO L85 PathProgramCache]: Analyzing trace with hash -1760809405, now seen corresponding path program 9 times [2022-11-18 18:30:20,873 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:20,873 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821456882] [2022-11-18 18:30:20,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:20,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:20,884 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:20,884 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [655837857] [2022-11-18 18:30:20,884 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:30:20,885 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:20,885 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:20,886 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:20,906 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-18 18:30:21,007 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-18 18:30:21,007 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:30:21,009 INFO L263 TraceCheckSpWp]: Trace formula consists of 163 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-18 18:30:21,011 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:21,242 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 18:30:21,460 INFO L321 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-18 18:30:21,460 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 30 [2022-11-18 18:30:21,844 INFO L321 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-18 18:30:21,844 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 34 [2022-11-18 18:30:22,441 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:30:22,443 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2022-11-18 18:30:22,810 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 18:30:22,820 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:30:22,821 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 14 [2022-11-18 18:30:23,423 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:23,423 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:30:34,897 INFO L321 Elim1Store]: treesize reduction 68, result has 48.1 percent of original size [2022-11-18 18:30:34,898 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 38 treesize of output 75 [2022-11-18 18:30:35,060 INFO L321 Elim1Store]: treesize reduction 10, result has 69.7 percent of original size [2022-11-18 18:30:35,061 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 76 treesize of output 76 [2022-11-18 18:30:35,083 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:30:35,671 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 20 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:35,671 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:30:35,672 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821456882] [2022-11-18 18:30:35,672 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:30:35,672 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [655837857] [2022-11-18 18:30:35,672 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [655837857] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:30:35,672 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:30:35,673 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17] total 31 [2022-11-18 18:30:35,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201814206] [2022-11-18 18:30:35,673 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:30:35,673 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-11-18 18:30:35,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:30:35,674 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-11-18 18:30:35,675 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=740, Unknown=5, NotChecked=0, Total=930 [2022-11-18 18:30:35,675 INFO L87 Difference]: Start difference. First operand 49 states and 56 transitions. Second operand has 31 states, 31 states have (on average 1.6774193548387097) internal successors, (52), 31 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:39,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:39,298 INFO L93 Difference]: Finished difference Result 64 states and 73 transitions. [2022-11-18 18:30:39,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 18:30:39,299 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.6774193548387097) internal successors, (52), 31 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-11-18 18:30:39,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:39,299 INFO L225 Difference]: With dead ends: 64 [2022-11-18 18:30:39,299 INFO L226 Difference]: Without dead ends: 52 [2022-11-18 18:30:39,300 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 382 ImplicationChecksByTransitivity, 14.8s TimeCoverageRelationStatistics Valid=378, Invalid=1423, Unknown=5, NotChecked=0, Total=1806 [2022-11-18 18:30:39,300 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 55 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 238 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 391 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 238 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 93 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:39,300 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 49 Invalid, 391 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 238 Invalid, 0 Unknown, 93 Unchecked, 1.3s Time] [2022-11-18 18:30:39,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2022-11-18 18:30:39,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 46. [2022-11-18 18:30:39,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 45 states have (on average 1.1555555555555554) internal successors, (52), 45 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:39,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 52 transitions. [2022-11-18 18:30:39,319 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 52 transitions. Word has length 31 [2022-11-18 18:30:39,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:39,320 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 52 transitions. [2022-11-18 18:30:39,320 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 1.6774193548387097) internal successors, (52), 31 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:39,320 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 52 transitions. [2022-11-18 18:30:39,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-11-18 18:30:39,320 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:39,320 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:39,326 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-18 18:30:39,523 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-11-18 18:30:39,523 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:39,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:39,524 INFO L85 PathProgramCache]: Analyzing trace with hash -719182775, now seen corresponding path program 10 times [2022-11-18 18:30:39,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:39,524 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724273682] [2022-11-18 18:30:39,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:39,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:39,537 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:39,537 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2121485489] [2022-11-18 18:30:39,537 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 18:30:39,537 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:39,537 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:39,538 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:39,563 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-18 18:30:39,659 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 18:30:39,659 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:30:39,661 INFO L263 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 18:30:39,662 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:40,676 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 16 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:40,677 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:30:41,400 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 16 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:41,400 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:30:41,400 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724273682] [2022-11-18 18:30:41,400 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:30:41,401 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2121485489] [2022-11-18 18:30:41,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2121485489] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:30:41,401 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:30:41,401 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 18 [2022-11-18 18:30:41,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1292118301] [2022-11-18 18:30:41,402 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:30:41,402 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-18 18:30:41,402 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:30:41,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-18 18:30:41,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2022-11-18 18:30:41,403 INFO L87 Difference]: Start difference. First operand 46 states and 52 transitions. Second operand has 18 states, 18 states have (on average 2.611111111111111) internal successors, (47), 18 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:43,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:43,626 INFO L93 Difference]: Finished difference Result 77 states and 89 transitions. [2022-11-18 18:30:43,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-18 18:30:43,627 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.611111111111111) internal successors, (47), 18 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-11-18 18:30:43,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:43,627 INFO L225 Difference]: With dead ends: 77 [2022-11-18 18:30:43,627 INFO L226 Difference]: Without dead ends: 73 [2022-11-18 18:30:43,628 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 42 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 191 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=209, Invalid=603, Unknown=0, NotChecked=0, Total=812 [2022-11-18 18:30:43,628 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 71 mSDsluCounter, 23 mSDsCounter, 0 mSdLazyCounter, 299 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 312 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 299 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:43,629 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 32 Invalid, 312 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 299 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-11-18 18:30:43,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-11-18 18:30:43,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 52. [2022-11-18 18:30:43,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 51 states have (on average 1.1764705882352942) internal successors, (60), 51 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:43,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 60 transitions. [2022-11-18 18:30:43,647 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 60 transitions. Word has length 33 [2022-11-18 18:30:43,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:43,647 INFO L495 AbstractCegarLoop]: Abstraction has 52 states and 60 transitions. [2022-11-18 18:30:43,647 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.611111111111111) internal successors, (47), 18 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:43,648 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 60 transitions. [2022-11-18 18:30:43,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-18 18:30:43,648 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:43,648 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:43,655 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-18 18:30:43,855 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:43,855 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:43,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:43,856 INFO L85 PathProgramCache]: Analyzing trace with hash 1661543779, now seen corresponding path program 11 times [2022-11-18 18:30:43,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:43,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454537458] [2022-11-18 18:30:43,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:43,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:43,879 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:43,883 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [589687204] [2022-11-18 18:30:43,883 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 18:30:43,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:43,884 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:43,885 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:43,907 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-18 18:30:44,067 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-11-18 18:30:44,068 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:30:44,069 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 18:30:44,070 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:45,051 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 35 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:45,051 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:30:45,823 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 35 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:30:45,823 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:30:45,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1454537458] [2022-11-18 18:30:45,823 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:30:45,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [589687204] [2022-11-18 18:30:45,823 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [589687204] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:30:45,824 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:30:45,824 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 18 [2022-11-18 18:30:45,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1940359841] [2022-11-18 18:30:45,824 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:30:45,824 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-18 18:30:45,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:30:45,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-18 18:30:45,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2022-11-18 18:30:45,825 INFO L87 Difference]: Start difference. First operand 52 states and 60 transitions. Second operand has 18 states, 18 states have (on average 2.6666666666666665) internal successors, (48), 18 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:46,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:30:46,991 INFO L93 Difference]: Finished difference Result 84 states and 98 transitions. [2022-11-18 18:30:46,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-18 18:30:46,999 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.6666666666666665) internal successors, (48), 18 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-11-18 18:30:46,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:30:46,999 INFO L225 Difference]: With dead ends: 84 [2022-11-18 18:30:46,999 INFO L226 Difference]: Without dead ends: 56 [2022-11-18 18:30:47,000 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 44 SyntacticMatches, 6 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=153, Invalid=399, Unknown=0, NotChecked=0, Total=552 [2022-11-18 18:30:47,000 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 63 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 160 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-18 18:30:47,001 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 28 Invalid, 160 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-18 18:30:47,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-11-18 18:30:47,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 43. [2022-11-18 18:30:47,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 42 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:47,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 50 transitions. [2022-11-18 18:30:47,015 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 50 transitions. Word has length 34 [2022-11-18 18:30:47,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:30:47,016 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 50 transitions. [2022-11-18 18:30:47,016 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.6666666666666665) internal successors, (48), 18 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:30:47,016 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 50 transitions. [2022-11-18 18:30:47,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-18 18:30:47,016 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:30:47,016 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:30:47,023 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-11-18 18:30:47,216 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:47,217 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:30:47,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:30:47,217 INFO L85 PathProgramCache]: Analyzing trace with hash 83735393, now seen corresponding path program 12 times [2022-11-18 18:30:47,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:30:47,217 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138831049] [2022-11-18 18:30:47,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:30:47,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:30:47,230 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:30:47,230 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [949645255] [2022-11-18 18:30:47,230 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 18:30:47,230 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:30:47,231 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:30:47,232 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:30:47,255 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-18 18:30:47,395 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-11-18 18:30:47,396 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:30:47,398 INFO L263 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-18 18:30:47,400 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:30:47,905 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 18:30:48,116 INFO L321 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-18 18:30:48,116 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:30:54,603 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:30:54,604 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-11-18 18:30:56,977 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:30:56,978 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-11-18 18:30:59,291 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:30:59,292 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-11-18 18:31:01,681 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:31:01,797 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 20 proven. 38 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 18:31:01,797 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:31:02,081 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_788 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_788) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)) 5)) is different from false [2022-11-18 18:31:02,398 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_788 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_788) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 12 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:31:03,040 INFO L321 Elim1Store]: treesize reduction 29, result has 46.3 percent of original size [2022-11-18 18:31:03,041 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 37 [2022-11-18 18:31:03,192 INFO L321 Elim1Store]: treesize reduction 12, result has 63.6 percent of original size [2022-11-18 18:31:03,193 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 48 [2022-11-18 18:31:03,253 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:31:03,937 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 18 proven. 26 refuted. 2 times theorem prover too weak. 2 trivial. 12 not checked. [2022-11-18 18:31:03,937 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:31:03,937 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138831049] [2022-11-18 18:31:03,937 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:31:03,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [949645255] [2022-11-18 18:31:03,938 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [949645255] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:31:03,938 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:31:03,938 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 25 [2022-11-18 18:31:03,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365858608] [2022-11-18 18:31:03,939 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:31:03,939 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-11-18 18:31:03,939 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:31:03,940 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 18:31:03,940 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=420, Unknown=14, NotChecked=86, Total=600 [2022-11-18 18:31:03,940 INFO L87 Difference]: Start difference. First operand 43 states and 50 transitions. Second operand has 25 states, 25 states have (on average 2.32) internal successors, (58), 25 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:05,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:31:05,299 INFO L93 Difference]: Finished difference Result 55 states and 64 transitions. [2022-11-18 18:31:05,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 18:31:05,300 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.32) internal successors, (58), 25 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-11-18 18:31:05,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:31:05,300 INFO L225 Difference]: With dead ends: 55 [2022-11-18 18:31:05,300 INFO L226 Difference]: Without dead ends: 46 [2022-11-18 18:31:05,301 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 46 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 15.7s TimeCoverageRelationStatistics Valid=117, Invalid=633, Unknown=14, NotChecked=106, Total=870 [2022-11-18 18:31:05,302 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 5 mSDsluCounter, 73 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 107 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 18:31:05,302 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 84 Invalid, 193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 81 Invalid, 0 Unknown, 107 Unchecked, 0.4s Time] [2022-11-18 18:31:05,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-11-18 18:31:05,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-11-18 18:31:05,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:05,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2022-11-18 18:31:05,320 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 53 transitions. Word has length 36 [2022-11-18 18:31:05,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:31:05,320 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-11-18 18:31:05,320 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.32) internal successors, (58), 25 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:05,320 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 53 transitions. [2022-11-18 18:31:05,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-18 18:31:05,321 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:31:05,321 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:31:05,326 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-11-18 18:31:05,522 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:05,522 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:31:05,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:31:05,522 INFO L85 PathProgramCache]: Analyzing trace with hash -338157539, now seen corresponding path program 13 times [2022-11-18 18:31:05,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:31:05,523 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369576116] [2022-11-18 18:31:05,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:31:05,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:31:05,551 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:31:05,551 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [898890109] [2022-11-18 18:31:05,551 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-18 18:31:05,551 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:05,552 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:31:05,553 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:31:05,558 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-18 18:31:05,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:31:05,670 INFO L263 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-18 18:31:05,672 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:31:05,710 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:31:06,068 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:31:06,344 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:06,345 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:31:06,720 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:06,726 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:06,731 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:06,732 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 38 [2022-11-18 18:31:07,372 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-11-18 18:31:07,715 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-11-18 18:31:08,157 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:08,159 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:31:08,159 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 10 [2022-11-18 18:31:08,274 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 22 proven. 31 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-18 18:31:08,274 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:31:08,778 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_852 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_852) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 8 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:31:12,574 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_259| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_259|)) (forall ((v_ArrVal_850 Int) (|v_ULTIMATE.start_main_~i~0#1_258| Int) (v_ArrVal_852 (Array Int Int))) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_259| 1) |v_ULTIMATE.start_main_~i~0#1_258|)) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_259| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) 5) (+ (* |v_ULTIMATE.start_main_~i~0#1_258| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_850)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_852) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 8 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5))))) is different from false [2022-11-18 18:31:12,758 INFO L321 Elim1Store]: treesize reduction 94, result has 28.2 percent of original size [2022-11-18 18:31:12,759 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 38 treesize of output 49 [2022-11-18 18:31:12,934 INFO L321 Elim1Store]: treesize reduction 12, result has 63.6 percent of original size [2022-11-18 18:31:12,934 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 48 [2022-11-18 18:31:12,956 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:31:13,523 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 21 proven. 23 refuted. 0 times theorem prover too weak. 7 trivial. 9 not checked. [2022-11-18 18:31:13,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:31:13,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369576116] [2022-11-18 18:31:13,523 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:31:13,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [898890109] [2022-11-18 18:31:13,524 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [898890109] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:31:13,524 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:31:13,524 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 27 [2022-11-18 18:31:13,524 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1514527133] [2022-11-18 18:31:13,524 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:31:13,524 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-11-18 18:31:13,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:31:13,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-18 18:31:13,526 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=499, Unknown=10, NotChecked=94, Total=702 [2022-11-18 18:31:13,526 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. Second operand has 27 states, 27 states have (on average 1.9259259259259258) internal successors, (52), 27 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:14,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:31:14,288 INFO L93 Difference]: Finished difference Result 58 states and 67 transitions. [2022-11-18 18:31:14,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 18:31:14,289 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 1.9259259259259258) internal successors, (52), 27 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-11-18 18:31:14,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:31:14,290 INFO L225 Difference]: With dead ends: 58 [2022-11-18 18:31:14,290 INFO L226 Difference]: Without dead ends: 46 [2022-11-18 18:31:14,291 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 199 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=109, Invalid=591, Unknown=10, NotChecked=102, Total=812 [2022-11-18 18:31:14,291 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 1 mSDsluCounter, 69 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 103 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 18:31:14,292 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 79 Invalid, 195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 88 Invalid, 0 Unknown, 103 Unchecked, 0.4s Time] [2022-11-18 18:31:14,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-11-18 18:31:14,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-11-18 18:31:14,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 45 states have (on average 1.1555555555555554) internal successors, (52), 45 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:14,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 52 transitions. [2022-11-18 18:31:14,315 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 52 transitions. Word has length 36 [2022-11-18 18:31:14,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:31:14,315 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 52 transitions. [2022-11-18 18:31:14,315 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 1.9259259259259258) internal successors, (52), 27 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:14,315 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 52 transitions. [2022-11-18 18:31:14,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-18 18:31:14,316 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:31:14,316 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:31:14,321 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-11-18 18:31:14,519 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:14,519 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:31:14,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:31:14,520 INFO L85 PathProgramCache]: Analyzing trace with hash -1876186655, now seen corresponding path program 14 times [2022-11-18 18:31:14,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:31:14,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410861416] [2022-11-18 18:31:14,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:31:14,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:31:14,530 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:31:14,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1054520252] [2022-11-18 18:31:14,531 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:31:14,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:14,531 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:31:14,532 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:31:14,559 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-18 18:31:14,662 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:31:14,662 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:31:14,664 INFO L263 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-18 18:31:14,666 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:31:14,911 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:31:15,176 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:15,177 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:31:15,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:15,377 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:31:15,555 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:15,556 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:31:15,960 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:15,961 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:31:16,217 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:31:16,338 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 22 proven. 23 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 18:31:16,338 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:31:16,630 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_915 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_915) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)))) is different from false [2022-11-18 18:31:19,658 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_275| Int) (v_ArrVal_915 (Array Int Int)) (v_ArrVal_913 Int) (v_ArrVal_911 Int)) (or (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_911) (+ (* |v_ULTIMATE.start_main_~i~0#1_275| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_913)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_915) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 4)) 5) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_275|)))) is different from false [2022-11-18 18:31:21,713 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_276| Int)) (or (forall ((|v_ULTIMATE.start_main_~i~0#1_275| Int) (v_ArrVal_915 (Array Int Int)) (v_ArrVal_913 Int) (v_ArrVal_911 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_276| 1) |v_ULTIMATE.start_main_~i~0#1_275|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_276| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_911) (+ (* |v_ULTIMATE.start_main_~i~0#1_275| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_913)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_915) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 4))))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_276|)))) is different from false [2022-11-18 18:31:23,761 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_909 Int) (|v_ULTIMATE.start_main_~i~0#1_275| Int) (v_ArrVal_915 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_276| Int) (v_ArrVal_913 Int) (v_ArrVal_911 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_276| 1) |v_ULTIMATE.start_main_~i~0#1_275|)) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_276|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_909) (+ (* |v_ULTIMATE.start_main_~i~0#1_276| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_911) (+ (* |v_ULTIMATE.start_main_~i~0#1_275| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_913)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_915) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 4))))) is different from false [2022-11-18 18:31:25,829 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_277| Int)) (or (forall ((v_ArrVal_909 Int) (|v_ULTIMATE.start_main_~i~0#1_275| Int) (v_ArrVal_915 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_276| Int) (v_ArrVal_913 Int) (v_ArrVal_911 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_276| 1) |v_ULTIMATE.start_main_~i~0#1_275|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_277| 4)) v_ArrVal_909) (+ (* |v_ULTIMATE.start_main_~i~0#1_276| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_911) (+ (* |v_ULTIMATE.start_main_~i~0#1_275| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_913)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_915) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 4))) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_277| 1) |v_ULTIMATE.start_main_~i~0#1_276|)))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_277|)))) is different from false [2022-11-18 18:31:26,104 INFO L321 Elim1Store]: treesize reduction 203, result has 19.4 percent of original size [2022-11-18 18:31:26,105 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 45 treesize of output 61 [2022-11-18 18:31:26,145 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:31:26,145 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 34 [2022-11-18 18:31:26,186 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:31:26,463 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 18 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 18 not checked. [2022-11-18 18:31:26,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:31:26,464 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410861416] [2022-11-18 18:31:26,464 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:31:26,464 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1054520252] [2022-11-18 18:31:26,464 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1054520252] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:31:26,464 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:31:26,464 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15] total 25 [2022-11-18 18:31:26,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [560166604] [2022-11-18 18:31:26,465 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:31:26,465 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-11-18 18:31:26,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:31:26,466 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 18:31:26,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=308, Unknown=9, NotChecked=200, Total=600 [2022-11-18 18:31:26,466 INFO L87 Difference]: Start difference. First operand 46 states and 52 transitions. Second operand has 25 states, 25 states have (on average 1.84) internal successors, (46), 25 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:27,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:31:27,130 INFO L93 Difference]: Finished difference Result 55 states and 62 transitions. [2022-11-18 18:31:27,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 18:31:27,130 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.84) internal successors, (46), 25 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-11-18 18:31:27,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:31:27,131 INFO L225 Difference]: With dead ends: 55 [2022-11-18 18:31:27,131 INFO L226 Difference]: Without dead ends: 40 [2022-11-18 18:31:27,131 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 10.5s TimeCoverageRelationStatistics Valid=83, Invalid=308, Unknown=9, NotChecked=200, Total=600 [2022-11-18 18:31:27,132 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 11 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 231 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 133 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-18 18:31:27,133 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 81 Invalid, 231 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 92 Invalid, 0 Unknown, 133 Unchecked, 0.5s Time] [2022-11-18 18:31:27,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-11-18 18:31:27,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2022-11-18 18:31:27,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 39 states have (on average 1.1025641025641026) internal successors, (43), 39 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:27,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 43 transitions. [2022-11-18 18:31:27,153 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 43 transitions. Word has length 36 [2022-11-18 18:31:27,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:31:27,153 INFO L495 AbstractCegarLoop]: Abstraction has 40 states and 43 transitions. [2022-11-18 18:31:27,154 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.84) internal successors, (46), 25 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:27,154 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 43 transitions. [2022-11-18 18:31:27,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-11-18 18:31:27,154 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:31:27,155 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:31:27,160 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-11-18 18:31:27,359 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-11-18 18:31:27,360 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:31:27,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:31:27,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1146006857, now seen corresponding path program 15 times [2022-11-18 18:31:27,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:31:27,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595851550] [2022-11-18 18:31:27,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:31:27,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:31:27,383 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:31:27,383 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [848867074] [2022-11-18 18:31:27,383 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:31:27,383 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:27,384 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:31:27,385 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:31:27,399 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-18 18:31:27,558 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-11-18 18:31:27,558 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:31:27,560 INFO L263 TraceCheckSpWp]: Trace formula consists of 192 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-18 18:31:27,560 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:31:28,746 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 51 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:31:28,746 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:31:29,718 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 51 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:31:29,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:31:29,718 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595851550] [2022-11-18 18:31:29,718 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:31:29,718 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [848867074] [2022-11-18 18:31:29,719 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [848867074] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:31:29,719 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:31:29,719 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 21 [2022-11-18 18:31:29,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [267977172] [2022-11-18 18:31:29,719 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:31:29,720 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-18 18:31:29,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:31:29,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-18 18:31:29,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=309, Unknown=0, NotChecked=0, Total=420 [2022-11-18 18:31:29,721 INFO L87 Difference]: Start difference. First operand 40 states and 43 transitions. Second operand has 21 states, 21 states have (on average 2.6666666666666665) internal successors, (56), 21 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:31,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:31:31,113 INFO L93 Difference]: Finished difference Result 86 states and 96 transitions. [2022-11-18 18:31:31,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 18:31:31,114 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.6666666666666665) internal successors, (56), 21 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-11-18 18:31:31,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:31:31,114 INFO L225 Difference]: With dead ends: 86 [2022-11-18 18:31:31,114 INFO L226 Difference]: Without dead ends: 55 [2022-11-18 18:31:31,115 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 50 SyntacticMatches, 7 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=203, Invalid=553, Unknown=0, NotChecked=0, Total=756 [2022-11-18 18:31:31,116 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 86 mSDsluCounter, 16 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-18 18:31:31,116 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [86 Valid, 25 Invalid, 206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-11-18 18:31:31,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-11-18 18:31:31,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 42. [2022-11-18 18:31:31,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 41 states have (on average 1.0975609756097562) internal successors, (45), 41 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:31,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 45 transitions. [2022-11-18 18:31:31,138 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 45 transitions. Word has length 39 [2022-11-18 18:31:31,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:31:31,139 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 45 transitions. [2022-11-18 18:31:31,139 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.6666666666666665) internal successors, (56), 21 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:31,139 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 45 transitions. [2022-11-18 18:31:31,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-11-18 18:31:31,140 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:31:31,140 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:31:31,145 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-11-18 18:31:31,343 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-11-18 18:31:31,343 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:31:31,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:31:31,344 INFO L85 PathProgramCache]: Analyzing trace with hash 127479307, now seen corresponding path program 16 times [2022-11-18 18:31:31,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:31:31,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689990246] [2022-11-18 18:31:31,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:31:31,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:31:31,358 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:31:31,358 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [129381664] [2022-11-18 18:31:31,358 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 18:31:31,358 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:31,359 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:31:31,360 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:31:31,391 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-18 18:31:31,533 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 18:31:31,533 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:31:31,535 INFO L263 TraceCheckSpWp]: Trace formula consists of 199 conjuncts, 45 conjunts are in the unsatisfiable core [2022-11-18 18:31:31,537 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:31:31,548 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:31:31,680 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:31:31,822 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:31:32,438 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:32,703 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:33,040 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:33,341 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:33,655 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:31:33,655 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 21 [2022-11-18 18:31:34,456 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 18 proven. 53 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-18 18:31:34,457 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:31:38,108 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:31:38,108 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 32 treesize of output 38 [2022-11-18 18:31:38,150 INFO L321 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-11-18 18:31:38,151 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 28 [2022-11-18 18:31:39,241 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:31:39,241 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:31:39,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689990246] [2022-11-18 18:31:39,241 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:31:39,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [129381664] [2022-11-18 18:31:39,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [129381664] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:31:39,242 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:31:39,242 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 23] total 39 [2022-11-18 18:31:39,242 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347207117] [2022-11-18 18:31:39,242 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:31:39,242 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-11-18 18:31:39,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:31:39,243 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-11-18 18:31:39,244 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=265, Invalid=1217, Unknown=0, NotChecked=0, Total=1482 [2022-11-18 18:31:39,245 INFO L87 Difference]: Start difference. First operand 42 states and 45 transitions. Second operand has 39 states, 39 states have (on average 1.7179487179487178) internal successors, (67), 39 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:45,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:31:45,116 INFO L93 Difference]: Finished difference Result 77 states and 89 transitions. [2022-11-18 18:31:45,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-11-18 18:31:45,116 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 1.7179487179487178) internal successors, (67), 39 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2022-11-18 18:31:45,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:31:45,117 INFO L225 Difference]: With dead ends: 77 [2022-11-18 18:31:45,117 INFO L226 Difference]: Without dead ends: 73 [2022-11-18 18:31:45,118 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1027 ImplicationChecksByTransitivity, 10.2s TimeCoverageRelationStatistics Valid=579, Invalid=2842, Unknown=1, NotChecked=0, Total=3422 [2022-11-18 18:31:45,119 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 94 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 391 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 203 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 18:31:45,119 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [94 Valid, 91 Invalid, 391 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 160 Invalid, 0 Unknown, 203 Unchecked, 0.9s Time] [2022-11-18 18:31:45,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-11-18 18:31:45,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 57. [2022-11-18 18:31:45,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 56 states have (on average 1.1607142857142858) internal successors, (65), 56 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:45,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 65 transitions. [2022-11-18 18:31:45,150 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 65 transitions. Word has length 41 [2022-11-18 18:31:45,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:31:45,151 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 65 transitions. [2022-11-18 18:31:45,151 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 1.7179487179487178) internal successors, (67), 39 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:45,151 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 65 transitions. [2022-11-18 18:31:45,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-18 18:31:45,152 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:31:45,152 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:31:45,158 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-11-18 18:31:45,357 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-11-18 18:31:45,358 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:31:45,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:31:45,358 INFO L85 PathProgramCache]: Analyzing trace with hash -1771002085, now seen corresponding path program 17 times [2022-11-18 18:31:45,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:31:45,358 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776799263] [2022-11-18 18:31:45,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:31:45,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:31:45,373 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:31:45,381 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [664960130] [2022-11-18 18:31:45,381 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 18:31:45,381 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:45,381 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:31:45,382 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:31:45,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-18 18:31:45,651 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-11-18 18:31:45,651 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:31:45,653 INFO L263 TraceCheckSpWp]: Trace formula consists of 210 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-18 18:31:45,654 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:31:47,113 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 70 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:31:47,113 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:31:48,282 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 70 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:31:48,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:31:48,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776799263] [2022-11-18 18:31:48,282 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:31:48,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [664960130] [2022-11-18 18:31:48,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [664960130] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:31:48,283 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:31:48,283 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 24 [2022-11-18 18:31:48,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255662726] [2022-11-18 18:31:48,283 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:31:48,283 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-18 18:31:48,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:31:48,284 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-18 18:31:48,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2022-11-18 18:31:48,285 INFO L87 Difference]: Start difference. First operand 57 states and 65 transitions. Second operand has 24 states, 24 states have (on average 2.6666666666666665) internal successors, (64), 24 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:49,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:31:49,906 INFO L93 Difference]: Finished difference Result 118 states and 138 transitions. [2022-11-18 18:31:49,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-18 18:31:49,907 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 2.6666666666666665) internal successors, (64), 24 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-11-18 18:31:49,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:31:49,907 INFO L225 Difference]: With dead ends: 118 [2022-11-18 18:31:49,907 INFO L226 Difference]: Without dead ends: 72 [2022-11-18 18:31:49,908 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 56 SyntacticMatches, 8 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 242 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=260, Invalid=732, Unknown=0, NotChecked=0, Total=992 [2022-11-18 18:31:49,908 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 113 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 113 SdHoareTripleChecker+Valid, 33 SdHoareTripleChecker+Invalid, 230 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 18:31:49,909 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [113 Valid, 33 Invalid, 230 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-18 18:31:49,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-11-18 18:31:49,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 59. [2022-11-18 18:31:49,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 58 states have (on average 1.1551724137931034) internal successors, (67), 58 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:49,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 67 transitions. [2022-11-18 18:31:49,931 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 67 transitions. Word has length 44 [2022-11-18 18:31:49,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:31:49,931 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 67 transitions. [2022-11-18 18:31:49,931 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 2.6666666666666665) internal successors, (64), 24 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:31:49,931 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 67 transitions. [2022-11-18 18:31:49,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-11-18 18:31:49,932 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:31:49,932 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:31:49,939 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-11-18 18:31:50,138 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-11-18 18:31:50,138 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:31:50,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:31:50,139 INFO L85 PathProgramCache]: Analyzing trace with hash 146952089, now seen corresponding path program 18 times [2022-11-18 18:31:50,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:31:50,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408150098] [2022-11-18 18:31:50,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:31:50,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:31:50,154 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:31:50,155 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [348441790] [2022-11-18 18:31:50,155 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 18:31:50,155 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:31:50,155 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:31:50,156 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:31:50,172 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-11-18 18:31:50,385 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-11-18 18:31:50,385 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:31:50,387 INFO L263 TraceCheckSpWp]: Trace formula consists of 217 conjuncts, 31 conjunts are in the unsatisfiable core [2022-11-18 18:31:50,398 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:31:50,523 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:31:50,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:31:50,794 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:31:51,318 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:51,319 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:51,473 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:51,474 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:51,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:51,662 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:51,852 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:31:51,853 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:31:52,113 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:31:52,113 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 21 [2022-11-18 18:31:52,838 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 27 proven. 61 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-11-18 18:31:52,838 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:32:00,822 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1185 Int) (v_ArrVal_1190 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_371| Int)) (let ((.cse0 (+ 2 |v_ULTIMATE.start_main_~i~0#1_371|))) (or (< |c_ULTIMATE.start_main_~i~0#1| .cse0) (< .cse0 |c_ULTIMATE.start_main_~i~0#1|) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1185)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1190) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_371| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5)))) is different from false [2022-11-18 18:32:02,866 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1185 Int) (v_ArrVal_1190 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_371| Int)) (let ((.cse0 (+ |v_ULTIMATE.start_main_~i~0#1_371| 1))) (or (< .cse0 |c_ULTIMATE.start_main_~i~0#1|) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4) v_ArrVal_1185)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1190) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_371| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse0)))) is different from false [2022-11-18 18:32:15,473 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:32:15,474 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 42 treesize of output 53 [2022-11-18 18:32:15,514 INFO L321 Elim1Store]: treesize reduction 8, result has 33.3 percent of original size [2022-11-18 18:32:15,515 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 30 [2022-11-18 18:32:19,728 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 4 proven. 66 refuted. 5 times theorem prover too weak. 31 trivial. 13 not checked. [2022-11-18 18:32:19,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:32:19,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1408150098] [2022-11-18 18:32:19,728 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:32:19,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [348441790] [2022-11-18 18:32:19,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [348441790] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:32:19,729 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:32:19,729 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17] total 25 [2022-11-18 18:32:19,729 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177568625] [2022-11-18 18:32:19,729 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:32:19,729 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-11-18 18:32:19,730 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:32:19,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 18:32:19,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=410, Unknown=17, NotChecked=86, Total=600 [2022-11-18 18:32:19,731 INFO L87 Difference]: Start difference. First operand 59 states and 67 transitions. Second operand has 25 states, 25 states have (on average 2.0) internal successors, (50), 25 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:32:33,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:32:33,595 INFO L93 Difference]: Finished difference Result 73 states and 85 transitions. [2022-11-18 18:32:33,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 18:32:33,596 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 25 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2022-11-18 18:32:33,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:32:33,596 INFO L225 Difference]: With dead ends: 73 [2022-11-18 18:32:33,596 INFO L226 Difference]: Without dead ends: 69 [2022-11-18 18:32:33,597 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 64 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 40.0s TimeCoverageRelationStatistics Valid=147, Invalid=654, Unknown=19, NotChecked=110, Total=930 [2022-11-18 18:32:33,598 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 28 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 139 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 320 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 139 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 177 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-18 18:32:33,598 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 44 Invalid, 320 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 139 Invalid, 0 Unknown, 177 Unchecked, 0.7s Time] [2022-11-18 18:32:33,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-11-18 18:32:33,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 67. [2022-11-18 18:32:33,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 66 states have (on average 1.1818181818181819) internal successors, (78), 66 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:32:33,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 78 transitions. [2022-11-18 18:32:33,629 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 78 transitions. Word has length 46 [2022-11-18 18:32:33,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:32:33,629 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 78 transitions. [2022-11-18 18:32:33,629 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 2.0) internal successors, (50), 25 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:32:33,629 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 78 transitions. [2022-11-18 18:32:33,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-11-18 18:32:33,629 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:32:33,630 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:32:33,635 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-11-18 18:32:33,830 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26,26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:32:33,830 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:32:33,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:32:33,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1477938483, now seen corresponding path program 19 times [2022-11-18 18:32:33,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:32:33,831 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300416011] [2022-11-18 18:32:33,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:32:33,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:32:33,851 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:32:33,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1574070419] [2022-11-18 18:32:33,852 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-18 18:32:33,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:32:33,852 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:32:33,853 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:32:33,867 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-18 18:32:34,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:32:34,017 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-18 18:32:34,019 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:32:35,888 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 92 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:32:35,889 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:32:37,514 INFO L134 CoverageAnalysis]: Checked inductivity of 141 backedges. 92 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:32:37,514 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:32:37,514 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300416011] [2022-11-18 18:32:37,514 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:32:37,514 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1574070419] [2022-11-18 18:32:37,514 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1574070419] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:32:37,514 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:32:37,515 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2022-11-18 18:32:37,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285306778] [2022-11-18 18:32:37,515 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:32:37,515 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-11-18 18:32:37,515 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:32:37,516 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-18 18:32:37,516 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=179, Invalid=523, Unknown=0, NotChecked=0, Total=702 [2022-11-18 18:32:37,516 INFO L87 Difference]: Start difference. First operand 67 states and 78 transitions. Second operand has 27 states, 27 states have (on average 2.6666666666666665) internal successors, (72), 27 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:32:39,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:32:39,505 INFO L93 Difference]: Finished difference Result 154 states and 185 transitions. [2022-11-18 18:32:39,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-18 18:32:39,505 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 2.6666666666666665) internal successors, (72), 27 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2022-11-18 18:32:39,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:32:39,506 INFO L225 Difference]: With dead ends: 154 [2022-11-18 18:32:39,506 INFO L226 Difference]: Without dead ends: 92 [2022-11-18 18:32:39,507 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 62 SyntacticMatches, 9 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=324, Invalid=936, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 18:32:39,507 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 121 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 227 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 277 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 227 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:32:39,508 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 31 Invalid, 277 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 227 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-11-18 18:32:39,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2022-11-18 18:32:39,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 69. [2022-11-18 18:32:39,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 68 states have (on average 1.1764705882352942) internal successors, (80), 68 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:32:39,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 80 transitions. [2022-11-18 18:32:39,541 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 80 transitions. Word has length 49 [2022-11-18 18:32:39,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:32:39,541 INFO L495 AbstractCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-11-18 18:32:39,542 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 2.6666666666666665) internal successors, (72), 27 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:32:39,542 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 80 transitions. [2022-11-18 18:32:39,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-18 18:32:39,542 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:32:39,542 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:32:39,547 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-11-18 18:32:39,743 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:32:39,743 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:32:39,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:32:39,743 INFO L85 PathProgramCache]: Analyzing trace with hash -2057148145, now seen corresponding path program 20 times [2022-11-18 18:32:39,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:32:39,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403692700] [2022-11-18 18:32:39,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:32:39,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:32:39,765 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:32:39,766 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1348321344] [2022-11-18 18:32:39,766 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:32:39,766 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:32:39,766 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:32:39,767 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:32:39,791 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-11-18 18:32:39,933 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:32:39,934 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:32:39,936 INFO L263 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-18 18:32:39,939 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:32:40,607 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:32:40,920 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:32:40,921 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:32:41,128 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:32:41,129 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:32:41,354 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:32:41,354 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:32:41,784 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:32:41,785 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:32:42,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:32:42,064 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:32:42,348 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:32:42,349 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:32:42,608 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:32:42,609 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:32:42,965 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:32:43,098 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 55 proven. 86 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 18:32:43,099 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:32:44,593 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1354 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1354) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 16 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:32:47,766 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1350 Int) (|v_ULTIMATE.start_main_~i~0#1_431| Int) (v_ArrVal_1354 (Array Int Int)) (v_ArrVal_1348 Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_431|)) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1348) (+ (* |v_ULTIMATE.start_main_~i~0#1_431| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1350)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1354) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 16 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5))) is different from false [2022-11-18 18:32:49,817 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_432| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_432|)) (forall ((v_ArrVal_1350 Int) (|v_ULTIMATE.start_main_~i~0#1_431| Int) (v_ArrVal_1354 (Array Int Int)) (v_ArrVal_1348 Int)) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_432| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1348) (+ (* |v_ULTIMATE.start_main_~i~0#1_431| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1350)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1354) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 16 |c_ULTIMATE.start_main_~a~0#1.offset|))) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_432| 1) |v_ULTIMATE.start_main_~i~0#1_431|)))))) is different from false [2022-11-18 18:32:51,959 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_432| Int) (v_ArrVal_1350 Int) (|v_ULTIMATE.start_main_~i~0#1_431| Int) (v_ArrVal_1345 Int) (v_ArrVal_1354 (Array Int Int)) (v_ArrVal_1348 Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_432|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1345) (+ (* |v_ULTIMATE.start_main_~i~0#1_432| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1348) (+ (* |v_ULTIMATE.start_main_~i~0#1_431| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1350)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1354) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 16 |c_ULTIMATE.start_main_~a~0#1.offset|))) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_432| 1) |v_ULTIMATE.start_main_~i~0#1_431|)))) is different from false [2022-11-18 18:32:54,026 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_433| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_433|)) (forall ((|v_ULTIMATE.start_main_~i~0#1_432| Int) (v_ArrVal_1350 Int) (|v_ULTIMATE.start_main_~i~0#1_431| Int) (v_ArrVal_1345 Int) (v_ArrVal_1354 (Array Int Int)) (v_ArrVal_1348 Int)) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_433| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1345) (+ (* |v_ULTIMATE.start_main_~i~0#1_432| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1348) (+ (* |v_ULTIMATE.start_main_~i~0#1_431| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1350)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1354) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 16 |c_ULTIMATE.start_main_~a~0#1.offset|))) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_433| 1) |v_ULTIMATE.start_main_~i~0#1_432|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_432| 1) |v_ULTIMATE.start_main_~i~0#1_431|)))))) is different from false [2022-11-18 18:32:54,305 INFO L321 Elim1Store]: treesize reduction 203, result has 19.4 percent of original size [2022-11-18 18:32:54,305 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 45 treesize of output 61 [2022-11-18 18:32:54,347 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:32:54,347 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 34 [2022-11-18 18:32:54,368 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:32:55,550 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 51 proven. 51 refuted. 0 times theorem prover too weak. 15 trivial. 39 not checked. [2022-11-18 18:32:55,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:32:55,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1403692700] [2022-11-18 18:32:55,551 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:32:55,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1348321344] [2022-11-18 18:32:55,551 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1348321344] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:32:55,551 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:32:55,552 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 21] total 37 [2022-11-18 18:32:55,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356123869] [2022-11-18 18:32:55,552 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:32:55,552 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-18 18:32:55,553 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:32:55,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-18 18:32:55,554 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=867, Unknown=26, NotChecked=320, Total=1332 [2022-11-18 18:32:55,554 INFO L87 Difference]: Start difference. First operand 69 states and 80 transitions. Second operand has 37 states, 37 states have (on average 2.054054054054054) internal successors, (76), 37 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:01,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:01,076 INFO L93 Difference]: Finished difference Result 84 states and 98 transitions. [2022-11-18 18:33:01,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 18:33:01,077 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 2.054054054054054) internal successors, (76), 37 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-11-18 18:33:01,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:01,078 INFO L225 Difference]: With dead ends: 84 [2022-11-18 18:33:01,078 INFO L226 Difference]: Without dead ends: 69 [2022-11-18 18:33:01,079 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 67 SyntacticMatches, 6 SemanticMatches, 42 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 400 ImplicationChecksByTransitivity, 17.3s TimeCoverageRelationStatistics Valid=165, Invalid=1311, Unknown=26, NotChecked=390, Total=1892 [2022-11-18 18:33:01,079 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 30 mSDsluCounter, 100 mSDsCounter, 0 mSdLazyCounter, 320 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 111 SdHoareTripleChecker+Invalid, 643 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 320 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 304 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:01,080 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 111 Invalid, 643 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 320 Invalid, 0 Unknown, 304 Unchecked, 1.6s Time] [2022-11-18 18:33:01,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-11-18 18:33:01,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2022-11-18 18:33:01,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 68 states have (on average 1.161764705882353) internal successors, (79), 68 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:01,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 79 transitions. [2022-11-18 18:33:01,118 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 79 transitions. Word has length 51 [2022-11-18 18:33:01,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:01,119 INFO L495 AbstractCegarLoop]: Abstraction has 69 states and 79 transitions. [2022-11-18 18:33:01,119 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 2.054054054054054) internal successors, (76), 37 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:01,119 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 79 transitions. [2022-11-18 18:33:01,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-18 18:33:01,120 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:01,120 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:01,130 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-11-18 18:33:01,325 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-11-18 18:33:01,326 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:33:01,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:01,326 INFO L85 PathProgramCache]: Analyzing trace with hash -1653707301, now seen corresponding path program 21 times [2022-11-18 18:33:01,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:01,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [4576116] [2022-11-18 18:33:01,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:01,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:01,344 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:33:01,345 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [897096820] [2022-11-18 18:33:01,345 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:33:01,345 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:33:01,345 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:33:01,346 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:33:01,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-11-18 18:33:01,733 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2022-11-18 18:33:01,733 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:33:01,736 INFO L263 TraceCheckSpWp]: Trace formula consists of 246 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-18 18:33:01,737 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:33:03,782 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 117 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:03,782 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:33:05,652 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 117 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:05,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:05,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [4576116] [2022-11-18 18:33:05,652 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:33:05,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [897096820] [2022-11-18 18:33:05,653 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [897096820] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:33:05,653 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:33:05,653 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 30 [2022-11-18 18:33:05,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983557584] [2022-11-18 18:33:05,654 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:33:05,654 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-11-18 18:33:05,654 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:05,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-11-18 18:33:05,655 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=651, Unknown=0, NotChecked=0, Total=870 [2022-11-18 18:33:05,656 INFO L87 Difference]: Start difference. First operand 69 states and 79 transitions. Second operand has 30 states, 30 states have (on average 2.6666666666666665) internal successors, (80), 30 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:07,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:07,758 INFO L93 Difference]: Finished difference Result 156 states and 185 transitions. [2022-11-18 18:33:07,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-11-18 18:33:07,759 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 2.6666666666666665) internal successors, (80), 30 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-18 18:33:07,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:07,759 INFO L225 Difference]: With dead ends: 156 [2022-11-18 18:33:07,760 INFO L226 Difference]: Without dead ends: 94 [2022-11-18 18:33:07,760 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 68 SyntacticMatches, 10 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 402 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=395, Invalid=1165, Unknown=0, NotChecked=0, Total=1560 [2022-11-18 18:33:07,761 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 128 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 221 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 221 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:07,762 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 38 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 221 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-11-18 18:33:07,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-11-18 18:33:07,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 71. [2022-11-18 18:33:07,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 70 states have (on average 1.1571428571428573) internal successors, (81), 70 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:07,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 81 transitions. [2022-11-18 18:33:07,790 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 81 transitions. Word has length 54 [2022-11-18 18:33:07,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:07,790 INFO L495 AbstractCegarLoop]: Abstraction has 71 states and 81 transitions. [2022-11-18 18:33:07,790 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 2.6666666666666665) internal successors, (80), 30 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:07,790 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 81 transitions. [2022-11-18 18:33:07,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-11-18 18:33:07,791 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:07,791 INFO L195 NwaCegarLoop]: trace histogram [9, 9, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:07,797 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2022-11-18 18:33:07,997 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:33:07,997 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:33:07,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:07,998 INFO L85 PathProgramCache]: Analyzing trace with hash 2086539481, now seen corresponding path program 22 times [2022-11-18 18:33:07,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:07,998 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505714765] [2022-11-18 18:33:07,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:07,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:08,019 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:33:08,019 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [867768526] [2022-11-18 18:33:08,019 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 18:33:08,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:33:08,020 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:33:08,021 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:33:08,024 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-11-18 18:33:08,230 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 18:33:08,230 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:33:08,233 INFO L263 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 69 conjunts are in the unsatisfiable core [2022-11-18 18:33:08,237 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:33:09,088 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:33:09,412 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:09,413 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:33:09,686 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:09,686 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:33:09,987 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:09,988 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:33:10,955 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:10,956 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 18:33:11,308 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:11,308 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 18:33:11,733 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:11,734 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 18:33:12,077 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:12,078 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 18:33:12,555 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:12,555 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 18:33:13,053 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 18:33:13,063 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:13,064 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 10 [2022-11-18 18:33:13,299 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 62 proven. 121 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 18:33:13,300 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:33:20,634 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 155 treesize of output 149 [2022-11-18 18:33:22,913 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:22,913 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:22,913 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505714765] [2022-11-18 18:33:22,913 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:33:22,914 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [867768526] [2022-11-18 18:33:22,914 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [867768526] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:33:22,914 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:33:22,914 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 30] total 51 [2022-11-18 18:33:22,914 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618267672] [2022-11-18 18:33:22,914 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:33:22,915 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 51 states [2022-11-18 18:33:22,915 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:22,915 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2022-11-18 18:33:22,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=514, Invalid=2036, Unknown=0, NotChecked=0, Total=2550 [2022-11-18 18:33:22,920 INFO L87 Difference]: Start difference. First operand 71 states and 81 transitions. Second operand has 51 states, 51 states have (on average 1.9215686274509804) internal successors, (98), 51 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:59,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:59,063 INFO L93 Difference]: Finished difference Result 191 states and 227 transitions. [2022-11-18 18:33:59,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2022-11-18 18:33:59,064 INFO L78 Accepts]: Start accepts. Automaton has has 51 states, 51 states have (on average 1.9215686274509804) internal successors, (98), 51 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2022-11-18 18:33:59,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:59,065 INFO L225 Difference]: With dead ends: 191 [2022-11-18 18:33:59,065 INFO L226 Difference]: Without dead ends: 176 [2022-11-18 18:33:59,070 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 61 SyntacticMatches, 2 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3288 ImplicationChecksByTransitivity, 43.2s TimeCoverageRelationStatistics Valid=2303, Invalid=9687, Unknown=0, NotChecked=0, Total=11990 [2022-11-18 18:33:59,071 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 157 mSDsluCounter, 114 mSDsCounter, 0 mSdLazyCounter, 775 mSolverCounterSat, 74 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 125 SdHoareTripleChecker+Invalid, 1523 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 74 IncrementalHoareTripleChecker+Valid, 775 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 674 IncrementalHoareTripleChecker+Unchecked, 3.9s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:59,071 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 125 Invalid, 1523 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [74 Valid, 775 Invalid, 0 Unknown, 674 Unchecked, 3.9s Time] [2022-11-18 18:33:59,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2022-11-18 18:33:59,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 153. [2022-11-18 18:33:59,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 152 states have (on average 1.2039473684210527) internal successors, (183), 152 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:59,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 183 transitions. [2022-11-18 18:33:59,140 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 183 transitions. Word has length 56 [2022-11-18 18:33:59,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:59,140 INFO L495 AbstractCegarLoop]: Abstraction has 153 states and 183 transitions. [2022-11-18 18:33:59,140 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 51 states, 51 states have (on average 1.9215686274509804) internal successors, (98), 51 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:59,140 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 183 transitions. [2022-11-18 18:33:59,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-18 18:33:59,141 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:59,141 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 9, 9, 7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:59,148 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2022-11-18 18:33:59,347 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:33:59,347 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:33:59,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:59,348 INFO L85 PathProgramCache]: Analyzing trace with hash -2038838695, now seen corresponding path program 23 times [2022-11-18 18:33:59,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:59,348 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515045355] [2022-11-18 18:33:59,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:59,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:59,364 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:33:59,365 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [596938091] [2022-11-18 18:33:59,365 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 18:33:59,365 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:33:59,365 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:33:59,366 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:33:59,379 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-11-18 18:33:59,990 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2022-11-18 18:33:59,990 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:33:59,994 INFO L263 TraceCheckSpWp]: Trace formula consists of 259 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-18 18:33:59,995 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:34:02,414 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 81 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:34:02,415 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:34:04,174 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 81 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:34:04,174 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:34:04,175 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [515045355] [2022-11-18 18:34:04,175 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:34:04,175 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [596938091] [2022-11-18 18:34:04,175 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [596938091] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:34:04,175 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:34:04,176 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 33 [2022-11-18 18:34:04,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806021728] [2022-11-18 18:34:04,176 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:34:04,177 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-11-18 18:34:04,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:34:04,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-11-18 18:34:04,178 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=793, Unknown=0, NotChecked=0, Total=1056 [2022-11-18 18:34:04,178 INFO L87 Difference]: Start difference. First operand 153 states and 183 transitions. Second operand has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 33 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:08,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:34:08,909 INFO L93 Difference]: Finished difference Result 212 states and 256 transitions. [2022-11-18 18:34:08,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-11-18 18:34:08,910 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 33 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-11-18 18:34:08,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:34:08,911 INFO L225 Difference]: With dead ends: 212 [2022-11-18 18:34:08,911 INFO L226 Difference]: Without dead ends: 208 [2022-11-18 18:34:08,912 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 72 SyntacticMatches, 11 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 831 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=659, Invalid=2203, Unknown=0, NotChecked=0, Total=2862 [2022-11-18 18:34:08,913 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 115 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 649 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 669 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 649 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:34:08,913 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [115 Valid, 26 Invalid, 669 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 649 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2022-11-18 18:34:08,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2022-11-18 18:34:08,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 120. [2022-11-18 18:34:08,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 120 states, 119 states have (on average 1.184873949579832) internal successors, (141), 119 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:08,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 141 transitions. [2022-11-18 18:34:08,983 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 141 transitions. Word has length 58 [2022-11-18 18:34:08,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:34:08,984 INFO L495 AbstractCegarLoop]: Abstraction has 120 states and 141 transitions. [2022-11-18 18:34:08,984 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 2.6363636363636362) internal successors, (87), 33 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:08,984 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 141 transitions. [2022-11-18 18:34:08,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-11-18 18:34:08,985 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:34:08,985 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:34:08,992 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2022-11-18 18:34:09,192 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2022-11-18 18:34:09,192 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:34:09,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:34:09,193 INFO L85 PathProgramCache]: Analyzing trace with hash -1045740719, now seen corresponding path program 24 times [2022-11-18 18:34:09,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:34:09,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814724860] [2022-11-18 18:34:09,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:34:09,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:34:09,211 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:34:09,211 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [228259975] [2022-11-18 18:34:09,212 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 18:34:09,212 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:34:09,212 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:34:09,213 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:34:09,231 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-11-18 18:34:09,848 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2022-11-18 18:34:09,848 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:34:09,851 INFO L263 TraceCheckSpWp]: Trace formula consists of 264 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-18 18:34:09,853 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:34:12,166 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 145 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:34:12,167 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:34:14,186 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 145 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:34:14,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:34:14,186 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814724860] [2022-11-18 18:34:14,186 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:34:14,187 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [228259975] [2022-11-18 18:34:14,187 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [228259975] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:34:14,187 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:34:14,187 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 33 [2022-11-18 18:34:14,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408199353] [2022-11-18 18:34:14,187 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:34:14,188 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-11-18 18:34:14,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:34:14,188 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-11-18 18:34:14,189 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=793, Unknown=0, NotChecked=0, Total=1056 [2022-11-18 18:34:14,189 INFO L87 Difference]: Start difference. First operand 120 states and 141 transitions. Second operand has 33 states, 33 states have (on average 2.6666666666666665) internal successors, (88), 33 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:16,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:34:16,534 INFO L93 Difference]: Finished difference Result 177 states and 212 transitions. [2022-11-18 18:34:16,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-11-18 18:34:16,535 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 2.6666666666666665) internal successors, (88), 33 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 59 [2022-11-18 18:34:16,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:34:16,535 INFO L225 Difference]: With dead ends: 177 [2022-11-18 18:34:16,535 INFO L226 Difference]: Without dead ends: 101 [2022-11-18 18:34:16,536 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 74 SyntacticMatches, 11 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 497 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=473, Invalid=1419, Unknown=0, NotChecked=0, Total=1892 [2022-11-18 18:34:16,536 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 173 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 247 mSolverCounterSat, 83 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 173 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 83 IncrementalHoareTripleChecker+Valid, 247 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:34:16,537 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [173 Valid, 36 Invalid, 330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [83 Valid, 247 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-18 18:34:16,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2022-11-18 18:34:16,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 76. [2022-11-18 18:34:16,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 75 states have (on average 1.16) internal successors, (87), 75 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:16,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 87 transitions. [2022-11-18 18:34:16,567 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 87 transitions. Word has length 59 [2022-11-18 18:34:16,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:34:16,567 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 87 transitions. [2022-11-18 18:34:16,567 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 2.6666666666666665) internal successors, (88), 33 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:16,567 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 87 transitions. [2022-11-18 18:34:16,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-11-18 18:34:16,568 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:34:16,568 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:34:16,575 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Forceful destruction successful, exit code 0 [2022-11-18 18:34:16,768 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2022-11-18 18:34:16,768 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:34:16,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:34:16,769 INFO L85 PathProgramCache]: Analyzing trace with hash 44027667, now seen corresponding path program 25 times [2022-11-18 18:34:16,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:34:16,769 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033091205] [2022-11-18 18:34:16,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:34:16,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:34:16,788 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:34:16,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1206612606] [2022-11-18 18:34:16,788 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-18 18:34:16,788 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:34:16,789 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:34:16,790 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:34:16,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-11-18 18:34:16,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:34:16,968 INFO L263 TraceCheckSpWp]: Trace formula consists of 271 conjuncts, 60 conjunts are in the unsatisfiable core [2022-11-18 18:34:16,971 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:34:16,999 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:34:18,224 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:34:18,598 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:18,599 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:34:19,058 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:19,339 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:19,625 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:19,895 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:20,216 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:20,488 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:20,808 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:21,115 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:21,519 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:34:21,688 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 43 proven. 200 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 18:34:21,688 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:34:22,081 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1827 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1827) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)) 5)) is different from false [2022-11-18 18:34:22,117 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1827 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1827) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 8 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:34:22,163 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1827 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1827) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 12 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:34:22,915 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1827 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1827) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 24)))) is different from false [2022-11-18 18:34:23,323 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1827 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1827) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 32 (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:34:23,368 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1827 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1827) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 32 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5)) is different from false [2022-11-18 18:34:23,425 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1818 Int) (v_ArrVal_1827 (Array Int Int))) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1818)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1827) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 32 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5)) is different from false [2022-11-18 18:34:24,369 INFO L321 Elim1Store]: treesize reduction 29, result has 46.3 percent of original size [2022-11-18 18:34:24,369 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 37 [2022-11-18 18:34:24,408 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:24,409 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 34 [2022-11-18 18:34:24,442 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:34:26,769 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 43 proven. 90 refuted. 0 times theorem prover too weak. 2 trivial. 110 not checked. [2022-11-18 18:34:26,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:34:26,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033091205] [2022-11-18 18:34:26,770 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:34:26,770 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1206612606] [2022-11-18 18:34:26,770 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1206612606] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:34:26,770 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:34:26,770 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 47 [2022-11-18 18:34:26,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055638043] [2022-11-18 18:34:26,770 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:34:26,771 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-11-18 18:34:26,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:34:26,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-11-18 18:34:26,772 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=1439, Unknown=10, NotChecked=574, Total=2162 [2022-11-18 18:34:26,772 INFO L87 Difference]: Start difference. First operand 76 states and 87 transitions. Second operand has 47 states, 47 states have (on average 2.297872340425532) internal successors, (108), 47 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:36,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:34:36,454 INFO L93 Difference]: Finished difference Result 186 states and 220 transitions. [2022-11-18 18:34:36,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-11-18 18:34:36,455 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 2.297872340425532) internal successors, (108), 47 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-11-18 18:34:36,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:34:36,456 INFO L225 Difference]: With dead ends: 186 [2022-11-18 18:34:36,456 INFO L226 Difference]: Without dead ends: 169 [2022-11-18 18:34:36,457 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 75 SyntacticMatches, 8 SemanticMatches, 57 ConstructedPredicates, 7 IntricatePredicates, 0 DeprecatedPredicates, 685 ImplicationChecksByTransitivity, 12.1s TimeCoverageRelationStatistics Valid=213, Invalid=2457, Unknown=10, NotChecked=742, Total=3422 [2022-11-18 18:34:36,458 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 69 mSDsluCounter, 120 mSDsCounter, 0 mSdLazyCounter, 1028 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 128 SdHoareTripleChecker+Invalid, 1893 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 1028 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 808 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-11-18 18:34:36,458 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [69 Valid, 128 Invalid, 1893 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 1028 Invalid, 0 Unknown, 808 Unchecked, 4.6s Time] [2022-11-18 18:34:36,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2022-11-18 18:34:36,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 143. [2022-11-18 18:34:36,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 142 states have (on average 1.1549295774647887) internal successors, (164), 142 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:36,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 164 transitions. [2022-11-18 18:34:36,529 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 164 transitions. Word has length 61 [2022-11-18 18:34:36,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:34:36,529 INFO L495 AbstractCegarLoop]: Abstraction has 143 states and 164 transitions. [2022-11-18 18:34:36,529 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 47 states have (on average 2.297872340425532) internal successors, (108), 47 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:34:36,529 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 164 transitions. [2022-11-18 18:34:36,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-11-18 18:34:36,529 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:34:36,530 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:34:36,535 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2022-11-18 18:34:36,730 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:34:36,730 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:34:36,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:34:36,730 INFO L85 PathProgramCache]: Analyzing trace with hash -1915894381, now seen corresponding path program 26 times [2022-11-18 18:34:36,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:34:36,731 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892802326] [2022-11-18 18:34:36,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:34:36,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:34:36,749 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:34:36,749 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1608136712] [2022-11-18 18:34:36,749 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:34:36,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:34:36,750 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:34:36,751 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:34:36,782 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2022-11-18 18:34:36,943 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:34:36,944 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:34:36,946 INFO L263 TraceCheckSpWp]: Trace formula consists of 271 conjuncts, 54 conjunts are in the unsatisfiable core [2022-11-18 18:34:36,950 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:34:37,859 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:34:38,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:38,205 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:34:38,423 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:38,424 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:34:38,657 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:38,658 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:34:39,098 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:39,103 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:39,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:39,397 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:39,673 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:39,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:39,975 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:39,976 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:40,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:40,262 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:40,575 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:34:40,577 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:34:40,947 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:34:41,100 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 77 proven. 153 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 18:34:41,100 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:34:41,459 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1935 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)))) is different from false [2022-11-18 18:34:41,495 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1935 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 8 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:34:42,185 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1935 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 20 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:34:42,574 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1935 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 24)))) is different from false [2022-11-18 18:34:42,628 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1929 Int) (v_ArrVal_1935 (Array Int Int))) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1929)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 24)) 5)) is different from false [2022-11-18 18:34:46,437 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_652| Int) (v_ArrVal_1927 Int) (v_ArrVal_1929 Int) (v_ArrVal_1935 (Array Int Int))) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_652|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1927) (+ (* |v_ULTIMATE.start_main_~i~0#1_652| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1929)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 24))))) is different from false [2022-11-18 18:34:48,486 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_653| Int)) (or (forall ((|v_ULTIMATE.start_main_~i~0#1_652| Int) (v_ArrVal_1927 Int) (v_ArrVal_1929 Int) (v_ArrVal_1935 (Array Int Int))) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_653| 1) |v_ULTIMATE.start_main_~i~0#1_652|)) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_653| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1927) (+ (* |v_ULTIMATE.start_main_~i~0#1_652| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1929)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 24)) 5))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_653|)))) is different from false [2022-11-18 18:34:50,534 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1925 Int) (|v_ULTIMATE.start_main_~i~0#1_653| Int) (|v_ULTIMATE.start_main_~i~0#1_652| Int) (v_ArrVal_1927 Int) (v_ArrVal_1929 Int) (v_ArrVal_1935 (Array Int Int))) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_653| 1) |v_ULTIMATE.start_main_~i~0#1_652|)) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_653|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1925) (+ (* |v_ULTIMATE.start_main_~i~0#1_653| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1927) (+ (* |v_ULTIMATE.start_main_~i~0#1_652| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1929)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 24))))) is different from false [2022-11-18 18:34:52,597 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_654| Int)) (or (forall ((v_ArrVal_1925 Int) (|v_ULTIMATE.start_main_~i~0#1_653| Int) (|v_ULTIMATE.start_main_~i~0#1_652| Int) (v_ArrVal_1927 Int) (v_ArrVal_1929 Int) (v_ArrVal_1935 (Array Int Int))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_654| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1925) (+ (* |v_ULTIMATE.start_main_~i~0#1_653| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1927) (+ (* |v_ULTIMATE.start_main_~i~0#1_652| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1929)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_1935) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| 24))) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_654| 1) |v_ULTIMATE.start_main_~i~0#1_653|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_653| 1) |v_ULTIMATE.start_main_~i~0#1_652|)))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_654|)))) is different from false [2022-11-18 18:34:52,850 INFO L321 Elim1Store]: treesize reduction 203, result has 19.4 percent of original size [2022-11-18 18:34:52,850 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 45 treesize of output 61 [2022-11-18 18:34:52,893 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:52,893 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 34 [2022-11-18 18:34:52,935 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:34:54,634 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 73 proven. 60 refuted. 0 times theorem prover too weak. 15 trivial. 97 not checked. [2022-11-18 18:34:54,634 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:34:54,634 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892802326] [2022-11-18 18:34:54,634 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:34:54,635 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1608136712] [2022-11-18 18:34:54,635 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1608136712] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:34:54,635 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:34:54,635 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 25] total 45 [2022-11-18 18:34:54,635 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638165735] [2022-11-18 18:34:54,635 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:34:54,635 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2022-11-18 18:34:54,636 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:34:54,636 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2022-11-18 18:34:54,636 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1146, Unknown=16, NotChecked=684, Total=1980 [2022-11-18 18:34:54,636 INFO L87 Difference]: Start difference. First operand 143 states and 164 transitions. Second operand has 45 states, 45 states have (on average 2.1333333333333333) internal successors, (96), 45 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:35:02,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:35:02,790 INFO L93 Difference]: Finished difference Result 176 states and 204 transitions. [2022-11-18 18:35:02,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-18 18:35:02,791 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 45 states have (on average 2.1333333333333333) internal successors, (96), 45 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-11-18 18:35:02,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:35:02,792 INFO L225 Difference]: With dead ends: 176 [2022-11-18 18:35:02,792 INFO L226 Difference]: Without dead ends: 155 [2022-11-18 18:35:02,792 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 77 SyntacticMatches, 9 SemanticMatches, 53 ConstructedPredicates, 9 IntricatePredicates, 0 DeprecatedPredicates, 571 ImplicationChecksByTransitivity, 17.9s TimeCoverageRelationStatistics Valid=198, Invalid=1892, Unknown=16, NotChecked=864, Total=2970 [2022-11-18 18:35:02,793 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 50 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 1113 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 50 SdHoareTripleChecker+Valid, 132 SdHoareTripleChecker+Invalid, 1888 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 1113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 729 IncrementalHoareTripleChecker+Unchecked, 5.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:35:02,793 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [50 Valid, 132 Invalid, 1888 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 1113 Invalid, 0 Unknown, 729 Unchecked, 5.1s Time] [2022-11-18 18:35:02,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-11-18 18:35:02,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 143. [2022-11-18 18:35:02,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 142 states have (on average 1.119718309859155) internal successors, (159), 142 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:35:02,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 159 transitions. [2022-11-18 18:35:02,861 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 159 transitions. Word has length 61 [2022-11-18 18:35:02,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:35:02,861 INFO L495 AbstractCegarLoop]: Abstraction has 143 states and 159 transitions. [2022-11-18 18:35:02,862 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 45 states have (on average 2.1333333333333333) internal successors, (96), 45 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:35:02,862 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 159 transitions. [2022-11-18 18:35:02,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-11-18 18:35:02,862 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:35:02,863 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:35:02,869 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2022-11-18 18:35:03,068 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:35:03,069 INFO L420 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:35:03,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:35:03,069 INFO L85 PathProgramCache]: Analyzing trace with hash 1664791887, now seen corresponding path program 27 times [2022-11-18 18:35:03,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:35:03,069 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448742839] [2022-11-18 18:35:03,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:35:03,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:35:03,085 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:35:03,086 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1598683721] [2022-11-18 18:35:03,086 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:35:03,086 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:35:03,086 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:35:03,087 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:35:03,090 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2022-11-18 18:35:03,512 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-18 18:35:03,512 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:35:03,515 INFO L263 TraceCheckSpWp]: Trace formula consists of 271 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-18 18:35:03,518 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:35:03,658 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:35:03,818 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:35:03,932 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:35:04,056 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:35:04,200 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:35:04,820 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:35:04,821 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:35:04,966 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:35:04,967 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:35:05,117 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:35:05,118 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:35:05,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:35:05,271 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:35:05,421 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:35:05,422 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:35:05,658 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:35:05,658 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 21 [2022-11-18 18:35:06,837 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 55 proven. 139 refuted. 0 times theorem prover too weak. 51 trivial. 0 not checked. [2022-11-18 18:35:06,837 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:35:11,573 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_684| Int) (v_ArrVal_2039 Int) (v_ArrVal_2044 (Array Int Int))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~i~0#1_684| 4))) (or (< .cse0 |c_ULTIMATE.start_main_~i~0#1|) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2039)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2044) |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_684| 4))) 5) (< |c_ULTIMATE.start_main_~i~0#1| .cse0)))) is different from false [2022-11-18 18:36:11,725 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:36:11,726 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 42 treesize of output 53 [2022-11-18 18:36:11,776 INFO L321 Elim1Store]: treesize reduction 8, result has 33.3 percent of original size [2022-11-18 18:36:11,776 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 30 [2022-11-18 18:36:22,059 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 5 proven. 146 refuted. 33 times theorem prover too weak. 51 trivial. 10 not checked. [2022-11-18 18:36:22,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:36:22,060 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448742839] [2022-11-18 18:36:22,060 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:36:22,060 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1598683721] [2022-11-18 18:36:22,060 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1598683721] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:36:22,060 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:36:22,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 31 [2022-11-18 18:36:22,061 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [961347061] [2022-11-18 18:36:22,061 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:36:22,061 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-11-18 18:36:22,061 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:36:22,062 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-11-18 18:36:22,062 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=718, Unknown=49, NotChecked=56, Total=930 [2022-11-18 18:36:22,062 INFO L87 Difference]: Start difference. First operand 143 states and 159 transitions. Second operand has 31 states, 31 states have (on average 2.064516129032258) internal successors, (64), 31 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:32,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:36:32,096 INFO L93 Difference]: Finished difference Result 161 states and 182 transitions. [2022-11-18 18:36:32,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-11-18 18:36:32,097 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 2.064516129032258) internal successors, (64), 31 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-11-18 18:36:32,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:36:32,098 INFO L225 Difference]: With dead ends: 161 [2022-11-18 18:36:32,098 INFO L226 Difference]: Without dead ends: 157 [2022-11-18 18:36:32,098 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 86 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 1 IntricatePredicates, 1 DeprecatedPredicates, 503 ImplicationChecksByTransitivity, 84.0s TimeCoverageRelationStatistics Valid=274, Invalid=1572, Unknown=50, NotChecked=84, Total=1980 [2022-11-18 18:36:32,099 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 40 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 562 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 278 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-11-18 18:36:32,099 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 54 Invalid, 562 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 264 Invalid, 0 Unknown, 278 Unchecked, 1.3s Time] [2022-11-18 18:36:32,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2022-11-18 18:36:32,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2022-11-18 18:36:32,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 157 states, 156 states have (on average 1.141025641025641) internal successors, (178), 156 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:32,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 178 transitions. [2022-11-18 18:36:32,171 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 178 transitions. Word has length 61 [2022-11-18 18:36:32,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:36:32,172 INFO L495 AbstractCegarLoop]: Abstraction has 157 states and 178 transitions. [2022-11-18 18:36:32,172 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 2.064516129032258) internal successors, (64), 31 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:32,172 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 178 transitions. [2022-11-18 18:36:32,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-18 18:36:32,173 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:36:32,173 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:36:32,179 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Forceful destruction successful, exit code 0 [2022-11-18 18:36:32,373 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2022-11-18 18:36:32,373 INFO L420 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:36:32,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:36:32,374 INFO L85 PathProgramCache]: Analyzing trace with hash -670852009, now seen corresponding path program 28 times [2022-11-18 18:36:32,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:36:32,374 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835889799] [2022-11-18 18:36:32,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:36:32,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:36:32,393 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:36:32,393 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1035077502] [2022-11-18 18:36:32,393 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 18:36:32,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:36:32,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:36:32,395 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:36:32,400 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-11-18 18:36:32,758 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 18:36:32,759 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:36:32,761 INFO L263 TraceCheckSpWp]: Trace formula consists of 282 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 18:36:32,762 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:36:35,452 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 176 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:36:35,453 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:36:37,790 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 176 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:36:37,790 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:36:37,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [835889799] [2022-11-18 18:36:37,790 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:36:37,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1035077502] [2022-11-18 18:36:37,790 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1035077502] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:36:37,790 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:36:37,791 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 36 [2022-11-18 18:36:37,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [569805878] [2022-11-18 18:36:37,791 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:36:37,791 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-18 18:36:37,792 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:36:37,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-18 18:36:37,793 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=949, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 18:36:37,793 INFO L87 Difference]: Start difference. First operand 157 states and 178 transitions. Second operand has 36 states, 36 states have (on average 2.6666666666666665) internal successors, (96), 36 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:40,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:36:40,797 INFO L93 Difference]: Finished difference Result 237 states and 279 transitions. [2022-11-18 18:36:40,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-11-18 18:36:40,798 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 2.6666666666666665) internal successors, (96), 36 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-11-18 18:36:40,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:36:40,800 INFO L225 Difference]: With dead ends: 237 [2022-11-18 18:36:40,800 INFO L226 Difference]: Without dead ends: 157 [2022-11-18 18:36:40,800 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 80 SyntacticMatches, 12 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 602 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=558, Invalid=1698, Unknown=0, NotChecked=0, Total=2256 [2022-11-18 18:36:40,801 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 220 mSDsluCounter, 33 mSDsCounter, 0 mSdLazyCounter, 352 mSolverCounterSat, 92 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 220 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 444 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 92 IncrementalHoareTripleChecker+Valid, 352 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-18 18:36:40,801 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [220 Valid, 41 Invalid, 444 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [92 Valid, 352 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-11-18 18:36:40,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2022-11-18 18:36:40,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 121. [2022-11-18 18:36:40,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 120 states have (on average 1.15) internal successors, (138), 120 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:40,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 138 transitions. [2022-11-18 18:36:40,860 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 138 transitions. Word has length 64 [2022-11-18 18:36:40,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:36:40,860 INFO L495 AbstractCegarLoop]: Abstraction has 121 states and 138 transitions. [2022-11-18 18:36:40,860 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 2.6666666666666665) internal successors, (96), 36 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:40,860 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 138 transitions. [2022-11-18 18:36:40,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-11-18 18:36:40,861 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:36:40,861 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:36:40,867 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2022-11-18 18:36:41,064 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:36:41,065 INFO L420 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:36:41,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:36:41,065 INFO L85 PathProgramCache]: Analyzing trace with hash 822430999, now seen corresponding path program 29 times [2022-11-18 18:36:41,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:36:41,065 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980757460] [2022-11-18 18:36:41,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:36:41,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:36:41,083 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:36:41,083 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [795663562] [2022-11-18 18:36:41,083 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 18:36:41,083 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:36:41,084 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:36:41,085 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:36:41,097 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2022-11-18 18:36:41,802 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2022-11-18 18:36:41,802 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:36:41,806 INFO L263 TraceCheckSpWp]: Trace formula consists of 285 conjuncts, 25 conjunts are in the unsatisfiable core [2022-11-18 18:36:41,807 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:36:44,674 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 121 proven. 168 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:36:44,674 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:36:46,819 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 121 proven. 168 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:36:46,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:36:46,820 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [980757460] [2022-11-18 18:36:46,820 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:36:46,820 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [795663562] [2022-11-18 18:36:46,820 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [795663562] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:36:46,820 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:36:46,820 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 39 [2022-11-18 18:36:46,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011552835] [2022-11-18 18:36:46,821 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:36:46,821 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-11-18 18:36:46,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:36:46,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-11-18 18:36:46,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=362, Invalid=1120, Unknown=0, NotChecked=0, Total=1482 [2022-11-18 18:36:46,822 INFO L87 Difference]: Start difference. First operand 121 states and 138 transitions. Second operand has 39 states, 39 states have (on average 2.641025641025641) internal successors, (103), 39 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:54,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:36:54,067 INFO L93 Difference]: Finished difference Result 210 states and 252 transitions. [2022-11-18 18:36:54,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-18 18:36:54,068 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 39 states have (on average 2.641025641025641) internal successors, (103), 39 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2022-11-18 18:36:54,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:36:54,069 INFO L225 Difference]: With dead ends: 210 [2022-11-18 18:36:54,069 INFO L226 Difference]: Without dead ends: 206 [2022-11-18 18:36:54,070 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 80 SyntacticMatches, 11 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1631 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=1157, Invalid=4245, Unknown=0, NotChecked=0, Total=5402 [2022-11-18 18:36:54,071 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 279 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 900 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 279 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 957 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 900 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-11-18 18:36:54,071 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [279 Valid, 53 Invalid, 957 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 900 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2022-11-18 18:36:54,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2022-11-18 18:36:54,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 133. [2022-11-18 18:36:54,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 132 states have (on average 1.1590909090909092) internal successors, (153), 132 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:54,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 153 transitions. [2022-11-18 18:36:54,128 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 153 transitions. Word has length 65 [2022-11-18 18:36:54,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:36:54,129 INFO L495 AbstractCegarLoop]: Abstraction has 133 states and 153 transitions. [2022-11-18 18:36:54,129 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 39 states have (on average 2.641025641025641) internal successors, (103), 39 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:36:54,129 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 153 transitions. [2022-11-18 18:36:54,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-18 18:36:54,129 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:36:54,129 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:36:54,140 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Forceful destruction successful, exit code 0 [2022-11-18 18:36:54,330 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 37 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2022-11-18 18:36:54,330 INFO L420 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:36:54,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:36:54,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1942349355, now seen corresponding path program 30 times [2022-11-18 18:36:54,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:36:54,330 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728349506] [2022-11-18 18:36:54,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:36:54,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:36:54,349 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:36:54,349 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [386737888] [2022-11-18 18:36:54,349 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 18:36:54,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:36:54,349 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:36:54,350 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:36:54,361 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-11-18 18:36:55,272 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2022-11-18 18:36:55,273 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:36:55,276 INFO L263 TraceCheckSpWp]: Trace formula consists of 289 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-18 18:36:55,279 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:36:55,494 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:36:55,653 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2022-11-18 18:36:56,125 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:56,125 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:56,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:56,268 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:56,429 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:56,430 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:56,582 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:56,583 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:56,725 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:56,726 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:56,887 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:56,888 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:57,028 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:57,029 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:57,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:57,210 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:57,368 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:36:57,369 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2022-11-18 18:36:57,561 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:36:57,561 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 24 treesize of output 21 [2022-11-18 18:36:58,038 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 38 proven. 78 refuted. 0 times theorem prover too weak. 181 trivial. 0 not checked. [2022-11-18 18:36:58,038 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:36:58,587 WARN L837 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_main_~i~0#1| Int) (v_ArrVal_2359 (Array Int Int))) (or (<= (+ 3 |ULTIMATE.start_main_~i~0#1|) c_~N~0) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2359) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (<= c_~N~0 (+ |ULTIMATE.start_main_~i~0#1| 1)))) is different from false [2022-11-18 18:37:13,315 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:37:13,316 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 40 [2022-11-18 18:37:13,359 INFO L321 Elim1Store]: treesize reduction 8, result has 33.3 percent of original size [2022-11-18 18:37:13,359 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 30 [2022-11-18 18:37:15,650 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 9 proven. 28 refuted. 10 times theorem prover too weak. 181 trivial. 69 not checked. [2022-11-18 18:37:15,650 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:37:15,650 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728349506] [2022-11-18 18:37:15,650 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:37:15,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [386737888] [2022-11-18 18:37:15,651 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [386737888] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:37:15,651 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:37:15,651 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 21 [2022-11-18 18:37:15,651 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1378130249] [2022-11-18 18:37:15,651 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:37:15,652 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-18 18:37:15,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:37:15,652 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-18 18:37:15,652 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=295, Unknown=16, NotChecked=36, Total=420 [2022-11-18 18:37:15,653 INFO L87 Difference]: Start difference. First operand 133 states and 153 transitions. Second operand has 21 states, 21 states have (on average 2.0476190476190474) internal successors, (43), 21 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:37:20,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:37:20,962 INFO L93 Difference]: Finished difference Result 142 states and 162 transitions. [2022-11-18 18:37:20,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 18:37:20,963 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 2.0476190476190474) internal successors, (43), 21 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-18 18:37:20,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:37:20,964 INFO L225 Difference]: With dead ends: 142 [2022-11-18 18:37:20,964 INFO L226 Difference]: Without dead ends: 138 [2022-11-18 18:37:20,965 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 109 SyntacticMatches, 3 SemanticMatches, 25 ConstructedPredicates, 1 IntricatePredicates, 2 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 21.7s TimeCoverageRelationStatistics Valid=132, Invalid=504, Unknown=18, NotChecked=48, Total=702 [2022-11-18 18:37:20,966 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 16 mSDsluCounter, 41 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 108 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 18:37:20,966 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 51 Invalid, 193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 80 Invalid, 0 Unknown, 108 Unchecked, 0.4s Time] [2022-11-18 18:37:20,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2022-11-18 18:37:21,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 122. [2022-11-18 18:37:21,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 121 states have (on average 1.140495867768595) internal successors, (138), 121 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:37:21,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 138 transitions. [2022-11-18 18:37:21,039 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 138 transitions. Word has length 66 [2022-11-18 18:37:21,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:37:21,039 INFO L495 AbstractCegarLoop]: Abstraction has 122 states and 138 transitions. [2022-11-18 18:37:21,039 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 2.0476190476190474) internal successors, (43), 21 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:37:21,040 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 138 transitions. [2022-11-18 18:37:21,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-18 18:37:21,040 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:37:21,040 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:37:21,046 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Forceful destruction successful, exit code 0 [2022-11-18 18:37:21,240 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2022-11-18 18:37:21,241 INFO L420 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:37:21,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:37:21,241 INFO L85 PathProgramCache]: Analyzing trace with hash 392695893, now seen corresponding path program 31 times [2022-11-18 18:37:21,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:37:21,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186286302] [2022-11-18 18:37:21,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:37:21,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:37:21,259 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:37:21,259 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1715072083] [2022-11-18 18:37:21,259 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-18 18:37:21,259 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:37:21,259 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:37:21,260 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:37:21,272 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-11-18 18:37:21,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:37:21,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 289 conjuncts, 65 conjunts are in the unsatisfiable core [2022-11-18 18:37:21,480 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:37:21,508 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 18:37:22,562 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:37:22,913 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:22,914 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:37:23,355 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,366 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,367 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 38 [2022-11-18 18:37:23,889 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,894 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,899 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,903 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,908 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,913 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:23,914 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 7 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 52 [2022-11-18 18:37:26,874 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2022-11-18 18:37:27,382 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2022-11-18 18:37:29,859 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2022-11-18 18:37:30,342 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2022-11-18 18:37:30,830 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2022-11-18 18:37:31,370 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2022-11-18 18:37:31,920 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 36 [2022-11-18 18:37:32,647 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:32,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:32,658 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:32,660 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:37:32,660 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 13 [2022-11-18 18:37:32,848 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 88 proven. 194 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 18:37:32,848 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:37:33,269 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2477 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)) 5)) is different from false [2022-11-18 18:37:33,304 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2477 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 8 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:37:34,166 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2477 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 20 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5)) is different from false [2022-11-18 18:37:34,980 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2477 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 28 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5)) is different from false [2022-11-18 18:37:35,048 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2470 Int) (v_ArrVal_2477 (Array Int Int))) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2470)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 28 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:37:42,668 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_843| Int)) (or (forall ((v_ArrVal_2470 Int) (|v_ULTIMATE.start_main_~i~0#1_842| Int) (v_ArrVal_2477 (Array Int Int))) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_843| 1) |v_ULTIMATE.start_main_~i~0#1_842|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_843| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) 5) (+ (* |v_ULTIMATE.start_main_~i~0#1_842| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2470)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 28 |c_ULTIMATE.start_main_~a~0#1.offset|))))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_843|)))) is different from false [2022-11-18 18:37:44,728 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2470 Int) (|v_ULTIMATE.start_main_~i~0#1_842| Int) (v_ArrVal_2477 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_843| Int)) (or (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) 5) (+ (* |v_ULTIMATE.start_main_~i~0#1_843| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) 5) (+ (* |v_ULTIMATE.start_main_~i~0#1_842| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2470)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 28 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_843| 1) |v_ULTIMATE.start_main_~i~0#1_842|)) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_843|)))) is different from false [2022-11-18 18:37:46,781 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_844| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_844|)) (forall ((v_ArrVal_2470 Int) (|v_ULTIMATE.start_main_~i~0#1_842| Int) (v_ArrVal_2477 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_843| Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_844| 1) |v_ULTIMATE.start_main_~i~0#1_843|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_844| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) 5) (+ (* |v_ULTIMATE.start_main_~i~0#1_843| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) 5) (+ (* |v_ULTIMATE.start_main_~i~0#1_842| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2470)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2477) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 28 |c_ULTIMATE.start_main_~a~0#1.offset|))) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_843| 1) |v_ULTIMATE.start_main_~i~0#1_842|)))))) is different from false [2022-11-18 18:37:47,054 INFO L321 Elim1Store]: treesize reduction 203, result has 19.4 percent of original size [2022-11-18 18:37:47,054 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 45 treesize of output 61 [2022-11-18 18:37:47,270 INFO L321 Elim1Store]: treesize reduction 36, result has 46.3 percent of original size [2022-11-18 18:37:47,270 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 62 treesize of output 62 [2022-11-18 18:37:47,444 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:37:49,766 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 84 proven. 94 refuted. 0 times theorem prover too weak. 15 trivial. 104 not checked. [2022-11-18 18:37:49,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:37:49,767 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186286302] [2022-11-18 18:37:49,767 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:37:49,767 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1715072083] [2022-11-18 18:37:49,767 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1715072083] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:37:49,767 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:37:49,767 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 51 [2022-11-18 18:37:49,768 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [346739514] [2022-11-18 18:37:49,768 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:37:49,768 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 51 states [2022-11-18 18:37:49,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:37:49,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2022-11-18 18:37:49,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=1656, Unknown=17, NotChecked=712, Total=2550 [2022-11-18 18:37:49,771 INFO L87 Difference]: Start difference. First operand 122 states and 138 transitions. Second operand has 51 states, 51 states have (on average 2.0784313725490198) internal successors, (106), 51 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:37:56,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:37:56,292 INFO L93 Difference]: Finished difference Result 154 states and 179 transitions. [2022-11-18 18:37:56,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-11-18 18:37:56,293 INFO L78 Accepts]: Start accepts. Automaton has has 51 states, 51 states have (on average 2.0784313725490198) internal successors, (106), 51 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-18 18:37:56,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:37:56,294 INFO L225 Difference]: With dead ends: 154 [2022-11-18 18:37:56,294 INFO L226 Difference]: Without dead ends: 122 [2022-11-18 18:37:56,294 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 82 SyntacticMatches, 6 SemanticMatches, 53 ConstructedPredicates, 8 IntricatePredicates, 4 DeprecatedPredicates, 603 ImplicationChecksByTransitivity, 29.3s TimeCoverageRelationStatistics Valid=211, Invalid=1966, Unknown=17, NotChecked=776, Total=2970 [2022-11-18 18:37:56,295 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 2 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 162 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 544 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 162 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 379 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-18 18:37:56,295 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 147 Invalid, 544 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 162 Invalid, 0 Unknown, 379 Unchecked, 0.8s Time] [2022-11-18 18:37:56,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2022-11-18 18:37:56,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 116. [2022-11-18 18:37:56,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 115 states have (on average 1.1304347826086956) internal successors, (130), 115 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:37:56,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 130 transitions. [2022-11-18 18:37:56,351 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 130 transitions. Word has length 66 [2022-11-18 18:37:56,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:37:56,351 INFO L495 AbstractCegarLoop]: Abstraction has 116 states and 130 transitions. [2022-11-18 18:37:56,352 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 51 states, 51 states have (on average 2.0784313725490198) internal successors, (106), 51 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:37:56,352 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 130 transitions. [2022-11-18 18:37:56,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-18 18:37:56,352 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:37:56,352 INFO L195 NwaCegarLoop]: trace histogram [11, 11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:37:56,358 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Forceful destruction successful, exit code 0 [2022-11-18 18:37:56,555 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2022-11-18 18:37:56,555 INFO L420 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:37:56,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:37:56,555 INFO L85 PathProgramCache]: Analyzing trace with hash 2095261397, now seen corresponding path program 32 times [2022-11-18 18:37:56,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:37:56,556 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [77896111] [2022-11-18 18:37:56,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:37:56,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:37:56,573 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:37:56,573 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [52194557] [2022-11-18 18:37:56,574 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 18:37:56,574 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:37:56,574 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:37:56,575 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:37:56,578 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-11-18 18:37:56,796 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 18:37:56,796 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:37:56,799 INFO L263 TraceCheckSpWp]: Trace formula consists of 289 conjuncts, 55 conjunts are in the unsatisfiable core [2022-11-18 18:37:56,803 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:37:57,567 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:37:57,880 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:57,880 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:37:58,112 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:58,113 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:37:58,334 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:58,335 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:37:58,653 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:58,654 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:37:58,954 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:58,954 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:37:59,409 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:59,410 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:37:59,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:59,665 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:37:59,942 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:37:59,943 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:00,195 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:00,196 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:00,502 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:00,503 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:00,862 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 18:38:01,019 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 112 proven. 145 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2022-11-18 18:38:01,019 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:38:01,392 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2596 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset| 4)))) is different from false [2022-11-18 18:38:01,429 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2596 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 8 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5)) is different from false [2022-11-18 18:38:01,478 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2596 (Array Int Int))) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) 12 |c_ULTIMATE.start_main_~a~0#1.offset|)))) is different from false [2022-11-18 18:38:02,146 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2596 (Array Int Int))) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5)) is different from false [2022-11-18 18:38:05,155 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2591 Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_881|)))) is different from false [2022-11-18 18:38:07,204 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_882| Int)) (or (forall ((v_ArrVal_2591 Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_882| 1) |v_ULTIMATE.start_main_~i~0#1_881|)) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_882| 4)) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_882|)))) is different from false [2022-11-18 18:38:09,249 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2591 Int) (v_ArrVal_2586 Int) (|v_ULTIMATE.start_main_~i~0#1_882| Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_882| 1) |v_ULTIMATE.start_main_~i~0#1_881|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2586) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_882| 4)) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_882|)))) is different from false [2022-11-18 18:38:11,308 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_883| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_883|)) (forall ((v_ArrVal_2591 Int) (v_ArrVal_2586 Int) (|v_ULTIMATE.start_main_~i~0#1_882| Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_883| 1) |v_ULTIMATE.start_main_~i~0#1_882|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_882| 1) |v_ULTIMATE.start_main_~i~0#1_881|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_883| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2586) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_882| 4)) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|))))))) is different from false [2022-11-18 18:38:13,377 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2591 Int) (|v_ULTIMATE.start_main_~i~0#1_883| Int) (v_ArrVal_2584 Int) (v_ArrVal_2586 Int) (|v_ULTIMATE.start_main_~i~0#1_882| Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_883| 1) |v_ULTIMATE.start_main_~i~0#1_882|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_882| 1) |v_ULTIMATE.start_main_~i~0#1_881|)) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_883|)) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2584) (+ (* |v_ULTIMATE.start_main_~i~0#1_883| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2586) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_882| 4)) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5))) is different from false [2022-11-18 18:38:15,455 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_884| Int)) (or (forall ((v_ArrVal_2591 Int) (|v_ULTIMATE.start_main_~i~0#1_883| Int) (v_ArrVal_2584 Int) (v_ArrVal_2586 Int) (|v_ULTIMATE.start_main_~i~0#1_882| Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_883| 1) |v_ULTIMATE.start_main_~i~0#1_882|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_882| 1) |v_ULTIMATE.start_main_~i~0#1_881|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_884| 1) |v_ULTIMATE.start_main_~i~0#1_883|)) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_884| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2584) (+ (* |v_ULTIMATE.start_main_~i~0#1_883| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2586) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_882| 4)) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_884|)))) is different from false [2022-11-18 18:38:17,535 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_884| Int) (v_ArrVal_2591 Int) (|v_ULTIMATE.start_main_~i~0#1_883| Int) (v_ArrVal_2584 Int) (v_ArrVal_2583 Int) (v_ArrVal_2586 Int) (|v_ULTIMATE.start_main_~i~0#1_882| Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_883| 1) |v_ULTIMATE.start_main_~i~0#1_882|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_882| 1) |v_ULTIMATE.start_main_~i~0#1_881|)) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2583) (+ (* |v_ULTIMATE.start_main_~i~0#1_884| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2584) (+ (* |v_ULTIMATE.start_main_~i~0#1_883| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2586) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_882| 4)) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|))) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_884| 1) |v_ULTIMATE.start_main_~i~0#1_883|)) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_884|)))) is different from false [2022-11-18 18:38:19,644 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_885| Int)) (or (forall ((|v_ULTIMATE.start_main_~i~0#1_884| Int) (v_ArrVal_2591 Int) (|v_ULTIMATE.start_main_~i~0#1_883| Int) (v_ArrVal_2584 Int) (v_ArrVal_2583 Int) (v_ArrVal_2586 Int) (|v_ULTIMATE.start_main_~i~0#1_882| Int) (|v_ULTIMATE.start_main_~i~0#1_881| Int) (v_ArrVal_2596 (Array Int Int)) (v_ArrVal_2589 Int)) (or (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_883| 1) |v_ULTIMATE.start_main_~i~0#1_882|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_882| 1) |v_ULTIMATE.start_main_~i~0#1_881|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_885| 1) |v_ULTIMATE.start_main_~i~0#1_884|)) (not (<= (+ |v_ULTIMATE.start_main_~i~0#1_884| 1) |v_ULTIMATE.start_main_~i~0#1_883|)) (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store (store (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_885| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2583) (+ (* |v_ULTIMATE.start_main_~i~0#1_884| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2584) (+ (* |v_ULTIMATE.start_main_~i~0#1_883| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2586) (+ |c_ULTIMATE.start_main_~a~0#1.offset| (* |v_ULTIMATE.start_main_~i~0#1_882| 4)) v_ArrVal_2589) (+ (* |v_ULTIMATE.start_main_~i~0#1_881| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2591)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2596) |c_ULTIMATE.start_main_~a~0#1.base|) (+ 20 |c_ULTIMATE.start_main_~a~0#1.offset|)) 5))) (not (<= (+ |c_ULTIMATE.start_main_~i~0#1| 1) |v_ULTIMATE.start_main_~i~0#1_885|)))) is different from false [2022-11-18 18:38:20,180 INFO L321 Elim1Store]: treesize reduction 585, result has 11.1 percent of original size [2022-11-18 18:38:20,180 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 6 case distinctions, treesize of input 59 treesize of output 85 [2022-11-18 18:38:20,219 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:38:20,219 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 34 [2022-11-18 18:38:20,251 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 18:38:21,651 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 96 proven. 45 refuted. 0 times theorem prover too weak. 40 trivial. 116 not checked. [2022-11-18 18:38:21,651 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:38:21,651 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [77896111] [2022-11-18 18:38:21,651 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:38:21,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [52194557] [2022-11-18 18:38:21,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [52194557] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:38:21,652 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:38:21,652 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 27] total 47 [2022-11-18 18:38:21,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111660840] [2022-11-18 18:38:21,652 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:38:21,653 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-11-18 18:38:21,653 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:38:21,653 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-11-18 18:38:21,654 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=1062, Unknown=22, NotChecked=924, Total=2162 [2022-11-18 18:38:21,654 INFO L87 Difference]: Start difference. First operand 116 states and 130 transitions. Second operand has 47 states, 47 states have (on average 2.0) internal successors, (94), 47 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:38:31,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:38:31,390 INFO L93 Difference]: Finished difference Result 127 states and 143 transitions. [2022-11-18 18:38:31,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-11-18 18:38:31,391 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 47 states have (on average 2.0) internal successors, (94), 47 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-11-18 18:38:31,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:38:31,392 INFO L225 Difference]: With dead ends: 127 [2022-11-18 18:38:31,392 INFO L226 Difference]: Without dead ends: 100 [2022-11-18 18:38:31,393 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 86 SyntacticMatches, 13 SemanticMatches, 55 ConstructedPredicates, 12 IntricatePredicates, 0 DeprecatedPredicates, 635 ImplicationChecksByTransitivity, 28.4s TimeCoverageRelationStatistics Valid=229, Invalid=1777, Unknown=22, NotChecked=1164, Total=3192 [2022-11-18 18:38:31,393 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 45 mSDsluCounter, 110 mSDsCounter, 0 mSdLazyCounter, 644 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 1381 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 644 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 708 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2022-11-18 18:38:31,393 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [45 Valid, 119 Invalid, 1381 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 644 Invalid, 0 Unknown, 708 Unchecked, 2.9s Time] [2022-11-18 18:38:31,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-11-18 18:38:31,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 82. [2022-11-18 18:38:31,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 81 states have (on average 1.123456790123457) internal successors, (91), 81 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:38:31,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 91 transitions. [2022-11-18 18:38:31,437 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 91 transitions. Word has length 66 [2022-11-18 18:38:31,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:38:31,437 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 91 transitions. [2022-11-18 18:38:31,437 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 47 states have (on average 2.0) internal successors, (94), 47 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:38:31,438 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 91 transitions. [2022-11-18 18:38:31,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-18 18:38:31,438 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:38:31,438 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:38:31,447 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Ended with exit code 0 [2022-11-18 18:38:31,644 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40 [2022-11-18 18:38:31,644 INFO L420 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 18:38:31,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:38:31,645 INFO L85 PathProgramCache]: Analyzing trace with hash -5932521, now seen corresponding path program 33 times [2022-11-18 18:38:31,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:38:31,645 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569201351] [2022-11-18 18:38:31,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:38:31,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:38:31,664 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-18 18:38:31,664 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1104677199] [2022-11-18 18:38:31,664 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 18:38:31,664 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:38:31,665 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:38:31,666 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:38:31,669 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_25fa7b86-c13d-4c5b-93f3-3982710a0066/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-11-18 18:38:32,423 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2022-11-18 18:38:32,423 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 18:38:32,428 INFO L263 TraceCheckSpWp]: Trace formula consists of 307 conjuncts, 69 conjunts are in the unsatisfiable core [2022-11-18 18:38:32,431 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:38:33,755 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 18:38:34,161 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:34,161 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:38:34,440 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:34,441 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:38:34,726 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:34,727 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-18 18:38:35,802 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:35,803 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:36,260 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:36,261 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:36,707 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:36,708 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:36,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:36,869 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:37,059 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:37,060 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:37,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:37,230 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:37,438 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:37,439 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:37,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:38:37,615 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 18:38:37,908 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:38:37,909 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 17 [2022-11-18 18:38:39,773 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 328 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2022-11-18 18:38:39,773 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:38:44,083 WARN L837 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_main_~i~0#1| Int) (v_ArrVal_2722 (Array Int Int))) (or (not (< (+ 3 |ULTIMATE.start_main_~i~0#1|) c_~N~0)) (= 5 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< (+ |ULTIMATE.start_main_~i~0#1| 4) c_~N~0))) is different from false [2022-11-18 18:38:46,548 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2722 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< (+ |v_ULTIMATE.start_main_~i~0#1_921| 4) c_~N~0) (not (< (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|) c_~N~0)))) is different from false [2022-11-18 18:38:59,575 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse0 (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |c_ULTIMATE.start_main_~i~0#1| 4) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse0) (< .cse0 |c_ULTIMATE.start_main_~i~0#1|)))) is different from false [2022-11-18 18:40:22,476 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:40:22,476 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 42 treesize of output 53 [2022-11-18 18:40:22,528 INFO L321 Elim1Store]: treesize reduction 8, result has 33.3 percent of original size [2022-11-18 18:40:22,528 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 30 [2022-11-18 18:40:22,555 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 7 [2022-11-18 18:40:28,994 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 8 proven. 52 refuted. 34 times theorem prover too weak. 99 trivial. 161 not checked. [2022-11-18 18:40:28,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:40:28,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [569201351] [2022-11-18 18:40:28,995 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 18:40:28,995 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1104677199] [2022-11-18 18:40:28,996 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1104677199] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:40:28,996 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 18:40:28,997 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 20] total 47 [2022-11-18 18:40:28,997 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1113195495] [2022-11-18 18:40:28,997 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 18:40:28,998 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-11-18 18:40:28,998 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:40:28,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-11-18 18:40:28,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=1616, Unknown=74, NotChecked=258, Total=2162 [2022-11-18 18:40:28,999 INFO L87 Difference]: Start difference. First operand 82 states and 91 transitions. Second operand has 47 states, 47 states have (on average 2.0425531914893615) internal successors, (96), 47 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:40:38,860 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (* |c_ULTIMATE.start_main_~i~0#1| 4))) (let ((.cse2 (+ .cse4 |c_ULTIMATE.start_main_~a~0#1.offset| 4)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse1 (+ .cse4 |c_ULTIMATE.start_main_~a~0#1.offset|))) (and (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse3 (+ 2 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse1 v_ArrVal_2711) .cse2 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< .cse3 |c_ULTIMATE.start_main_~i~0#1|) (< |c_ULTIMATE.start_main_~i~0#1| .cse3)))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse5 (+ |v_ULTIMATE.start_main_~i~0#1_921| 1))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse2 v_ArrVal_2711) (+ .cse4 8 |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse5) (< .cse5 |c_ULTIMATE.start_main_~i~0#1|)))) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse6 (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store .cse0 .cse1 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse6) (< .cse6 |c_ULTIMATE.start_main_~i~0#1|)))) (= 3 |c_ULTIMATE.start_main_~i~0#1|) (= |c_ULTIMATE.start_main_~a~0#1.offset| 0)))) is different from false [2022-11-18 18:40:40,875 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse5 (* |c_ULTIMATE.start_main_~i~0#1| 4))) (let ((.cse1 (+ .cse5 |c_ULTIMATE.start_main_~a~0#1.offset| 4)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse3 (+ .cse5 8 |c_ULTIMATE.start_main_~a~0#1.offset|))) (and (or (< (+ |c_ULTIMATE.start_main_~i~0#1| 1) c_~N~0) (forall ((v_ArrVal_2722 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< (+ |v_ULTIMATE.start_main_~i~0#1_921| 4) c_~N~0) (not (< (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|) c_~N~0))))) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse2 (+ 2 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store .cse0 .cse1 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< .cse2 |c_ULTIMATE.start_main_~i~0#1|) (< |c_ULTIMATE.start_main_~i~0#1| .cse2)))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse4 (+ |v_ULTIMATE.start_main_~i~0#1_921| 1))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse1 v_ArrVal_2711) .cse3 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse4) (< .cse4 |c_ULTIMATE.start_main_~i~0#1|)))) (= 3 |c_ULTIMATE.start_main_~i~0#1|) (= |c_ULTIMATE.start_main_~a~0#1.offset| 0) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (< |c_ULTIMATE.start_main_~i~0#1| |v_ULTIMATE.start_main_~i~0#1_921|) (< |v_ULTIMATE.start_main_~i~0#1_921| |c_ULTIMATE.start_main_~i~0#1|) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse3 v_ArrVal_2711) (+ .cse5 12 |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)))))))) is different from false [2022-11-18 18:40:42,888 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse4 (* |c_ULTIMATE.start_main_~i~0#1| 4))) (let ((.cse2 (+ .cse4 |c_ULTIMATE.start_main_~a~0#1.offset| 4)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse1 (+ .cse4 |c_ULTIMATE.start_main_~a~0#1.offset|))) (and (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse3 (+ 2 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse1 v_ArrVal_2711) .cse2 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< .cse3 |c_ULTIMATE.start_main_~i~0#1|) (< |c_ULTIMATE.start_main_~i~0#1| .cse3)))) (or (forall ((v_ArrVal_2722 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< (+ |v_ULTIMATE.start_main_~i~0#1_921| 4) c_~N~0) (not (< (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|) c_~N~0)))) (< |c_ULTIMATE.start_main_~i~0#1| c_~N~0)) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse5 (+ |v_ULTIMATE.start_main_~i~0#1_921| 1))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse2 v_ArrVal_2711) (+ .cse4 8 |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse5) (< .cse5 |c_ULTIMATE.start_main_~i~0#1|)))) (= |c_ULTIMATE.start_main_~i~0#1| 4) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse6 (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store .cse0 .cse1 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse6) (< .cse6 |c_ULTIMATE.start_main_~i~0#1|)))) (= |c_ULTIMATE.start_main_~a~0#1.offset| 0)))) is different from false [2022-11-18 18:40:44,900 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse5 (* |c_ULTIMATE.start_main_~i~0#1| 4))) (let ((.cse1 (+ .cse5 |c_ULTIMATE.start_main_~a~0#1.offset| 4)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse3 (+ .cse5 8 |c_ULTIMATE.start_main_~a~0#1.offset|))) (and (or (< (+ |c_ULTIMATE.start_main_~i~0#1| 1) c_~N~0) (forall ((v_ArrVal_2722 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< (+ |v_ULTIMATE.start_main_~i~0#1_921| 4) c_~N~0) (not (< (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|) c_~N~0))))) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse2 (+ 2 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store .cse0 .cse1 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< .cse2 |c_ULTIMATE.start_main_~i~0#1|) (< |c_ULTIMATE.start_main_~i~0#1| .cse2)))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse4 (+ |v_ULTIMATE.start_main_~i~0#1_921| 1))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse1 v_ArrVal_2711) .cse3 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse4) (< .cse4 |c_ULTIMATE.start_main_~i~0#1|)))) (= |c_ULTIMATE.start_main_~i~0#1| 4) (= |c_ULTIMATE.start_main_~a~0#1.offset| 0) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (< |c_ULTIMATE.start_main_~i~0#1| |v_ULTIMATE.start_main_~i~0#1_921|) (< |v_ULTIMATE.start_main_~i~0#1_921| |c_ULTIMATE.start_main_~i~0#1|) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse3 v_ArrVal_2711) (+ .cse5 12 |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)))))))) is different from false [2022-11-18 18:41:22,871 WARN L233 SmtUtils]: Spent 6.82s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 18:41:24,882 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse5 (* |c_ULTIMATE.start_main_~i~0#1| 4))) (let ((.cse1 (+ .cse5 |c_ULTIMATE.start_main_~a~0#1.offset| 4)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse3 (+ .cse5 8 |c_ULTIMATE.start_main_~a~0#1.offset|))) (and (= 5 |c_ULTIMATE.start_main_~i~0#1|) (or (< (+ |c_ULTIMATE.start_main_~i~0#1| 1) c_~N~0) (forall ((v_ArrVal_2722 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< (+ |v_ULTIMATE.start_main_~i~0#1_921| 4) c_~N~0) (not (< (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|) c_~N~0))))) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse2 (+ 2 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store .cse0 .cse1 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< .cse2 |c_ULTIMATE.start_main_~i~0#1|) (< |c_ULTIMATE.start_main_~i~0#1| .cse2)))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse4 (+ |v_ULTIMATE.start_main_~i~0#1_921| 1))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse1 v_ArrVal_2711) .cse3 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse4) (< .cse4 |c_ULTIMATE.start_main_~i~0#1|)))) (= |c_ULTIMATE.start_main_~a~0#1.offset| 0) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (< |c_ULTIMATE.start_main_~i~0#1| |v_ULTIMATE.start_main_~i~0#1_921|) (< |v_ULTIMATE.start_main_~i~0#1_921| |c_ULTIMATE.start_main_~i~0#1|) (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse3 v_ArrVal_2711) (+ .cse5 12 |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)))))))) is different from false [2022-11-18 18:42:57,995 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse3 (* |c_ULTIMATE.start_main_~i~0#1| 4))) (let ((.cse1 (+ .cse3 |c_ULTIMATE.start_main_~a~0#1.offset| 4)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|))) (and (or (< (+ |c_ULTIMATE.start_main_~i~0#1| 1) c_~N~0) (forall ((v_ArrVal_2722 (Array Int Int)) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (or (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|)) 5) (< (+ |v_ULTIMATE.start_main_~i~0#1_921| 4) c_~N~0) (not (< (+ 3 |v_ULTIMATE.start_main_~i~0#1_921|) c_~N~0))))) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse2 (+ 2 |v_ULTIMATE.start_main_~i~0#1_921|))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store .cse0 .cse1 v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< .cse2 |c_ULTIMATE.start_main_~i~0#1|) (< |c_ULTIMATE.start_main_~i~0#1| .cse2)))) (<= (+ 2 |c_ULTIMATE.start_main_~a~0#1.base|) |c_ULTIMATE.start_main_~#sum~0#1.base|) (= 8 |c_ULTIMATE.start_main_~i~0#1|) (forall ((v_ArrVal_2722 (Array Int Int)) (v_ArrVal_2711 Int) (v_ArrVal_2713 Int) (|v_ULTIMATE.start_main_~i~0#1_921| Int)) (let ((.cse4 (+ |v_ULTIMATE.start_main_~i~0#1_921| 1))) (or (= 5 (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| (store (store .cse0 .cse1 v_ArrVal_2711) (+ .cse3 8 |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_2713)) |c_ULTIMATE.start_main_~#sum~0#1.base| v_ArrVal_2722) |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_921| 4) |c_ULTIMATE.start_main_~a~0#1.offset|))) (< |c_ULTIMATE.start_main_~i~0#1| .cse4) (< .cse4 |c_ULTIMATE.start_main_~i~0#1|)))) (= 5 (select .cse0 (+ .cse3 |c_ULTIMATE.start_main_~a~0#1.offset|))) (= |c_ULTIMATE.start_main_~a~0#1.offset| 0)))) is different from false