./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/loop-acceleration/simple_4-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/config/AutomizerReach.xml -i ../../sv-benchmarks/c/loop-acceleration/simple_4-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9950a3ef699b75b517ce9b65b2c32dbbe13ac0a027bb7e02ceeaeee924f6aade --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:10:37,300 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:10:37,302 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:10:37,342 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:10:37,342 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:10:37,343 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:10:37,345 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:10:37,347 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:10:37,354 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:10:37,360 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:10:37,362 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:10:37,366 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:10:37,366 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:10:37,368 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:10:37,372 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:10:37,374 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:10:37,375 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:10:37,376 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:10:37,379 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:10:37,384 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:10:37,385 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:10:37,387 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:10:37,391 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:10:37,392 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:10:37,399 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:10:37,400 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:10:37,400 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:10:37,401 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:10:37,401 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:10:37,402 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:10:37,403 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:10:37,404 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:10:37,404 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:10:37,405 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:10:37,406 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:10:37,406 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:10:37,407 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:10:37,407 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:10:37,408 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:10:37,408 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:10:37,415 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:10:37,415 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/config/svcomp-Reach-32bit-Automizer_Default.epf [2022-11-18 20:10:37,452 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:10:37,452 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:10:37,453 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:10:37,453 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:10:37,454 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 20:10:37,455 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 20:10:37,455 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:10:37,456 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:10:37,456 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:10:37,456 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:10:37,457 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 20:10:37,458 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:10:37,458 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 20:10:37,458 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:10:37,459 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-18 20:10:37,459 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 20:10:37,459 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-18 20:10:37,459 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 20:10:37,460 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-18 20:10:37,460 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:10:37,460 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-18 20:10:37,461 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:10:37,461 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:10:37,461 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 20:10:37,461 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:10:37,462 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:10:37,462 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 20:10:37,462 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-18 20:10:37,462 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:10:37,463 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 20:10:37,464 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-18 20:10:37,465 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-18 20:10:37,465 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-18 20:10:37,465 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9950a3ef699b75b517ce9b65b2c32dbbe13ac0a027bb7e02ceeaeee924f6aade [2022-11-18 20:10:37,803 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:10:37,828 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:10:37,845 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:10:37,846 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:10:37,847 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:10:37,848 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/loop-acceleration/simple_4-1.c [2022-11-18 20:10:37,919 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/data/c01c6eaf0/49945796cd484e1699a44d9e85267161/FLAGc05f90ecf [2022-11-18 20:10:38,371 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:10:38,372 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/sv-benchmarks/c/loop-acceleration/simple_4-1.c [2022-11-18 20:10:38,387 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/data/c01c6eaf0/49945796cd484e1699a44d9e85267161/FLAGc05f90ecf [2022-11-18 20:10:38,759 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/data/c01c6eaf0/49945796cd484e1699a44d9e85267161 [2022-11-18 20:10:38,762 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:10:38,765 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:10:38,768 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:10:38,769 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:10:38,772 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:10:38,773 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:10:38" (1/1) ... [2022-11-18 20:10:38,774 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2789b837 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:38, skipping insertion in model container [2022-11-18 20:10:38,775 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:10:38" (1/1) ... [2022-11-18 20:10:38,782 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:10:38,795 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:10:38,979 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/sv-benchmarks/c/loop-acceleration/simple_4-1.c[322,335] [2022-11-18 20:10:38,993 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:10:39,001 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:10:39,015 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/sv-benchmarks/c/loop-acceleration/simple_4-1.c[322,335] [2022-11-18 20:10:39,020 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:10:39,032 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:10:39,033 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39 WrapperNode [2022-11-18 20:10:39,033 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:10:39,034 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:10:39,034 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:10:39,034 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:10:39,040 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,045 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,061 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 23 [2022-11-18 20:10:39,061 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:10:39,062 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:10:39,062 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:10:39,062 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:10:39,069 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,070 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,071 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,071 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,073 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,076 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,077 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,078 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,079 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:10:39,080 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:10:39,080 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:10:39,080 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:10:39,081 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (1/1) ... [2022-11-18 20:10:39,087 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:10:39,100 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:10:39,110 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 20:10:39,118 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 20:10:39,163 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:10:39,164 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:10:39,164 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:10:39,164 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 20:10:39,229 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:10:39,230 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:10:39,377 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:10:39,383 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:10:39,383 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-18 20:10:39,386 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:10:39 BoogieIcfgContainer [2022-11-18 20:10:39,386 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:10:39,389 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 20:10:39,389 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 20:10:39,393 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 20:10:39,393 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 08:10:38" (1/3) ... [2022-11-18 20:10:39,394 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f630b1a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:10:39, skipping insertion in model container [2022-11-18 20:10:39,394 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:10:39" (2/3) ... [2022-11-18 20:10:39,395 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f630b1a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:10:39, skipping insertion in model container [2022-11-18 20:10:39,395 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:10:39" (3/3) ... [2022-11-18 20:10:39,396 INFO L112 eAbstractionObserver]: Analyzing ICFG simple_4-1.c [2022-11-18 20:10:39,417 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 20:10:39,418 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-18 20:10:39,491 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 20:10:39,500 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2c088800, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 20:10:39,501 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-18 20:10:39,514 INFO L276 IsEmpty]: Start isEmpty. Operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:39,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-18 20:10:39,523 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:10:39,524 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-18 20:10:39,524 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:10:39,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:10:39,532 INFO L85 PathProgramCache]: Analyzing trace with hash 889633835, now seen corresponding path program 1 times [2022-11-18 20:10:39,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:10:39,545 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932492032] [2022-11-18 20:10:39,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:39,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:10:39,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:39,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:39,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:10:39,935 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [932492032] [2022-11-18 20:10:39,936 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [932492032] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:10:39,942 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:10:39,942 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:10:39,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [738885346] [2022-11-18 20:10:39,945 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:10:39,949 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:10:39,965 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:10:40,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:10:40,008 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:10:40,011 INFO L87 Difference]: Start difference. First operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:40,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:10:40,037 INFO L93 Difference]: Finished difference Result 20 states and 24 transitions. [2022-11-18 20:10:40,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:10:40,040 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-18 20:10:40,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:10:40,047 INFO L225 Difference]: With dead ends: 20 [2022-11-18 20:10:40,048 INFO L226 Difference]: Without dead ends: 8 [2022-11-18 20:10:40,051 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:10:40,060 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 0 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 17 SdHoareTripleChecker+Invalid, 4 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:10:40,061 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 17 Invalid, 4 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:10:40,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states. [2022-11-18 20:10:40,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2022-11-18 20:10:40,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:40,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-18 20:10:40,103 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 6 [2022-11-18 20:10:40,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:10:40,103 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-18 20:10:40,104 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:40,105 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-18 20:10:40,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-18 20:10:40,105 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:10:40,105 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:10:40,106 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-18 20:10:40,106 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:10:40,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:10:40,108 INFO L85 PathProgramCache]: Analyzing trace with hash 1810510480, now seen corresponding path program 1 times [2022-11-18 20:10:40,108 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:10:40,108 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854212235] [2022-11-18 20:10:40,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:40,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:10:40,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:40,254 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:40,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:10:40,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1854212235] [2022-11-18 20:10:40,255 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1854212235] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:40,256 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1284246061] [2022-11-18 20:10:40,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:40,256 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:40,257 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:10:40,260 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:10:40,298 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 20:10:40,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:40,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 38 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:10:40,354 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:10:40,492 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:40,494 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:10:40,537 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:40,541 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1284246061] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:10:40,542 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:10:40,542 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-18 20:10:40,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207114404] [2022-11-18 20:10:40,543 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:10:40,545 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:10:40,546 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:10:40,546 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:10:40,547 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:10:40,547 INFO L87 Difference]: Start difference. First operand 8 states and 8 transitions. Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:40,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:10:40,605 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-11-18 20:10:40,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 20:10:40,606 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-18 20:10:40,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:10:40,607 INFO L225 Difference]: With dead ends: 15 [2022-11-18 20:10:40,607 INFO L226 Difference]: Without dead ends: 11 [2022-11-18 20:10:40,608 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=30, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:10:40,610 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 3 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:10:40,614 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 9 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:10:40,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states. [2022-11-18 20:10:40,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2022-11-18 20:10:40,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:40,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 11 transitions. [2022-11-18 20:10:40,623 INFO L78 Accepts]: Start accepts. Automaton has 11 states and 11 transitions. Word has length 7 [2022-11-18 20:10:40,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:10:40,624 INFO L495 AbstractCegarLoop]: Abstraction has 11 states and 11 transitions. [2022-11-18 20:10:40,624 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:40,629 INFO L276 IsEmpty]: Start isEmpty. Operand 11 states and 11 transitions. [2022-11-18 20:10:40,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-11-18 20:10:40,630 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:10:40,630 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1] [2022-11-18 20:10:40,646 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:10:40,835 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:40,835 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:10:40,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:10:40,836 INFO L85 PathProgramCache]: Analyzing trace with hash -1922847381, now seen corresponding path program 2 times [2022-11-18 20:10:40,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:10:40,836 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97036724] [2022-11-18 20:10:40,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:40,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:10:40,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:41,062 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:41,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:10:41,065 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97036724] [2022-11-18 20:10:41,065 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97036724] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:41,065 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [563902812] [2022-11-18 20:10:41,068 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:10:41,068 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:41,068 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:10:41,069 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:10:41,089 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 20:10:41,123 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:10:41,123 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:10:41,124 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-18 20:10:41,126 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:10:41,207 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:41,207 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:10:41,358 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:41,360 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [563902812] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:10:41,360 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:10:41,360 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-18 20:10:41,360 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [147255508] [2022-11-18 20:10:41,361 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:10:41,362 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-11-18 20:10:41,362 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:10:41,363 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-18 20:10:41,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2022-11-18 20:10:41,365 INFO L87 Difference]: Start difference. First operand 11 states and 11 transitions. Second operand has 13 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:41,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:10:41,921 INFO L93 Difference]: Finished difference Result 21 states and 26 transitions. [2022-11-18 20:10:41,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-18 20:10:41,922 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-11-18 20:10:41,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:10:41,922 INFO L225 Difference]: With dead ends: 21 [2022-11-18 20:10:41,922 INFO L226 Difference]: Without dead ends: 17 [2022-11-18 20:10:41,923 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=123, Invalid=183, Unknown=0, NotChecked=0, Total=306 [2022-11-18 20:10:41,924 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 12 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 15 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:10:41,924 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 15 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:10:41,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-11-18 20:10:41,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-11-18 20:10:41,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:41,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2022-11-18 20:10:41,930 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 10 [2022-11-18 20:10:41,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:10:41,931 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2022-11-18 20:10:41,931 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:41,931 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2022-11-18 20:10:41,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-18 20:10:41,932 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:10:41,932 INFO L195 NwaCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1] [2022-11-18 20:10:41,942 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:10:42,132 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-11-18 20:10:42,132 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:10:42,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:10:42,133 INFO L85 PathProgramCache]: Analyzing trace with hash 1628318539, now seen corresponding path program 3 times [2022-11-18 20:10:42,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:10:42,133 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023271060] [2022-11-18 20:10:42,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:42,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:10:42,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:42,472 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:42,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:10:42,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2023271060] [2022-11-18 20:10:42,472 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2023271060] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:42,472 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [582611926] [2022-11-18 20:10:42,473 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 20:10:42,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:42,473 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:10:42,477 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:10:42,490 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 20:10:42,562 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-11-18 20:10:42,562 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:10:42,577 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-18 20:10:42,579 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:10:42,687 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:42,688 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:10:43,094 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:43,094 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [582611926] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:10:43,094 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:10:43,094 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2022-11-18 20:10:43,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787862080] [2022-11-18 20:10:43,095 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:10:43,095 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-11-18 20:10:43,095 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:10:43,096 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 20:10:43,096 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=410, Unknown=0, NotChecked=0, Total=600 [2022-11-18 20:10:43,096 INFO L87 Difference]: Start difference. First operand 17 states and 17 transitions. Second operand has 25 states, 25 states have (on average 1.2) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:55,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:10:55,763 INFO L93 Difference]: Finished difference Result 33 states and 44 transitions. [2022-11-18 20:10:55,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-11-18 20:10:55,766 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.2) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-18 20:10:55,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:10:55,766 INFO L225 Difference]: With dead ends: 33 [2022-11-18 20:10:55,766 INFO L226 Difference]: Without dead ends: 29 [2022-11-18 20:10:55,767 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 20 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 12.6s TimeCoverageRelationStatistics Valid=465, Invalid=795, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 20:10:55,768 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 30 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 141 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-18 20:10:55,768 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 24 Invalid, 163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 141 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-18 20:10:55,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-11-18 20:10:55,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2022-11-18 20:10:55,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:55,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2022-11-18 20:10:55,782 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 16 [2022-11-18 20:10:55,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:10:55,782 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2022-11-18 20:10:55,783 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.2) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:10:55,783 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2022-11-18 20:10:55,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-18 20:10:55,784 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:10:55,784 INFO L195 NwaCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1] [2022-11-18 20:10:55,794 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:10:55,984 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:55,985 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:10:55,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:10:55,985 INFO L85 PathProgramCache]: Analyzing trace with hash 1394044683, now seen corresponding path program 4 times [2022-11-18 20:10:55,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:10:55,986 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941404468] [2022-11-18 20:10:55,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:55,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:10:56,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:56,752 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:56,752 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:10:56,752 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941404468] [2022-11-18 20:10:56,753 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941404468] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:56,753 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1767163994] [2022-11-18 20:10:56,753 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 20:10:56,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:56,753 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:10:56,755 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:10:56,781 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 20:10:56,858 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 20:10:56,858 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:10:56,860 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-18 20:10:56,861 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:10:57,039 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:57,039 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:10:58,479 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:58,480 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1767163994] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:10:58,480 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:10:58,480 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2022-11-18 20:10:58,480 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [65844861] [2022-11-18 20:10:58,480 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:10:58,481 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2022-11-18 20:10:58,481 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:10:58,482 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-18 20:10:58,483 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=670, Invalid=1682, Unknown=0, NotChecked=0, Total=2352 [2022-11-18 20:10:58,483 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand has 49 states, 49 states have (on average 1.1020408163265305) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:12:06,270 WARN L233 SmtUtils]: Spent 54.67s on a formula simplification that was a NOOP. DAG size: 94 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:12:07,711 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.44s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:12:09,727 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:12:50,921 WARN L233 SmtUtils]: Spent 31.84s on a formula simplification that was a NOOP. DAG size: 86 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:12:54,019 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:12:56,030 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:13:22,383 WARN L233 SmtUtils]: Spent 20.27s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:13:55,893 WARN L233 SmtUtils]: Spent 18.74s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:14:17,774 WARN L233 SmtUtils]: Spent 12.23s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:14:33,748 WARN L233 SmtUtils]: Spent 9.93s on a formula simplification that was a NOOP. DAG size: 62 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:15:05,683 WARN L233 SmtUtils]: Spent 6.06s on a formula simplification that was a NOOP. DAG size: 50 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:15:18,564 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:15:18,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:15:18,568 INFO L93 Difference]: Finished difference Result 57 states and 80 transitions. [2022-11-18 20:15:18,568 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-11-18 20:15:18,569 INFO L78 Accepts]: Start accepts. Automaton has has 49 states, 49 states have (on average 1.1020408163265305) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-18 20:15:18,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:15:18,570 INFO L225 Difference]: With dead ends: 57 [2022-11-18 20:15:18,570 INFO L226 Difference]: Without dead ends: 53 [2022-11-18 20:15:18,572 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 70 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 257.5s TimeCoverageRelationStatistics Valid=1557, Invalid=3006, Unknown=9, NotChecked=540, Total=5112 [2022-11-18 20:15:18,573 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 0 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 575 mSolverCounterSat, 85 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 664 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 85 IncrementalHoareTripleChecker+Valid, 575 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:15:18,573 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 83 Invalid, 664 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [85 Valid, 575 Invalid, 0 Unknown, 4 Unchecked, 4.3s Time] [2022-11-18 20:15:18,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-11-18 20:15:18,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2022-11-18 20:15:18,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 52 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:15:18,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2022-11-18 20:15:18,599 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 28 [2022-11-18 20:15:18,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:15:18,600 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2022-11-18 20:15:18,600 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 1.1020408163265305) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:15:18,600 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2022-11-18 20:15:18,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-11-18 20:15:18,602 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:15:18,602 INFO L195 NwaCegarLoop]: trace histogram [46, 1, 1, 1, 1, 1, 1] [2022-11-18 20:15:18,612 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:15:18,808 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:15:18,808 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-18 20:15:18,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:15:18,808 INFO L85 PathProgramCache]: Analyzing trace with hash 469964427, now seen corresponding path program 5 times [2022-11-18 20:15:18,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:15:18,809 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842073357] [2022-11-18 20:15:18,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:15:18,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:15:18,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:15:21,146 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:15:21,147 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:15:21,147 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842073357] [2022-11-18 20:15:21,147 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1842073357] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:15:21,148 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [274070189] [2022-11-18 20:15:21,148 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 20:15:21,148 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:15:21,148 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:15:21,153 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:15:21,154 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a99e9e01-769a-4cd1-af71-35d244b95603/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 20:21:03,373 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2022-11-18 20:21:03,373 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:21:03,421 WARN L261 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 95 conjunts are in the unsatisfiable core [2022-11-18 20:21:03,425 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:21:03,689 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:21:03,689 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:21:08,783 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:21:08,783 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [274070189] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:21:08,783 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:21:08,784 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2022-11-18 20:21:08,784 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96054725] [2022-11-18 20:21:08,784 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:21:08,785 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 97 states [2022-11-18 20:21:08,785 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:21:08,786 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-11-18 20:21:08,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2494, Invalid=6818, Unknown=0, NotChecked=0, Total=9312 [2022-11-18 20:21:08,789 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand has 97 states, 97 states have (on average 1.0515463917525774) internal successors, (102), 97 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:21:11,987 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967204) 4294967296)) (< 1 (mod (+ 4294967206 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967208) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:14,016 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ 4294967206 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967208) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:16,030 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967208) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:18,044 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:20,062 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:22,078 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:24,093 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:26,105 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:28,118 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:30,134 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:32,146 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:34,160 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:36,176 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:38,188 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:40,203 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:21:42,217 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-18 20:24:23,754 WARN L233 SmtUtils]: Spent 1.56m on a formula simplification that was a NOOP. DAG size: 126 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:24:26,483 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:27,527 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.04s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:29,532 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:32,464 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.51s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:34,471 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:36,475 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:39,170 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:40,184 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.01s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:42,287 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:44,059 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.77s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-18 20:24:46,072 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:24:48,084 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:24:50,100 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:24:52,115 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-18 20:24:54,140 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false