./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety/960521-1-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety/960521-1-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4591ef5e575ce80e216cc4837705a7c6f141a943d9af6ca1eb606ab877abd06b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 19:58:21,588 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 19:58:21,591 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 19:58:21,632 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 19:58:21,633 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 19:58:21,634 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 19:58:21,637 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 19:58:21,643 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 19:58:21,647 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 19:58:21,655 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 19:58:21,657 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 19:58:21,660 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 19:58:21,660 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 19:58:21,663 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 19:58:21,667 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 19:58:21,669 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 19:58:21,671 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 19:58:21,672 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 19:58:21,675 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 19:58:21,682 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 19:58:21,684 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 19:58:21,685 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 19:58:21,690 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 19:58:21,691 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 19:58:21,696 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 19:58:21,697 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 19:58:21,697 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 19:58:21,699 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 19:58:21,700 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 19:58:21,701 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 19:58:21,701 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 19:58:21,702 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 19:58:21,704 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 19:58:21,706 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 19:58:21,707 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 19:58:21,707 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 19:58:21,708 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 19:58:21,708 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 19:58:21,708 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 19:58:21,709 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 19:58:21,710 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 19:58:21,711 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-18 19:58:21,758 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 19:58:21,759 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 19:58:21,759 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 19:58:21,760 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 19:58:21,761 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 19:58:21,761 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 19:58:21,762 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 19:58:21,762 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 19:58:21,762 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 19:58:21,762 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 19:58:21,764 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 19:58:21,764 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 19:58:21,764 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 19:58:21,764 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 19:58:21,765 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 19:58:21,765 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-18 19:58:21,765 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-18 19:58:21,765 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-18 19:58:21,766 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 19:58:21,766 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-18 19:58:21,766 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 19:58:21,766 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 19:58:21,767 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 19:58:21,767 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 19:58:21,767 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 19:58:21,767 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 19:58:21,768 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 19:58:21,768 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 19:58:21,768 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 19:58:21,768 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 19:58:21,768 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4591ef5e575ce80e216cc4837705a7c6f141a943d9af6ca1eb606ab877abd06b [2022-11-18 19:58:22,147 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 19:58:22,187 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 19:58:22,190 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 19:58:22,192 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 19:58:22,193 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 19:58:22,194 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/memsafety/960521-1-1.i [2022-11-18 19:58:22,269 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/data/401b81d9f/8be98f0ceb494bbf84912ec689ca5025/FLAGb0f4f43e3 [2022-11-18 19:58:22,885 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 19:58:22,886 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/sv-benchmarks/c/memsafety/960521-1-1.i [2022-11-18 19:58:22,897 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/data/401b81d9f/8be98f0ceb494bbf84912ec689ca5025/FLAGb0f4f43e3 [2022-11-18 19:58:23,179 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/data/401b81d9f/8be98f0ceb494bbf84912ec689ca5025 [2022-11-18 19:58:23,182 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 19:58:23,184 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 19:58:23,190 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 19:58:23,191 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 19:58:23,194 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 19:58:23,195 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,197 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1d37d0b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23, skipping insertion in model container [2022-11-18 19:58:23,197 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,205 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 19:58:23,252 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 19:58:23,647 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:58:23,657 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 19:58:23,720 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 19:58:23,745 INFO L208 MainTranslator]: Completed translation [2022-11-18 19:58:23,746 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23 WrapperNode [2022-11-18 19:58:23,746 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 19:58:23,748 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 19:58:23,748 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 19:58:23,748 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 19:58:23,757 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,791 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,811 INFO L138 Inliner]: procedures = 121, calls = 17, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 65 [2022-11-18 19:58:23,812 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 19:58:23,813 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 19:58:23,813 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 19:58:23,813 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 19:58:23,823 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,823 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,826 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,826 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,832 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,836 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,837 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,838 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,840 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 19:58:23,841 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 19:58:23,841 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 19:58:23,841 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 19:58:23,842 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (1/1) ... [2022-11-18 19:58:23,854 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 19:58:23,868 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:23,881 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 19:58:23,891 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 19:58:23,922 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 19:58:23,923 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 19:58:23,923 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 19:58:23,924 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 19:58:23,924 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 19:58:23,924 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 19:58:23,924 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 19:58:23,925 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 19:58:24,059 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 19:58:24,061 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 19:58:24,330 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 19:58:24,337 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 19:58:24,343 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-18 19:58:24,346 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:58:24 BoogieIcfgContainer [2022-11-18 19:58:24,346 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 19:58:24,348 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 19:58:24,348 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 19:58:24,367 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 19:58:24,367 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 07:58:23" (1/3) ... [2022-11-18 19:58:24,368 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b040935 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 07:58:24, skipping insertion in model container [2022-11-18 19:58:24,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 07:58:23" (2/3) ... [2022-11-18 19:58:24,368 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b040935 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 07:58:24, skipping insertion in model container [2022-11-18 19:58:24,368 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:58:24" (3/3) ... [2022-11-18 19:58:24,370 INFO L112 eAbstractionObserver]: Analyzing ICFG 960521-1-1.i [2022-11-18 19:58:24,390 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 19:58:24,401 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 21 error locations. [2022-11-18 19:58:24,480 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 19:58:24,491 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3dd44d25, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 19:58:24,491 INFO L358 AbstractCegarLoop]: Starting to check reachability of 21 error locations. [2022-11-18 19:58:24,498 INFO L276 IsEmpty]: Start isEmpty. Operand has 51 states, 29 states have (on average 1.896551724137931) internal successors, (55), 50 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:24,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-18 19:58:24,506 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:24,507 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-18 19:58:24,508 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:24,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:24,517 INFO L85 PathProgramCache]: Analyzing trace with hash 29857, now seen corresponding path program 1 times [2022-11-18 19:58:24,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:24,529 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513736105] [2022-11-18 19:58:24,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:24,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:24,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:24,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:24,865 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:24,865 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513736105] [2022-11-18 19:58:24,866 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1513736105] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:58:24,866 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:58:24,867 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 19:58:24,868 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1158380003] [2022-11-18 19:58:24,869 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:58:24,874 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 19:58:24,874 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:24,903 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:58:24,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:58:24,907 INFO L87 Difference]: Start difference. First operand has 51 states, 29 states have (on average 1.896551724137931) internal successors, (55), 50 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:25,004 INFO L93 Difference]: Finished difference Result 50 states and 52 transitions. [2022-11-18 19:58:25,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:58:25,007 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-18 19:58:25,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:25,015 INFO L225 Difference]: With dead ends: 50 [2022-11-18 19:58:25,015 INFO L226 Difference]: Without dead ends: 48 [2022-11-18 19:58:25,017 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:58:25,021 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 2 mSDsluCounter, 31 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:25,022 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 81 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 19:58:25,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-11-18 19:58:25,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2022-11-18 19:58:25,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 47 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2022-11-18 19:58:25,081 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 3 [2022-11-18 19:58:25,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:25,082 INFO L495 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2022-11-18 19:58:25,082 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,083 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2022-11-18 19:58:25,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-18 19:58:25,083 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:25,083 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-18 19:58:25,084 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-18 19:58:25,085 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:25,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:25,085 INFO L85 PathProgramCache]: Analyzing trace with hash 29858, now seen corresponding path program 1 times [2022-11-18 19:58:25,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:25,086 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405499717] [2022-11-18 19:58:25,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:25,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:25,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:25,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:25,246 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:25,247 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405499717] [2022-11-18 19:58:25,247 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [405499717] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:58:25,247 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:58:25,247 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 19:58:25,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1622393713] [2022-11-18 19:58:25,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:58:25,249 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 19:58:25,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:25,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 19:58:25,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:58:25,250 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:25,290 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2022-11-18 19:58:25,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:58:25,291 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-18 19:58:25,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:25,292 INFO L225 Difference]: With dead ends: 47 [2022-11-18 19:58:25,292 INFO L226 Difference]: Without dead ends: 47 [2022-11-18 19:58:25,293 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 19:58:25,294 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 1 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:25,295 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 87 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 19:58:25,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-11-18 19:58:25,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2022-11-18 19:58:25,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 28 states have (on average 1.75) internal successors, (49), 46 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2022-11-18 19:58:25,302 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 49 transitions. Word has length 3 [2022-11-18 19:58:25,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:25,302 INFO L495 AbstractCegarLoop]: Abstraction has 47 states and 49 transitions. [2022-11-18 19:58:25,303 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,303 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 49 transitions. [2022-11-18 19:58:25,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-18 19:58:25,304 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:25,304 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-18 19:58:25,304 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-18 19:58:25,304 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:25,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:25,305 INFO L85 PathProgramCache]: Analyzing trace with hash 889446312, now seen corresponding path program 1 times [2022-11-18 19:58:25,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:25,306 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361042884] [2022-11-18 19:58:25,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:25,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:25,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:25,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:25,480 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:25,480 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361042884] [2022-11-18 19:58:25,480 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [361042884] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:58:25,481 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:58:25,481 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:58:25,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [447510043] [2022-11-18 19:58:25,481 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:58:25,484 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 19:58:25,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:25,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:58:25,486 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:58:25,486 INFO L87 Difference]: Start difference. First operand 47 states and 49 transitions. Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:25,556 INFO L93 Difference]: Finished difference Result 44 states and 46 transitions. [2022-11-18 19:58:25,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 19:58:25,556 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-18 19:58:25,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:25,557 INFO L225 Difference]: With dead ends: 44 [2022-11-18 19:58:25,558 INFO L226 Difference]: Without dead ends: 44 [2022-11-18 19:58:25,559 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:58:25,560 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 28 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:25,562 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 51 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 19:58:25,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-11-18 19:58:25,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2022-11-18 19:58:25,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 28 states have (on average 1.6428571428571428) internal successors, (46), 43 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 46 transitions. [2022-11-18 19:58:25,573 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 46 transitions. Word has length 6 [2022-11-18 19:58:25,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:25,574 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 46 transitions. [2022-11-18 19:58:25,574 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:25,574 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 46 transitions. [2022-11-18 19:58:25,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-18 19:58:25,575 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:25,575 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-18 19:58:25,575 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-18 19:58:25,576 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:25,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:25,576 INFO L85 PathProgramCache]: Analyzing trace with hash 889446313, now seen corresponding path program 1 times [2022-11-18 19:58:25,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:25,577 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621910654] [2022-11-18 19:58:25,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:25,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:25,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:25,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:25,978 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:25,979 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621910654] [2022-11-18 19:58:25,979 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [621910654] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:58:25,979 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:58:25,980 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 19:58:25,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2035069858] [2022-11-18 19:58:25,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:58:25,980 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 19:58:25,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:25,981 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 19:58:25,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-18 19:58:25,982 INFO L87 Difference]: Start difference. First operand 44 states and 46 transitions. Second operand has 6 states, 5 states have (on average 1.2) internal successors, (6), 6 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:26,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:26,140 INFO L93 Difference]: Finished difference Result 51 states and 54 transitions. [2022-11-18 19:58:26,141 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 19:58:26,141 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 6 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-18 19:58:26,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:26,142 INFO L225 Difference]: With dead ends: 51 [2022-11-18 19:58:26,143 INFO L226 Difference]: Without dead ends: 51 [2022-11-18 19:58:26,143 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-18 19:58:26,145 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 65 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:26,146 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 64 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 19:58:26,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-11-18 19:58:26,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 45. [2022-11-18 19:58:26,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 31 states have (on average 1.5483870967741935) internal successors, (48), 44 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:26,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 48 transitions. [2022-11-18 19:58:26,152 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 48 transitions. Word has length 6 [2022-11-18 19:58:26,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:26,153 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 48 transitions. [2022-11-18 19:58:26,153 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 1.2) internal successors, (6), 6 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:26,153 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 48 transitions. [2022-11-18 19:58:26,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2022-11-18 19:58:26,154 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:26,154 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:26,155 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-18 19:58:26,155 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:26,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:26,156 INFO L85 PathProgramCache]: Analyzing trace with hash 59362067, now seen corresponding path program 1 times [2022-11-18 19:58:26,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:26,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966870952] [2022-11-18 19:58:26,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:26,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:26,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:26,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:26,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:26,207 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966870952] [2022-11-18 19:58:26,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1966870952] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:58:26,207 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:58:26,207 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 19:58:26,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557902310] [2022-11-18 19:58:26,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:58:26,208 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 19:58:26,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:26,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:58:26,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:58:26,210 INFO L87 Difference]: Start difference. First operand 45 states and 48 transitions. Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:26,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:26,243 INFO L93 Difference]: Finished difference Result 50 states and 52 transitions. [2022-11-18 19:58:26,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 19:58:26,244 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2022-11-18 19:58:26,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:26,245 INFO L225 Difference]: With dead ends: 50 [2022-11-18 19:58:26,245 INFO L226 Difference]: Without dead ends: 50 [2022-11-18 19:58:26,246 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:58:26,247 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 55 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 66 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:26,248 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 66 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 19:58:26,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2022-11-18 19:58:26,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 45. [2022-11-18 19:58:26,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 44 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:26,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2022-11-18 19:58:26,253 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 47 transitions. Word has length 8 [2022-11-18 19:58:26,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:26,253 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 47 transitions. [2022-11-18 19:58:26,254 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:26,254 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 47 transitions. [2022-11-18 19:58:26,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-11-18 19:58:26,255 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:26,255 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:26,255 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-18 19:58:26,256 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:26,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:26,256 INFO L85 PathProgramCache]: Analyzing trace with hash 1841820687, now seen corresponding path program 1 times [2022-11-18 19:58:26,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:26,257 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120025473] [2022-11-18 19:58:26,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:26,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:26,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:26,604 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:26,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:26,605 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1120025473] [2022-11-18 19:58:26,605 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1120025473] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:26,605 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [92350872] [2022-11-18 19:58:26,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:26,606 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:26,606 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:26,610 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:26,627 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 19:58:26,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:26,697 INFO L263 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 16 conjunts are in the unsatisfiable core [2022-11-18 19:58:26,705 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:26,792 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 19:58:26,793 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-18 19:58:26,950 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:26,950 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:27,075 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:27,075 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [92350872] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:27,076 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:27,076 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 12 [2022-11-18 19:58:27,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643681717] [2022-11-18 19:58:27,076 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:27,077 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-11-18 19:58:27,078 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:27,078 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-18 19:58:27,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2022-11-18 19:58:27,081 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. Second operand has 13 states, 12 states have (on average 2.0833333333333335) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:27,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:27,480 INFO L93 Difference]: Finished difference Result 67 states and 72 transitions. [2022-11-18 19:58:27,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 19:58:27,481 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 2.0833333333333335) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-11-18 19:58:27,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:27,483 INFO L225 Difference]: With dead ends: 67 [2022-11-18 19:58:27,483 INFO L226 Difference]: Without dead ends: 67 [2022-11-18 19:58:27,483 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2022-11-18 19:58:27,484 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 194 mSDsluCounter, 96 mSDsCounter, 0 mSdLazyCounter, 157 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 120 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:27,484 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [194 Valid, 120 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 157 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 19:58:27,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-11-18 19:58:27,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 60. [2022-11-18 19:58:27,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 46 states have (on average 1.5) internal successors, (69), 59 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:27,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 69 transitions. [2022-11-18 19:58:27,491 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 69 transitions. Word has length 9 [2022-11-18 19:58:27,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:27,491 INFO L495 AbstractCegarLoop]: Abstraction has 60 states and 69 transitions. [2022-11-18 19:58:27,491 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 2.0833333333333335) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:27,492 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 69 transitions. [2022-11-18 19:58:27,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-18 19:58:27,492 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:27,492 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:27,503 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-11-18 19:58:27,697 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:27,698 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:27,698 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:27,698 INFO L85 PathProgramCache]: Analyzing trace with hash 463101433, now seen corresponding path program 1 times [2022-11-18 19:58:27,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:27,699 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217037092] [2022-11-18 19:58:27,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:27,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:27,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:27,757 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 19:58:27,757 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:27,757 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217037092] [2022-11-18 19:58:27,759 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1217037092] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:58:27,759 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 19:58:27,759 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 19:58:27,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [571628791] [2022-11-18 19:58:27,760 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:58:27,760 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 19:58:27,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:27,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:58:27,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 19:58:27,761 INFO L87 Difference]: Start difference. First operand 60 states and 69 transitions. Second operand has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:27,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:27,820 INFO L93 Difference]: Finished difference Result 58 states and 65 transitions. [2022-11-18 19:58:27,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 19:58:27,820 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-18 19:58:27,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:27,822 INFO L225 Difference]: With dead ends: 58 [2022-11-18 19:58:27,822 INFO L226 Difference]: Without dead ends: 58 [2022-11-18 19:58:27,823 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 19:58:27,825 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 17 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:27,825 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 61 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 19:58:27,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-11-18 19:58:27,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2022-11-18 19:58:27,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 57 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:27,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 65 transitions. [2022-11-18 19:58:27,840 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 65 transitions. Word has length 11 [2022-11-18 19:58:27,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:27,840 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 65 transitions. [2022-11-18 19:58:27,841 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:27,841 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 65 transitions. [2022-11-18 19:58:27,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-18 19:58:27,841 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:27,841 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:27,842 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-18 19:58:27,842 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:27,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:27,842 INFO L85 PathProgramCache]: Analyzing trace with hash 463101434, now seen corresponding path program 1 times [2022-11-18 19:58:27,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:27,843 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877190632] [2022-11-18 19:58:27,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:27,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:27,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:27,935 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:27,935 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:27,935 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [877190632] [2022-11-18 19:58:27,936 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [877190632] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:27,936 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1742886899] [2022-11-18 19:58:27,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:27,936 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:27,936 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:27,937 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:27,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 19:58:28,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:28,009 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 19:58:28,010 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:28,065 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:28,065 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:28,098 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:28,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1742886899] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:28,099 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:28,099 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 10 [2022-11-18 19:58:28,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285784903] [2022-11-18 19:58:28,099 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:28,100 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-18 19:58:28,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:28,100 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-18 19:58:28,101 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=51, Unknown=0, NotChecked=0, Total=90 [2022-11-18 19:58:28,101 INFO L87 Difference]: Start difference. First operand 58 states and 65 transitions. Second operand has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:28,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:28,196 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2022-11-18 19:58:28,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 19:58:28,197 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-18 19:58:28,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:28,198 INFO L225 Difference]: With dead ends: 60 [2022-11-18 19:58:28,198 INFO L226 Difference]: Without dead ends: 60 [2022-11-18 19:58:28,198 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2022-11-18 19:58:28,199 INFO L413 NwaCegarLoop]: 32 mSDtfsCounter, 160 mSDsluCounter, 110 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:28,200 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 142 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 57 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 19:58:28,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-11-18 19:58:28,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 58. [2022-11-18 19:58:28,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 46 states have (on average 1.3478260869565217) internal successors, (62), 57 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:28,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 62 transitions. [2022-11-18 19:58:28,219 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 62 transitions. Word has length 11 [2022-11-18 19:58:28,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:28,219 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 62 transitions. [2022-11-18 19:58:28,220 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:28,220 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 62 transitions. [2022-11-18 19:58:28,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-11-18 19:58:28,220 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:28,221 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1] [2022-11-18 19:58:28,232 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:28,426 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:28,427 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:28,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:28,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1941957673, now seen corresponding path program 2 times [2022-11-18 19:58:28,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:28,427 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935924267] [2022-11-18 19:58:28,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:28,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:28,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:28,844 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:28,844 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:28,844 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [935924267] [2022-11-18 19:58:28,844 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [935924267] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:28,844 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1933234921] [2022-11-18 19:58:28,844 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 19:58:28,845 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:28,845 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:28,846 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:28,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 19:58:28,954 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 19:58:28,954 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:58:28,955 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-18 19:58:28,958 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:28,987 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 19:58:28,987 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 11 [2022-11-18 19:58:29,318 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:29,318 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:29,599 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:29,599 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1933234921] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:29,600 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:29,600 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 23 [2022-11-18 19:58:29,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1749528781] [2022-11-18 19:58:29,600 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:29,601 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-18 19:58:29,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:29,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-18 19:58:29,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2022-11-18 19:58:29,602 INFO L87 Difference]: Start difference. First operand 58 states and 62 transitions. Second operand has 24 states, 23 states have (on average 2.260869565217391) internal successors, (52), 24 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:30,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:30,800 INFO L93 Difference]: Finished difference Result 108 states and 116 transitions. [2022-11-18 19:58:30,801 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 19:58:30,801 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 2.260869565217391) internal successors, (52), 24 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-11-18 19:58:30,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:30,802 INFO L225 Difference]: With dead ends: 108 [2022-11-18 19:58:30,802 INFO L226 Difference]: Without dead ends: 108 [2022-11-18 19:58:30,803 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=314, Invalid=946, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 19:58:30,804 INFO L413 NwaCegarLoop]: 21 mSDtfsCounter, 339 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 603 mSolverCounterSat, 79 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 339 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 682 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 79 IncrementalHoareTripleChecker+Valid, 603 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:30,804 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [339 Valid, 142 Invalid, 682 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [79 Valid, 603 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-18 19:58:30,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-11-18 19:58:30,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 94. [2022-11-18 19:58:30,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 82 states have (on average 1.3414634146341464) internal successors, (110), 93 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:30,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 110 transitions. [2022-11-18 19:58:30,810 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 110 transitions. Word has length 18 [2022-11-18 19:58:30,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:30,810 INFO L495 AbstractCegarLoop]: Abstraction has 94 states and 110 transitions. [2022-11-18 19:58:30,810 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 2.260869565217391) internal successors, (52), 24 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:30,811 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 110 transitions. [2022-11-18 19:58:30,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-11-18 19:58:30,811 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:30,811 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:30,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:31,017 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:31,018 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:31,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:31,018 INFO L85 PathProgramCache]: Analyzing trace with hash -2089502828, now seen corresponding path program 2 times [2022-11-18 19:58:31,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:31,019 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [304980908] [2022-11-18 19:58:31,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:31,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:31,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:31,122 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:31,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:31,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [304980908] [2022-11-18 19:58:31,123 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [304980908] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:31,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1462432611] [2022-11-18 19:58:31,123 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 19:58:31,124 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:31,124 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:31,125 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:31,150 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 19:58:31,201 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-18 19:58:31,202 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:58:31,203 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-18 19:58:31,208 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:31,240 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 19:58:31,241 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-18 19:58:31,362 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-11-18 19:58:31,362 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 19:58:31,362 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1462432611] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 19:58:31,363 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 19:58:31,363 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [8] total 10 [2022-11-18 19:58:31,363 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377218283] [2022-11-18 19:58:31,363 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 19:58:31,363 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 19:58:31,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:31,364 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 19:58:31,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2022-11-18 19:58:31,364 INFO L87 Difference]: Start difference. First operand 94 states and 110 transitions. Second operand has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:31,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:31,400 INFO L93 Difference]: Finished difference Result 82 states and 96 transitions. [2022-11-18 19:58:31,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 19:58:31,400 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-11-18 19:58:31,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:31,401 INFO L225 Difference]: With dead ends: 82 [2022-11-18 19:58:31,401 INFO L226 Difference]: Without dead ends: 82 [2022-11-18 19:58:31,402 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2022-11-18 19:58:31,402 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 26 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:31,416 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 28 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 19:58:31,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-11-18 19:58:31,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2022-11-18 19:58:31,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 76 states have (on average 1.263157894736842) internal successors, (96), 81 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:31,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 96 transitions. [2022-11-18 19:58:31,420 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 96 transitions. Word has length 20 [2022-11-18 19:58:31,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:31,420 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 96 transitions. [2022-11-18 19:58:31,420 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:31,420 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 96 transitions. [2022-11-18 19:58:31,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-18 19:58:31,421 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:31,421 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:31,440 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:31,626 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-18 19:58:31,627 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:31,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:31,627 INFO L85 PathProgramCache]: Analyzing trace with hash -1417752011, now seen corresponding path program 1 times [2022-11-18 19:58:31,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:31,627 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345310731] [2022-11-18 19:58:31,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:31,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:31,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:31,772 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 19:58:31,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:31,772 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1345310731] [2022-11-18 19:58:31,773 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1345310731] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:31,773 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1779703721] [2022-11-18 19:58:31,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:31,773 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:31,773 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:31,776 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:31,784 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 19:58:31,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:31,857 INFO L263 TraceCheckSpWp]: Trace formula consists of 132 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-18 19:58:31,858 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:31,991 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 19:58:31,991 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:32,085 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 19:58:32,085 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1779703721] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:32,085 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:32,086 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 19 [2022-11-18 19:58:32,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448549793] [2022-11-18 19:58:32,088 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:32,089 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-11-18 19:58:32,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:32,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-18 19:58:32,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=195, Unknown=0, NotChecked=0, Total=342 [2022-11-18 19:58:32,090 INFO L87 Difference]: Start difference. First operand 82 states and 96 transitions. Second operand has 19 states, 19 states have (on average 2.736842105263158) internal successors, (52), 19 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:32,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:32,298 INFO L93 Difference]: Finished difference Result 89 states and 90 transitions. [2022-11-18 19:58:32,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-18 19:58:32,299 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.736842105263158) internal successors, (52), 19 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-11-18 19:58:32,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:32,299 INFO L225 Difference]: With dead ends: 89 [2022-11-18 19:58:32,299 INFO L226 Difference]: Without dead ends: 89 [2022-11-18 19:58:32,300 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=222, Invalid=330, Unknown=0, NotChecked=0, Total=552 [2022-11-18 19:58:32,300 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 146 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 146 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 143 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:32,300 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [146 Valid, 65 Invalid, 143 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 19:58:32,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-11-18 19:58:32,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 82. [2022-11-18 19:58:32,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 76 states have (on average 1.1842105263157894) internal successors, (90), 81 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:32,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 90 transitions. [2022-11-18 19:58:32,304 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 90 transitions. Word has length 23 [2022-11-18 19:58:32,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:32,304 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 90 transitions. [2022-11-18 19:58:32,305 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.736842105263158) internal successors, (52), 19 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:32,305 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 90 transitions. [2022-11-18 19:58:32,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-18 19:58:32,305 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:32,306 INFO L195 NwaCegarLoop]: trace histogram [11, 10, 10, 1, 1, 1, 1, 1] [2022-11-18 19:58:32,317 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:32,511 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:32,512 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:32,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:32,512 INFO L85 PathProgramCache]: Analyzing trace with hash 820795113, now seen corresponding path program 3 times [2022-11-18 19:58:32,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:32,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405930108] [2022-11-18 19:58:32,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:32,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:32,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:33,320 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 19:58:33,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:33,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405930108] [2022-11-18 19:58:33,320 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [405930108] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:33,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [168024151] [2022-11-18 19:58:33,320 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 19:58:33,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:33,321 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:33,324 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:33,332 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-18 19:58:33,405 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-18 19:58:33,405 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:58:33,406 INFO L263 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-18 19:58:33,408 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:33,423 INFO L321 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2022-11-18 19:58:33,424 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 19 [2022-11-18 19:58:33,820 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 19 proven. 10 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2022-11-18 19:58:33,820 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:34,236 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 29 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2022-11-18 19:58:34,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [168024151] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:34,237 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:34,237 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 5, 5] total 23 [2022-11-18 19:58:34,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [527415993] [2022-11-18 19:58:34,237 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:34,238 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-18 19:58:34,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:34,238 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-18 19:58:34,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=458, Unknown=0, NotChecked=0, Total=552 [2022-11-18 19:58:34,239 INFO L87 Difference]: Start difference. First operand 82 states and 90 transitions. Second operand has 24 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 24 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:35,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:35,768 INFO L93 Difference]: Finished difference Result 120 states and 121 transitions. [2022-11-18 19:58:35,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 19:58:35,769 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 24 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-11-18 19:58:35,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:35,770 INFO L225 Difference]: With dead ends: 120 [2022-11-18 19:58:35,770 INFO L226 Difference]: Without dead ends: 120 [2022-11-18 19:58:35,771 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 215 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=272, Invalid=1134, Unknown=0, NotChecked=0, Total=1406 [2022-11-18 19:58:35,771 INFO L413 NwaCegarLoop]: 8 mSDtfsCounter, 446 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 1233 mSolverCounterSat, 80 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 446 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 1313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 80 IncrementalHoareTripleChecker+Valid, 1233 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:35,772 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [446 Valid, 84 Invalid, 1313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [80 Valid, 1233 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-11-18 19:58:35,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-11-18 19:58:35,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 92. [2022-11-18 19:58:35,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 87 states have (on average 1.1724137931034482) internal successors, (102), 91 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:35,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 102 transitions. [2022-11-18 19:58:35,775 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 102 transitions. Word has length 36 [2022-11-18 19:58:35,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:35,776 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 102 transitions. [2022-11-18 19:58:35,776 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 23 states have (on average 2.4347826086956523) internal successors, (56), 24 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:35,776 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 102 transitions. [2022-11-18 19:58:35,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-18 19:58:35,777 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:35,777 INFO L195 NwaCegarLoop]: trace histogram [12, 12, 12, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:35,796 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:35,987 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:35,988 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:35,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:35,988 INFO L85 PathProgramCache]: Analyzing trace with hash 1425185077, now seen corresponding path program 2 times [2022-11-18 19:58:35,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:35,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602506515] [2022-11-18 19:58:35,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:35,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:36,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:36,328 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 19:58:36,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:36,328 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602506515] [2022-11-18 19:58:36,329 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1602506515] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:36,329 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [775830382] [2022-11-18 19:58:36,329 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 19:58:36,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:36,329 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:36,330 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:36,359 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-18 19:58:36,449 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 19:58:36,449 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:58:36,451 INFO L263 TraceCheckSpWp]: Trace formula consists of 220 conjuncts, 15 conjunts are in the unsatisfiable core [2022-11-18 19:58:36,455 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:36,826 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 19:58:36,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:37,237 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 19:58:37,237 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [775830382] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:37,237 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:37,238 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 43 [2022-11-18 19:58:37,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1814695917] [2022-11-18 19:58:37,238 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:37,238 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-11-18 19:58:37,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:37,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-11-18 19:58:37,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=787, Invalid=1019, Unknown=0, NotChecked=0, Total=1806 [2022-11-18 19:58:37,240 INFO L87 Difference]: Start difference. First operand 92 states and 102 transitions. Second operand has 43 states, 43 states have (on average 2.883720930232558) internal successors, (124), 43 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:37,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:37,978 INFO L93 Difference]: Finished difference Result 379 states and 380 transitions. [2022-11-18 19:58:37,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-18 19:58:37,980 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 2.883720930232558) internal successors, (124), 43 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-11-18 19:58:37,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:37,982 INFO L225 Difference]: With dead ends: 379 [2022-11-18 19:58:37,982 INFO L226 Difference]: Without dead ends: 379 [2022-11-18 19:58:37,983 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1037 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1190, Invalid=1890, Unknown=0, NotChecked=0, Total=3080 [2022-11-18 19:58:37,985 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 1124 mSDsluCounter, 200 mSDsCounter, 0 mSdLazyCounter, 238 mSolverCounterSat, 128 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1124 SdHoareTripleChecker+Valid, 219 SdHoareTripleChecker+Invalid, 366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 128 IncrementalHoareTripleChecker+Valid, 238 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:37,987 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1124 Valid, 219 Invalid, 366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [128 Valid, 238 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 19:58:37,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2022-11-18 19:58:38,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 140. [2022-11-18 19:58:38,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 135 states have (on average 1.125925925925926) internal successors, (152), 139 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:38,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 152 transitions. [2022-11-18 19:58:38,004 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 152 transitions. Word has length 47 [2022-11-18 19:58:38,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:38,004 INFO L495 AbstractCegarLoop]: Abstraction has 140 states and 152 transitions. [2022-11-18 19:58:38,004 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 2.883720930232558) internal successors, (124), 43 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:38,005 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 152 transitions. [2022-11-18 19:58:38,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-18 19:58:38,012 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:38,013 INFO L195 NwaCegarLoop]: trace histogram [26, 26, 26, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:38,023 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:38,218 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-11-18 19:58:38,219 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:38,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:38,219 INFO L85 PathProgramCache]: Analyzing trace with hash 1050815861, now seen corresponding path program 3 times [2022-11-18 19:58:38,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:38,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235273402] [2022-11-18 19:58:38,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:38,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:38,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:39,265 INFO L134 CoverageAnalysis]: Checked inductivity of 1003 backedges. 0 proven. 1001 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-18 19:58:39,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:39,266 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235273402] [2022-11-18 19:58:39,266 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235273402] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:39,266 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2099393129] [2022-11-18 19:58:39,266 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-18 19:58:39,266 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:39,266 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:39,268 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:39,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-18 19:58:39,381 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-18 19:58:39,381 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:58:39,382 INFO L263 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-18 19:58:39,386 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:39,405 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 19:58:39,419 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 [2022-11-18 19:58:41,436 INFO L134 CoverageAnalysis]: Checked inductivity of 1003 backedges. 0 proven. 53 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2022-11-18 19:58:41,436 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:42,503 INFO L134 CoverageAnalysis]: Checked inductivity of 1003 backedges. 0 proven. 53 refuted. 0 times theorem prover too weak. 950 trivial. 0 not checked. [2022-11-18 19:58:42,503 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2099393129] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:42,503 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:42,503 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 7, 7] total 42 [2022-11-18 19:58:42,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [693422441] [2022-11-18 19:58:42,504 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:42,504 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-11-18 19:58:42,505 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:42,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-11-18 19:58:42,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=518, Invalid=1204, Unknown=0, NotChecked=0, Total=1722 [2022-11-18 19:58:42,506 INFO L87 Difference]: Start difference. First operand 140 states and 152 transitions. Second operand has 42 states, 42 states have (on average 2.8095238095238093) internal successors, (118), 42 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:47,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:47,869 INFO L93 Difference]: Finished difference Result 143 states and 153 transitions. [2022-11-18 19:58:47,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2022-11-18 19:58:47,870 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 2.8095238095238093) internal successors, (118), 42 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 89 [2022-11-18 19:58:47,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:47,871 INFO L225 Difference]: With dead ends: 143 [2022-11-18 19:58:47,871 INFO L226 Difference]: Without dead ends: 143 [2022-11-18 19:58:47,874 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 287 GetRequests, 166 SyntacticMatches, 0 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4323 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=4457, Invalid=10549, Unknown=0, NotChecked=0, Total=15006 [2022-11-18 19:58:47,875 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 32 mSDsluCounter, 155 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 175 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:47,875 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 175 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 70 Invalid, 0 Unknown, 46 Unchecked, 0.1s Time] [2022-11-18 19:58:47,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2022-11-18 19:58:47,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2022-11-18 19:58:47,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 138 states have (on average 1.108695652173913) internal successors, (153), 142 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:47,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 153 transitions. [2022-11-18 19:58:47,879 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 153 transitions. Word has length 89 [2022-11-18 19:58:47,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:47,879 INFO L495 AbstractCegarLoop]: Abstraction has 143 states and 153 transitions. [2022-11-18 19:58:47,880 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 2.8095238095238093) internal successors, (118), 42 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:47,880 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 153 transitions. [2022-11-18 19:58:47,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-11-18 19:58:47,885 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:47,885 INFO L195 NwaCegarLoop]: trace histogram [27, 27, 27, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:47,896 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:48,091 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-11-18 19:58:48,092 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:48,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:48,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1593650031, now seen corresponding path program 4 times [2022-11-18 19:58:48,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:48,092 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84076250] [2022-11-18 19:58:48,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:48,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:48,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:49,220 INFO L134 CoverageAnalysis]: Checked inductivity of 1095 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 19:58:49,221 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:49,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84076250] [2022-11-18 19:58:49,221 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [84076250] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:49,221 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [56962767] [2022-11-18 19:58:49,221 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-18 19:58:49,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:49,221 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:49,223 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:49,247 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-18 19:58:50,551 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-18 19:58:50,551 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 19:58:50,557 INFO L263 TraceCheckSpWp]: Trace formula consists of 407 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-18 19:58:50,560 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 19:58:51,515 INFO L134 CoverageAnalysis]: Checked inductivity of 1095 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 19:58:51,515 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 19:58:52,994 INFO L134 CoverageAnalysis]: Checked inductivity of 1095 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 19:58:52,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [56962767] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 19:58:52,995 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 19:58:52,995 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31] total 88 [2022-11-18 19:58:52,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879329846] [2022-11-18 19:58:52,996 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 19:58:52,996 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 88 states [2022-11-18 19:58:52,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 19:58:52,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 88 interpolants. [2022-11-18 19:58:53,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3367, Invalid=4289, Unknown=0, NotChecked=0, Total=7656 [2022-11-18 19:58:53,001 INFO L87 Difference]: Start difference. First operand 143 states and 153 transitions. Second operand has 88 states, 88 states have (on average 2.9431818181818183) internal successors, (259), 88 states have internal predecessors, (259), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:55,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 19:58:55,454 INFO L93 Difference]: Finished difference Result 812 states and 813 transitions. [2022-11-18 19:58:55,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-11-18 19:58:55,460 INFO L78 Accepts]: Start accepts. Automaton has has 88 states, 88 states have (on average 2.9431818181818183) internal successors, (259), 88 states have internal predecessors, (259), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 98 [2022-11-18 19:58:55,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 19:58:55,463 INFO L225 Difference]: With dead ends: 812 [2022-11-18 19:58:55,463 INFO L226 Difference]: Without dead ends: 812 [2022-11-18 19:58:55,466 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4757 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=5075, Invalid=8265, Unknown=0, NotChecked=0, Total=13340 [2022-11-18 19:58:55,467 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 3503 mSDsluCounter, 469 mSDsCounter, 0 mSdLazyCounter, 530 mSolverCounterSat, 285 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3503 SdHoareTripleChecker+Valid, 488 SdHoareTripleChecker+Invalid, 815 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 285 IncrementalHoareTripleChecker+Valid, 530 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-18 19:58:55,467 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3503 Valid, 488 Invalid, 815 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [285 Valid, 530 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-18 19:58:55,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 812 states. [2022-11-18 19:58:55,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 812 to 275. [2022-11-18 19:58:55,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 275 states, 270 states have (on average 1.1111111111111112) internal successors, (300), 274 states have internal predecessors, (300), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:55,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 300 transitions. [2022-11-18 19:58:55,488 INFO L78 Accepts]: Start accepts. Automaton has 275 states and 300 transitions. Word has length 98 [2022-11-18 19:58:55,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 19:58:55,488 INFO L495 AbstractCegarLoop]: Abstraction has 275 states and 300 transitions. [2022-11-18 19:58:55,488 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 88 states, 88 states have (on average 2.9431818181818183) internal successors, (259), 88 states have internal predecessors, (259), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 19:58:55,488 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 300 transitions. [2022-11-18 19:58:55,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2022-11-18 19:58:55,490 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 19:58:55,490 INFO L195 NwaCegarLoop]: trace histogram [56, 56, 56, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 19:58:55,509 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-18 19:58:55,709 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-11-18 19:58:55,709 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 19:58:55,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 19:58:55,709 INFO L85 PathProgramCache]: Analyzing trace with hash 597463893, now seen corresponding path program 5 times [2022-11-18 19:58:55,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 19:58:55,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648423310] [2022-11-18 19:58:55,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 19:58:55,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 19:58:55,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 19:58:59,095 INFO L134 CoverageAnalysis]: Checked inductivity of 4691 backedges. 0 proven. 4676 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 19:58:59,096 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 19:58:59,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648423310] [2022-11-18 19:58:59,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648423310] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 19:58:59,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1731428688] [2022-11-18 19:58:59,096 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-18 19:58:59,096 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 19:58:59,097 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 19:58:59,106 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 19:58:59,113 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-18 20:02:03,571 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 57 check-sat command(s) [2022-11-18 20:02:03,571 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:02:03,634 INFO L263 TraceCheckSpWp]: Trace formula consists of 726 conjuncts, 59 conjunts are in the unsatisfiable core [2022-11-18 20:02:03,639 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:02:06,180 INFO L134 CoverageAnalysis]: Checked inductivity of 4691 backedges. 0 proven. 4676 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 20:02:06,180 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:02:10,925 INFO L134 CoverageAnalysis]: Checked inductivity of 4691 backedges. 0 proven. 4676 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 20:02:10,925 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1731428688] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:02:10,926 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:02:10,926 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60, 60] total 175 [2022-11-18 20:02:10,926 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2049869995] [2022-11-18 20:02:10,926 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:02:10,927 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 175 states [2022-11-18 20:02:10,927 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:02:10,930 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 175 interpolants. [2022-11-18 20:02:10,933 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13459, Invalid=16991, Unknown=0, NotChecked=0, Total=30450 [2022-11-18 20:02:10,934 INFO L87 Difference]: Start difference. First operand 275 states and 300 transitions. Second operand has 175 states, 175 states have (on average 2.9714285714285715) internal successors, (520), 175 states have internal predecessors, (520), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:02:21,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:02:21,210 INFO L93 Difference]: Finished difference Result 1653 states and 1654 transitions. [2022-11-18 20:02:21,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 117 states. [2022-11-18 20:02:21,211 INFO L78 Accepts]: Start accepts. Automaton has has 175 states, 175 states have (on average 2.9714285714285715) internal successors, (520), 175 states have internal predecessors, (520), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 185 [2022-11-18 20:02:21,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:02:21,217 INFO L225 Difference]: With dead ends: 1653 [2022-11-18 20:02:21,217 INFO L226 Difference]: Without dead ends: 1653 [2022-11-18 20:02:21,222 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 485 GetRequests, 255 SyntacticMatches, 0 SemanticMatches, 230 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19605 ImplicationChecksByTransitivity, 12.0s TimeCoverageRelationStatistics Valid=20242, Invalid=33350, Unknown=0, NotChecked=0, Total=53592 [2022-11-18 20:02:21,223 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 7647 mSDsluCounter, 832 mSDsCounter, 0 mSdLazyCounter, 1091 mSolverCounterSat, 648 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7647 SdHoareTripleChecker+Valid, 851 SdHoareTripleChecker+Invalid, 1739 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 648 IncrementalHoareTripleChecker+Valid, 1091 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-11-18 20:02:21,223 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7647 Valid, 851 Invalid, 1739 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [648 Valid, 1091 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-11-18 20:02:21,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1653 states. [2022-11-18 20:02:21,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1653 to 536. [2022-11-18 20:02:21,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 536 states, 531 states have (on average 1.1111111111111112) internal successors, (590), 535 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:02:21,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 590 transitions. [2022-11-18 20:02:21,239 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 590 transitions. Word has length 185 [2022-11-18 20:02:21,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:02:21,240 INFO L495 AbstractCegarLoop]: Abstraction has 536 states and 590 transitions. [2022-11-18 20:02:21,241 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 175 states, 175 states have (on average 2.9714285714285715) internal successors, (520), 175 states have internal predecessors, (520), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:02:21,241 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 590 transitions. [2022-11-18 20:02:21,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 360 [2022-11-18 20:02:21,244 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:02:21,245 INFO L195 NwaCegarLoop]: trace histogram [114, 114, 114, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:02:21,276 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:02:21,459 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-11-18 20:02:21,460 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 20:02:21,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:02:21,460 INFO L85 PathProgramCache]: Analyzing trace with hash 812449301, now seen corresponding path program 6 times [2022-11-18 20:02:21,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:02:21,460 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933230849] [2022-11-18 20:02:21,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:02:21,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:02:21,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:02:33,107 INFO L134 CoverageAnalysis]: Checked inductivity of 19452 backedges. 0 proven. 19437 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-11-18 20:02:33,108 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:02:33,108 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933230849] [2022-11-18 20:02:33,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1933230849] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:02:33,108 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1865364070] [2022-11-18 20:02:33,108 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-18 20:02:33,108 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:02:33,108 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:02:33,109 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:02:33,112 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-18 20:02:33,311 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-11-18 20:02:33,311 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:02:33,313 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 20 conjunts are in the unsatisfiable core [2022-11-18 20:02:33,323 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:02:33,341 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 20:02:33,359 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 11 [2022-11-18 20:02:42,453 INFO L134 CoverageAnalysis]: Checked inductivity of 19452 backedges. 8 proven. 227 refuted. 0 times theorem prover too weak. 19217 trivial. 0 not checked. [2022-11-18 20:02:42,453 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:02:46,445 INFO L134 CoverageAnalysis]: Checked inductivity of 19452 backedges. 0 proven. 235 refuted. 0 times theorem prover too weak. 19217 trivial. 0 not checked. [2022-11-18 20:02:46,446 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1865364070] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:02:46,446 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:02:46,446 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [118, 8, 8] total 132 [2022-11-18 20:02:46,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917336927] [2022-11-18 20:02:46,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:02:46,448 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 132 states [2022-11-18 20:02:46,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:02:46,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 132 interpolants. [2022-11-18 20:02:46,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7090, Invalid=10202, Unknown=0, NotChecked=0, Total=17292 [2022-11-18 20:02:46,452 INFO L87 Difference]: Start difference. First operand 536 states and 590 transitions. Second operand has 132 states, 132 states have (on average 2.9242424242424243) internal successors, (386), 132 states have internal predecessors, (386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:03:45,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:03:45,328 INFO L93 Difference]: Finished difference Result 538 states and 539 transitions. [2022-11-18 20:03:45,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 352 states. [2022-11-18 20:03:45,329 INFO L78 Accepts]: Start accepts. Automaton has has 132 states, 132 states have (on average 2.9242424242424243) internal successors, (386), 132 states have internal predecessors, (386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 359 [2022-11-18 20:03:45,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:03:45,331 INFO L225 Difference]: With dead ends: 538 [2022-11-18 20:03:45,331 INFO L226 Difference]: Without dead ends: 538 [2022-11-18 20:03:45,348 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1179 GetRequests, 704 SyntacticMatches, 0 SemanticMatches, 475 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74834 ImplicationChecksByTransitivity, 64.1s TimeCoverageRelationStatistics Valid=69078, Invalid=157974, Unknown=0, NotChecked=0, Total=227052 [2022-11-18 20:03:45,348 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 119 mSDsluCounter, 146 mSDsCounter, 0 mSdLazyCounter, 172 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 119 SdHoareTripleChecker+Valid, 165 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 172 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:03:45,349 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [119 Valid, 165 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 172 Invalid, 0 Unknown, 46 Unchecked, 0.2s Time] [2022-11-18 20:03:45,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 538 states. [2022-11-18 20:03:45,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 538 to 538. [2022-11-18 20:03:45,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 538 states, 534 states have (on average 1.0093632958801497) internal successors, (539), 537 states have internal predecessors, (539), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:03:45,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 539 transitions. [2022-11-18 20:03:45,359 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 539 transitions. Word has length 359 [2022-11-18 20:03:45,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:03:45,360 INFO L495 AbstractCegarLoop]: Abstraction has 538 states and 539 transitions. [2022-11-18 20:03:45,360 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 132 states, 132 states have (on average 2.9242424242424243) internal successors, (386), 132 states have internal predecessors, (386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:03:45,360 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 539 transitions. [2022-11-18 20:03:45,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 529 [2022-11-18 20:03:45,371 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:03:45,371 INFO L195 NwaCegarLoop]: trace histogram [115, 115, 115, 57, 57, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:03:45,383 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:03:45,576 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-11-18 20:03:45,577 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 20:03:45,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:03:45,577 INFO L85 PathProgramCache]: Analyzing trace with hash 550593099, now seen corresponding path program 1 times [2022-11-18 20:03:45,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:03:45,578 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84515953] [2022-11-18 20:03:45,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:03:45,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:03:45,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:03:46,078 INFO L134 CoverageAnalysis]: Checked inductivity of 24625 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24625 trivial. 0 not checked. [2022-11-18 20:03:46,079 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:03:46,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84515953] [2022-11-18 20:03:46,079 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [84515953] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:03:46,079 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:03:46,079 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:03:46,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1973671449] [2022-11-18 20:03:46,080 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:03:46,080 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:03:46,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:03:46,081 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:03:46,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:03:46,081 INFO L87 Difference]: Start difference. First operand 538 states and 539 transitions. Second operand has 3 states, 2 states have (on average 9.0) internal successors, (18), 3 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:03:46,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:03:46,093 INFO L93 Difference]: Finished difference Result 536 states and 537 transitions. [2022-11-18 20:03:46,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:03:46,093 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 9.0) internal successors, (18), 3 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 528 [2022-11-18 20:03:46,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:03:46,096 INFO L225 Difference]: With dead ends: 536 [2022-11-18 20:03:46,096 INFO L226 Difference]: Without dead ends: 536 [2022-11-18 20:03:46,097 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:03:46,097 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 8 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:03:46,098 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 19 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:03:46,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 536 states. [2022-11-18 20:03:46,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 536 to 536. [2022-11-18 20:03:46,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 536 states, 534 states have (on average 1.0056179775280898) internal successors, (537), 535 states have internal predecessors, (537), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:03:46,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 537 transitions. [2022-11-18 20:03:46,108 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 537 transitions. Word has length 528 [2022-11-18 20:03:46,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:03:46,109 INFO L495 AbstractCegarLoop]: Abstraction has 536 states and 537 transitions. [2022-11-18 20:03:46,110 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 9.0) internal successors, (18), 3 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:03:46,110 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 537 transitions. [2022-11-18 20:03:46,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 531 [2022-11-18 20:03:46,122 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:03:46,123 INFO L195 NwaCegarLoop]: trace histogram [115, 115, 115, 57, 57, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:03:46,123 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-11-18 20:03:46,124 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 20:03:46,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:03:46,124 INFO L85 PathProgramCache]: Analyzing trace with hash 838993805, now seen corresponding path program 1 times [2022-11-18 20:03:46,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:03:46,125 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998463138] [2022-11-18 20:03:46,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:03:46,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:03:46,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:03:59,044 INFO L134 CoverageAnalysis]: Checked inductivity of 24625 backedges. 0 proven. 19780 refuted. 0 times theorem prover too weak. 4845 trivial. 0 not checked. [2022-11-18 20:03:59,045 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:03:59,045 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998463138] [2022-11-18 20:03:59,045 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [998463138] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:03:59,045 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [108340675] [2022-11-18 20:03:59,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:03:59,046 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:03:59,046 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:03:59,050 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:03:59,078 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-18 20:03:59,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:03:59,643 INFO L263 TraceCheckSpWp]: Trace formula consists of 1985 conjuncts, 118 conjunts are in the unsatisfiable core [2022-11-18 20:03:59,658 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:04:07,891 INFO L134 CoverageAnalysis]: Checked inductivity of 24625 backedges. 0 proven. 19780 refuted. 0 times theorem prover too weak. 4845 trivial. 0 not checked. [2022-11-18 20:04:07,891 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:04:16,004 INFO L134 CoverageAnalysis]: Checked inductivity of 24625 backedges. 0 proven. 19780 refuted. 0 times theorem prover too weak. 4845 trivial. 0 not checked. [2022-11-18 20:04:16,005 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [108340675] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:04:16,005 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:04:16,005 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [119, 119, 119] total 248 [2022-11-18 20:04:16,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195379907] [2022-11-18 20:04:16,006 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:04:16,007 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 248 states [2022-11-18 20:04:16,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:04:16,012 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 248 interpolants. [2022-11-18 20:04:16,016 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23819, Invalid=37437, Unknown=0, NotChecked=0, Total=61256 [2022-11-18 20:04:16,017 INFO L87 Difference]: Start difference. First operand 536 states and 537 transitions. Second operand has 248 states, 248 states have (on average 3.0201612903225805) internal successors, (749), 248 states have internal predecessors, (749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:04:27,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:04:27,117 INFO L93 Difference]: Finished difference Result 928 states and 929 transitions. [2022-11-18 20:04:27,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 131 states. [2022-11-18 20:04:27,118 INFO L78 Accepts]: Start accepts. Automaton has has 248 states, 248 states have (on average 3.0201612903225805) internal successors, (749), 248 states have internal predecessors, (749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 530 [2022-11-18 20:04:27,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:04:27,121 INFO L225 Difference]: With dead ends: 928 [2022-11-18 20:04:27,122 INFO L226 Difference]: Without dead ends: 928 [2022-11-18 20:04:27,126 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1189 GetRequests, 827 SyntacticMatches, 104 SemanticMatches, 258 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56837 ImplicationChecksByTransitivity, 22.1s TimeCoverageRelationStatistics Valid=25415, Invalid=41925, Unknown=0, NotChecked=0, Total=67340 [2022-11-18 20:04:27,127 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 3545 mSDsluCounter, 213 mSDsCounter, 0 mSdLazyCounter, 1156 mSolverCounterSat, 971 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3545 SdHoareTripleChecker+Valid, 230 SdHoareTripleChecker+Invalid, 2127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 971 IncrementalHoareTripleChecker+Valid, 1156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-18 20:04:27,127 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3545 Valid, 230 Invalid, 2127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [971 Valid, 1156 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-11-18 20:04:27,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 928 states. [2022-11-18 20:04:27,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 928 to 752. [2022-11-18 20:04:27,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 752 states, 750 states have (on average 1.004) internal successors, (753), 751 states have internal predecessors, (753), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:04:27,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 753 transitions. [2022-11-18 20:04:27,145 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 753 transitions. Word has length 530 [2022-11-18 20:04:27,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:04:27,146 INFO L495 AbstractCegarLoop]: Abstraction has 752 states and 753 transitions. [2022-11-18 20:04:27,147 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 248 states, 248 states have (on average 3.0201612903225805) internal successors, (749), 248 states have internal predecessors, (749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:04:27,147 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 753 transitions. [2022-11-18 20:04:27,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 747 [2022-11-18 20:04:27,170 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:04:27,171 INFO L195 NwaCegarLoop]: trace histogram [128, 128, 128, 116, 116, 116, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:04:27,180 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:04:27,379 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:04:27,380 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 20:04:27,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:04:27,380 INFO L85 PathProgramCache]: Analyzing trace with hash -1155227950, now seen corresponding path program 2 times [2022-11-18 20:04:27,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:04:27,380 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122884355] [2022-11-18 20:04:27,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:04:27,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:04:27,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:04:42,131 INFO L134 CoverageAnalysis]: Checked inductivity of 44638 backedges. 0 proven. 20126 refuted. 0 times theorem prover too weak. 24512 trivial. 0 not checked. [2022-11-18 20:04:42,131 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:04:42,131 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122884355] [2022-11-18 20:04:42,131 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [122884355] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:04:42,132 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1188894534] [2022-11-18 20:04:42,132 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:04:42,132 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:04:42,132 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:04:42,136 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:04:42,139 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-18 20:04:42,853 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:04:42,853 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:04:42,870 INFO L263 TraceCheckSpWp]: Trace formula consists of 2777 conjuncts, 118 conjunts are in the unsatisfiable core [2022-11-18 20:04:42,887 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:04:43,378 INFO L134 CoverageAnalysis]: Checked inductivity of 44638 backedges. 0 proven. 20126 refuted. 0 times theorem prover too weak. 24512 trivial. 0 not checked. [2022-11-18 20:04:43,378 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:04:50,325 INFO L134 CoverageAnalysis]: Checked inductivity of 44638 backedges. 0 proven. 20126 refuted. 0 times theorem prover too weak. 24512 trivial. 0 not checked. [2022-11-18 20:04:50,326 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1188894534] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:04:50,326 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:04:50,326 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [119, 119, 119] total 130 [2022-11-18 20:04:50,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012350781] [2022-11-18 20:04:50,326 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:04:50,328 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 130 states [2022-11-18 20:04:50,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:04:50,331 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 130 interpolants. [2022-11-18 20:04:50,332 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8385, Invalid=8385, Unknown=0, NotChecked=0, Total=16770 [2022-11-18 20:04:50,333 INFO L87 Difference]: Start difference. First operand 752 states and 753 transitions. Second operand has 130 states, 130 states have (on average 3.0846153846153848) internal successors, (401), 130 states have internal predecessors, (401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:04:54,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:04:54,557 INFO L93 Difference]: Finished difference Result 785 states and 786 transitions. [2022-11-18 20:04:54,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 129 states. [2022-11-18 20:04:54,558 INFO L78 Accepts]: Start accepts. Automaton has has 130 states, 130 states have (on average 3.0846153846153848) internal successors, (401), 130 states have internal predecessors, (401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 746 [2022-11-18 20:04:54,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:04:54,561 INFO L225 Difference]: With dead ends: 785 [2022-11-18 20:04:54,561 INFO L226 Difference]: Without dead ends: 785 [2022-11-18 20:04:54,563 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1609 GetRequests, 1374 SyntacticMatches, 107 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7205 ImplicationChecksByTransitivity, 11.9s TimeCoverageRelationStatistics Valid=8385, Invalid=8385, Unknown=0, NotChecked=0, Total=16770 [2022-11-18 20:04:54,563 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 1394 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 780 mSolverCounterSat, 575 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1394 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 1355 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 575 IncrementalHoareTripleChecker+Valid, 780 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:04:54,564 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1394 Valid, 124 Invalid, 1355 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [575 Valid, 780 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-11-18 20:04:54,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 785 states. [2022-11-18 20:04:54,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 785 to 785. [2022-11-18 20:04:54,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 785 states, 783 states have (on average 1.003831417624521) internal successors, (786), 784 states have internal predecessors, (786), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:04:54,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 785 states to 785 states and 786 transitions. [2022-11-18 20:04:54,579 INFO L78 Accepts]: Start accepts. Automaton has 785 states and 786 transitions. Word has length 746 [2022-11-18 20:04:54,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:04:54,580 INFO L495 AbstractCegarLoop]: Abstraction has 785 states and 786 transitions. [2022-11-18 20:04:54,581 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 130 states, 130 states have (on average 3.0846153846153848) internal successors, (401), 130 states have internal predecessors, (401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:04:54,581 INFO L276 IsEmpty]: Start isEmpty. Operand 785 states and 786 transitions. [2022-11-18 20:04:54,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2022-11-18 20:04:54,587 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:04:54,587 INFO L195 NwaCegarLoop]: trace histogram [128, 128, 128, 127, 127, 127, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:04:54,597 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:04:54,796 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:04:54,797 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 18 more)] === [2022-11-18 20:04:54,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:04:54,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1022501805, now seen corresponding path program 3 times [2022-11-18 20:04:54,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:04:54,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690761392] [2022-11-18 20:04:54,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:04:54,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:04:55,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:04:55,758 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-18 20:04:56,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-18 20:04:56,977 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-18 20:04:56,977 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-18 20:04:56,978 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr17ASSERT_VIOLATIONMEMORY_FREE (20 of 21 remaining) [2022-11-18 20:04:56,980 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE (19 of 21 remaining) [2022-11-18 20:04:56,981 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE (18 of 21 remaining) [2022-11-18 20:04:56,981 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (17 of 21 remaining) [2022-11-18 20:04:56,981 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE (16 of 21 remaining) [2022-11-18 20:04:56,981 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE (15 of 21 remaining) [2022-11-18 20:04:56,982 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE (14 of 21 remaining) [2022-11-18 20:04:56,982 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE (13 of 21 remaining) [2022-11-18 20:04:56,982 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE (12 of 21 remaining) [2022-11-18 20:04:56,982 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONMEMORY_FREE (11 of 21 remaining) [2022-11-18 20:04:56,982 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONMEMORY_FREE (10 of 21 remaining) [2022-11-18 20:04:56,983 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONMEMORY_FREE (9 of 21 remaining) [2022-11-18 20:04:56,983 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONMEMORY_FREE (8 of 21 remaining) [2022-11-18 20:04:56,983 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONMEMORY_FREE (7 of 21 remaining) [2022-11-18 20:04:56,983 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONMEMORY_FREE (6 of 21 remaining) [2022-11-18 20:04:56,983 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONMEMORY_FREE (5 of 21 remaining) [2022-11-18 20:04:56,984 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONMEMORY_FREE (4 of 21 remaining) [2022-11-18 20:04:56,984 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONMEMORY_FREE (3 of 21 remaining) [2022-11-18 20:04:56,984 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONMEMORY_FREE (2 of 21 remaining) [2022-11-18 20:04:56,984 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONMEMORY_FREE (1 of 21 remaining) [2022-11-18 20:04:56,984 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONMEMORY_LEAK (0 of 21 remaining) [2022-11-18 20:04:56,985 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-11-18 20:04:56,989 INFO L444 BasicCegarLoop]: Path program histogram: [6, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:04:56,996 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-18 20:04:57,256 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 08:04:57 BoogieIcfgContainer [2022-11-18 20:04:57,256 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-18 20:04:57,256 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-18 20:04:57,256 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-18 20:04:57,257 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-18 20:04:57,257 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 07:58:24" (3/4) ... [2022-11-18 20:04:57,259 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2022-11-18 20:04:57,463 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/witness.graphml [2022-11-18 20:04:57,463 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-18 20:04:57,464 INFO L158 Benchmark]: Toolchain (without parser) took 394280.08ms. Allocated memory was 115.3MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 77.1MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 188.6MB. Max. memory is 16.1GB. [2022-11-18 20:04:57,464 INFO L158 Benchmark]: CDTParser took 0.27ms. Allocated memory is still 115.3MB. Free memory is still 95.4MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:04:57,464 INFO L158 Benchmark]: CACSL2BoogieTranslator took 556.72ms. Allocated memory is still 115.3MB. Free memory was 76.9MB in the beginning and 85.2MB in the end (delta: -8.3MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-18 20:04:57,465 INFO L158 Benchmark]: Boogie Procedure Inliner took 64.37ms. Allocated memory is still 115.3MB. Free memory was 85.2MB in the beginning and 83.2MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:04:57,465 INFO L158 Benchmark]: Boogie Preprocessor took 27.87ms. Allocated memory is still 115.3MB. Free memory was 83.2MB in the beginning and 81.9MB in the end (delta: 1.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:04:57,466 INFO L158 Benchmark]: RCFGBuilder took 505.02ms. Allocated memory is still 115.3MB. Free memory was 81.6MB in the beginning and 68.4MB in the end (delta: 13.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. [2022-11-18 20:04:57,466 INFO L158 Benchmark]: TraceAbstraction took 392907.75ms. Allocated memory was 115.3MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 67.7MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2022-11-18 20:04:57,466 INFO L158 Benchmark]: Witness Printer took 207.05ms. Allocated memory is still 1.7GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 34.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2022-11-18 20:04:57,468 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27ms. Allocated memory is still 115.3MB. Free memory is still 95.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 556.72ms. Allocated memory is still 115.3MB. Free memory was 76.9MB in the beginning and 85.2MB in the end (delta: -8.3MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 64.37ms. Allocated memory is still 115.3MB. Free memory was 85.2MB in the beginning and 83.2MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 27.87ms. Allocated memory is still 115.3MB. Free memory was 83.2MB in the beginning and 81.9MB in the end (delta: 1.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 505.02ms. Allocated memory is still 115.3MB. Free memory was 81.6MB in the beginning and 68.4MB in the end (delta: 13.2MB). Peak memory consumption was 12.6MB. Max. memory is 16.1GB. * TraceAbstraction took 392907.75ms. Allocated memory was 115.3MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 67.7MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. * Witness Printer took 207.05ms. Allocated memory is still 1.7GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 34.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 543]: free of unallocated memory possible free of unallocated memory possible We found a FailurePath: [L523] int *a, *b; [L524] int n; VAL [a={0:0}, b={0:0}, n=0] [L535] n = 128 [L536] a = malloc (n * sizeof(*a)) [L537] b = malloc (n * sizeof(*b)) [L538] EXPR b++ VAL [a={-2:0}, b={-3:4}, b++={-3:0}, n=128] [L538] *b++ = 0 VAL [a={-2:0}, b={-3:4}, b++={-3:0}, n=128] [L539] CALL foo () [L527] int i; [L528] i = 0 VAL [a={-2:0}, b={-3:4}, i=0, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=0, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=0, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=1, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=1, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=1, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=2, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=2, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=2, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=3, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=3, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=3, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=4, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=4, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=4, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=5, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=5, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=5, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=6, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=6, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=6, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=7, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=7, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=7, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=8, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=8, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=8, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=9, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=9, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=9, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=10, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=10, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=10, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=11, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=11, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=11, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=12, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=12, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=12, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=13, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=13, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=13, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=14, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=14, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=14, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=15, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=15, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=15, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=16, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=16, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=16, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=17, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=17, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=17, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=18, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=18, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=18, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=19, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=19, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=19, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=20, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=20, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=20, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=21, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=21, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=21, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=22, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=22, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=22, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=23, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=23, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=23, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=24, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=24, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=24, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=25, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=25, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=25, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=26, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=26, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=26, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=27, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=27, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=27, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=28, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=28, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=28, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=29, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=29, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=29, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=30, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=30, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=30, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=31, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=31, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=31, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=32, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=32, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=32, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=33, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=33, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=33, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=34, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=34, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=34, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=35, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=35, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=35, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=36, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=36, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=36, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=37, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=37, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=37, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=38, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=38, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=38, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=39, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=39, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=39, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=40, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=40, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=40, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=41, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=41, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=41, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=42, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=42, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=42, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=43, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=43, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=43, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=44, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=44, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=44, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=45, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=45, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=45, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=46, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=46, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=46, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=47, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=47, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=47, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=48, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=48, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=48, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=49, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=49, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=49, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=50, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=50, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=50, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=51, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=51, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=51, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=52, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=52, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=52, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=53, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=53, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=53, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=54, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=54, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=54, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=55, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=55, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=55, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=56, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=56, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=56, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=57, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=57, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=57, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=58, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=58, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=58, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=59, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=59, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=59, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=60, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=60, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=60, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=61, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=61, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=61, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=62, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=62, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=62, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=63, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=63, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=63, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=64, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=64, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=64, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=65, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=65, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=65, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=66, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=66, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=66, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=67, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=67, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=67, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=68, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=68, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=68, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=69, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=69, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=69, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=70, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=70, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=70, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=71, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=71, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=71, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=72, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=72, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=72, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=73, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=73, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=73, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=74, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=74, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=74, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=75, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=75, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=75, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=76, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=76, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=76, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=77, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=77, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=77, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=78, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=78, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=78, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=79, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=79, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=79, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=80, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=80, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=80, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=81, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=81, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=81, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=82, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=82, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=82, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=83, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=83, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=83, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=84, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=84, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=84, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=85, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=85, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=85, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=86, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=86, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=86, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=87, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=87, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=87, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=88, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=88, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=88, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=89, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=89, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=89, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=90, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=90, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=90, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=91, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=91, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=91, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=92, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=92, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=92, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=93, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=93, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=93, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=94, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=94, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=94, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=95, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=95, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=95, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=96, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=96, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=96, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=97, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=97, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=97, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=98, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=98, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=98, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=99, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=99, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=99, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=100, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=100, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=100, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=101, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=101, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=101, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=102, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=102, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=102, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=103, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=103, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=103, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=104, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=104, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=104, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=105, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=105, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=105, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=106, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=106, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=106, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=107, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=107, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=107, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=108, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=108, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=108, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=109, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=109, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=109, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=110, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=110, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=110, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=111, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=111, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=111, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=112, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=112, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=112, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=113, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=113, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=113, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=114, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=114, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=114, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=115, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=115, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=115, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=116, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=116, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=116, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=117, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=117, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=117, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=118, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=118, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=118, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=119, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=119, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=119, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=120, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=120, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=120, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=121, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=121, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=121, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=122, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=122, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=122, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=123, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=123, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=123, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=124, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=124, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=124, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=125, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=125, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=125, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=126, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=126, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=126, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=127, n=128] [L528] COND TRUE i < n VAL [a={-2:0}, b={-3:4}, i=127, n=128] [L529] a[i] = -1 VAL [a={-2:0}, b={-3:4}, i=127, n=128] [L528] i++ VAL [a={-2:0}, b={-3:4}, i=128, n=128] [L528] COND FALSE !(i < n) VAL [a={-2:0}, b={-3:4}, i=128, n=128] [L530] i = 0 VAL [a={-2:0}, b={-3:4}, i=0, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=0, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=0, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=1, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=1, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=1, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=2, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=2, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=2, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=3, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=3, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=3, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=4, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=4, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=4, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=5, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=5, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=5, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=6, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=6, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=6, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=7, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=7, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=7, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=8, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=8, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=8, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=9, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=9, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=9, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=10, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=10, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=10, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=11, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=11, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=11, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=12, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=12, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=12, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=13, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=13, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=13, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=14, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=14, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=14, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=15, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=15, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=15, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=16, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=16, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=16, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=17, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=17, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=17, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=18, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=18, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=18, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=19, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=19, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=19, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=20, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=20, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=20, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=21, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=21, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=21, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=22, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=22, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=22, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=23, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=23, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=23, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=24, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=24, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=24, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=25, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=25, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=25, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=26, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=26, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=26, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=27, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=27, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=27, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=28, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=28, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=28, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=29, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=29, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=29, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=30, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=30, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=30, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=31, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=31, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=31, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=32, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=32, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=32, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=33, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=33, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=33, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=34, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=34, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=34, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=35, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=35, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=35, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=36, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=36, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=36, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=37, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=37, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=37, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=38, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=38, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=38, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=39, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=39, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=39, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=40, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=40, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=40, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=41, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=41, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=41, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=42, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=42, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=42, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=43, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=43, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=43, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=44, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=44, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=44, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=45, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=45, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=45, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=46, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=46, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=46, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=47, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=47, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=47, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=48, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=48, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=48, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=49, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=49, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=49, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=50, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=50, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=50, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=51, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=51, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=51, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=52, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=52, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=52, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=53, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=53, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=53, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=54, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=54, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=54, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=55, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=55, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=55, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=56, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=56, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=56, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=57, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=57, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=57, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=58, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=58, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=58, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=59, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=59, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=59, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=60, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=60, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=60, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=61, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=61, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=61, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=62, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=62, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=62, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=63, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=63, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=63, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=64, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=64, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=64, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=65, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=65, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=65, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=66, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=66, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=66, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=67, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=67, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=67, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=68, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=68, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=68, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=69, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=69, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=69, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=70, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=70, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=70, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=71, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=71, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=71, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=72, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=72, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=72, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=73, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=73, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=73, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=74, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=74, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=74, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=75, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=75, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=75, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=76, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=76, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=76, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=77, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=77, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=77, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=78, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=78, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=78, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=79, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=79, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=79, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=80, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=80, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=80, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=81, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=81, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=81, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=82, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=82, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=82, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=83, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=83, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=83, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=84, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=84, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=84, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=85, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=85, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=85, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=86, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=86, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=86, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=87, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=87, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=87, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=88, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=88, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=88, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=89, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=89, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=89, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=90, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=90, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=90, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=91, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=91, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=91, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=92, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=92, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=92, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=93, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=93, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=93, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=94, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=94, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=94, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=95, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=95, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=95, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=96, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=96, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=96, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=97, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=97, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=97, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=98, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=98, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=98, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=99, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=99, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=99, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=100, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=100, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=100, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=101, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=101, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=101, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=102, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=102, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=102, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=103, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=103, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=103, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=104, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=104, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=104, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=105, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=105, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=105, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=106, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=106, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=106, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=107, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=107, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=107, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=108, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=108, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=108, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=109, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=109, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=109, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=110, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=110, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=110, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=111, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=111, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=111, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=112, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=112, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=112, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=113, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=113, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=113, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=114, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=114, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=114, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=115, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=115, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=115, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=116, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=116, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=116, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=117, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=117, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=117, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=118, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=118, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=118, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=119, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=119, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=119, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=120, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=120, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=120, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=121, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=121, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=121, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=122, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=122, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=122, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=123, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=123, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=123, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=124, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=124, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=124, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=125, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=125, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=125, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=126, n=128] [L530] COND TRUE i < 128 - 1 VAL [a={-2:0}, b={-3:4}, i=126, n=128] [L531] b[i] = -1 VAL [a={-2:0}, b={-3:4}, i=126, n=128] [L530] i++ VAL [a={-2:0}, b={-3:4}, i=127, n=128] [L530] COND FALSE !(i < 128 - 1) VAL [a={-2:0}, b={-3:4}, i=127, n=128] [L539] RET foo () [L540] b[-1] VAL [a={-2:0}, b={-3:4}, b[-1]=0, n=128] [L540] COND FALSE !(b[-1]) [L543] free(a) VAL [a={-2:0}, b={-3:4}, n=128] [L543] free(a) VAL [a={-2:0}, b={-3:4}, n=128] [L543] free(a) [L543] free(b) VAL [a={-2:0}, b={-3:4}, n=128] - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: -1]: Unable to prove that pointer dereference always succeeds Unable to prove that pointer dereference always succeeds Reason: Not analyzed. - UnprovableResult [Line: 541]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 541]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 541]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 541]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 541]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 541]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 543]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 543]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 543]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 543]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 543]: Unable to prove that free always succeeds Unable to prove that free always succeeds Reason: Not analyzed. - UnprovableResult [Line: 533]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 51 locations, 21 error locations. Started 1 CEGAR loops. OverallTime: 392.5s, OverallIterations: 21, TraceHistogramMax: 128, PathProgramHistogramMax: 6, EmptinessCheckTime: 0.1s, AutomataDifference: 97.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 18851 SdHoareTripleChecker+Valid, 8.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 18851 mSDsluCounter, 3262 SdHoareTripleChecker+Invalid, 6.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 92 IncrementalHoareTripleChecker+Unchecked, 2765 mSDsCounter, 2865 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 6415 IncrementalHoareTripleChecker+Invalid, 9372 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 2865 mSolverCounterUnsat, 497 mSDtfsCounter, 6415 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5439 GetRequests, 3706 SyntacticMatches, 211 SemanticMatches, 1522 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169288 ImplicationChecksByTransitivity, 124.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=785occurred in iteration=20, InterpolantAutomatonStates: 994, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 20 MinimizatonAttempts, 2138 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 188.4s SatisfiabilityAnalysisTime, 100.0s InterpolantComputationTime, 5686 NumberOfCodeBlocks, 5230 NumberOfCodeBlocksAsserted, 98 NumberOfCheckSat, 7013 ConstructedInterpolants, 22 QuantifiedInterpolants, 49017 SizeOfPredicates, 47 NumberOfNonLiveVariables, 6909 ConjunctsInSsa, 457 ConjunctsInUnsatCore, 45 InterpolantComputations, 8 PerfectInterpolantSequences, 153451/312442 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-11-18 20:04:57,566 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6c0e8049-4a33-4ce1-9c57-6dfb88d0fd58/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(valid-free)