./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0d6c543285e4316d7bccce7ec33cf3dc3eeb4c474821e85404caf1203b5dfc7e --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 18:33:07,439 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 18:33:07,442 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 18:33:07,485 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 18:33:07,486 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 18:33:07,490 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 18:33:07,493 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 18:33:07,497 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 18:33:07,500 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 18:33:07,503 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 18:33:07,505 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 18:33:07,508 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 18:33:07,508 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 18:33:07,513 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 18:33:07,515 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 18:33:07,516 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 18:33:07,519 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 18:33:07,520 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 18:33:07,522 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 18:33:07,527 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 18:33:07,530 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 18:33:07,532 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 18:33:07,535 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 18:33:07,536 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 18:33:07,542 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 18:33:07,547 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 18:33:07,547 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 18:33:07,548 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 18:33:07,550 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 18:33:07,551 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 18:33:07,551 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 18:33:07,552 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 18:33:07,554 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 18:33:07,556 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 18:33:07,558 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 18:33:07,558 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 18:33:07,559 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 18:33:07,560 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 18:33:07,560 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 18:33:07,561 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 18:33:07,562 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 18:33:07,563 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-18 18:33:07,605 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 18:33:07,606 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 18:33:07,607 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 18:33:07,607 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 18:33:07,608 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 18:33:07,608 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 18:33:07,609 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 18:33:07,610 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 18:33:07,610 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 18:33:07,610 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 18:33:07,612 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 18:33:07,612 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 18:33:07,612 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 18:33:07,612 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 18:33:07,612 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 18:33:07,613 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-18 18:33:07,613 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-18 18:33:07,613 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-18 18:33:07,613 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 18:33:07,614 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-18 18:33:07,614 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 18:33:07,614 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 18:33:07,614 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 18:33:07,614 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 18:33:07,615 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 18:33:07,615 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 18:33:07,617 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 18:33:07,617 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 18:33:07,617 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 18:33:07,617 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 18:33:07,618 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0d6c543285e4316d7bccce7ec33cf3dc3eeb4c474821e85404caf1203b5dfc7e [2022-11-18 18:33:07,943 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 18:33:07,972 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 18:33:07,976 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 18:33:07,977 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 18:33:07,978 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 18:33:07,980 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i [2022-11-18 18:33:08,049 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/data/d713e4819/bffd1574ef1b4dfc94df82fa6f8bbe09/FLAG12c60878b [2022-11-18 18:33:08,605 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 18:33:08,606 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/sv-benchmarks/c/memsafety-ext/skiplist_2lvl.i [2022-11-18 18:33:08,618 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/data/d713e4819/bffd1574ef1b4dfc94df82fa6f8bbe09/FLAG12c60878b [2022-11-18 18:33:08,910 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/data/d713e4819/bffd1574ef1b4dfc94df82fa6f8bbe09 [2022-11-18 18:33:08,914 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 18:33:08,917 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 18:33:08,921 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 18:33:08,921 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 18:33:08,924 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 18:33:08,925 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 06:33:08" (1/1) ... [2022-11-18 18:33:08,928 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7a8395ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:08, skipping insertion in model container [2022-11-18 18:33:08,928 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 06:33:08" (1/1) ... [2022-11-18 18:33:08,936 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 18:33:08,994 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 18:33:09,417 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 18:33:09,431 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 18:33:09,471 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 18:33:09,502 INFO L208 MainTranslator]: Completed translation [2022-11-18 18:33:09,502 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09 WrapperNode [2022-11-18 18:33:09,502 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 18:33:09,503 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 18:33:09,503 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 18:33:09,503 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 18:33:09,510 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,523 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,561 INFO L138 Inliner]: procedures = 127, calls = 45, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 138 [2022-11-18 18:33:09,564 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 18:33:09,565 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 18:33:09,566 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 18:33:09,566 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 18:33:09,576 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,576 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,599 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,599 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,607 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,617 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,628 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,630 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,632 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 18:33:09,633 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 18:33:09,633 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 18:33:09,634 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 18:33:09,635 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (1/1) ... [2022-11-18 18:33:09,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 18:33:09,653 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:33:09,664 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 18:33:09,669 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 18:33:09,709 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 18:33:09,710 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 18:33:09,710 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-18 18:33:09,711 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-18 18:33:09,711 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 18:33:09,711 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 18:33:09,711 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 18:33:09,711 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 18:33:09,928 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 18:33:09,931 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 18:33:10,490 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 18:33:10,498 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 18:33:10,498 INFO L300 CfgBuilder]: Removed 4 assume(true) statements. [2022-11-18 18:33:10,500 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 06:33:10 BoogieIcfgContainer [2022-11-18 18:33:10,501 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 18:33:10,503 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 18:33:10,503 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 18:33:10,507 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 18:33:10,507 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 06:33:08" (1/3) ... [2022-11-18 18:33:10,508 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22a1e69d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 06:33:10, skipping insertion in model container [2022-11-18 18:33:10,508 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 06:33:09" (2/3) ... [2022-11-18 18:33:10,509 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22a1e69d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 06:33:10, skipping insertion in model container [2022-11-18 18:33:10,509 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 06:33:10" (3/3) ... [2022-11-18 18:33:10,510 INFO L112 eAbstractionObserver]: Analyzing ICFG skiplist_2lvl.i [2022-11-18 18:33:10,530 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 18:33:10,531 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 65 error locations. [2022-11-18 18:33:10,580 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 18:33:10,587 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@12bd82a6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 18:33:10,604 INFO L358 AbstractCegarLoop]: Starting to check reachability of 65 error locations. [2022-11-18 18:33:10,617 INFO L276 IsEmpty]: Start isEmpty. Operand has 133 states, 67 states have (on average 2.1343283582089554) internal successors, (143), 132 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:10,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-18 18:33:10,624 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:10,625 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-18 18:33:10,626 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:10,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:10,636 INFO L85 PathProgramCache]: Analyzing trace with hash 29857, now seen corresponding path program 1 times [2022-11-18 18:33:10,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:10,647 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1902596263] [2022-11-18 18:33:10,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:10,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:10,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:11,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:11,053 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:11,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1902596263] [2022-11-18 18:33:11,054 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1902596263] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:11,054 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:11,055 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 18:33:11,056 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901642662] [2022-11-18 18:33:11,057 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:11,062 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 18:33:11,062 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:11,094 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 18:33:11,095 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 18:33:11,099 INFO L87 Difference]: Start difference. First operand has 133 states, 67 states have (on average 2.1343283582089554) internal successors, (143), 132 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:11,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:11,359 INFO L93 Difference]: Finished difference Result 156 states and 163 transitions. [2022-11-18 18:33:11,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 18:33:11,363 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-18 18:33:11,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:11,378 INFO L225 Difference]: With dead ends: 156 [2022-11-18 18:33:11,379 INFO L226 Difference]: Without dead ends: 154 [2022-11-18 18:33:11,380 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 18:33:11,384 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 122 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 122 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:11,385 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [122 Valid, 86 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:33:11,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2022-11-18 18:33:11,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 124. [2022-11-18 18:33:11,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 66 states have (on average 1.9696969696969697) internal successors, (130), 123 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:11,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 130 transitions. [2022-11-18 18:33:11,427 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 130 transitions. Word has length 3 [2022-11-18 18:33:11,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:11,428 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 130 transitions. [2022-11-18 18:33:11,428 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:11,428 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 130 transitions. [2022-11-18 18:33:11,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-18 18:33:11,429 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:11,429 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-18 18:33:11,429 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-18 18:33:11,429 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:11,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:11,430 INFO L85 PathProgramCache]: Analyzing trace with hash 29858, now seen corresponding path program 1 times [2022-11-18 18:33:11,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:11,431 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533305175] [2022-11-18 18:33:11,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:11,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:11,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:11,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:11,527 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:11,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533305175] [2022-11-18 18:33:11,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [533305175] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:11,527 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:11,527 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 18:33:11,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1776776872] [2022-11-18 18:33:11,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:11,529 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 18:33:11,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:11,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 18:33:11,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 18:33:11,531 INFO L87 Difference]: Start difference. First operand 124 states and 130 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:11,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:11,649 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2022-11-18 18:33:11,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 18:33:11,650 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-18 18:33:11,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:11,651 INFO L225 Difference]: With dead ends: 117 [2022-11-18 18:33:11,651 INFO L226 Difference]: Without dead ends: 117 [2022-11-18 18:33:11,652 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 18:33:11,653 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 119 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 119 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:11,654 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [119 Valid, 69 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:33:11,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-11-18 18:33:11,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2022-11-18 18:33:11,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 66 states have (on average 1.8636363636363635) internal successors, (123), 116 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:11,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 123 transitions. [2022-11-18 18:33:11,663 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 123 transitions. Word has length 3 [2022-11-18 18:33:11,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:11,664 INFO L495 AbstractCegarLoop]: Abstraction has 117 states and 123 transitions. [2022-11-18 18:33:11,664 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:11,664 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2022-11-18 18:33:11,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-11-18 18:33:11,665 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:11,665 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:11,665 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-18 18:33:11,666 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:11,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:11,666 INFO L85 PathProgramCache]: Analyzing trace with hash 1056606480, now seen corresponding path program 1 times [2022-11-18 18:33:11,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:11,667 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [343805919] [2022-11-18 18:33:11,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:11,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:11,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:11,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:11,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:11,979 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [343805919] [2022-11-18 18:33:11,979 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [343805919] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:11,979 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:11,980 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 18:33:11,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186419205] [2022-11-18 18:33:11,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:11,980 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 18:33:11,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:11,981 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 18:33:11,981 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 18:33:11,982 INFO L87 Difference]: Start difference. First operand 117 states and 123 transitions. Second operand has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:12,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:12,245 INFO L93 Difference]: Finished difference Result 116 states and 122 transitions. [2022-11-18 18:33:12,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 18:33:12,246 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-11-18 18:33:12,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:12,252 INFO L225 Difference]: With dead ends: 116 [2022-11-18 18:33:12,252 INFO L226 Difference]: Without dead ends: 116 [2022-11-18 18:33:12,253 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-18 18:33:12,260 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 9 mSDsluCounter, 182 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 177 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:12,261 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 294 Invalid, 177 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 177 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:33:12,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-11-18 18:33:12,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2022-11-18 18:33:12,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 66 states have (on average 1.8484848484848484) internal successors, (122), 115 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:12,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 122 transitions. [2022-11-18 18:33:12,269 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 122 transitions. Word has length 10 [2022-11-18 18:33:12,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:12,269 INFO L495 AbstractCegarLoop]: Abstraction has 116 states and 122 transitions. [2022-11-18 18:33:12,270 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.5) internal successors, (10), 5 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:12,270 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 122 transitions. [2022-11-18 18:33:12,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-11-18 18:33:12,271 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:12,271 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:12,271 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-18 18:33:12,272 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:12,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:12,272 INFO L85 PathProgramCache]: Analyzing trace with hash 1056606481, now seen corresponding path program 1 times [2022-11-18 18:33:12,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:12,273 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126262044] [2022-11-18 18:33:12,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:12,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:12,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:12,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:12,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:12,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126262044] [2022-11-18 18:33:12,711 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1126262044] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:12,711 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:12,711 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 18:33:12,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631734661] [2022-11-18 18:33:12,712 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:12,713 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 18:33:12,713 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:12,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 18:33:12,715 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2022-11-18 18:33:12,716 INFO L87 Difference]: Start difference. First operand 116 states and 122 transitions. Second operand has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:12,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:12,987 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2022-11-18 18:33:12,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 18:33:12,988 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-11-18 18:33:12,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:12,989 INFO L225 Difference]: With dead ends: 115 [2022-11-18 18:33:12,989 INFO L226 Difference]: Without dead ends: 115 [2022-11-18 18:33:12,989 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2022-11-18 18:33:12,990 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 11 mSDsluCounter, 171 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 283 SdHoareTripleChecker+Invalid, 189 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:12,991 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 283 Invalid, 189 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:33:12,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2022-11-18 18:33:12,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2022-11-18 18:33:12,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 66 states have (on average 1.8333333333333333) internal successors, (121), 114 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:12,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2022-11-18 18:33:12,998 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 10 [2022-11-18 18:33:12,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:12,998 INFO L495 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2022-11-18 18:33:12,999 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.0) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:12,999 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2022-11-18 18:33:12,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-18 18:33:12,999 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:12,999 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:13,000 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-18 18:33:13,000 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr12REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:13,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:13,001 INFO L85 PathProgramCache]: Analyzing trace with hash -1604937495, now seen corresponding path program 1 times [2022-11-18 18:33:13,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:13,001 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199176996] [2022-11-18 18:33:13,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:13,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:13,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:13,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:13,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:13,073 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199176996] [2022-11-18 18:33:13,074 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [199176996] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:13,074 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:13,074 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 18:33:13,074 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [558448208] [2022-11-18 18:33:13,074 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:13,075 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 18:33:13,075 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:13,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 18:33:13,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 18:33:13,076 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:13,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:13,211 INFO L93 Difference]: Finished difference Result 114 states and 120 transitions. [2022-11-18 18:33:13,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 18:33:13,211 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-18 18:33:13,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:13,212 INFO L225 Difference]: With dead ends: 114 [2022-11-18 18:33:13,212 INFO L226 Difference]: Without dead ends: 114 [2022-11-18 18:33:13,213 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-18 18:33:13,214 INFO L413 NwaCegarLoop]: 115 mSDtfsCounter, 7 mSDsluCounter, 259 mSDsCounter, 0 mSdLazyCounter, 95 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 374 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 95 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:13,214 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 374 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 95 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:33:13,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2022-11-18 18:33:13,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2022-11-18 18:33:13,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 66 states have (on average 1.8181818181818181) internal successors, (120), 113 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:13,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 120 transitions. [2022-11-18 18:33:13,220 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 120 transitions. Word has length 11 [2022-11-18 18:33:13,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:13,220 INFO L495 AbstractCegarLoop]: Abstraction has 114 states and 120 transitions. [2022-11-18 18:33:13,221 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 2.75) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:13,221 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 120 transitions. [2022-11-18 18:33:13,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-11-18 18:33:13,221 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:13,221 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:13,221 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-18 18:33:13,222 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr13REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:13,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:13,222 INFO L85 PathProgramCache]: Analyzing trace with hash -1604937494, now seen corresponding path program 1 times [2022-11-18 18:33:13,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:13,223 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547361097] [2022-11-18 18:33:13,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:13,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:13,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:13,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:13,663 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:13,663 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [547361097] [2022-11-18 18:33:13,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [547361097] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:13,664 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:13,664 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-18 18:33:13,664 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813519384] [2022-11-18 18:33:13,664 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:13,665 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-11-18 18:33:13,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:13,665 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-18 18:33:13,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2022-11-18 18:33:13,667 INFO L87 Difference]: Start difference. First operand 114 states and 120 transitions. Second operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:14,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:14,027 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2022-11-18 18:33:14,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 18:33:14,028 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-11-18 18:33:14,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:14,028 INFO L225 Difference]: With dead ends: 113 [2022-11-18 18:33:14,029 INFO L226 Difference]: Without dead ends: 113 [2022-11-18 18:33:14,029 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:33:14,032 INFO L413 NwaCegarLoop]: 111 mSDtfsCounter, 12 mSDsluCounter, 299 mSDsCounter, 0 mSdLazyCounter, 283 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 410 SdHoareTripleChecker+Invalid, 287 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 283 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:14,035 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 410 Invalid, 287 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 283 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-18 18:33:14,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-11-18 18:33:14,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2022-11-18 18:33:14,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 113 states, 66 states have (on average 1.803030303030303) internal successors, (119), 112 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:14,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2022-11-18 18:33:14,050 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 11 [2022-11-18 18:33:14,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:14,051 INFO L495 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2022-11-18 18:33:14,051 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:14,051 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2022-11-18 18:33:14,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-18 18:33:14,052 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:14,052 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:14,052 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-18 18:33:14,053 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr18REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:14,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:14,053 INFO L85 PathProgramCache]: Analyzing trace with hash -266592339, now seen corresponding path program 1 times [2022-11-18 18:33:14,053 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:14,053 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985895521] [2022-11-18 18:33:14,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:14,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:14,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:14,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:14,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:14,450 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985895521] [2022-11-18 18:33:14,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1985895521] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:14,451 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:14,451 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 18:33:14,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394035857] [2022-11-18 18:33:14,451 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:14,452 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 18:33:14,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:14,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 18:33:14,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:33:14,453 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:14,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:14,828 INFO L93 Difference]: Finished difference Result 112 states and 118 transitions. [2022-11-18 18:33:14,829 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 18:33:14,829 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-18 18:33:14,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:14,830 INFO L225 Difference]: With dead ends: 112 [2022-11-18 18:33:14,830 INFO L226 Difference]: Without dead ends: 112 [2022-11-18 18:33:14,831 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-11-18 18:33:14,831 INFO L413 NwaCegarLoop]: 105 mSDtfsCounter, 25 mSDsluCounter, 473 mSDsCounter, 0 mSdLazyCounter, 323 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 578 SdHoareTripleChecker+Invalid, 330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 323 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:14,832 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 578 Invalid, 330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 323 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-18 18:33:14,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2022-11-18 18:33:14,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2022-11-18 18:33:14,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 66 states have (on average 1.7878787878787878) internal successors, (118), 111 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:14,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 118 transitions. [2022-11-18 18:33:14,836 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 118 transitions. Word has length 15 [2022-11-18 18:33:14,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:14,837 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 118 transitions. [2022-11-18 18:33:14,837 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:14,837 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 118 transitions. [2022-11-18 18:33:14,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-18 18:33:14,838 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:14,838 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:14,850 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-18 18:33:14,850 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:14,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:14,851 INFO L85 PathProgramCache]: Analyzing trace with hash -266592338, now seen corresponding path program 1 times [2022-11-18 18:33:14,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:14,851 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051369945] [2022-11-18 18:33:14,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:14,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:14,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:15,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:15,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:15,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1051369945] [2022-11-18 18:33:15,415 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1051369945] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:15,415 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:15,415 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 18:33:15,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880954418] [2022-11-18 18:33:15,416 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:15,416 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 18:33:15,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:15,417 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 18:33:15,417 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:33:15,417 INFO L87 Difference]: Start difference. First operand 112 states and 118 transitions. Second operand has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:15,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:15,724 INFO L93 Difference]: Finished difference Result 111 states and 117 transitions. [2022-11-18 18:33:15,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 18:33:15,725 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-18 18:33:15,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:15,726 INFO L225 Difference]: With dead ends: 111 [2022-11-18 18:33:15,726 INFO L226 Difference]: Without dead ends: 111 [2022-11-18 18:33:15,726 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-11-18 18:33:15,727 INFO L413 NwaCegarLoop]: 105 mSDtfsCounter, 21 mSDsluCounter, 374 mSDsCounter, 0 mSdLazyCounter, 207 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 479 SdHoareTripleChecker+Invalid, 217 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 207 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:15,727 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 479 Invalid, 217 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 207 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:33:15,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-11-18 18:33:15,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2022-11-18 18:33:15,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 66 states have (on average 1.7727272727272727) internal successors, (117), 110 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:15,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 117 transitions. [2022-11-18 18:33:15,731 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 117 transitions. Word has length 15 [2022-11-18 18:33:15,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:15,731 INFO L495 AbstractCegarLoop]: Abstraction has 111 states and 117 transitions. [2022-11-18 18:33:15,731 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.5) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:15,732 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 117 transitions. [2022-11-18 18:33:15,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-18 18:33:15,732 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:15,732 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:15,732 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-11-18 18:33:15,733 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:15,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:15,733 INFO L85 PathProgramCache]: Analyzing trace with hash 325572089, now seen corresponding path program 1 times [2022-11-18 18:33:15,733 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:15,746 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1444691722] [2022-11-18 18:33:15,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:15,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:15,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:15,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:15,839 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:15,839 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1444691722] [2022-11-18 18:33:15,839 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1444691722] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:15,840 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:15,840 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 18:33:15,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [331142707] [2022-11-18 18:33:15,840 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:15,841 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 18:33:15,842 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:15,842 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 18:33:15,842 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-18 18:33:15,843 INFO L87 Difference]: Start difference. First operand 111 states and 117 transitions. Second operand has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:15,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:15,962 INFO L93 Difference]: Finished difference Result 110 states and 116 transitions. [2022-11-18 18:33:15,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 18:33:15,962 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-18 18:33:15,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:15,964 INFO L225 Difference]: With dead ends: 110 [2022-11-18 18:33:15,964 INFO L226 Difference]: Without dead ends: 110 [2022-11-18 18:33:15,964 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-18 18:33:15,966 INFO L413 NwaCegarLoop]: 112 mSDtfsCounter, 6 mSDsluCounter, 251 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 363 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:15,967 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 363 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:33:15,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2022-11-18 18:33:15,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-11-18 18:33:15,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 66 states have (on average 1.7575757575757576) internal successors, (116), 109 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:15,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 116 transitions. [2022-11-18 18:33:15,972 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 116 transitions. Word has length 16 [2022-11-18 18:33:15,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:15,973 INFO L495 AbstractCegarLoop]: Abstraction has 110 states and 116 transitions. [2022-11-18 18:33:15,973 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:15,973 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 116 transitions. [2022-11-18 18:33:15,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-18 18:33:15,975 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:15,975 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:15,975 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-18 18:33:15,976 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:15,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:15,976 INFO L85 PathProgramCache]: Analyzing trace with hash 325572090, now seen corresponding path program 1 times [2022-11-18 18:33:15,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:15,977 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079920630] [2022-11-18 18:33:15,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:15,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:16,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:16,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:16,556 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:16,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079920630] [2022-11-18 18:33:16,557 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2079920630] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:16,557 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:16,557 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 18:33:16,557 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1784888011] [2022-11-18 18:33:16,557 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:16,558 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 18:33:16,558 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:16,558 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 18:33:16,558 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-11-18 18:33:16,559 INFO L87 Difference]: Start difference. First operand 110 states and 116 transitions. Second operand has 11 states, 10 states have (on average 1.6) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:16,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:16,814 INFO L93 Difference]: Finished difference Result 109 states and 115 transitions. [2022-11-18 18:33:16,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 18:33:16,815 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.6) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-18 18:33:16,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:16,816 INFO L225 Difference]: With dead ends: 109 [2022-11-18 18:33:16,816 INFO L226 Difference]: Without dead ends: 109 [2022-11-18 18:33:16,817 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2022-11-18 18:33:16,817 INFO L413 NwaCegarLoop]: 104 mSDtfsCounter, 15 mSDsluCounter, 369 mSDsCounter, 0 mSdLazyCounter, 195 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 473 SdHoareTripleChecker+Invalid, 206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 195 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:16,818 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 473 Invalid, 206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 195 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:33:16,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2022-11-18 18:33:16,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2022-11-18 18:33:16,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 66 states have (on average 1.7424242424242424) internal successors, (115), 108 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:16,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 115 transitions. [2022-11-18 18:33:16,823 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 115 transitions. Word has length 16 [2022-11-18 18:33:16,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:16,823 INFO L495 AbstractCegarLoop]: Abstraction has 109 states and 115 transitions. [2022-11-18 18:33:16,823 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.6) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:16,823 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 115 transitions. [2022-11-18 18:33:16,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-18 18:33:16,824 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:16,824 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:16,824 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-11-18 18:33:16,824 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr22REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:16,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:16,825 INFO L85 PathProgramCache]: Analyzing trace with hash 379588598, now seen corresponding path program 1 times [2022-11-18 18:33:16,825 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:16,826 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995160879] [2022-11-18 18:33:16,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:16,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:16,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:16,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:16,966 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:16,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995160879] [2022-11-18 18:33:16,966 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [995160879] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:16,967 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:16,967 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 18:33:16,967 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771644791] [2022-11-18 18:33:16,967 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:16,967 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 18:33:16,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:16,968 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 18:33:16,969 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 18:33:16,969 INFO L87 Difference]: Start difference. First operand 109 states and 115 transitions. Second operand has 6 states, 5 states have (on average 4.2) internal successors, (21), 6 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:17,216 INFO L93 Difference]: Finished difference Result 170 states and 179 transitions. [2022-11-18 18:33:17,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 18:33:17,217 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.2) internal successors, (21), 6 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-18 18:33:17,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:17,218 INFO L225 Difference]: With dead ends: 170 [2022-11-18 18:33:17,218 INFO L226 Difference]: Without dead ends: 170 [2022-11-18 18:33:17,218 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-11-18 18:33:17,219 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 362 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 188 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 362 SdHoareTripleChecker+Valid, 155 SdHoareTripleChecker+Invalid, 195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 188 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:17,219 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [362 Valid, 155 Invalid, 195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 188 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:33:17,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2022-11-18 18:33:17,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 107. [2022-11-18 18:33:17,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 66 states have (on average 1.7121212121212122) internal successors, (113), 106 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 113 transitions. [2022-11-18 18:33:17,223 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 113 transitions. Word has length 21 [2022-11-18 18:33:17,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:17,224 INFO L495 AbstractCegarLoop]: Abstraction has 107 states and 113 transitions. [2022-11-18 18:33:17,224 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.2) internal successors, (21), 6 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,224 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 113 transitions. [2022-11-18 18:33:17,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-18 18:33:17,225 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:17,225 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:17,225 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-11-18 18:33:17,225 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:17,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:17,227 INFO L85 PathProgramCache]: Analyzing trace with hash 379588599, now seen corresponding path program 1 times [2022-11-18 18:33:17,227 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:17,227 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193420817] [2022-11-18 18:33:17,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:17,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:17,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:17,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:17,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:17,446 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193420817] [2022-11-18 18:33:17,446 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [193420817] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:17,446 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:17,447 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 18:33:17,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122071660] [2022-11-18 18:33:17,447 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:17,447 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 18:33:17,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:17,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 18:33:17,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-18 18:33:17,448 INFO L87 Difference]: Start difference. First operand 107 states and 113 transitions. Second operand has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:17,648 INFO L93 Difference]: Finished difference Result 141 states and 148 transitions. [2022-11-18 18:33:17,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 18:33:17,649 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-18 18:33:17,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:17,650 INFO L225 Difference]: With dead ends: 141 [2022-11-18 18:33:17,650 INFO L226 Difference]: Without dead ends: 141 [2022-11-18 18:33:17,650 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-11-18 18:33:17,651 INFO L413 NwaCegarLoop]: 85 mSDtfsCounter, 382 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 382 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:17,651 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [382 Valid, 117 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:33:17,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-11-18 18:33:17,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 105. [2022-11-18 18:33:17,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 66 states have (on average 1.6818181818181819) internal successors, (111), 104 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 111 transitions. [2022-11-18 18:33:17,654 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 111 transitions. Word has length 21 [2022-11-18 18:33:17,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:17,654 INFO L495 AbstractCegarLoop]: Abstraction has 105 states and 111 transitions. [2022-11-18 18:33:17,654 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,655 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 111 transitions. [2022-11-18 18:33:17,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-18 18:33:17,655 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:17,655 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:17,655 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-18 18:33:17,655 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr48REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:17,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:17,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1117654205, now seen corresponding path program 1 times [2022-11-18 18:33:17,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:17,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415335755] [2022-11-18 18:33:17,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:17,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:17,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:17,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:17,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:17,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415335755] [2022-11-18 18:33:17,751 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1415335755] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:17,751 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:17,751 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 18:33:17,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2132287625] [2022-11-18 18:33:17,751 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:17,752 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 18:33:17,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:17,752 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 18:33:17,752 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 18:33:17,753 INFO L87 Difference]: Start difference. First operand 105 states and 111 transitions. Second operand has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:17,983 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2022-11-18 18:33:17,983 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 18:33:17,984 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-18 18:33:17,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:17,985 INFO L225 Difference]: With dead ends: 126 [2022-11-18 18:33:17,985 INFO L226 Difference]: Without dead ends: 126 [2022-11-18 18:33:17,985 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-11-18 18:33:17,986 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 297 mSDsluCounter, 79 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 297 SdHoareTripleChecker+Valid, 130 SdHoareTripleChecker+Invalid, 195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:17,987 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [297 Valid, 130 Invalid, 195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 18:33:17,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2022-11-18 18:33:17,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 102. [2022-11-18 18:33:17,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 67 states have (on average 1.626865671641791) internal successors, (109), 101 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 109 transitions. [2022-11-18 18:33:17,991 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 109 transitions. Word has length 22 [2022-11-18 18:33:17,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:17,992 INFO L495 AbstractCegarLoop]: Abstraction has 102 states and 109 transitions. [2022-11-18 18:33:17,992 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.4) internal successors, (22), 6 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:17,992 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 109 transitions. [2022-11-18 18:33:17,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-18 18:33:17,994 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:17,995 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:17,995 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-18 18:33:17,995 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr49REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:17,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:17,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1117654204, now seen corresponding path program 1 times [2022-11-18 18:33:17,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:17,997 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684476131] [2022-11-18 18:33:17,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:17,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:18,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:18,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:18,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:18,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684476131] [2022-11-18 18:33:18,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1684476131] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:18,228 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:18,228 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 18:33:18,229 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [278178758] [2022-11-18 18:33:18,229 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:18,229 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 18:33:18,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:18,230 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 18:33:18,230 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2022-11-18 18:33:18,231 INFO L87 Difference]: Start difference. First operand 102 states and 109 transitions. Second operand has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:18,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:18,423 INFO L93 Difference]: Finished difference Result 97 states and 103 transitions. [2022-11-18 18:33:18,423 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 18:33:18,423 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-18 18:33:18,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:18,424 INFO L225 Difference]: With dead ends: 97 [2022-11-18 18:33:18,424 INFO L226 Difference]: Without dead ends: 97 [2022-11-18 18:33:18,425 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2022-11-18 18:33:18,425 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 373 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 123 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 373 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 123 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:18,426 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [373 Valid, 90 Invalid, 132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 123 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:33:18,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-11-18 18:33:18,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2022-11-18 18:33:18,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 67 states have (on average 1.537313432835821) internal successors, (103), 96 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:18,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2022-11-18 18:33:18,429 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 22 [2022-11-18 18:33:18,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:18,429 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2022-11-18 18:33:18,429 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.6666666666666665) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:18,429 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2022-11-18 18:33:18,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-18 18:33:18,430 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:18,430 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:18,430 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-11-18 18:33:18,430 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:18,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:18,431 INFO L85 PathProgramCache]: Analyzing trace with hash -287576677, now seen corresponding path program 1 times [2022-11-18 18:33:18,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:18,431 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780161872] [2022-11-18 18:33:18,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:18,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:18,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:19,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:19,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:19,086 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780161872] [2022-11-18 18:33:19,086 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [780161872] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:19,086 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:19,086 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-11-18 18:33:19,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391543107] [2022-11-18 18:33:19,086 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:19,087 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-18 18:33:19,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:19,087 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-18 18:33:19,087 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=263, Unknown=0, NotChecked=0, Total=306 [2022-11-18 18:33:19,088 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand has 18 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 18 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:20,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:20,142 INFO L93 Difference]: Finished difference Result 165 states and 177 transitions. [2022-11-18 18:33:20,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-18 18:33:20,143 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 18 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-11-18 18:33:20,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:20,144 INFO L225 Difference]: With dead ends: 165 [2022-11-18 18:33:20,144 INFO L226 Difference]: Without dead ends: 165 [2022-11-18 18:33:20,145 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 132 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=180, Invalid=876, Unknown=0, NotChecked=0, Total=1056 [2022-11-18 18:33:20,145 INFO L413 NwaCegarLoop]: 63 mSDtfsCounter, 425 mSDsluCounter, 711 mSDsCounter, 0 mSdLazyCounter, 793 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 425 SdHoareTripleChecker+Valid, 774 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 793 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:20,146 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [425 Valid, 774 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 793 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-18 18:33:20,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2022-11-18 18:33:20,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 98. [2022-11-18 18:33:20,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 97 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:20,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 106 transitions. [2022-11-18 18:33:20,149 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 106 transitions. Word has length 23 [2022-11-18 18:33:20,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:20,149 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 106 transitions. [2022-11-18 18:33:20,150 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 18 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:20,150 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 106 transitions. [2022-11-18 18:33:20,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-11-18 18:33:20,150 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:20,150 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:20,151 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-11-18 18:33:20,151 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:20,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:20,151 INFO L85 PathProgramCache]: Analyzing trace with hash -287576676, now seen corresponding path program 1 times [2022-11-18 18:33:20,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:20,151 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370130342] [2022-11-18 18:33:20,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:20,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:20,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:21,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:21,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:21,088 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370130342] [2022-11-18 18:33:21,088 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [370130342] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:21,088 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:21,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-11-18 18:33:21,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883154413] [2022-11-18 18:33:21,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:21,089 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-11-18 18:33:21,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:21,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-18 18:33:21,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2022-11-18 18:33:21,091 INFO L87 Difference]: Start difference. First operand 98 states and 106 transitions. Second operand has 19 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:22,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:22,430 INFO L93 Difference]: Finished difference Result 211 states and 228 transitions. [2022-11-18 18:33:22,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-18 18:33:22,430 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-11-18 18:33:22,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:22,433 INFO L225 Difference]: With dead ends: 211 [2022-11-18 18:33:22,434 INFO L226 Difference]: Without dead ends: 211 [2022-11-18 18:33:22,436 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 152 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=197, Invalid=993, Unknown=0, NotChecked=0, Total=1190 [2022-11-18 18:33:22,436 INFO L413 NwaCegarLoop]: 66 mSDtfsCounter, 647 mSDsluCounter, 745 mSDsCounter, 0 mSdLazyCounter, 721 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 647 SdHoareTripleChecker+Valid, 811 SdHoareTripleChecker+Invalid, 762 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 721 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:22,437 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [647 Valid, 811 Invalid, 762 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 721 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-18 18:33:22,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2022-11-18 18:33:22,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 122. [2022-11-18 18:33:22,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 96 states have (on average 1.5208333333333333) internal successors, (146), 121 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:22,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 146 transitions. [2022-11-18 18:33:22,441 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 146 transitions. Word has length 23 [2022-11-18 18:33:22,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:22,441 INFO L495 AbstractCegarLoop]: Abstraction has 122 states and 146 transitions. [2022-11-18 18:33:22,442 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 1.2777777777777777) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:22,442 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 146 transitions. [2022-11-18 18:33:22,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-11-18 18:33:22,442 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:22,442 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:22,443 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-11-18 18:33:22,443 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr62ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:22,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:22,443 INFO L85 PathProgramCache]: Analyzing trace with hash -1449815588, now seen corresponding path program 1 times [2022-11-18 18:33:22,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:22,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558143947] [2022-11-18 18:33:22,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:22,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:22,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:22,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:22,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:22,537 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558143947] [2022-11-18 18:33:22,537 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1558143947] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:22,537 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:22,537 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 18:33:22,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1213703396] [2022-11-18 18:33:22,537 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:22,538 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 18:33:22,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:22,538 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 18:33:22,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 18:33:22,538 INFO L87 Difference]: Start difference. First operand 122 states and 146 transitions. Second operand has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:22,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:22,625 INFO L93 Difference]: Finished difference Result 121 states and 145 transitions. [2022-11-18 18:33:22,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 18:33:22,626 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-11-18 18:33:22,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:22,630 INFO L225 Difference]: With dead ends: 121 [2022-11-18 18:33:22,631 INFO L226 Difference]: Without dead ends: 121 [2022-11-18 18:33:22,631 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2022-11-18 18:33:22,632 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 258 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 258 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:22,632 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [258 Valid, 146 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 18:33:22,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-11-18 18:33:22,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2022-11-18 18:33:22,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 96 states have (on average 1.5104166666666667) internal successors, (145), 120 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:22,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 145 transitions. [2022-11-18 18:33:22,637 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 145 transitions. Word has length 25 [2022-11-18 18:33:22,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:22,638 INFO L495 AbstractCegarLoop]: Abstraction has 121 states and 145 transitions. [2022-11-18 18:33:22,639 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 6 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:22,639 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 145 transitions. [2022-11-18 18:33:22,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-11-18 18:33:22,641 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:22,642 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:22,642 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-11-18 18:33:22,643 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr54REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:22,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:22,643 INFO L85 PathProgramCache]: Analyzing trace with hash -1702259996, now seen corresponding path program 1 times [2022-11-18 18:33:22,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:22,644 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213485949] [2022-11-18 18:33:22,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:22,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:22,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:23,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:23,236 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:23,237 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213485949] [2022-11-18 18:33:23,237 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213485949] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:23,237 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:23,237 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2022-11-18 18:33:23,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289526843] [2022-11-18 18:33:23,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:23,237 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-11-18 18:33:23,238 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:23,238 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-18 18:33:23,238 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2022-11-18 18:33:23,238 INFO L87 Difference]: Start difference. First operand 121 states and 145 transitions. Second operand has 17 states, 16 states have (on average 1.6875) internal successors, (27), 17 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:24,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:24,011 INFO L93 Difference]: Finished difference Result 166 states and 194 transitions. [2022-11-18 18:33:24,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-18 18:33:24,012 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 16 states have (on average 1.6875) internal successors, (27), 17 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-11-18 18:33:24,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:24,013 INFO L225 Difference]: With dead ends: 166 [2022-11-18 18:33:24,013 INFO L226 Difference]: Without dead ends: 166 [2022-11-18 18:33:24,013 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=163, Invalid=767, Unknown=0, NotChecked=0, Total=930 [2022-11-18 18:33:24,014 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 327 mSDsluCounter, 648 mSDsCounter, 0 mSdLazyCounter, 603 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 327 SdHoareTripleChecker+Valid, 705 SdHoareTripleChecker+Invalid, 626 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 603 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:24,014 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [327 Valid, 705 Invalid, 626 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 603 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 18:33:24,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2022-11-18 18:33:24,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 128. [2022-11-18 18:33:24,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 103 states have (on average 1.4951456310679612) internal successors, (154), 127 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:24,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 154 transitions. [2022-11-18 18:33:24,018 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 154 transitions. Word has length 27 [2022-11-18 18:33:24,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:24,018 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 154 transitions. [2022-11-18 18:33:24,018 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 16 states have (on average 1.6875) internal successors, (27), 17 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:24,018 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 154 transitions. [2022-11-18 18:33:24,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-11-18 18:33:24,019 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:24,019 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:24,019 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-11-18 18:33:24,019 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr55REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:24,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:24,020 INFO L85 PathProgramCache]: Analyzing trace with hash -1702259995, now seen corresponding path program 1 times [2022-11-18 18:33:24,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:24,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252979276] [2022-11-18 18:33:24,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:24,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:24,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:24,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:24,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:24,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252979276] [2022-11-18 18:33:24,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [252979276] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:24,878 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:24,879 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2022-11-18 18:33:24,879 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [268752125] [2022-11-18 18:33:24,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:24,879 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-18 18:33:24,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:24,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-18 18:33:24,880 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=262, Unknown=0, NotChecked=0, Total=306 [2022-11-18 18:33:24,880 INFO L87 Difference]: Start difference. First operand 128 states and 154 transitions. Second operand has 18 states, 17 states have (on average 1.588235294117647) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:25,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:25,938 INFO L93 Difference]: Finished difference Result 166 states and 194 transitions. [2022-11-18 18:33:25,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-18 18:33:25,939 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 17 states have (on average 1.588235294117647) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-11-18 18:33:25,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:25,940 INFO L225 Difference]: With dead ends: 166 [2022-11-18 18:33:25,940 INFO L226 Difference]: Without dead ends: 166 [2022-11-18 18:33:25,940 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=179, Invalid=877, Unknown=0, NotChecked=0, Total=1056 [2022-11-18 18:33:25,941 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 282 mSDsluCounter, 578 mSDsCounter, 0 mSdLazyCounter, 627 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 282 SdHoareTripleChecker+Valid, 629 SdHoareTripleChecker+Invalid, 652 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 627 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:25,941 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [282 Valid, 629 Invalid, 652 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 627 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-18 18:33:25,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2022-11-18 18:33:25,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 128. [2022-11-18 18:33:25,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 103 states have (on average 1.4854368932038835) internal successors, (153), 127 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:25,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 153 transitions. [2022-11-18 18:33:25,945 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 153 transitions. Word has length 27 [2022-11-18 18:33:25,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:25,945 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 153 transitions. [2022-11-18 18:33:25,945 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 17 states have (on average 1.588235294117647) internal successors, (27), 18 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:25,945 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 153 transitions. [2022-11-18 18:33:25,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-18 18:33:25,946 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:25,946 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:25,946 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-11-18 18:33:25,946 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr64ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:25,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:25,947 INFO L85 PathProgramCache]: Analyzing trace with hash -1264836991, now seen corresponding path program 1 times [2022-11-18 18:33:25,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:25,947 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1604077529] [2022-11-18 18:33:25,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:25,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:25,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:26,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:26,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:26,576 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1604077529] [2022-11-18 18:33:26,576 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1604077529] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:26,576 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:26,576 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-11-18 18:33:26,576 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459150408] [2022-11-18 18:33:26,576 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:26,577 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-18 18:33:26,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:26,577 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-18 18:33:26,577 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=253, Unknown=0, NotChecked=0, Total=306 [2022-11-18 18:33:26,578 INFO L87 Difference]: Start difference. First operand 128 states and 153 transitions. Second operand has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 18 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:27,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:27,272 INFO L93 Difference]: Finished difference Result 159 states and 187 transitions. [2022-11-18 18:33:27,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-18 18:33:27,273 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 18 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-18 18:33:27,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:27,274 INFO L225 Difference]: With dead ends: 159 [2022-11-18 18:33:27,274 INFO L226 Difference]: Without dead ends: 159 [2022-11-18 18:33:27,275 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=162, Invalid=708, Unknown=0, NotChecked=0, Total=870 [2022-11-18 18:33:27,275 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 205 mSDsluCounter, 714 mSDsCounter, 0 mSdLazyCounter, 485 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 205 SdHoareTripleChecker+Valid, 774 SdHoareTripleChecker+Invalid, 508 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 485 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:27,276 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [205 Valid, 774 Invalid, 508 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 485 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 18:33:27,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2022-11-18 18:33:27,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 128. [2022-11-18 18:33:27,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 103 states have (on average 1.4757281553398058) internal successors, (152), 127 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:27,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 152 transitions. [2022-11-18 18:33:27,280 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 152 transitions. Word has length 28 [2022-11-18 18:33:27,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:27,280 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 152 transitions. [2022-11-18 18:33:27,280 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.5555555555555556) internal successors, (28), 18 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:27,281 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 152 transitions. [2022-11-18 18:33:27,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-18 18:33:27,281 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:27,281 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:27,281 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-11-18 18:33:27,282 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr30REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:27,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:27,285 INFO L85 PathProgramCache]: Analyzing trace with hash -2059816375, now seen corresponding path program 1 times [2022-11-18 18:33:27,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:27,286 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504510179] [2022-11-18 18:33:27,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:27,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:27,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:27,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:27,363 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:27,363 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504510179] [2022-11-18 18:33:27,364 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [504510179] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:27,364 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:27,364 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 18:33:27,365 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838018010] [2022-11-18 18:33:27,365 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:27,365 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 18:33:27,365 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:27,365 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 18:33:27,366 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 18:33:27,366 INFO L87 Difference]: Start difference. First operand 128 states and 152 transitions. Second operand has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:27,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:27,490 INFO L93 Difference]: Finished difference Result 146 states and 169 transitions. [2022-11-18 18:33:27,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 18:33:27,491 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-11-18 18:33:27,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:27,492 INFO L225 Difference]: With dead ends: 146 [2022-11-18 18:33:27,492 INFO L226 Difference]: Without dead ends: 146 [2022-11-18 18:33:27,492 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 18:33:27,493 INFO L413 NwaCegarLoop]: 85 mSDtfsCounter, 113 mSDsluCounter, 46 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 113 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:27,493 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [113 Valid, 131 Invalid, 111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 105 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 18:33:27,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2022-11-18 18:33:27,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 127. [2022-11-18 18:33:27,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 105 states have (on average 1.4285714285714286) internal successors, (150), 126 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:27,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 150 transitions. [2022-11-18 18:33:27,497 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 150 transitions. Word has length 29 [2022-11-18 18:33:27,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:27,497 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 150 transitions. [2022-11-18 18:33:27,497 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 9.666666666666666) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:27,497 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 150 transitions. [2022-11-18 18:33:27,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-18 18:33:27,498 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:27,498 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:27,498 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-11-18 18:33:27,499 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr31REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:27,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:27,499 INFO L85 PathProgramCache]: Analyzing trace with hash -2059816374, now seen corresponding path program 1 times [2022-11-18 18:33:27,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:27,499 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786991162] [2022-11-18 18:33:27,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:27,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:27,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:28,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:28,277 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:28,277 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786991162] [2022-11-18 18:33:28,278 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [786991162] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:28,278 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:28,278 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2022-11-18 18:33:28,278 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [871951594] [2022-11-18 18:33:28,278 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:28,278 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-18 18:33:28,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:28,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-18 18:33:28,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2022-11-18 18:33:28,279 INFO L87 Difference]: Start difference. First operand 127 states and 150 transitions. Second operand has 21 states, 20 states have (on average 1.45) internal successors, (29), 21 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:29,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:29,401 INFO L93 Difference]: Finished difference Result 202 states and 223 transitions. [2022-11-18 18:33:29,405 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-18 18:33:29,405 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 20 states have (on average 1.45) internal successors, (29), 21 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-11-18 18:33:29,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:29,406 INFO L225 Difference]: With dead ends: 202 [2022-11-18 18:33:29,406 INFO L226 Difference]: Without dead ends: 202 [2022-11-18 18:33:29,407 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 151 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=217, Invalid=1043, Unknown=0, NotChecked=0, Total=1260 [2022-11-18 18:33:29,407 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 493 mSDsluCounter, 1127 mSDsCounter, 0 mSdLazyCounter, 822 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 493 SdHoareTripleChecker+Valid, 1196 SdHoareTripleChecker+Invalid, 851 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 822 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:29,408 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [493 Valid, 1196 Invalid, 851 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 822 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-11-18 18:33:29,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2022-11-18 18:33:29,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 132. [2022-11-18 18:33:29,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 110 states have (on average 1.4181818181818182) internal successors, (156), 131 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:29,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 156 transitions. [2022-11-18 18:33:29,413 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 156 transitions. Word has length 29 [2022-11-18 18:33:29,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:29,414 INFO L495 AbstractCegarLoop]: Abstraction has 132 states and 156 transitions. [2022-11-18 18:33:29,414 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 20 states have (on average 1.45) internal successors, (29), 21 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:29,414 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 156 transitions. [2022-11-18 18:33:29,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-18 18:33:29,415 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:29,415 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:29,415 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-11-18 18:33:29,416 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr58ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:29,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:29,416 INFO L85 PathProgramCache]: Analyzing trace with hash -1348537848, now seen corresponding path program 1 times [2022-11-18 18:33:29,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:29,417 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457720469] [2022-11-18 18:33:29,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:29,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:29,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:30,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:30,239 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:30,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457720469] [2022-11-18 18:33:30,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [457720469] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 18:33:30,239 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 18:33:30,239 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-11-18 18:33:30,240 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676841688] [2022-11-18 18:33:30,240 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 18:33:30,240 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-11-18 18:33:30,240 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:33:30,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-11-18 18:33:30,241 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2022-11-18 18:33:30,241 INFO L87 Difference]: Start difference. First operand 132 states and 156 transitions. Second operand has 19 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 19 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:31,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:33:31,001 INFO L93 Difference]: Finished difference Result 173 states and 202 transitions. [2022-11-18 18:33:31,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-18 18:33:31,002 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 19 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-11-18 18:33:31,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:33:31,003 INFO L225 Difference]: With dead ends: 173 [2022-11-18 18:33:31,003 INFO L226 Difference]: Without dead ends: 173 [2022-11-18 18:33:31,004 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2022-11-18 18:33:31,004 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 259 mSDsluCounter, 685 mSDsCounter, 0 mSdLazyCounter, 525 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 259 SdHoareTripleChecker+Valid, 747 SdHoareTripleChecker+Invalid, 551 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 525 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 18:33:31,005 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [259 Valid, 747 Invalid, 551 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 525 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 18:33:31,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2022-11-18 18:33:31,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 135. [2022-11-18 18:33:31,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 113 states have (on average 1.407079646017699) internal successors, (159), 134 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:31,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 159 transitions. [2022-11-18 18:33:31,009 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 159 transitions. Word has length 30 [2022-11-18 18:33:31,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:33:31,009 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 159 transitions. [2022-11-18 18:33:31,009 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 19 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:33:31,010 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 159 transitions. [2022-11-18 18:33:31,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-18 18:33:31,010 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:33:31,010 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:33:31,010 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-11-18 18:33:31,010 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr24REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:33:31,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:33:31,011 INFO L85 PathProgramCache]: Analyzing trace with hash 570254421, now seen corresponding path program 1 times [2022-11-18 18:33:31,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:33:31,011 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600553783] [2022-11-18 18:33:31,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:31,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:33:31,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:32,736 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:32,736 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:33:32,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600553783] [2022-11-18 18:33:32,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [600553783] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:33:32,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1879653804] [2022-11-18 18:33:32,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:33:32,737 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:33:32,738 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:33:32,746 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:33:32,753 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 18:33:32,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:33:32,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 80 conjunts are in the unsatisfiable core [2022-11-18 18:33:32,937 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:33:33,010 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 18:33:33,012 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-11-18 18:33:33,084 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 18:33:33,198 INFO L321 Elim1Store]: treesize reduction 48, result has 36.0 percent of original size [2022-11-18 18:33:33,199 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 26 treesize of output 41 [2022-11-18 18:33:33,322 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:33,324 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2022-11-18 18:33:33,745 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 18:33:33,745 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 89 treesize of output 76 [2022-11-18 18:33:33,756 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-18 18:33:33,875 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:33,900 INFO L321 Elim1Store]: treesize reduction 70, result has 19.5 percent of original size [2022-11-18 18:33:33,900 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 94 treesize of output 61 [2022-11-18 18:33:33,911 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 89 [2022-11-18 18:33:34,320 INFO L321 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-11-18 18:33:34,320 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 133 treesize of output 112 [2022-11-18 18:33:34,345 INFO L321 Elim1Store]: treesize reduction 27, result has 15.6 percent of original size [2022-11-18 18:33:34,346 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 91 [2022-11-18 18:33:34,414 INFO L321 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-11-18 18:33:34,415 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 124 treesize of output 105 [2022-11-18 18:33:34,432 INFO L321 Elim1Store]: treesize reduction 27, result has 15.6 percent of original size [2022-11-18 18:33:34,433 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 95 treesize of output 91 [2022-11-18 18:33:34,815 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 68 [2022-11-18 18:33:35,326 INFO L321 Elim1Store]: treesize reduction 26, result has 3.7 percent of original size [2022-11-18 18:33:35,326 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 95 treesize of output 32 [2022-11-18 18:33:35,520 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:33:35,520 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:33:36,079 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_900 (Array Int Int)) (v_ArrVal_902 (Array Int Int)) (v_ArrVal_901 (Array Int Int)) (v_ArrVal_903 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_901) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_902))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ (select (select (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem11#1.base| v_ArrVal_900) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_903) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) 4))) 1)) is different from false [2022-11-18 18:33:36,097 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_900 (Array Int Int)) (v_ArrVal_902 (Array Int Int)) (v_ArrVal_901 (Array Int Int)) (v_ArrVal_903 (Array Int Int))) (= (select |c_#valid| (let ((.cse1 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))) (select (let ((.cse0 (store (store |c_#memory_$Pointer$.base| .cse1 v_ArrVal_901) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_902))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 (select (select (store (store |c_#memory_$Pointer$.offset| .cse1 v_ArrVal_900) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem10#1.base| v_ArrVal_903) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) 1)) is different from false [2022-11-18 18:33:36,111 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_902 (Array Int Int)) (v_ArrVal_903 (Array Int Int))) (= (select |c_#valid| (let ((.cse1 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))) (select (let ((.cse0 (store |c_#memory_$Pointer$.base| .cse1 v_ArrVal_902))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ (select (select (store |c_#memory_$Pointer$.offset| .cse1 v_ArrVal_903) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) 4)))) 1)) is different from false [2022-11-18 18:33:36,132 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_898 (Array Int Int)) (v_ArrVal_902 (Array Int Int)) (v_ArrVal_903 (Array Int Int))) (= (select |c_#valid| (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|)))) (let ((.cse2 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))) (select (let ((.cse0 (store .cse1 .cse2 v_ArrVal_902))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ (select (select (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_898) .cse2 v_ArrVal_903) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) 4))))) 1)) is different from false [2022-11-18 18:33:36,151 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_898 (Array Int Int)) (v_ArrVal_902 (Array Int Int)) (v_ArrVal_903 (Array Int Int)) (v_ArrVal_896 (Array Int Int)) (v_ArrVal_895 (Array Int Int))) (= (select |c_#valid| (let ((.cse1 (let ((.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| v_ArrVal_895))) (store .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem9#1.base|))))) (let ((.cse2 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)))) (select (let ((.cse0 (store .cse1 .cse2 v_ArrVal_902))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 (select (select (store (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| v_ArrVal_896) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_898) .cse2 v_ArrVal_903) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)))))) 1)) is different from false [2022-11-18 18:33:36,170 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_898 (Array Int Int)) (v_ArrVal_902 (Array Int Int)) (v_ArrVal_903 (Array Int Int)) (v_ArrVal_896 (Array Int Int)) (v_ArrVal_895 (Array Int Int))) (= (select |c_#valid| (let ((.cse3 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse1 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| v_ArrVal_895))) (store .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse3)))))) (let ((.cse2 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse3))) (select (let ((.cse0 (store .cse1 .cse2 v_ArrVal_902))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ (select (select (store (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem8#1.base| v_ArrVal_896) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_898) .cse2 v_ArrVal_903) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|) 4)))))) 1)) is different from false [2022-11-18 18:33:36,191 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_898 (Array Int Int)) (v_ArrVal_902 (Array Int Int)) (v_ArrVal_903 (Array Int Int)) (v_ArrVal_896 (Array Int Int)) (v_ArrVal_895 (Array Int Int))) (= (select |c_#valid| (let ((.cse6 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse4 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) (.cse3 (select .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (let ((.cse1 (let ((.cse5 (store |c_#memory_$Pointer$.base| .cse3 v_ArrVal_895))) (store .cse5 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| (store (select .cse5 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base|) (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.offset| 4) (select .cse6 .cse4)))))) (let ((.cse2 (select (select .cse1 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse4))) (select (let ((.cse0 (store .cse1 .cse2 v_ArrVal_902))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 (select (select (store (store (store |c_#memory_$Pointer$.offset| .cse3 v_ArrVal_896) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~mem7#1.base| v_ArrVal_898) .cse2 v_ArrVal_903) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)))))))) 1)) is different from false [2022-11-18 18:33:36,199 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 644 treesize of output 560 [2022-11-18 18:33:36,206 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:36,207 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 560 treesize of output 354 [2022-11-18 18:33:36,221 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 340 treesize of output 336 [2022-11-18 18:33:36,231 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 166 [2022-11-18 18:33:36,643 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse42 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse6 (select .cse42 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|)) (.cse5 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4))) (let ((.cse1 (select .cse42 .cse5)) (.cse30 (= .cse6 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (and (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse0 (+ 4 v_arrayElimCell_21))) (or (not (= (select v_arrayElimArr_1 .cse0) .cse1)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int) (v_arrayElimCell_22 Int)) (let ((.cse2 (let ((.cse3 (let ((.cse4 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (store .cse4 (select (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5) v_ArrVal_902)))) (select .cse3 (select (select .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse2 (+ 4 v_arrayElimCell_23))) 1) (= (select |c_#valid| (select .cse2 (+ 4 v_arrayElimCell_22))) 1) (= (select |c_#valid| (select .cse2 .cse0)) 1))))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse10 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (let ((.cse8 (+ 4 v_arrayElimCell_21)) (.cse11 (select (select .cse10 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int)) (let ((.cse7 (let ((.cse9 (store .cse10 .cse11 v_ArrVal_902))) (select .cse9 (select (select .cse9 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse7 (+ 4 v_arrayElimCell_23))) 1) (= (select |c_#valid| (select .cse7 .cse8)) 1)))) (not (= (select v_arrayElimArr_1 .cse8) .cse1)) (= .cse11 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))))) (forall ((v_arrayElimArr_1 (Array Int Int))) (let ((.cse14 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (let ((.cse12 (select (select .cse14 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (not (= .cse12 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (forall ((v_arrayElimCell_21 Int)) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) .cse1))) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (= (select |c_#valid| (select (let ((.cse13 (store .cse14 .cse12 v_ArrVal_902))) (select .cse13 (select (select .cse13 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 v_arrayElimCell_22))) 1)))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse18 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (let ((.cse15 (select (select .cse18 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (not (= .cse15 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) .cse1)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int) (v_arrayElimCell_22 Int)) (let ((.cse16 (let ((.cse17 (store .cse18 .cse15 v_ArrVal_902))) (select .cse17 (select (select .cse17 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse16 (+ 4 v_arrayElimCell_23))) 1) (= (select |c_#valid| (select .cse16 (+ 4 v_arrayElimCell_22))) 1)))))))) (or (and (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse19 (+ 4 v_arrayElimCell_21))) (or (not (= (select v_arrayElimArr_1 .cse19) .cse1)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (let ((.cse20 (let ((.cse21 (let ((.cse22 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (store .cse22 (select (select .cse22 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5) v_ArrVal_902)))) (select .cse21 (select (select .cse21 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse20 (+ 4 v_arrayElimCell_22))) 1) (= (select |c_#valid| (select .cse20 .cse19)) 1))))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse24 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (let ((.cse26 (+ 4 v_arrayElimCell_21)) (.cse25 (select (select .cse24 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (forall ((v_ArrVal_902 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse23 (store .cse24 .cse25 v_ArrVal_902))) (select .cse23 (select (select .cse23 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) .cse26)) 1)) (not (= (select v_arrayElimArr_1 .cse26) .cse1)) (= .cse25 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse29 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (let ((.cse27 (select (select .cse29 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (not (= .cse27 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) .cse1)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (= (select |c_#valid| (select (let ((.cse28 (store .cse29 .cse27 v_ArrVal_902))) (select .cse28 (select (select .cse28 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 v_arrayElimCell_22))) 1))))))) .cse30) (forall ((v_arrayElimArr_1 (Array Int Int))) (let ((.cse34 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (let ((.cse35 (select (select .cse34 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (forall ((v_arrayElimCell_21 Int)) (let ((.cse31 (+ 4 v_arrayElimCell_21))) (or (not (= (select v_arrayElimArr_1 .cse31) .cse1)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (let ((.cse32 (let ((.cse33 (store .cse34 .cse35 v_ArrVal_902))) (select .cse33 (select (select .cse33 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse32 (+ 4 v_arrayElimCell_22))) 1) (= (select |c_#valid| (select .cse32 .cse31)) 1))))))) (not (= .cse35 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)))))) (or (and (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse37 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (let ((.cse38 (select (select .cse37 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int)) (= (select |c_#valid| (select (let ((.cse36 (store .cse37 .cse38 v_ArrVal_902))) (select .cse36 (select (select .cse36 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 v_arrayElimCell_23))) 1)) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) .cse1)) (= .cse38 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (or (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) .cse1)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int)) (let ((.cse39 (let ((.cse40 (let ((.cse41 (store |c_#memory_$Pointer$.base| .cse6 v_arrayElimArr_1))) (store .cse41 (select (select .cse41 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5) v_ArrVal_902)))) (select .cse40 (select (select .cse40 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse39 (+ 4 v_arrayElimCell_23))) 1) (forall ((v_arrayElimCell_22 Int)) (= (select |c_#valid| (select .cse39 (+ 4 v_arrayElimCell_22))) 1)))))))) (not .cse30)))))) is different from false [2022-11-18 18:33:37,127 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse42 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|))) (let ((.cse5 (+ |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset| 4)) (.cse7 (select .cse42 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (let ((.cse21 (= .cse7 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (.cse6 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base| (store .cse42 .cse5 |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)))) (and (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse4 (store .cse6 .cse7 v_arrayElimArr_1))) (let ((.cse0 (select (select .cse4 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5)) (.cse2 (+ 4 v_arrayElimCell_21))) (or (= .cse0 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int)) (let ((.cse1 (let ((.cse3 (store .cse4 .cse0 v_ArrVal_902))) (select .cse3 (select (select .cse3 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse1 .cse2)) 1) (= (select |c_#valid| (select .cse1 (+ 4 v_arrayElimCell_23))) 1)))) (not (= (select v_arrayElimArr_1 .cse2) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)))))) (forall ((v_arrayElimArr_1 (Array Int Int))) (let ((.cse10 (store .cse6 .cse7 v_arrayElimArr_1))) (let ((.cse8 (select (select .cse10 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (not (= .cse8 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (forall ((v_arrayElimCell_21 Int)) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (= (select |c_#valid| (select (let ((.cse9 (store .cse10 .cse8 v_ArrVal_902))) (select .cse9 (select (select .cse9 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 v_arrayElimCell_22))) 1)))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse12 (+ 4 v_arrayElimCell_21))) (or (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int) (v_arrayElimCell_22 Int)) (let ((.cse11 (let ((.cse13 (let ((.cse14 (store .cse6 .cse7 v_arrayElimArr_1))) (store .cse14 (select (select .cse14 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5) v_ArrVal_902)))) (select .cse13 (select (select .cse13 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse11 (+ 4 v_arrayElimCell_22))) 1) (= (select |c_#valid| (select .cse11 .cse12)) 1) (= (select |c_#valid| (select .cse11 (+ 4 v_arrayElimCell_23))) 1)))) (not (= (select v_arrayElimArr_1 .cse12) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))))) (or (and (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (or (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int)) (let ((.cse15 (let ((.cse16 (let ((.cse17 (store .cse6 .cse7 v_arrayElimArr_1))) (store .cse17 (select (select .cse17 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5) v_ArrVal_902)))) (select .cse16 (select (select .cse16 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (forall ((v_arrayElimCell_22 Int)) (= (select |c_#valid| (select .cse15 (+ 4 v_arrayElimCell_22))) 1)) (= (select |c_#valid| (select .cse15 (+ 4 v_arrayElimCell_23))) 1)))) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse20 (store .cse6 .cse7 v_arrayElimArr_1))) (let ((.cse18 (select (select .cse20 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (= .cse18 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int)) (= (select |c_#valid| (select (let ((.cse19 (store .cse20 .cse18 v_ArrVal_902))) (select .cse19 (select (select .cse19 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 v_arrayElimCell_23))) 1)) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))))))) (not .cse21)) (or .cse21 (and (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse23 (+ 4 v_arrayElimCell_21))) (or (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (let ((.cse22 (let ((.cse24 (let ((.cse25 (store .cse6 .cse7 v_arrayElimArr_1))) (store .cse25 (select (select .cse25 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5) v_ArrVal_902)))) (select .cse24 (select (select .cse24 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse22 (+ 4 v_arrayElimCell_22))) 1) (= (select |c_#valid| (select .cse22 .cse23)) 1)))) (not (= (select v_arrayElimArr_1 .cse23) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse28 (store .cse6 .cse7 v_arrayElimArr_1))) (let ((.cse26 (select (select .cse28 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (not (= .cse26 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (= (select |c_#valid| (select (let ((.cse27 (store .cse28 .cse26 v_ArrVal_902))) (select .cse27 (select (select .cse27 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) (+ 4 v_arrayElimCell_22))) 1)) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse31 (store .cse6 .cse7 v_arrayElimArr_1))) (let ((.cse29 (select (select .cse31 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5)) (.cse32 (+ 4 v_arrayElimCell_21))) (or (= .cse29 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) (forall ((v_ArrVal_902 (Array Int Int))) (= (select |c_#valid| (select (let ((.cse30 (store .cse31 .cse29 v_ArrVal_902))) (select .cse30 (select (select .cse30 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))) .cse32)) 1)) (not (= (select v_arrayElimArr_1 .cse32) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)))))))) (forall ((v_arrayElimArr_1 (Array Int Int)) (v_arrayElimCell_21 Int)) (let ((.cse36 (store .cse6 .cse7 v_arrayElimArr_1))) (let ((.cse33 (select (select .cse36 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (not (= .cse33 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)) (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_23 Int) (v_arrayElimCell_22 Int)) (let ((.cse34 (let ((.cse35 (store .cse36 .cse33 v_ArrVal_902))) (select .cse35 (select (select .cse35 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse34 (+ 4 v_arrayElimCell_22))) 1) (= (select |c_#valid| (select .cse34 (+ 4 v_arrayElimCell_23))) 1)))) (not (= (select v_arrayElimArr_1 (+ 4 v_arrayElimCell_21)) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|)))))) (forall ((v_arrayElimArr_1 (Array Int Int))) (let ((.cse40 (store .cse6 .cse7 v_arrayElimArr_1))) (let ((.cse41 (select (select .cse40 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) .cse5))) (or (forall ((v_arrayElimCell_21 Int)) (let ((.cse38 (+ 4 v_arrayElimCell_21))) (or (forall ((v_ArrVal_902 (Array Int Int)) (v_arrayElimCell_22 Int)) (let ((.cse37 (let ((.cse39 (store .cse40 .cse41 v_ArrVal_902))) (select .cse39 (select (select .cse39 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|) |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.offset|))))) (or (= (select |c_#valid| (select .cse37 (+ 4 v_arrayElimCell_22))) 1) (= (select |c_#valid| (select .cse37 .cse38)) 1)))) (not (= (select v_arrayElimArr_1 .cse38) |c_ULTIMATE.start_create_sl_with_head_and_tail_#t~malloc6#1.base|))))) (not (= .cse41 |c_ULTIMATE.start_create_sl_with_head_and_tail_~sl~0#1.base|)))))))))) is different from false [2022-11-18 18:33:40,549 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 18:33:40,560 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:40,561 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 150 treesize of output 87 [2022-11-18 18:33:40,567 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:40,671 INFO L321 Elim1Store]: treesize reduction 15, result has 78.3 percent of original size [2022-11-18 18:33:40,671 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 347 treesize of output 374 [2022-11-18 18:33:40,737 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:40,738 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 365 treesize of output 265 [2022-11-18 18:33:40,767 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:40,768 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 216 treesize of output 200 [2022-11-18 18:33:42,111 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 18:33:42,121 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:42,122 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 241 treesize of output 127 [2022-11-18 18:33:42,128 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:33:42,451 INFO L321 Elim1Store]: treesize reduction 30, result has 83.6 percent of original size [2022-11-18 18:33:42,452 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 1381 treesize of output 1459 [2022-11-18 18:33:42,629 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:42,630 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 9 case distinctions, treesize of input 1427 treesize of output 969 [2022-11-18 18:33:42,711 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:42,712 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 867 treesize of output 795 [2022-11-18 18:33:48,399 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:48,399 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 150 treesize of output 87 [2022-11-18 18:33:48,403 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 18:33:48,452 INFO L321 Elim1Store]: treesize reduction 39, result has 38.1 percent of original size [2022-11-18 18:33:48,452 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 795 treesize of output 450 [2022-11-18 18:33:48,477 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 456 treesize of output 288 [2022-11-18 18:33:48,493 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:48,493 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 289 treesize of output 255 [2022-11-18 18:33:48,562 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:48,563 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 241 treesize of output 127 [2022-11-18 18:33:48,567 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 18:33:48,736 INFO L321 Elim1Store]: treesize reduction 104, result has 37.7 percent of original size [2022-11-18 18:33:48,736 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 6 select indices, 6 select index equivalence classes, 1 disjoint index pairs (out of 15 index pairs), introduced 7 new quantified variables, introduced 15 case distinctions, treesize of input 757 treesize of output 465 [2022-11-18 18:33:48,780 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:48,781 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 520 treesize of output 332 [2022-11-18 18:33:48,828 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:48,829 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 338 treesize of output 320 [2022-11-18 18:33:49,580 INFO L321 Elim1Store]: treesize reduction 22, result has 4.3 percent of original size [2022-11-18 18:33:49,580 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 151 treesize of output 1 [2022-11-18 18:33:49,597 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:49,597 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 271 treesize of output 140 [2022-11-18 18:33:49,990 INFO L321 Elim1Store]: treesize reduction 206, result has 37.8 percent of original size [2022-11-18 18:33:49,991 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 9 new quantified variables, introduced 28 case distinctions, treesize of input 7189 treesize of output 6161 [2022-11-18 18:33:50,383 INFO L321 Elim1Store]: treesize reduction 5, result has 93.7 percent of original size [2022-11-18 18:33:50,384 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 9 case distinctions, treesize of input 6115 treesize of output 4280 [2022-11-18 18:33:50,511 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:33:50,512 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 4171 treesize of output 3871 [2022-11-18 18:34:01,482 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:01,483 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 151 treesize of output 88 [2022-11-18 18:34:01,591 INFO L321 Elim1Store]: treesize reduction 62, result has 45.1 percent of original size [2022-11-18 18:34:01,591 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 10 case distinctions, treesize of input 2344 treesize of output 1672 [2022-11-18 18:34:01,745 INFO L321 Elim1Store]: treesize reduction 5, result has 88.9 percent of original size [2022-11-18 18:34:01,746 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 1876 treesize of output 1271 [2022-11-18 18:34:01,793 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:01,794 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1202 treesize of output 1104 [2022-11-18 18:34:02,025 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:02,026 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 271 treesize of output 140 [2022-11-18 18:34:02,395 INFO L321 Elim1Store]: treesize reduction 214, result has 35.3 percent of original size [2022-11-18 18:34:02,396 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 9 new quantified variables, introduced 28 case distinctions, treesize of input 11385 treesize of output 9169 [2022-11-18 18:34:02,839 INFO L321 Elim1Store]: treesize reduction 5, result has 88.9 percent of original size [2022-11-18 18:34:02,840 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 9530 treesize of output 7009 [2022-11-18 18:34:02,954 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:02,955 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 6942 treesize of output 6626 [2022-11-18 18:34:07,573 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:07,574 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 270 treesize of output 139 [2022-11-18 18:34:08,064 INFO L321 Elim1Store]: treesize reduction 127, result has 61.6 percent of original size [2022-11-18 18:34:08,065 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 9 new quantified variables, introduced 28 case distinctions, treesize of input 11794 treesize of output 9265 [2022-11-18 18:34:08,577 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:08,578 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 9319 treesize of output 6545 [2022-11-18 18:34:08,704 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:34:08,705 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 6427 treesize of output 5963 [2022-11-18 18:38:13,122 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:38:13,123 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 361 treesize of output 179 [2022-11-18 18:38:14,081 INFO L321 Elim1Store]: treesize reduction 306, result has 53.3 percent of original size [2022-11-18 18:38:14,082 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 11 select indices, 11 select index equivalence classes, 0 disjoint index pairs (out of 55 index pairs), introduced 12 new quantified variables, introduced 55 case distinctions, treesize of input 8386 treesize of output 6952 [2022-11-18 18:38:14,598 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:38:14,599 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 9 case distinctions, treesize of input 7208 treesize of output 5312 [2022-11-18 18:38:14,793 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:38:14,793 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 5142 treesize of output 4930 [2022-11-18 18:42:18,141 WARN L233 SmtUtils]: Spent 2.68m on a formula simplification. DAG size of input: 1006 DAG size of output: 41 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 18:42:18,145 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:42:18,146 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1879653804] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 18:42:18,146 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 18:42:18,146 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 21] total 57 [2022-11-18 18:42:18,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [970916240] [2022-11-18 18:42:18,147 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 18:42:18,147 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 58 states [2022-11-18 18:42:18,147 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 18:42:18,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2022-11-18 18:42:18,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=2166, Unknown=33, NotChecked=918, Total=3306 [2022-11-18 18:42:18,149 INFO L87 Difference]: Start difference. First operand 135 states and 159 transitions. Second operand has 58 states, 57 states have (on average 1.5087719298245614) internal successors, (86), 58 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:42:29,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 18:42:29,639 INFO L93 Difference]: Finished difference Result 137 states and 162 transitions. [2022-11-18 18:42:29,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-18 18:42:29,640 INFO L78 Accepts]: Start accepts. Automaton has has 58 states, 57 states have (on average 1.5087719298245614) internal successors, (86), 58 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-11-18 18:42:29,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 18:42:29,641 INFO L225 Difference]: With dead ends: 137 [2022-11-18 18:42:29,641 INFO L226 Difference]: Without dead ends: 137 [2022-11-18 18:42:29,642 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 25 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 9 IntricatePredicates, 0 DeprecatedPredicates, 753 ImplicationChecksByTransitivity, 179.6s TimeCoverageRelationStatistics Valid=426, Invalid=3735, Unknown=35, NotChecked=1206, Total=5402 [2022-11-18 18:42:29,643 INFO L413 NwaCegarLoop]: 65 mSDtfsCounter, 166 mSDsluCounter, 1694 mSDsCounter, 0 mSdLazyCounter, 958 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 1759 SdHoareTripleChecker+Invalid, 1728 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 958 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 741 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-18 18:42:29,643 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 1759 Invalid, 1728 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 958 Invalid, 0 Unknown, 741 Unchecked, 1.2s Time] [2022-11-18 18:42:29,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2022-11-18 18:42:29,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2022-11-18 18:42:29,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 115 states have (on average 1.4086956521739131) internal successors, (162), 136 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:42:29,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 162 transitions. [2022-11-18 18:42:29,647 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 162 transitions. Word has length 30 [2022-11-18 18:42:29,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 18:42:29,647 INFO L495 AbstractCegarLoop]: Abstraction has 137 states and 162 transitions. [2022-11-18 18:42:29,648 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 58 states, 57 states have (on average 1.5087719298245614) internal successors, (86), 58 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 18:42:29,648 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 162 transitions. [2022-11-18 18:42:29,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-18 18:42:29,648 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 18:42:29,648 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 18:42:29,660 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-18 18:42:29,849 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-11-18 18:42:29,849 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr25REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 62 more)] === [2022-11-18 18:42:29,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 18:42:29,850 INFO L85 PathProgramCache]: Analyzing trace with hash 570254422, now seen corresponding path program 1 times [2022-11-18 18:42:29,850 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 18:42:29,850 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552267361] [2022-11-18 18:42:29,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:42:29,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 18:42:29,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:42:32,008 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:42:32,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 18:42:32,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552267361] [2022-11-18 18:42:32,009 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552267361] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 18:42:32,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1149395227] [2022-11-18 18:42:32,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 18:42:32,010 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 18:42:32,010 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 18:42:32,012 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 18:42:32,038 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_17b04949-2cba-4a70-a1ac-26904217ef5d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 18:42:32,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 18:42:32,188 INFO L263 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 97 conjunts are in the unsatisfiable core [2022-11-18 18:42:32,194 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 18:42:32,220 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 18:42:32,220 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 18 [2022-11-18 18:42:32,316 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 18:42:32,395 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 18:42:32,418 INFO L321 Elim1Store]: treesize reduction 8, result has 61.9 percent of original size [2022-11-18 18:42:32,418 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 22 [2022-11-18 18:42:32,507 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:42:32,508 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 25 [2022-11-18 18:42:32,525 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 18:42:33,012 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 18:42:33,013 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 69 treesize of output 60 [2022-11-18 18:42:33,033 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 34 [2022-11-18 18:42:33,148 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:42:33,180 INFO L321 Elim1Store]: treesize reduction 70, result has 19.5 percent of original size [2022-11-18 18:42:33,181 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 95 treesize of output 68 [2022-11-18 18:42:33,188 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 18:42:33,189 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 87 [2022-11-18 18:42:33,659 INFO L321 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-11-18 18:42:33,660 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 122 treesize of output 107 [2022-11-18 18:42:33,706 INFO L321 Elim1Store]: treesize reduction 64, result has 19.0 percent of original size [2022-11-18 18:42:33,707 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 111 treesize of output 106 [2022-11-18 18:42:33,772 INFO L321 Elim1Store]: treesize reduction 36, result has 23.4 percent of original size [2022-11-18 18:42:33,773 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 132 treesize of output 117 [2022-11-18 18:42:33,815 INFO L321 Elim1Store]: treesize reduction 64, result has 19.0 percent of original size [2022-11-18 18:42:33,815 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 121 treesize of output 116 [2022-11-18 18:42:34,918 INFO L321 Elim1Store]: treesize reduction 34, result has 2.9 percent of original size [2022-11-18 18:42:34,919 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 136 treesize of output 59 [2022-11-18 18:42:34,930 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 22 [2022-11-18 18:42:35,103 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 18:42:35,104 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 18:42:39,176 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:39,176 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 273 treesize of output 231 [2022-11-18 18:42:39,186 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:39,187 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 197 treesize of output 140 [2022-11-18 18:42:39,221 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:39,221 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 448 treesize of output 391 [2022-11-18 18:42:39,232 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:39,233 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 357 treesize of output 225 [2022-11-18 18:42:39,777 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:39,778 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 252 treesize of output 222 [2022-11-18 18:42:39,928 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:39,929 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 10 case distinctions, treesize of input 2312 treesize of output 2456 [2022-11-18 18:42:40,043 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:40,044 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 2066 treesize of output 2080 [2022-11-18 18:42:40,235 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:42:40,235 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 9 case distinctions, treesize of input 2119 treesize of output 2167 [2022-11-18 18:43:50,870 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:43:50,870 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 397 treesize of output 357 [2022-11-18 18:43:51,000 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:43:51,001 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 10 case distinctions, treesize of input 7666 treesize of output 7544 [2022-11-18 18:43:51,137 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:43:51,137 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 6 case distinctions, treesize of input 7132 treesize of output 7070 [2022-11-18 18:43:51,283 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 18:43:51,284 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 6 new quantified variables, introduced 9 case distinctions, treesize of input 7073 treesize of output 7093