./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 8393723b Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 277634da297b7f9e262585608ed7ad62cca7d59b0122d4e61ee1b4b78256acae --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:07:15,900 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:07:15,903 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:07:15,952 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:07:15,953 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:07:15,959 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:07:15,961 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:07:15,966 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:07:15,968 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:07:15,972 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:07:15,974 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:07:15,977 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:07:15,977 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:07:15,983 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:07:15,985 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:07:15,987 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:07:15,989 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:07:15,990 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:07:15,992 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:07:16,000 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:07:16,003 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:07:16,005 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:07:16,008 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:07:16,009 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:07:16,020 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:07:16,020 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:07:16,021 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:07:16,023 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:07:16,024 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:07:16,025 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:07:16,025 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:07:16,027 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:07:16,029 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:07:16,031 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:07:16,032 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:07:16,033 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:07:16,034 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:07:16,034 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:07:16,035 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:07:16,036 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:07:16,037 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:07:16,038 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-18 20:07:16,090 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:07:16,090 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:07:16,091 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:07:16,091 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:07:16,092 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 20:07:16,092 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 20:07:16,092 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:07:16,092 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:07:16,093 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:07:16,093 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:07:16,093 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 20:07:16,093 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 20:07:16,094 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:07:16,094 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 20:07:16,094 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:07:16,094 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-18 20:07:16,094 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-18 20:07:16,095 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-18 20:07:16,095 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 20:07:16,095 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-18 20:07:16,095 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 20:07:16,096 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:07:16,096 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:07:16,096 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:07:16,096 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 20:07:16,097 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:07:16,097 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:07:16,097 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 20:07:16,097 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-18 20:07:16,098 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-18 20:07:16,098 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 277634da297b7f9e262585608ed7ad62cca7d59b0122d4e61ee1b4b78256acae [2022-11-18 20:07:16,446 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:07:16,491 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:07:16,496 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:07:16,498 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:07:16,499 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:07:16,500 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i [2022-11-18 20:07:16,578 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/67c7c9a53/858e04f4806c4e2faf34049e0341efb9/FLAG07dfca005 [2022-11-18 20:07:17,231 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:07:17,232 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i [2022-11-18 20:07:17,246 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/67c7c9a53/858e04f4806c4e2faf34049e0341efb9/FLAG07dfca005 [2022-11-18 20:07:17,518 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/67c7c9a53/858e04f4806c4e2faf34049e0341efb9 [2022-11-18 20:07:17,521 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:07:17,524 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:07:17,528 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:07:17,528 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:07:17,533 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:07:17,534 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:07:17" (1/1) ... [2022-11-18 20:07:17,536 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b2159d7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:17, skipping insertion in model container [2022-11-18 20:07:17,537 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:07:17" (1/1) ... [2022-11-18 20:07:17,546 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:07:17,615 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:07:18,103 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i[24165,24178] [2022-11-18 20:07:18,106 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:07:18,115 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:07:18,163 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i[24165,24178] [2022-11-18 20:07:18,164 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:07:18,193 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:07:18,194 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18 WrapperNode [2022-11-18 20:07:18,194 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:07:18,195 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:07:18,195 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:07:18,196 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:07:18,205 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,221 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,259 INFO L138 Inliner]: procedures = 127, calls = 32, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 115 [2022-11-18 20:07:18,259 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:07:18,260 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:07:18,260 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:07:18,260 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:07:18,275 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,275 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,291 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,292 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,299 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,318 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,320 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,321 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,324 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:07:18,325 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:07:18,326 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:07:18,326 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:07:18,339 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (1/1) ... [2022-11-18 20:07:18,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:07:18,367 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:07:18,381 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 20:07:18,386 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 20:07:18,433 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-18 20:07:18,433 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-18 20:07:18,433 INFO L130 BoogieDeclarations]: Found specification of procedure node_create [2022-11-18 20:07:18,434 INFO L138 BoogieDeclarations]: Found implementation of procedure node_create [2022-11-18 20:07:18,434 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 20:07:18,434 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:07:18,434 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:07:18,434 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-18 20:07:18,435 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-18 20:07:18,435 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:07:18,435 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-18 20:07:18,435 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-18 20:07:18,436 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:07:18,436 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:07:18,632 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:07:18,635 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:07:19,118 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:07:19,138 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:07:19,139 INFO L300 CfgBuilder]: Removed 3 assume(true) statements. [2022-11-18 20:07:19,142 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:07:19 BoogieIcfgContainer [2022-11-18 20:07:19,142 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:07:19,146 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 20:07:19,146 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 20:07:19,150 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 20:07:19,151 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 08:07:17" (1/3) ... [2022-11-18 20:07:19,152 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@cadf29f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:07:19, skipping insertion in model container [2022-11-18 20:07:19,152 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:07:18" (2/3) ... [2022-11-18 20:07:19,153 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@cadf29f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:07:19, skipping insertion in model container [2022-11-18 20:07:19,153 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:07:19" (3/3) ... [2022-11-18 20:07:19,155 INFO L112 eAbstractionObserver]: Analyzing ICFG sll2n_prepend_unequal.i [2022-11-18 20:07:19,178 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 20:07:19,178 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 31 error locations. [2022-11-18 20:07:19,255 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 20:07:19,268 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@b5a453, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 20:07:19,268 INFO L358 AbstractCegarLoop]: Starting to check reachability of 31 error locations. [2022-11-18 20:07:19,275 INFO L276 IsEmpty]: Start isEmpty. Operand has 81 states, 46 states have (on average 1.891304347826087) internal successors, (87), 77 states have internal predecessors, (87), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:19,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-18 20:07:19,283 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:19,283 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:19,285 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting node_createErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:19,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:19,293 INFO L85 PathProgramCache]: Analyzing trace with hash 1813443002, now seen corresponding path program 1 times [2022-11-18 20:07:19,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:19,304 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [743209948] [2022-11-18 20:07:19,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:19,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:19,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:19,751 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:19,752 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:19,752 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [743209948] [2022-11-18 20:07:19,753 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [743209948] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:19,753 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:19,754 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:07:19,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [386081283] [2022-11-18 20:07:19,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:19,763 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:07:19,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:19,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:07:19,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:07:19,810 INFO L87 Difference]: Start difference. First operand has 81 states, 46 states have (on average 1.891304347826087) internal successors, (87), 77 states have internal predecessors, (87), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:19,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:19,965 INFO L93 Difference]: Finished difference Result 79 states and 85 transitions. [2022-11-18 20:07:19,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:07:19,968 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-18 20:07:19,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:19,978 INFO L225 Difference]: With dead ends: 79 [2022-11-18 20:07:19,978 INFO L226 Difference]: Without dead ends: 76 [2022-11-18 20:07:19,981 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:07:19,987 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 8 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:19,989 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 127 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:07:20,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-11-18 20:07:20,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2022-11-18 20:07:20,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 44 states have (on average 1.75) internal successors, (77), 72 states have internal predecessors, (77), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:20,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2022-11-18 20:07:20,033 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 7 [2022-11-18 20:07:20,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:20,033 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2022-11-18 20:07:20,034 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:20,034 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-11-18 20:07:20,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-18 20:07:20,034 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:20,035 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:20,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-18 20:07:20,035 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting node_createErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:20,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:20,036 INFO L85 PathProgramCache]: Analyzing trace with hash 1813443001, now seen corresponding path program 1 times [2022-11-18 20:07:20,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:20,037 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337054818] [2022-11-18 20:07:20,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:20,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:20,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:20,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:20,115 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:20,116 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337054818] [2022-11-18 20:07:20,116 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [337054818] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:20,116 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:20,116 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:07:20,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1414792366] [2022-11-18 20:07:20,117 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:20,118 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:07:20,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:20,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:07:20,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:07:20,120 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:20,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:20,223 INFO L93 Difference]: Finished difference Result 74 states and 79 transitions. [2022-11-18 20:07:20,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:07:20,224 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-18 20:07:20,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:20,225 INFO L225 Difference]: With dead ends: 74 [2022-11-18 20:07:20,225 INFO L226 Difference]: Without dead ends: 74 [2022-11-18 20:07:20,226 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:07:20,227 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 4 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:20,228 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 118 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:07:20,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2022-11-18 20:07:20,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2022-11-18 20:07:20,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 44 states have (on average 1.7045454545454546) internal successors, (75), 70 states have internal predecessors, (75), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:20,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 79 transitions. [2022-11-18 20:07:20,237 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 79 transitions. Word has length 7 [2022-11-18 20:07:20,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:20,237 INFO L495 AbstractCegarLoop]: Abstraction has 74 states and 79 transitions. [2022-11-18 20:07:20,238 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:07:20,238 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 79 transitions. [2022-11-18 20:07:20,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-18 20:07:20,239 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:20,239 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:20,239 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-18 20:07:20,240 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:20,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:20,240 INFO L85 PathProgramCache]: Analyzing trace with hash 712803264, now seen corresponding path program 1 times [2022-11-18 20:07:20,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:20,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64596622] [2022-11-18 20:07:20,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:20,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:20,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:20,491 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:20,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:20,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:20,568 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:20,568 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64596622] [2022-11-18 20:07:20,569 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64596622] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:20,569 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:20,569 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 20:07:20,569 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523737388] [2022-11-18 20:07:20,570 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:20,570 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:07:20,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:20,571 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:07:20,571 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:07:20,572 INFO L87 Difference]: Start difference. First operand 74 states and 79 transitions. Second operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:07:20,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:20,847 INFO L93 Difference]: Finished difference Result 78 states and 86 transitions. [2022-11-18 20:07:20,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 20:07:20,849 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-11-18 20:07:20,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:20,856 INFO L225 Difference]: With dead ends: 78 [2022-11-18 20:07:20,856 INFO L226 Difference]: Without dead ends: 78 [2022-11-18 20:07:20,858 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:07:20,866 INFO L413 NwaCegarLoop]: 77 mSDtfsCounter, 11 mSDsluCounter, 204 mSDsCounter, 0 mSdLazyCounter, 212 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 214 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 212 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:20,868 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 281 Invalid, 214 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 212 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:07:20,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-11-18 20:07:20,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 73. [2022-11-18 20:07:20,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 44 states have (on average 1.6818181818181819) internal successors, (74), 69 states have internal predecessors, (74), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:20,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 78 transitions. [2022-11-18 20:07:20,881 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 78 transitions. Word has length 13 [2022-11-18 20:07:20,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:20,882 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 78 transitions. [2022-11-18 20:07:20,882 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:07:20,882 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 78 transitions. [2022-11-18 20:07:20,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-18 20:07:20,883 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:20,883 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:20,884 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-18 20:07:20,884 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:20,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:20,885 INFO L85 PathProgramCache]: Analyzing trace with hash 712803265, now seen corresponding path program 1 times [2022-11-18 20:07:20,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:20,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486192443] [2022-11-18 20:07:20,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:20,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:20,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:21,181 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:21,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:21,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:21,400 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:21,400 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486192443] [2022-11-18 20:07:21,401 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486192443] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:21,401 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:21,401 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 20:07:21,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208541105] [2022-11-18 20:07:21,402 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:21,402 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:07:21,403 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:21,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:07:21,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:07:21,406 INFO L87 Difference]: Start difference. First operand 73 states and 78 transitions. Second operand has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:07:21,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:21,683 INFO L93 Difference]: Finished difference Result 77 states and 85 transitions. [2022-11-18 20:07:21,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 20:07:21,683 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-11-18 20:07:21,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:21,685 INFO L225 Difference]: With dead ends: 77 [2022-11-18 20:07:21,685 INFO L226 Difference]: Without dead ends: 77 [2022-11-18 20:07:21,685 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:07:21,686 INFO L413 NwaCegarLoop]: 77 mSDtfsCounter, 9 mSDsluCounter, 220 mSDsCounter, 0 mSdLazyCounter, 191 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 297 SdHoareTripleChecker+Invalid, 192 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 191 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:21,687 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 297 Invalid, 192 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 191 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:07:21,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-11-18 20:07:21,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 72. [2022-11-18 20:07:21,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 44 states have (on average 1.6590909090909092) internal successors, (73), 68 states have internal predecessors, (73), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:21,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2022-11-18 20:07:21,695 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 13 [2022-11-18 20:07:21,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:21,696 INFO L495 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2022-11-18 20:07:21,696 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:07:21,696 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2022-11-18 20:07:21,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-18 20:07:21,697 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:21,697 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:21,698 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-18 20:07:21,698 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:21,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:21,699 INFO L85 PathProgramCache]: Analyzing trace with hash 150600896, now seen corresponding path program 1 times [2022-11-18 20:07:21,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:21,699 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766378764] [2022-11-18 20:07:21,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:21,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:21,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:21,774 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 5 [2022-11-18 20:07:21,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:21,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:21,791 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:21,792 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [766378764] [2022-11-18 20:07:21,792 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [766378764] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:21,792 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:21,792 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:07:21,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1753800268] [2022-11-18 20:07:21,793 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:21,793 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:07:21,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:21,794 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:07:21,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:07:21,795 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:07:21,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:21,895 INFO L93 Difference]: Finished difference Result 78 states and 84 transitions. [2022-11-18 20:07:21,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-18 20:07:21,896 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-11-18 20:07:21,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:21,897 INFO L225 Difference]: With dead ends: 78 [2022-11-18 20:07:21,898 INFO L226 Difference]: Without dead ends: 78 [2022-11-18 20:07:21,898 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:07:21,899 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 4 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 180 SdHoareTripleChecker+Invalid, 53 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:21,900 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 180 Invalid, 53 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:07:21,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-11-18 20:07:21,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 73. [2022-11-18 20:07:21,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 45 states have (on average 1.6444444444444444) internal successors, (74), 69 states have internal predecessors, (74), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:21,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 78 transitions. [2022-11-18 20:07:21,907 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 78 transitions. Word has length 15 [2022-11-18 20:07:21,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:21,908 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 78 transitions. [2022-11-18 20:07:21,908 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:07:21,908 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 78 transitions. [2022-11-18 20:07:21,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-18 20:07:21,909 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:21,909 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:21,910 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-18 20:07:21,910 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:21,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:21,911 INFO L85 PathProgramCache]: Analyzing trace with hash -513998014, now seen corresponding path program 1 times [2022-11-18 20:07:21,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:21,911 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [399581210] [2022-11-18 20:07:21,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:21,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:21,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:22,041 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:22,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:22,059 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 18 [2022-11-18 20:07:22,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:22,074 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-18 20:07:22,075 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:22,075 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [399581210] [2022-11-18 20:07:22,075 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [399581210] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:07:22,076 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [867490865] [2022-11-18 20:07:22,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:22,076 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:07:22,076 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:07:22,081 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:07:22,116 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-18 20:07:22,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:22,238 INFO L263 TraceCheckSpWp]: Trace formula consists of 241 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:07:22,244 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:07:22,311 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:07:22,311 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:07:22,364 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-18 20:07:22,365 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [867490865] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:07:22,365 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:07:22,365 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 6 [2022-11-18 20:07:22,365 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711367756] [2022-11-18 20:07:22,365 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:07:22,366 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:07:22,366 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:22,367 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:07:22,367 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:07:22,367 INFO L87 Difference]: Start difference. First operand 73 states and 78 transitions. Second operand has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 5 states have internal predecessors, (31), 3 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-11-18 20:07:22,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:22,475 INFO L93 Difference]: Finished difference Result 79 states and 85 transitions. [2022-11-18 20:07:22,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:07:22,476 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 5 states have internal predecessors, (31), 3 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 28 [2022-11-18 20:07:22,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:22,477 INFO L225 Difference]: With dead ends: 79 [2022-11-18 20:07:22,477 INFO L226 Difference]: Without dead ends: 79 [2022-11-18 20:07:22,477 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:07:22,478 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 8 mSDsluCounter, 175 mSDsCounter, 0 mSdLazyCounter, 57 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 250 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 57 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:22,483 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 250 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 57 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:07:22,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2022-11-18 20:07:22,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2022-11-18 20:07:22,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 50 states have (on average 1.58) internal successors, (79), 74 states have internal predecessors, (79), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:22,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 85 transitions. [2022-11-18 20:07:22,490 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 85 transitions. Word has length 28 [2022-11-18 20:07:22,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:22,490 INFO L495 AbstractCegarLoop]: Abstraction has 79 states and 85 transitions. [2022-11-18 20:07:22,491 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 5 states have internal predecessors, (31), 3 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-11-18 20:07:22,491 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 85 transitions. [2022-11-18 20:07:22,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-11-18 20:07:22,492 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:22,492 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:22,505 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:07:22,699 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:07:22,700 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:22,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:22,700 INFO L85 PathProgramCache]: Analyzing trace with hash -416014336, now seen corresponding path program 2 times [2022-11-18 20:07:22,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:22,701 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18604742] [2022-11-18 20:07:22,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:22,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:22,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:23,285 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:23,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:23,418 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:23,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:23,540 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:23,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:23,613 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-18 20:07:23,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:23,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [18604742] [2022-11-18 20:07:23,614 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [18604742] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:23,614 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:23,614 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 20:07:23,614 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [819732664] [2022-11-18 20:07:23,614 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:23,615 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:07:23,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:23,615 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:07:23,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:07:23,616 INFO L87 Difference]: Start difference. First operand 79 states and 85 transitions. Second operand has 7 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:23,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:23,836 INFO L93 Difference]: Finished difference Result 87 states and 94 transitions. [2022-11-18 20:07:23,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:07:23,837 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 41 [2022-11-18 20:07:23,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:23,838 INFO L225 Difference]: With dead ends: 87 [2022-11-18 20:07:23,838 INFO L226 Difference]: Without dead ends: 87 [2022-11-18 20:07:23,838 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:07:23,839 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 105 mSDsluCounter, 124 mSDsCounter, 0 mSdLazyCounter, 166 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 165 SdHoareTripleChecker+Invalid, 173 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 166 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:23,840 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 165 Invalid, 173 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 166 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:07:23,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-11-18 20:07:23,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 75. [2022-11-18 20:07:23,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 50 states have (on average 1.5) internal successors, (75), 70 states have internal predecessors, (75), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:23,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 81 transitions. [2022-11-18 20:07:23,847 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 81 transitions. Word has length 41 [2022-11-18 20:07:23,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:23,847 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 81 transitions. [2022-11-18 20:07:23,848 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:23,848 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 81 transitions. [2022-11-18 20:07:23,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-11-18 20:07:23,849 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:23,849 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:23,850 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-18 20:07:23,850 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:23,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:23,851 INFO L85 PathProgramCache]: Analyzing trace with hash -416014335, now seen corresponding path program 1 times [2022-11-18 20:07:23,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:23,851 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309720326] [2022-11-18 20:07:23,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:23,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:23,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:24,549 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:24,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:24,758 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:24,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:24,885 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:24,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:24,957 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-11-18 20:07:24,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:24,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309720326] [2022-11-18 20:07:24,958 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1309720326] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:07:24,958 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1745079399] [2022-11-18 20:07:24,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:24,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:07:24,959 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:07:24,960 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:07:24,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-18 20:07:25,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:25,159 INFO L263 TraceCheckSpWp]: Trace formula consists of 336 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-18 20:07:25,165 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:07:25,228 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:07:25,283 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:07:25,346 WARN L859 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (< |node_create_~temp~0#1.base| |c_#StackHeapBarrier|) (exists ((v_ArrVal_452 Int)) (= |c_#length| (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_452))))) is different from true [2022-11-18 20:07:25,438 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:07:25,440 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:07:25,505 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:07:25,521 WARN L859 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (< |node_create_~temp~0#1.base| |c_#StackHeapBarrier|) (exists ((v_ArrVal_453 Int)) (= (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_453) |c_#length|)))) is different from true [2022-11-18 20:07:25,600 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:07:25,602 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:07:25,679 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:07:25,691 WARN L859 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| Int)) (and (< |node_create_~temp~0#1.base| |c_#StackHeapBarrier|) (exists ((v_ArrVal_454 Int)) (= (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_454) |c_#length|)))) is different from true [2022-11-18 20:07:25,749 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:07:25,750 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:07:25,765 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 18 not checked. [2022-11-18 20:07:25,765 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:07:25,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1745079399] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:07:25,915 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:07:25,915 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 14 [2022-11-18 20:07:25,916 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672881732] [2022-11-18 20:07:25,916 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:07:25,916 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-11-18 20:07:25,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:25,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-11-18 20:07:25,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=145, Unknown=3, NotChecked=78, Total=272 [2022-11-18 20:07:25,917 INFO L87 Difference]: Start difference. First operand 75 states and 81 transitions. Second operand has 15 states, 13 states have (on average 3.6923076923076925) internal successors, (48), 13 states have internal predecessors, (48), 3 states have call successors, (4), 2 states have call predecessors, (4), 5 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-18 20:07:26,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:26,376 INFO L93 Difference]: Finished difference Result 83 states and 90 transitions. [2022-11-18 20:07:26,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 20:07:26,377 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 13 states have (on average 3.6923076923076925) internal successors, (48), 13 states have internal predecessors, (48), 3 states have call successors, (4), 2 states have call predecessors, (4), 5 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 41 [2022-11-18 20:07:26,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:26,378 INFO L225 Difference]: With dead ends: 83 [2022-11-18 20:07:26,378 INFO L226 Difference]: Without dead ends: 83 [2022-11-18 20:07:26,378 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 42 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=62, Invalid=187, Unknown=3, NotChecked=90, Total=342 [2022-11-18 20:07:26,379 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 131 mSDsluCounter, 162 mSDsCounter, 0 mSdLazyCounter, 263 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 195 SdHoareTripleChecker+Invalid, 500 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 263 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 228 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:26,379 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [131 Valid, 195 Invalid, 500 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 263 Invalid, 0 Unknown, 228 Unchecked, 0.4s Time] [2022-11-18 20:07:26,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-18 20:07:26,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 71. [2022-11-18 20:07:26,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 50 states have (on average 1.42) internal successors, (71), 66 states have internal predecessors, (71), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:26,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 77 transitions. [2022-11-18 20:07:26,385 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 77 transitions. Word has length 41 [2022-11-18 20:07:26,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:26,385 INFO L495 AbstractCegarLoop]: Abstraction has 71 states and 77 transitions. [2022-11-18 20:07:26,386 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 13 states have (on average 3.6923076923076925) internal successors, (48), 13 states have internal predecessors, (48), 3 states have call successors, (4), 2 states have call predecessors, (4), 5 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2022-11-18 20:07:26,386 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 77 transitions. [2022-11-18 20:07:26,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-11-18 20:07:26,387 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:26,387 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:26,397 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:07:26,593 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:07:26,593 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:26,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:26,594 INFO L85 PathProgramCache]: Analyzing trace with hash -11542527, now seen corresponding path program 1 times [2022-11-18 20:07:26,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:26,594 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284357100] [2022-11-18 20:07:26,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:26,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:26,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:26,823 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:26,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:26,832 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:26,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:26,840 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:26,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:26,931 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:07:26,932 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:26,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284357100] [2022-11-18 20:07:26,932 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [284357100] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:26,932 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:26,932 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 20:07:26,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849809754] [2022-11-18 20:07:26,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:26,933 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:07:26,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:26,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:07:26,934 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:07:26,935 INFO L87 Difference]: Start difference. First operand 71 states and 77 transitions. Second operand has 7 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:07:27,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:27,099 INFO L93 Difference]: Finished difference Result 70 states and 76 transitions. [2022-11-18 20:07:27,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 20:07:27,100 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 42 [2022-11-18 20:07:27,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:27,101 INFO L225 Difference]: With dead ends: 70 [2022-11-18 20:07:27,101 INFO L226 Difference]: Without dead ends: 70 [2022-11-18 20:07:27,101 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:07:27,102 INFO L413 NwaCegarLoop]: 46 mSDtfsCounter, 48 mSDsluCounter, 158 mSDsCounter, 0 mSdLazyCounter, 145 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 204 SdHoareTripleChecker+Invalid, 145 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 145 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:27,102 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 204 Invalid, 145 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 145 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:07:27,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-11-18 20:07:27,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2022-11-18 20:07:27,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 50 states have (on average 1.4) internal successors, (70), 65 states have internal predecessors, (70), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:27,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2022-11-18 20:07:27,107 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 42 [2022-11-18 20:07:27,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:27,107 INFO L495 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2022-11-18 20:07:27,107 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 4.166666666666667) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:07:27,108 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2022-11-18 20:07:27,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-11-18 20:07:27,108 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:27,109 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:27,109 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-18 20:07:27,110 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:27,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:27,110 INFO L85 PathProgramCache]: Analyzing trace with hash -11542528, now seen corresponding path program 1 times [2022-11-18 20:07:27,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:27,111 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420601829] [2022-11-18 20:07:27,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:27,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:27,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,225 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:27,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,234 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:27,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,244 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:27,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,289 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-11-18 20:07:27,289 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:27,290 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1420601829] [2022-11-18 20:07:27,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1420601829] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:27,290 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:27,290 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-18 20:07:27,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985391019] [2022-11-18 20:07:27,291 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:27,291 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-18 20:07:27,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:27,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-18 20:07:27,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:07:27,292 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand has 7 states, 6 states have (on average 3.8333333333333335) internal successors, (23), 5 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:07:27,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:27,456 INFO L93 Difference]: Finished difference Result 81 states and 88 transitions. [2022-11-18 20:07:27,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-18 20:07:27,457 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 3.8333333333333335) internal successors, (23), 5 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 42 [2022-11-18 20:07:27,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:27,458 INFO L225 Difference]: With dead ends: 81 [2022-11-18 20:07:27,458 INFO L226 Difference]: Without dead ends: 81 [2022-11-18 20:07:27,458 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-11-18 20:07:27,459 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 45 mSDsluCounter, 154 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 197 SdHoareTripleChecker+Invalid, 162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:27,459 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [45 Valid, 197 Invalid, 162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:07:27,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2022-11-18 20:07:27,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 69. [2022-11-18 20:07:27,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 50 states have (on average 1.38) internal successors, (69), 64 states have internal predecessors, (69), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:27,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 75 transitions. [2022-11-18 20:07:27,464 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 75 transitions. Word has length 42 [2022-11-18 20:07:27,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:27,464 INFO L495 AbstractCegarLoop]: Abstraction has 69 states and 75 transitions. [2022-11-18 20:07:27,464 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 3.8333333333333335) internal successors, (23), 5 states have internal predecessors, (23), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:07:27,465 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 75 transitions. [2022-11-18 20:07:27,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-11-18 20:07:27,466 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:27,467 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:27,483 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-11-18 20:07:27,484 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:27,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:27,484 INFO L85 PathProgramCache]: Analyzing trace with hash -2126344669, now seen corresponding path program 1 times [2022-11-18 20:07:27,484 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:27,484 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1149038583] [2022-11-18 20:07:27,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:27,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:27,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,836 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:27,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,846 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:27,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,859 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:27,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:27,907 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-11-18 20:07:27,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:27,908 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1149038583] [2022-11-18 20:07:27,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1149038583] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:27,908 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:27,908 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 20:07:27,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [350850485] [2022-11-18 20:07:27,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:27,909 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:07:27,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:27,910 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:07:27,910 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:07:27,911 INFO L87 Difference]: Start difference. First operand 69 states and 75 transitions. Second operand has 11 states, 9 states have (on average 3.2222222222222223) internal successors, (29), 9 states have internal predecessors, (29), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:28,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:28,178 INFO L93 Difference]: Finished difference Result 80 states and 86 transitions. [2022-11-18 20:07:28,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 20:07:28,178 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 3.2222222222222223) internal successors, (29), 9 states have internal predecessors, (29), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 48 [2022-11-18 20:07:28,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:28,179 INFO L225 Difference]: With dead ends: 80 [2022-11-18 20:07:28,179 INFO L226 Difference]: Without dead ends: 80 [2022-11-18 20:07:28,180 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-11-18 20:07:28,180 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 143 mSDsluCounter, 220 mSDsCounter, 0 mSdLazyCounter, 237 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 259 SdHoareTripleChecker+Invalid, 241 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 237 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:28,181 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [144 Valid, 259 Invalid, 241 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 237 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:07:28,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-11-18 20:07:28,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 66. [2022-11-18 20:07:28,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 50 states have (on average 1.32) internal successors, (66), 61 states have internal predecessors, (66), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:28,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 72 transitions. [2022-11-18 20:07:28,195 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 72 transitions. Word has length 48 [2022-11-18 20:07:28,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:28,196 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 72 transitions. [2022-11-18 20:07:28,196 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 3.2222222222222223) internal successors, (29), 9 states have internal predecessors, (29), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:28,196 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 72 transitions. [2022-11-18 20:07:28,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-11-18 20:07:28,209 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:28,210 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:28,210 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-11-18 20:07:28,210 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:28,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:28,211 INFO L85 PathProgramCache]: Analyzing trace with hash -2126344668, now seen corresponding path program 1 times [2022-11-18 20:07:28,211 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:28,212 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198819377] [2022-11-18 20:07:28,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:28,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:28,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:28,772 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:28,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:28,780 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:28,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:28,787 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:28,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:28,900 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:07:28,900 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:28,900 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198819377] [2022-11-18 20:07:28,901 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198819377] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:28,901 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:28,901 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 20:07:28,901 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401771225] [2022-11-18 20:07:28,901 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:28,902 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:07:28,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:28,903 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:07:28,903 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:07:28,904 INFO L87 Difference]: Start difference. First operand 66 states and 72 transitions. Second operand has 11 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:29,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:29,202 INFO L93 Difference]: Finished difference Result 66 states and 71 transitions. [2022-11-18 20:07:29,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 20:07:29,203 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 48 [2022-11-18 20:07:29,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:29,204 INFO L225 Difference]: With dead ends: 66 [2022-11-18 20:07:29,204 INFO L226 Difference]: Without dead ends: 66 [2022-11-18 20:07:29,205 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-11-18 20:07:29,205 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 83 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 202 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 263 SdHoareTripleChecker+Invalid, 203 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 202 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:29,206 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [84 Valid, 263 Invalid, 203 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 202 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:07:29,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-11-18 20:07:29,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 64. [2022-11-18 20:07:29,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 50 states have (on average 1.28) internal successors, (64), 59 states have internal predecessors, (64), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:29,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 70 transitions. [2022-11-18 20:07:29,212 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 70 transitions. Word has length 48 [2022-11-18 20:07:29,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:29,214 INFO L495 AbstractCegarLoop]: Abstraction has 64 states and 70 transitions. [2022-11-18 20:07:29,214 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 3.4444444444444446) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:29,215 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 70 transitions. [2022-11-18 20:07:29,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-11-18 20:07:29,217 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:29,217 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:29,217 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-18 20:07:29,218 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:29,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:29,218 INFO L85 PathProgramCache]: Analyzing trace with hash 987206626, now seen corresponding path program 1 times [2022-11-18 20:07:29,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:29,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543220983] [2022-11-18 20:07:29,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:29,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:29,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:30,037 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:30,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:30,049 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:30,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:30,071 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:30,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:30,279 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:07:30,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:30,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543220983] [2022-11-18 20:07:30,280 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [543220983] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:07:30,280 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:07:30,280 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2022-11-18 20:07:30,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1797363087] [2022-11-18 20:07:30,281 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:07:30,281 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-18 20:07:30,281 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:07:30,282 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-18 20:07:30,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=156, Unknown=0, NotChecked=0, Total=182 [2022-11-18 20:07:30,282 INFO L87 Difference]: Start difference. First operand 64 states and 70 transitions. Second operand has 14 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:30,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:07:30,786 INFO L93 Difference]: Finished difference Result 64 states and 69 transitions. [2022-11-18 20:07:30,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 20:07:30,787 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 50 [2022-11-18 20:07:30,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:07:30,788 INFO L225 Difference]: With dead ends: 64 [2022-11-18 20:07:30,788 INFO L226 Difference]: Without dead ends: 64 [2022-11-18 20:07:30,788 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2022-11-18 20:07:30,789 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 115 mSDsluCounter, 275 mSDsCounter, 0 mSdLazyCounter, 296 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 312 SdHoareTripleChecker+Invalid, 297 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 296 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:07:30,789 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [116 Valid, 312 Invalid, 297 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 296 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-18 20:07:30,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-11-18 20:07:30,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 64. [2022-11-18 20:07:30,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 50 states have (on average 1.26) internal successors, (63), 59 states have internal predecessors, (63), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:07:30,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 69 transitions. [2022-11-18 20:07:30,792 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 69 transitions. Word has length 50 [2022-11-18 20:07:30,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:07:30,799 INFO L495 AbstractCegarLoop]: Abstraction has 64 states and 69 transitions. [2022-11-18 20:07:30,800 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 12 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:07:30,800 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 69 transitions. [2022-11-18 20:07:30,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-11-18 20:07:30,804 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:07:30,804 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:07:30,804 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-18 20:07:30,805 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:07:30,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:07:30,805 INFO L85 PathProgramCache]: Analyzing trace with hash -2063364139, now seen corresponding path program 1 times [2022-11-18 20:07:30,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:07:30,806 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478703459] [2022-11-18 20:07:30,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:30,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:07:30,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:32,416 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:07:32,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:32,430 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:07:32,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:32,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:07:32,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:32,944 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 18 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-18 20:07:32,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:07:32,945 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478703459] [2022-11-18 20:07:32,945 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [478703459] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:07:32,945 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [24936778] [2022-11-18 20:07:32,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:07:32,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:07:32,945 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:07:32,947 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:07:32,955 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-18 20:07:33,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:07:33,198 INFO L263 TraceCheckSpWp]: Trace formula consists of 413 conjuncts, 69 conjunts are in the unsatisfiable core [2022-11-18 20:07:33,204 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:07:33,290 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:07:33,648 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2022-11-18 20:07:34,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:07:34,087 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:07:34,114 INFO L321 Elim1Store]: treesize reduction 30, result has 37.5 percent of original size [2022-11-18 20:07:34,114 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 29 [2022-11-18 20:07:34,419 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:07:34,421 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 [2022-11-18 20:07:34,582 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:07:34,589 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:07:34,590 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 33 [2022-11-18 20:07:34,707 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 37 [2022-11-18 20:07:35,001 INFO L321 Elim1Store]: treesize reduction 13, result has 7.1 percent of original size [2022-11-18 20:07:35,001 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 21 [2022-11-18 20:07:35,011 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 20 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:07:35,011 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:07:35,177 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 80 [2022-11-18 20:07:41,544 WARN L233 SmtUtils]: Spent 6.05s on a formula simplification. DAG size of input: 34 DAG size of output: 30 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:08:30,601 WARN L233 SmtUtils]: Spent 14.30s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:08:32,655 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse5 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|)) (.cse6 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (let ((.cse0 (forall ((v_arrayElimCell_17 Int) (|ULTIMATE.start_sll_prepend_~new_head~1#1.offset| Int)) (= (select |c_#valid| (select (let ((.cse7 (let ((.cse8 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store .cse5 (+ |ULTIMATE.start_sll_prepend_~new_head~1#1.offset| 4) .cse6)))) (store .cse8 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse8 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|))))) (select .cse7 (select (select .cse7 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ 4 v_arrayElimCell_17))) 1)))) (and (or (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) .cse0) (forall ((v_arrayElimCell_17 Int) (|ULTIMATE.start_sll_prepend_~new_head~1#1.offset| Int)) (let ((.cse2 (+ |ULTIMATE.start_sll_prepend_~new_head~1#1.offset| 4))) (let ((.cse1 (let ((.cse3 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store .cse5 .cse2 .cse6)))) (store .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|))))) (select .cse3 (select (select .cse3 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))))) (or (= (select |c_#valid| (select .cse1 (+ 4 v_arrayElimCell_17))) 1) (= (select |c_#valid| (select .cse1 .cse2)) 1))))) (or (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|) .cse0)))) is different from false [2022-11-18 20:08:34,701 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse5 (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (.cse6 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (let ((.cse0 (forall ((v_arrayElimCell_17 Int) (|ULTIMATE.start_sll_prepend_~new_head~1#1.offset| Int)) (= (select |c_#valid| (select (let ((.cse7 (let ((.cse8 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| (store .cse5 (+ |ULTIMATE.start_sll_prepend_~new_head~1#1.offset| 4) .cse6)))) (store .cse8 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse8 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|))))) (select .cse7 (select (select .cse7 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ 4 v_arrayElimCell_17))) 1)))) (and (or .cse0 (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|)) (or (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) .cse0) (forall ((v_arrayElimCell_17 Int) (|ULTIMATE.start_sll_prepend_~new_head~1#1.offset| Int)) (let ((.cse2 (+ |ULTIMATE.start_sll_prepend_~new_head~1#1.offset| 4))) (let ((.cse1 (let ((.cse3 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| (store .cse5 .cse2 .cse6)))) (store .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|))))) (select .cse3 (select (select .cse3 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))))) (or (= (select |c_#valid| (select .cse1 (+ 4 v_arrayElimCell_17))) 1) (= (select |c_#valid| (select .cse1 .cse2)) 1)))))))) is different from false [2022-11-18 20:08:35,419 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [24936778] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:35,419 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:08:35,419 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22] total 40 [2022-11-18 20:08:35,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069973897] [2022-11-18 20:08:35,420 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:08:35,420 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-11-18 20:08:35,420 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:08:35,421 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-11-18 20:08:35,422 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1927, Unknown=17, NotChecked=178, Total=2256 [2022-11-18 20:08:35,423 INFO L87 Difference]: Start difference. First operand 64 states and 69 transitions. Second operand has 41 states, 38 states have (on average 2.0526315789473686) internal successors, (78), 35 states have internal predecessors, (78), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:08:37,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:08:37,628 INFO L93 Difference]: Finished difference Result 84 states and 91 transitions. [2022-11-18 20:08:37,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 20:08:37,629 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 38 states have (on average 2.0526315789473686) internal successors, (78), 35 states have internal predecessors, (78), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 53 [2022-11-18 20:08:37,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:08:37,630 INFO L225 Difference]: With dead ends: 84 [2022-11-18 20:08:37,630 INFO L226 Difference]: Without dead ends: 84 [2022-11-18 20:08:37,632 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 629 ImplicationChecksByTransitivity, 63.2s TimeCoverageRelationStatistics Valid=245, Invalid=3168, Unknown=17, NotChecked=230, Total=3660 [2022-11-18 20:08:37,632 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 63 mSDsluCounter, 528 mSDsCounter, 0 mSdLazyCounter, 674 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 558 SdHoareTripleChecker+Invalid, 823 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 674 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 142 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-11-18 20:08:37,633 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 558 Invalid, 823 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 674 Invalid, 0 Unknown, 142 Unchecked, 0.8s Time] [2022-11-18 20:08:37,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-11-18 20:08:37,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 66. [2022-11-18 20:08:37,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 52 states have (on average 1.2884615384615385) internal successors, (67), 61 states have internal predecessors, (67), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:08:37,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 73 transitions. [2022-11-18 20:08:37,638 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 73 transitions. Word has length 53 [2022-11-18 20:08:37,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:08:37,638 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 73 transitions. [2022-11-18 20:08:37,639 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 38 states have (on average 2.0526315789473686) internal successors, (78), 35 states have internal predecessors, (78), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:08:37,639 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 73 transitions. [2022-11-18 20:08:37,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-11-18 20:08:37,646 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:08:37,647 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:08:37,660 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:08:37,855 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-11-18 20:08:37,855 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:08:37,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:37,856 INFO L85 PathProgramCache]: Analyzing trace with hash -2063364138, now seen corresponding path program 1 times [2022-11-18 20:08:37,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:37,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052240370] [2022-11-18 20:08:37,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:37,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:37,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:39,862 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:08:39,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:39,875 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:08:39,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:40,089 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:08:40,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:40,892 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 18 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-18 20:08:40,893 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:08:40,893 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052240370] [2022-11-18 20:08:40,893 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2052240370] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:40,893 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1242433578] [2022-11-18 20:08:40,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:40,894 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:08:40,894 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:08:40,895 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:08:40,913 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-18 20:08:41,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:41,153 INFO L263 TraceCheckSpWp]: Trace formula consists of 413 conjuncts, 110 conjunts are in the unsatisfiable core [2022-11-18 20:08:41,162 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:08:41,286 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:08:42,068 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2022-11-18 20:08:42,075 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:08:42,635 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:42,637 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2022-11-18 20:08:42,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:42,663 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 20 [2022-11-18 20:08:42,677 INFO L321 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2022-11-18 20:08:42,677 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2022-11-18 20:08:42,691 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2022-11-18 20:08:43,118 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,121 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2022-11-18 20:08:43,146 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,148 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 [2022-11-18 20:08:43,352 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,354 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 27 [2022-11-18 20:08:43,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,364 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 25 [2022-11-18 20:08:43,857 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:08:43,858 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,862 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:08:43,863 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 84 treesize of output 44 [2022-11-18 20:08:43,876 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:43,883 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-18 20:08:43,885 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 18 [2022-11-18 20:08:44,057 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 20 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:08:44,057 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:08:46,263 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1242433578] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:46,263 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:08:46,263 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23] total 44 [2022-11-18 20:08:46,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2107775847] [2022-11-18 20:08:46,264 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:08:46,265 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2022-11-18 20:08:46,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:08:46,265 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2022-11-18 20:08:46,267 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=2812, Unknown=0, NotChecked=0, Total=2970 [2022-11-18 20:08:46,267 INFO L87 Difference]: Start difference. First operand 66 states and 73 transitions. Second operand has 45 states, 42 states have (on average 1.9761904761904763) internal successors, (83), 39 states have internal predecessors, (83), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:08:50,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:08:50,043 INFO L93 Difference]: Finished difference Result 88 states and 95 transitions. [2022-11-18 20:08:50,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 20:08:50,044 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 42 states have (on average 1.9761904761904763) internal successors, (83), 39 states have internal predecessors, (83), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 53 [2022-11-18 20:08:50,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:08:50,045 INFO L225 Difference]: With dead ends: 88 [2022-11-18 20:08:50,046 INFO L226 Difference]: Without dead ends: 88 [2022-11-18 20:08:50,048 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 39 SyntacticMatches, 5 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1028 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=315, Invalid=4655, Unknown=0, NotChecked=0, Total=4970 [2022-11-18 20:08:50,049 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 83 mSDsluCounter, 752 mSDsCounter, 0 mSdLazyCounter, 957 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 83 SdHoareTripleChecker+Valid, 787 SdHoareTripleChecker+Invalid, 1047 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 957 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 81 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:08:50,049 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [83 Valid, 787 Invalid, 1047 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 957 Invalid, 0 Unknown, 81 Unchecked, 1.2s Time] [2022-11-18 20:08:50,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-11-18 20:08:50,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 68. [2022-11-18 20:08:50,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 54 states have (on average 1.2592592592592593) internal successors, (68), 63 states have internal predecessors, (68), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:08:50,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 74 transitions. [2022-11-18 20:08:50,054 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 74 transitions. Word has length 53 [2022-11-18 20:08:50,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:08:50,054 INFO L495 AbstractCegarLoop]: Abstraction has 68 states and 74 transitions. [2022-11-18 20:08:50,055 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 42 states have (on average 1.9761904761904763) internal successors, (83), 39 states have internal predecessors, (83), 4 states have call successors, (4), 3 states have call predecessors, (4), 5 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:08:50,055 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 74 transitions. [2022-11-18 20:08:50,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-18 20:08:50,056 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:08:50,056 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:08:50,069 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-11-18 20:08:50,263 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-11-18 20:08:50,263 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:08:50,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:50,264 INFO L85 PathProgramCache]: Analyzing trace with hash 460219817, now seen corresponding path program 1 times [2022-11-18 20:08:50,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:50,264 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371830215] [2022-11-18 20:08:50,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:50,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:50,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:51,349 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:08:51,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:51,361 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:08:51,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:51,479 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:08:51,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:51,836 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 18 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-18 20:08:51,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:08:51,837 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371830215] [2022-11-18 20:08:51,837 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1371830215] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:51,837 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [867295027] [2022-11-18 20:08:51,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:51,838 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:08:51,838 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:08:51,839 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:08:51,873 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-18 20:08:52,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:08:52,122 INFO L263 TraceCheckSpWp]: Trace formula consists of 417 conjuncts, 65 conjunts are in the unsatisfiable core [2022-11-18 20:08:52,138 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:08:52,758 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-11-18 20:08:53,162 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:53,163 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 24 [2022-11-18 20:08:53,513 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:53,515 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 26 [2022-11-18 20:08:53,687 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:53,693 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 29 [2022-11-18 20:08:53,704 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:08:53,928 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 47 [2022-11-18 20:08:54,634 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:08:54,761 INFO L321 Elim1Store]: treesize reduction 12, result has 88.1 percent of original size [2022-11-18 20:08:54,762 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 7 new quantified variables, introduced 10 case distinctions, treesize of input 85 treesize of output 137 [2022-11-18 20:08:55,717 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 20 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:08:55,718 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:08:56,172 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2022-11-18 20:08:57,711 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (forall ((|v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| Int) (|v_ULTIMATE.start_sll_prepend_~new_head~1#1.offset_11| Int) (|v_ULTIMATE.start_main_~ptr~0#1.offset_21| Int) (v_ArrVal_1571 (Array Int Int))) (or (not (= (select (let ((.cse3 (let ((.cse4 (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| (store v_ArrVal_1571 (+ |v_ULTIMATE.start_sll_prepend_~new_head~1#1.offset_11| 4) (select (select (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| v_ArrVal_1571) |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19|))))) (select .cse3 (select (select .cse3 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ |v_ULTIMATE.start_main_~ptr~0#1.offset_21| 4)) 0)) (not (< |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| |c_#StackHeapBarrier|)) (< 0 |v_ULTIMATE.start_sll_prepend_~new_head~1#1.offset_11|) (not (<= 0 |v_ULTIMATE.start_main_~ptr~0#1.offset_21|)))))) (and (or (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) .cse0) (or .cse0 (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|)) (forall ((|v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| Int)) (or (forall ((|v_ULTIMATE.start_sll_prepend_~new_head~1#1.offset_11| Int) (|v_ULTIMATE.start_main_~ptr~0#1.offset_21| Int) (v_ArrVal_1571 (Array Int Int))) (or (not (= (select (let ((.cse1 (let ((.cse2 (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| (store v_ArrVal_1571 (+ |v_ULTIMATE.start_sll_prepend_~new_head~1#1.offset_11| 4) (select (select (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| v_ArrVal_1571) |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse2 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse2 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19|))))) (select .cse1 (select (select .cse1 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (+ |v_ULTIMATE.start_main_~ptr~0#1.offset_21| 4)) 0)) (< |v_ULTIMATE.start_sll_prepend_~new_head~1#1.offset_11| |v_ULTIMATE.start_main_~ptr~0#1.offset_21|) (< 0 |v_ULTIMATE.start_sll_prepend_~new_head~1#1.offset_11|) (not (<= 0 |v_ULTIMATE.start_main_~ptr~0#1.offset_21|)))) (not (< |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_19| |c_#StackHeapBarrier|)))))) is different from false [2022-11-18 20:08:57,717 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [867295027] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:08:57,717 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:08:57,717 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 41 [2022-11-18 20:08:57,718 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039207348] [2022-11-18 20:08:57,718 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:08:57,718 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-11-18 20:08:57,718 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:08:57,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-11-18 20:08:57,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=2205, Unknown=2, NotChecked=94, Total=2450 [2022-11-18 20:08:57,722 INFO L87 Difference]: Start difference. First operand 68 states and 74 transitions. Second operand has 41 states, 39 states have (on average 2.0256410256410255) internal successors, (79), 35 states have internal predecessors, (79), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:08:59,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:08:59,516 INFO L93 Difference]: Finished difference Result 71 states and 76 transitions. [2022-11-18 20:08:59,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 20:08:59,517 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 39 states have (on average 2.0256410256410255) internal successors, (79), 35 states have internal predecessors, (79), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 54 [2022-11-18 20:08:59,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:08:59,518 INFO L225 Difference]: With dead ends: 71 [2022-11-18 20:08:59,518 INFO L226 Difference]: Without dead ends: 71 [2022-11-18 20:08:59,519 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 45 SyntacticMatches, 5 SemanticMatches, 61 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 758 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=259, Invalid=3525, Unknown=2, NotChecked=120, Total=3906 [2022-11-18 20:08:59,520 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 43 mSDsluCounter, 865 mSDsCounter, 0 mSdLazyCounter, 482 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 904 SdHoareTripleChecker+Invalid, 611 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 482 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 125 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-18 20:08:59,520 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 904 Invalid, 611 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 482 Invalid, 0 Unknown, 125 Unchecked, 0.5s Time] [2022-11-18 20:08:59,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2022-11-18 20:08:59,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 68. [2022-11-18 20:08:59,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 54 states have (on average 1.2407407407407407) internal successors, (67), 63 states have internal predecessors, (67), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:08:59,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 73 transitions. [2022-11-18 20:08:59,525 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 73 transitions. Word has length 54 [2022-11-18 20:08:59,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:08:59,525 INFO L495 AbstractCegarLoop]: Abstraction has 68 states and 73 transitions. [2022-11-18 20:08:59,526 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 39 states have (on average 2.0256410256410255) internal successors, (79), 35 states have internal predecessors, (79), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:08:59,526 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 73 transitions. [2022-11-18 20:08:59,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-11-18 20:08:59,527 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:08:59,527 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:08:59,543 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:08:59,733 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-11-18 20:08:59,734 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:08:59,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:08:59,734 INFO L85 PathProgramCache]: Analyzing trace with hash 913244988, now seen corresponding path program 1 times [2022-11-18 20:08:59,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:08:59,735 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047324602] [2022-11-18 20:08:59,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:08:59,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:08:59,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:09:01,804 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:09:01,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:09:01,822 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:09:01,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:09:02,158 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:09:02,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:09:03,055 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-18 20:09:03,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:09:03,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047324602] [2022-11-18 20:09:03,056 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2047324602] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:09:03,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [893122198] [2022-11-18 20:09:03,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:09:03,056 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:09:03,057 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:09:03,062 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:09:03,092 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-18 20:09:03,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:09:03,353 INFO L263 TraceCheckSpWp]: Trace formula consists of 432 conjuncts, 115 conjunts are in the unsatisfiable core [2022-11-18 20:09:03,369 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:09:03,532 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:09:03,606 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:09:03,927 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:03,930 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 20:09:04,441 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 18 [2022-11-18 20:09:04,447 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:09:04,454 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:09:04,460 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:09:05,134 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:05,135 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 20:09:05,158 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:05,159 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 34 [2022-11-18 20:09:05,191 INFO L321 Elim1Store]: treesize reduction 19, result has 47.2 percent of original size [2022-11-18 20:09:05,192 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 28 [2022-11-18 20:09:05,204 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:09:05,227 INFO L321 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2022-11-18 20:09:05,228 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2022-11-18 20:09:05,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:05,748 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2022-11-18 20:09:05,772 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:05,773 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 33 [2022-11-18 20:09:05,795 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-18 20:09:06,044 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:06,047 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 36 [2022-11-18 20:09:06,064 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:06,067 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 26 [2022-11-18 20:09:06,076 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:06,078 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2022-11-18 20:09:06,762 INFO L321 Elim1Store]: treesize reduction 17, result has 5.6 percent of original size [2022-11-18 20:09:06,763 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 123 treesize of output 54 [2022-11-18 20:09:06,772 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:09:06,773 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 12 [2022-11-18 20:09:07,028 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:09:07,031 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:09:07,032 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 10 [2022-11-18 20:09:07,132 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:09:07,133 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:10:11,802 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [893122198] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:11,802 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:10:11,802 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25] total 46 [2022-11-18 20:10:11,803 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587634248] [2022-11-18 20:10:11,803 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:10:11,803 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-11-18 20:10:11,803 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:10:11,804 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-11-18 20:10:11,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=2914, Unknown=23, NotChecked=0, Total=3080 [2022-11-18 20:10:11,805 INFO L87 Difference]: Start difference. First operand 68 states and 73 transitions. Second operand has 46 states, 44 states have (on average 2.0454545454545454) internal successors, (90), 40 states have internal predecessors, (90), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:10:16,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:10:16,643 INFO L93 Difference]: Finished difference Result 69 states and 74 transitions. [2022-11-18 20:10:16,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-18 20:10:16,643 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 44 states have (on average 2.0454545454545454) internal successors, (90), 40 states have internal predecessors, (90), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 57 [2022-11-18 20:10:16,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:10:16,644 INFO L225 Difference]: With dead ends: 69 [2022-11-18 20:10:16,644 INFO L226 Difference]: Without dead ends: 69 [2022-11-18 20:10:16,646 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 49 SyntacticMatches, 3 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 612 ImplicationChecksByTransitivity, 71.5s TimeCoverageRelationStatistics Valid=310, Invalid=5367, Unknown=23, NotChecked=0, Total=5700 [2022-11-18 20:10:16,647 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 42 mSDsluCounter, 1011 mSDsCounter, 0 mSdLazyCounter, 1050 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 1049 SdHoareTripleChecker+Invalid, 1174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1050 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 117 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:10:16,648 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 1049 Invalid, 1174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1050 Invalid, 0 Unknown, 117 Unchecked, 1.2s Time] [2022-11-18 20:10:16,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-11-18 20:10:16,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2022-11-18 20:10:16,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 55 states have (on average 1.2363636363636363) internal successors, (68), 64 states have internal predecessors, (68), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:10:16,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 74 transitions. [2022-11-18 20:10:16,651 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 74 transitions. Word has length 57 [2022-11-18 20:10:16,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:10:16,652 INFO L495 AbstractCegarLoop]: Abstraction has 69 states and 74 transitions. [2022-11-18 20:10:16,652 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 46 states, 44 states have (on average 2.0454545454545454) internal successors, (90), 40 states have internal predecessors, (90), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:10:16,652 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 74 transitions. [2022-11-18 20:10:16,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-18 20:10:16,653 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:10:16,653 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:10:16,661 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:10:16,860 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-11-18 20:10:16,861 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:10:16,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:10:16,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1754175976, now seen corresponding path program 1 times [2022-11-18 20:10:16,862 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:10:16,862 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335356952] [2022-11-18 20:10:16,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:16,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:10:16,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:19,796 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:10:19,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:20,056 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:10:20,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:20,460 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:10:20,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:21,472 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:10:21,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:10:21,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [335356952] [2022-11-18 20:10:21,473 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [335356952] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:21,474 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1655339225] [2022-11-18 20:10:21,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:21,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:21,475 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:10:21,476 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:10:21,497 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-18 20:10:21,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:21,757 INFO L263 TraceCheckSpWp]: Trace formula consists of 440 conjuncts, 132 conjunts are in the unsatisfiable core [2022-11-18 20:10:21,765 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:10:21,850 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:10:22,593 INFO L321 Elim1Store]: treesize reduction 20, result has 33.3 percent of original size [2022-11-18 20:10:22,597 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 16 [2022-11-18 20:10:22,871 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 20:10:23,425 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:10:23,426 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 23 [2022-11-18 20:10:23,431 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:10:23,437 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:10:24,108 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:24,125 INFO L321 Elim1Store]: treesize reduction 25, result has 16.7 percent of original size [2022-11-18 20:10:24,125 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 45 [2022-11-18 20:10:24,184 INFO L321 Elim1Store]: treesize reduction 76, result has 36.1 percent of original size [2022-11-18 20:10:24,184 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 36 treesize of output 52 [2022-11-18 20:10:24,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:24,211 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2022-11-18 20:10:24,837 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:24,839 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:24,852 INFO L321 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2022-11-18 20:10:24,853 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 85 treesize of output 54 [2022-11-18 20:10:24,891 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:24,893 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2022-11-18 20:10:25,235 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:25,236 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 23 [2022-11-18 20:10:25,245 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:25,252 INFO L321 Elim1Store]: treesize reduction 15, result has 6.3 percent of original size [2022-11-18 20:10:25,252 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 138 treesize of output 61 [2022-11-18 20:10:26,206 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:26,207 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 197 treesize of output 142 [2022-11-18 20:10:26,718 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:26,719 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:10:26,731 INFO L321 Elim1Store]: treesize reduction 39, result has 7.1 percent of original size [2022-11-18 20:10:26,731 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 6 new quantified variables, introduced 6 case distinctions, treesize of input 139 treesize of output 50 [2022-11-18 20:10:27,527 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 13 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:27,527 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:10:30,293 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1655339225] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:30,293 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:10:30,294 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 33] total 64 [2022-11-18 20:10:30,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1898641983] [2022-11-18 20:10:30,294 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:10:30,295 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 65 states [2022-11-18 20:10:30,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:10:30,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2022-11-18 20:10:30,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=5170, Unknown=0, NotChecked=0, Total=5402 [2022-11-18 20:10:30,298 INFO L87 Difference]: Start difference. First operand 69 states and 74 transitions. Second operand has 65 states, 62 states have (on average 1.596774193548387) internal successors, (99), 56 states have internal predecessors, (99), 6 states have call successors, (6), 4 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:10:38,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:10:38,807 INFO L93 Difference]: Finished difference Result 75 states and 83 transitions. [2022-11-18 20:10:38,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-11-18 20:10:38,808 INFO L78 Accepts]: Start accepts. Automaton has has 65 states, 62 states have (on average 1.596774193548387) internal successors, (99), 56 states have internal predecessors, (99), 6 states have call successors, (6), 4 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 58 [2022-11-18 20:10:38,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:10:38,809 INFO L225 Difference]: With dead ends: 75 [2022-11-18 20:10:38,809 INFO L226 Difference]: Without dead ends: 75 [2022-11-18 20:10:38,813 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 39 SyntacticMatches, 5 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1790 ImplicationChecksByTransitivity, 14.7s TimeCoverageRelationStatistics Valid=677, Invalid=8635, Unknown=0, NotChecked=0, Total=9312 [2022-11-18 20:10:38,814 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 139 mSDsluCounter, 1015 mSDsCounter, 0 mSdLazyCounter, 1607 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 1053 SdHoareTripleChecker+Invalid, 1785 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 1607 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 128 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:10:38,815 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [139 Valid, 1053 Invalid, 1785 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 1607 Invalid, 0 Unknown, 128 Unchecked, 2.3s Time] [2022-11-18 20:10:38,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-11-18 20:10:38,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 71. [2022-11-18 20:10:38,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 57 states have (on average 1.263157894736842) internal successors, (72), 66 states have internal predecessors, (72), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:10:38,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 78 transitions. [2022-11-18 20:10:38,819 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 78 transitions. Word has length 58 [2022-11-18 20:10:38,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:10:38,819 INFO L495 AbstractCegarLoop]: Abstraction has 71 states and 78 transitions. [2022-11-18 20:10:38,820 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 65 states, 62 states have (on average 1.596774193548387) internal successors, (99), 56 states have internal predecessors, (99), 6 states have call successors, (6), 4 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:10:38,820 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 78 transitions. [2022-11-18 20:10:38,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-18 20:10:38,821 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:10:38,821 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:10:38,834 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-18 20:10:39,034 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-11-18 20:10:39,035 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:10:39,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:10:39,035 INFO L85 PathProgramCache]: Analyzing trace with hash -1754175975, now seen corresponding path program 1 times [2022-11-18 20:10:39,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:10:39,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714684677] [2022-11-18 20:10:39,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:39,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:10:39,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:42,646 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:10:42,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:42,899 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:10:42,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:43,314 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:10:43,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:44,569 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:10:44,570 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:10:44,570 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [714684677] [2022-11-18 20:10:44,570 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [714684677] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:10:44,570 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [839920212] [2022-11-18 20:10:44,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:10:44,571 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:10:44,571 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:10:44,572 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:10:44,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-18 20:10:44,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:10:44,873 INFO L263 TraceCheckSpWp]: Trace formula consists of 440 conjuncts, 154 conjunts are in the unsatisfiable core [2022-11-18 20:10:44,879 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:10:46,046 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:10:46,046 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:10:46,081 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-18 20:10:46,081 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-18 20:10:46,390 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 20:10:46,405 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 20:10:47,243 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:10:47,243 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 70 treesize of output 33 [2022-11-18 20:10:47,252 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:10:47,260 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:47,261 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:10:48,126 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:48,147 INFO L321 Elim1Store]: treesize reduction 23, result has 17.9 percent of original size [2022-11-18 20:10:48,148 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 78 treesize of output 66 [2022-11-18 20:10:48,159 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:48,162 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:48,182 INFO L321 Elim1Store]: treesize reduction 19, result has 47.2 percent of original size [2022-11-18 20:10:48,183 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 38 [2022-11-18 20:10:48,226 INFO L321 Elim1Store]: treesize reduction 27, result has 48.1 percent of original size [2022-11-18 20:10:48,227 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 34 [2022-11-18 20:10:48,270 INFO L321 Elim1Store]: treesize reduction 8, result has 72.4 percent of original size [2022-11-18 20:10:48,271 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 28 treesize of output 30 [2022-11-18 20:10:48,999 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,001 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,003 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 34 [2022-11-18 20:10:49,017 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,019 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:10:49,021 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,033 INFO L321 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-11-18 20:10:49,033 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 87 treesize of output 56 [2022-11-18 20:10:49,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,364 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 35 [2022-11-18 20:10:49,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:49,380 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:10:49,381 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 84 treesize of output 53 [2022-11-18 20:10:51,292 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:10:51,293 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:51,343 INFO L321 Elim1Store]: treesize reduction 59, result has 15.7 percent of original size [2022-11-18 20:10:51,344 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 8 new quantified variables, introduced 10 case distinctions, treesize of input 161 treesize of output 78 [2022-11-18 20:10:51,356 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:51,358 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:10:51,375 INFO L321 Elim1Store]: treesize reduction 10, result has 41.2 percent of original size [2022-11-18 20:10:51,375 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 5 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 25 [2022-11-18 20:10:51,960 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 20 proven. 5 refuted. 6 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:10:51,960 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:11:02,067 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [839920212] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:11:02,067 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:11:02,068 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 69 [2022-11-18 20:11:02,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [720290933] [2022-11-18 20:11:02,068 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:11:02,069 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 70 states [2022-11-18 20:11:02,069 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:11:02,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2022-11-18 20:11:02,071 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=258, Invalid=6871, Unknown=11, NotChecked=0, Total=7140 [2022-11-18 20:11:02,071 INFO L87 Difference]: Start difference. First operand 71 states and 78 transitions. Second operand has 70 states, 67 states have (on average 1.537313432835821) internal successors, (103), 61 states have internal predecessors, (103), 6 states have call successors, (6), 4 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:11:11,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:11:11,207 INFO L93 Difference]: Finished difference Result 96 states and 103 transitions. [2022-11-18 20:11:11,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-11-18 20:11:11,208 INFO L78 Accepts]: Start accepts. Automaton has has 70 states, 67 states have (on average 1.537313432835821) internal successors, (103), 61 states have internal predecessors, (103), 6 states have call successors, (6), 4 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 58 [2022-11-18 20:11:11,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:11:11,209 INFO L225 Difference]: With dead ends: 96 [2022-11-18 20:11:11,209 INFO L226 Difference]: Without dead ends: 96 [2022-11-18 20:11:11,213 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2471 ImplicationChecksByTransitivity, 24.2s TimeCoverageRelationStatistics Valid=554, Invalid=12317, Unknown=11, NotChecked=0, Total=12882 [2022-11-18 20:11:11,214 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 170 mSDsluCounter, 1314 mSDsCounter, 0 mSdLazyCounter, 1416 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 170 SdHoareTripleChecker+Valid, 1352 SdHoareTripleChecker+Invalid, 1659 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 1416 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 227 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-18 20:11:11,214 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [170 Valid, 1352 Invalid, 1659 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 1416 Invalid, 0 Unknown, 227 Unchecked, 1.7s Time] [2022-11-18 20:11:11,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-18 20:11:11,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 73. [2022-11-18 20:11:11,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 59 states have (on average 1.2372881355932204) internal successors, (73), 68 states have internal predecessors, (73), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:11:11,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 79 transitions. [2022-11-18 20:11:11,219 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 79 transitions. Word has length 58 [2022-11-18 20:11:11,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:11:11,219 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 79 transitions. [2022-11-18 20:11:11,220 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 70 states, 67 states have (on average 1.537313432835821) internal successors, (103), 61 states have internal predecessors, (103), 6 states have call successors, (6), 4 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:11:11,220 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 79 transitions. [2022-11-18 20:11:11,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-11-18 20:11:11,221 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:11:11,221 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:11:11,229 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-18 20:11:11,425 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:11:11,425 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:11:11,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:11:11,426 INFO L85 PathProgramCache]: Analyzing trace with hash 1455118278, now seen corresponding path program 1 times [2022-11-18 20:11:11,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:11:11,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264917089] [2022-11-18 20:11:11,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:11:11,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:11:11,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:14,006 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:11:14,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:14,159 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:11:14,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:14,395 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:11:14,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:15,306 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:11:15,306 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:11:15,306 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264917089] [2022-11-18 20:11:15,306 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [264917089] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:11:15,306 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [452952181] [2022-11-18 20:11:15,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:11:15,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:11:15,307 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:11:15,310 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:11:15,339 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-18 20:11:15,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:15,662 INFO L263 TraceCheckSpWp]: Trace formula consists of 444 conjuncts, 111 conjunts are in the unsatisfiable core [2022-11-18 20:11:15,667 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:11:15,845 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:11:16,223 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 20:11:16,752 INFO L321 Elim1Store]: treesize reduction 17, result has 5.6 percent of original size [2022-11-18 20:11:16,753 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 16 [2022-11-18 20:11:16,758 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:11:17,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:17,418 INFO L321 Elim1Store]: treesize reduction 23, result has 17.9 percent of original size [2022-11-18 20:11:17,418 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 47 [2022-11-18 20:11:17,429 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:17,430 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 27 [2022-11-18 20:11:17,465 INFO L321 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2022-11-18 20:11:17,465 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2022-11-18 20:11:18,043 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:18,044 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 31 [2022-11-18 20:11:18,052 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:18,071 INFO L321 Elim1Store]: treesize reduction 57, result has 18.6 percent of original size [2022-11-18 20:11:18,071 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 53 treesize of output 46 [2022-11-18 20:11:18,308 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:18,309 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2022-11-18 20:11:18,318 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:18,340 INFO L321 Elim1Store]: treesize reduction 87, result has 14.7 percent of original size [2022-11-18 20:11:18,341 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 62 treesize of output 51 [2022-11-18 20:11:19,316 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:19,324 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-18 20:11:19,325 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 58 treesize of output 33 [2022-11-18 20:11:19,938 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:11:19,940 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:19,969 INFO L321 Elim1Store]: treesize reduction 81, result has 8.0 percent of original size [2022-11-18 20:11:19,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 8 new quantified variables, introduced 10 case distinctions, treesize of input 82 treesize of output 37 [2022-11-18 20:11:20,075 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 20:11:20,075 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:11:23,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [452952181] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:11:23,207 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:11:23,207 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 33] total 58 [2022-11-18 20:11:23,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55214736] [2022-11-18 20:11:23,208 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:11:23,209 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 58 states [2022-11-18 20:11:23,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:11:23,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2022-11-18 20:11:23,211 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=4501, Unknown=2, NotChecked=0, Total=4692 [2022-11-18 20:11:23,212 INFO L87 Difference]: Start difference. First operand 73 states and 79 transitions. Second operand has 58 states, 56 states have (on average 1.5892857142857142) internal successors, (89), 51 states have internal predecessors, (89), 4 states have call successors, (6), 3 states have call predecessors, (6), 5 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2022-11-18 20:11:27,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:11:27,890 INFO L93 Difference]: Finished difference Result 77 states and 83 transitions. [2022-11-18 20:11:27,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-11-18 20:11:27,891 INFO L78 Accepts]: Start accepts. Automaton has has 58 states, 56 states have (on average 1.5892857142857142) internal successors, (89), 51 states have internal predecessors, (89), 4 states have call successors, (6), 3 states have call predecessors, (6), 5 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) Word has length 59 [2022-11-18 20:11:27,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:11:27,892 INFO L225 Difference]: With dead ends: 77 [2022-11-18 20:11:27,892 INFO L226 Difference]: Without dead ends: 77 [2022-11-18 20:11:27,893 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 47 SyntacticMatches, 5 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1473 ImplicationChecksByTransitivity, 11.5s TimeCoverageRelationStatistics Valid=374, Invalid=7632, Unknown=4, NotChecked=0, Total=8010 [2022-11-18 20:11:27,894 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 63 mSDsluCounter, 1292 mSDsCounter, 0 mSdLazyCounter, 919 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 1335 SdHoareTripleChecker+Invalid, 1106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 919 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 177 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:11:27,894 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 1335 Invalid, 1106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 919 Invalid, 0 Unknown, 177 Unchecked, 1.0s Time] [2022-11-18 20:11:27,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-11-18 20:11:27,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 73. [2022-11-18 20:11:27,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 59 states have (on average 1.2203389830508475) internal successors, (72), 68 states have internal predecessors, (72), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:11:27,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 78 transitions. [2022-11-18 20:11:27,898 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 78 transitions. Word has length 59 [2022-11-18 20:11:27,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:11:27,899 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 78 transitions. [2022-11-18 20:11:27,899 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 58 states, 56 states have (on average 1.5892857142857142) internal successors, (89), 51 states have internal predecessors, (89), 4 states have call successors, (6), 3 states have call predecessors, (6), 5 states have return successors, (5), 5 states have call predecessors, (5), 4 states have call successors, (5) [2022-11-18 20:11:27,899 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 78 transitions. [2022-11-18 20:11:27,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-11-18 20:11:27,900 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:11:27,900 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:11:27,909 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-18 20:11:28,107 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:11:28,107 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:11:28,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:11:28,108 INFO L85 PathProgramCache]: Analyzing trace with hash 363986943, now seen corresponding path program 1 times [2022-11-18 20:11:28,108 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:11:28,108 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488106887] [2022-11-18 20:11:28,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:11:28,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:11:28,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:31,753 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:11:31,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:32,283 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:11:32,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:32,794 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:11:32,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:34,026 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:11:34,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:11:34,027 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488106887] [2022-11-18 20:11:34,027 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1488106887] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:11:34,027 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2087273385] [2022-11-18 20:11:34,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:11:34,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:11:34,028 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:11:34,029 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:11:34,033 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-18 20:11:34,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:11:34,358 INFO L263 TraceCheckSpWp]: Trace formula consists of 459 conjuncts, 177 conjunts are in the unsatisfiable core [2022-11-18 20:11:34,366 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:11:34,376 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:11:34,506 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:11:34,727 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:11:34,998 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-18 20:11:34,999 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-18 20:11:35,339 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:35,340 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 20:11:35,570 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:11:35,678 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:11:36,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:36,378 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-18 20:11:36,378 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 29 [2022-11-18 20:11:36,416 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 20:11:36,858 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:11:36,867 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-18 20:11:36,892 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:11:37,943 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:11:37,944 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 44 [2022-11-18 20:11:37,960 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:37,961 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 10 [2022-11-18 20:11:37,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:11:37,976 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:11:38,927 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:38,943 INFO L321 Elim1Store]: treesize reduction 23, result has 17.9 percent of original size [2022-11-18 20:11:38,944 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 101 treesize of output 81 [2022-11-18 20:11:38,968 INFO L321 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2022-11-18 20:11:38,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:11:38,999 INFO L321 Elim1Store]: treesize reduction 19, result has 47.2 percent of original size [2022-11-18 20:11:39,000 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 28 [2022-11-18 20:11:39,020 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:39,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:39,044 INFO L321 Elim1Store]: treesize reduction 8, result has 72.4 percent of original size [2022-11-18 20:11:39,044 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 33 [2022-11-18 20:11:39,063 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 24 [2022-11-18 20:11:39,936 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:39,938 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:39,957 INFO L321 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2022-11-18 20:11:39,957 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 110 treesize of output 67 [2022-11-18 20:11:39,967 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2022-11-18 20:11:40,003 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 26 [2022-11-18 20:11:40,402 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:40,414 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:11:40,415 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 135 treesize of output 70 [2022-11-18 20:11:40,432 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-11-18 20:11:40,441 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:11:40,442 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 28 [2022-11-18 20:11:42,349 INFO L321 Elim1Store]: treesize reduction 65, result has 11.0 percent of original size [2022-11-18 20:11:42,349 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 6 new quantified variables, introduced 6 case distinctions, treesize of input 276 treesize of output 84 [2022-11-18 20:11:42,368 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:11:42,368 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 15 [2022-11-18 20:11:42,375 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 12 [2022-11-18 20:11:43,264 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:11:43,413 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 3 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:11:43,413 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:11:52,234 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2087273385] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:11:52,235 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:11:52,235 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 38] total 72 [2022-11-18 20:11:52,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699432425] [2022-11-18 20:11:52,235 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:11:52,235 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 72 states [2022-11-18 20:11:52,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:11:52,236 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2022-11-18 20:11:52,237 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=221, Invalid=7047, Unknown=42, NotChecked=0, Total=7310 [2022-11-18 20:11:52,238 INFO L87 Difference]: Start difference. First operand 73 states and 78 transitions. Second operand has 72 states, 70 states have (on average 1.5714285714285714) internal successors, (110), 63 states have internal predecessors, (110), 6 states have call successors, (6), 3 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:12:01,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:01,553 INFO L93 Difference]: Finished difference Result 105 states and 114 transitions. [2022-11-18 20:12:01,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-11-18 20:12:01,553 INFO L78 Accepts]: Start accepts. Automaton has has 72 states, 70 states have (on average 1.5714285714285714) internal successors, (110), 63 states have internal predecessors, (110), 6 states have call successors, (6), 3 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 62 [2022-11-18 20:12:01,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:01,554 INFO L225 Difference]: With dead ends: 105 [2022-11-18 20:12:01,555 INFO L226 Difference]: Without dead ends: 105 [2022-11-18 20:12:01,556 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 41 SyntacticMatches, 3 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1584 ImplicationChecksByTransitivity, 24.9s TimeCoverageRelationStatistics Valid=404, Invalid=11323, Unknown=45, NotChecked=0, Total=11772 [2022-11-18 20:12:01,557 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 46 mSDsluCounter, 1510 mSDsCounter, 0 mSdLazyCounter, 1670 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 1551 SdHoareTripleChecker+Invalid, 2026 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 1670 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 334 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:01,557 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 1551 Invalid, 2026 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 1670 Invalid, 0 Unknown, 334 Unchecked, 2.0s Time] [2022-11-18 20:12:01,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2022-11-18 20:12:01,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 104. [2022-11-18 20:12:01,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 88 states have (on average 1.1590909090909092) internal successors, (102), 97 states have internal predecessors, (102), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:01,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 112 transitions. [2022-11-18 20:12:01,562 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 112 transitions. Word has length 62 [2022-11-18 20:12:01,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:01,562 INFO L495 AbstractCegarLoop]: Abstraction has 104 states and 112 transitions. [2022-11-18 20:12:01,563 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 72 states, 70 states have (on average 1.5714285714285714) internal successors, (110), 63 states have internal predecessors, (110), 6 states have call successors, (6), 3 states have call predecessors, (6), 6 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:12:01,563 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 112 transitions. [2022-11-18 20:12:01,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2022-11-18 20:12:01,564 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:01,564 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:01,572 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:01,772 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:12:01,772 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:01,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:01,772 INFO L85 PathProgramCache]: Analyzing trace with hash -1601306187, now seen corresponding path program 2 times [2022-11-18 20:12:01,773 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:01,773 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886142488] [2022-11-18 20:12:01,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:01,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:01,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:06,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:06,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:06,958 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:06,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:07,701 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:07,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:08,269 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 2 proven. 31 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-18 20:12:08,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:08,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886142488] [2022-11-18 20:12:08,270 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1886142488] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:12:08,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1430101260] [2022-11-18 20:12:08,270 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:12:08,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:12:08,270 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:08,271 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:12:08,274 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-18 20:12:08,640 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:12:08,640 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:12:08,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 467 conjuncts, 195 conjunts are in the unsatisfiable core [2022-11-18 20:12:08,654 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:08,676 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:12:08,810 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:12:09,029 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 20:12:09,165 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:09,166 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 20:12:09,334 INFO L321 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-18 20:12:09,334 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-18 20:12:09,705 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 20:12:09,722 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:12:09,723 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2022-11-18 20:12:10,104 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:12:10,948 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:12:10,948 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 22 [2022-11-18 20:12:10,965 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:12:10,991 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:12:10,991 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 22 [2022-11-18 20:12:11,001 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:12:11,058 INFO L321 Elim1Store]: treesize reduction 36, result has 34.5 percent of original size [2022-11-18 20:12:11,059 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 22 treesize of output 33 [2022-11-18 20:12:11,477 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 20:12:11,484 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2022-11-18 20:12:12,472 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:12:12,473 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 5 new quantified variables, introduced 3 case distinctions, treesize of input 100 treesize of output 46 [2022-11-18 20:12:12,483 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-18 20:12:12,491 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 10 [2022-11-18 20:12:13,078 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:13,116 INFO L321 Elim1Store]: treesize reduction 8, result has 72.4 percent of original size [2022-11-18 20:12:13,117 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 33 [2022-11-18 20:12:13,241 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse1 (select (select |c_#memory_$Pointer$.base| .cse0) 4))) (and (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| 0) (not (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| .cse0)) (not (= .cse1 .cse0)) (not (= .cse1 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset| 0) (= (select (select |c_#memory_$Pointer$.base| .cse1) 4) 0) (not (= .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|)) (<= (+ 2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|) (or (exists ((|v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| (Array Int (Array Int Int)))) (let ((.cse2 (@diff |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_#memory_$Pointer$.offset|))) (and (= .cse2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse0) 4) 0) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse1) 4) 0) (= |c_#memory_$Pointer$.offset| (store |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse2 (select |c_#memory_$Pointer$.offset| .cse2))) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0)))) (and (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse0) 4) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse1) 4) 0))) (not (= .cse1 |c_ULTIMATE.start_main_~#s~0#1.base|))))) is different from false [2022-11-18 20:12:13,245 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse1 (select (select |c_#memory_$Pointer$.base| .cse0) 4))) (and (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| 0) (not (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| .cse0)) (not (= .cse1 .cse0)) (not (= .cse1 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset| 0) (= (select (select |c_#memory_$Pointer$.base| .cse1) 4) 0) (not (= .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|)) (<= (+ 2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|) (or (exists ((|v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| (Array Int (Array Int Int)))) (let ((.cse2 (@diff |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_#memory_$Pointer$.offset|))) (and (= .cse2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse0) 4) 0) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse1) 4) 0) (= |c_#memory_$Pointer$.offset| (store |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse2 (select |c_#memory_$Pointer$.offset| .cse2))) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0)))) (and (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse0) 4) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse1) 4) 0))) (not (= .cse1 |c_ULTIMATE.start_main_~#s~0#1.base|))))) is different from true [2022-11-18 20:12:13,902 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:13,904 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:12:13,905 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:13,929 INFO L321 Elim1Store]: treesize reduction 40, result has 27.3 percent of original size [2022-11-18 20:12:13,929 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 5 new quantified variables, introduced 7 case distinctions, treesize of input 115 treesize of output 74 [2022-11-18 20:12:13,943 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:13,945 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2022-11-18 20:12:14,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:14,367 INFO L321 Elim1Store]: treesize reduction 24, result has 4.0 percent of original size [2022-11-18 20:12:14,368 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 6 new quantified variables, introduced 5 case distinctions, treesize of input 112 treesize of output 71 [2022-11-18 20:12:14,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:14,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:14,399 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 65 [2022-11-18 20:12:17,507 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:12:17,508 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:17,570 INFO L321 Elim1Store]: treesize reduction 176, result has 7.4 percent of original size [2022-11-18 20:12:17,570 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 7 select indices, 7 select index equivalence classes, 1 disjoint index pairs (out of 21 index pairs), introduced 13 new quantified variables, introduced 21 case distinctions, treesize of input 269 treesize of output 120 [2022-11-18 20:12:17,582 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:17,602 INFO L321 Elim1Store]: treesize reduction 15, result has 40.0 percent of original size [2022-11-18 20:12:17,602 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 7 select indices, 7 select index equivalence classes, 6 disjoint index pairs (out of 21 index pairs), introduced 9 new quantified variables, introduced 3 case distinctions, treesize of input 57 treesize of output 38 [2022-11-18 20:12:18,051 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 6 proven. 31 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-18 20:12:18,051 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:12:23,001 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1430101260] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:12:23,001 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:12:23,001 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 74 [2022-11-18 20:12:23,001 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [448983020] [2022-11-18 20:12:23,002 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:12:23,002 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 74 states [2022-11-18 20:12:23,002 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:23,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2022-11-18 20:12:23,004 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=7423, Unknown=6, NotChecked=172, Total=7832 [2022-11-18 20:12:23,004 INFO L87 Difference]: Start difference. First operand 104 states and 112 transitions. Second operand has 74 states, 72 states have (on average 1.4444444444444444) internal successors, (104), 65 states have internal predecessors, (104), 6 states have call successors, (6), 3 states have call predecessors, (6), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:12:27,582 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse1 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|)) (.cse2 (select (select |c_#memory_$Pointer$.base| .cse0) 4))) (and (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| 0) (not (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| .cse0)) (not (= .cse1 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (not (= .cse2 .cse0)) (not (= .cse2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset| 0) (let ((.cse4 (not (= |c_ULTIMATE.start_main_~data~0#1| |c_ULTIMATE.start_main_~uneq~0#1|))) (.cse3 (select (select |c_#memory_$Pointer$.base| .cse1) 4))) (or (and (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| .cse3) .cse4) (and (= (select (select |c_#memory_$Pointer$.offset| .cse3) 4) 0) (= (select (select |c_#memory_$Pointer$.base| .cse3) 4) 0) .cse4 (not (= |c_ULTIMATE.start_sll_prepend_~head#1.base| .cse3))))) (= (select (select |c_#memory_$Pointer$.base| .cse2) 4) 0) (not (= .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|)) (not (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (<= (+ 2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) |c_ULTIMATE.start_main_~#s~0#1.base|) (not (= |c_ULTIMATE.start_sll_prepend_~head#1.base| .cse1)) (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|) (= (select (select |c_#memory_$Pointer$.offset| .cse1) 4) 0) (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|) |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset|) (or (exists ((|v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| (Array Int (Array Int Int)))) (let ((.cse5 (@diff |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_#memory_$Pointer$.offset|))) (and (= .cse5 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse0) 4) 0) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse2) 4) 0) (= |c_#memory_$Pointer$.offset| (store |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse5 (select |c_#memory_$Pointer$.offset| .cse5))) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0)))) (and (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse0) 4) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse2) 4) 0))) (not (= .cse2 |c_ULTIMATE.start_main_~#s~0#1.base|))))) is different from false [2022-11-18 20:12:27,588 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse0 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse1 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|)) (.cse2 (select (select |c_#memory_$Pointer$.base| .cse0) 4))) (and (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_main_~#s~0#1.base|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| 0) (not (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| .cse0)) (not (= .cse1 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (not (= .cse2 .cse0)) (not (= .cse2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset| 0) (let ((.cse4 (not (= |c_ULTIMATE.start_main_~data~0#1| |c_ULTIMATE.start_main_~uneq~0#1|))) (.cse3 (select (select |c_#memory_$Pointer$.base| .cse1) 4))) (or (and (= |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| .cse3) .cse4) (and (= (select (select |c_#memory_$Pointer$.offset| .cse3) 4) 0) (= (select (select |c_#memory_$Pointer$.base| .cse3) 4) 0) .cse4 (not (= |c_ULTIMATE.start_sll_prepend_~head#1.base| .cse3))))) (= (select (select |c_#memory_$Pointer$.base| .cse2) 4) 0) (not (= .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|)) (not (= |c_ULTIMATE.start_sll_prepend_~head#1.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|)) (<= (+ 2 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) |c_ULTIMATE.start_main_~#s~0#1.base|) (not (= |c_ULTIMATE.start_sll_prepend_~head#1.base| .cse1)) (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_main_~#s~0#1.offset|) (= (select (select |c_#memory_$Pointer$.offset| .cse1) 4) 0) (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|) |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset|) (or (exists ((|v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| (Array Int (Array Int Int)))) (let ((.cse5 (@diff |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_#memory_$Pointer$.offset|))) (and (= .cse5 |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse0) 4) 0) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse2) 4) 0) (= |c_#memory_$Pointer$.offset| (store |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| .cse5 (select |c_#memory_$Pointer$.offset| .cse5))) (= (select (select |v_old(#memory_$Pointer$.offset)_AFTER_CALL_32| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0)))) (and (= (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse0) 4) 0) (= (select (select |c_#memory_$Pointer$.offset| .cse2) 4) 0))) (not (= .cse2 |c_ULTIMATE.start_main_~#s~0#1.base|))))) is different from true [2022-11-18 20:12:29,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:29,676 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2022-11-18 20:12:29,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-18 20:12:29,677 INFO L78 Accepts]: Start accepts. Automaton has has 74 states, 72 states have (on average 1.4444444444444444) internal successors, (104), 65 states have internal predecessors, (104), 6 states have call successors, (6), 3 states have call predecessors, (6), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Word has length 63 [2022-11-18 20:12:29,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:29,679 INFO L225 Difference]: With dead ends: 127 [2022-11-18 20:12:29,679 INFO L226 Difference]: Without dead ends: 127 [2022-11-18 20:12:29,680 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 41 SyntacticMatches, 5 SemanticMatches, 106 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 1753 ImplicationChecksByTransitivity, 19.2s TimeCoverageRelationStatistics Valid=374, Invalid=10755, Unknown=9, NotChecked=418, Total=11556 [2022-11-18 20:12:29,681 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 126 mSDsluCounter, 1320 mSDsCounter, 0 mSdLazyCounter, 1430 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 1362 SdHoareTripleChecker+Invalid, 1716 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 1430 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 267 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:29,681 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 1362 Invalid, 1716 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 1430 Invalid, 0 Unknown, 267 Unchecked, 1.8s Time] [2022-11-18 20:12:29,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2022-11-18 20:12:29,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 105. [2022-11-18 20:12:29,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 89 states have (on average 1.1573033707865168) internal successors, (103), 98 states have internal predecessors, (103), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:29,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 113 transitions. [2022-11-18 20:12:29,686 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 113 transitions. Word has length 63 [2022-11-18 20:12:29,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:29,687 INFO L495 AbstractCegarLoop]: Abstraction has 105 states and 113 transitions. [2022-11-18 20:12:29,687 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 74 states, 72 states have (on average 1.4444444444444444) internal successors, (104), 65 states have internal predecessors, (104), 6 states have call successors, (6), 3 states have call predecessors, (6), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2022-11-18 20:12:29,687 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 113 transitions. [2022-11-18 20:12:29,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-18 20:12:29,688 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:29,689 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:29,695 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:29,893 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-11-18 20:12:29,893 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:29,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:29,894 INFO L85 PathProgramCache]: Analyzing trace with hash 1899114441, now seen corresponding path program 2 times [2022-11-18 20:12:29,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:29,894 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42999944] [2022-11-18 20:12:29,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:29,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:29,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:30,122 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:30,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:30,141 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:30,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:30,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:30,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:30,175 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-11-18 20:12:30,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:30,175 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42999944] [2022-11-18 20:12:30,175 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [42999944] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:12:30,176 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [540011734] [2022-11-18 20:12:30,176 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:12:30,176 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:12:30,176 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:30,177 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:12:30,214 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-18 20:12:30,599 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:12:30,599 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:12:30,602 INFO L263 TraceCheckSpWp]: Trace formula consists of 471 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-18 20:12:30,603 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:30,824 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-18 20:12:30,824 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:12:31,037 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-18 20:12:31,038 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [540011734] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:12:31,038 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:12:31,038 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 11 [2022-11-18 20:12:31,038 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1091234366] [2022-11-18 20:12:31,038 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:12:31,039 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:12:31,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:31,040 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:12:31,040 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:12:31,040 INFO L87 Difference]: Start difference. First operand 105 states and 113 transitions. Second operand has 11 states, 11 states have (on average 5.636363636363637) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:12:31,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:31,168 INFO L93 Difference]: Finished difference Result 119 states and 128 transitions. [2022-11-18 20:12:31,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-18 20:12:31,169 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 5.636363636363637) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 64 [2022-11-18 20:12:31,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:31,170 INFO L225 Difference]: With dead ends: 119 [2022-11-18 20:12:31,170 INFO L226 Difference]: Without dead ends: 119 [2022-11-18 20:12:31,170 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 127 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:12:31,171 INFO L413 NwaCegarLoop]: 66 mSDtfsCounter, 81 mSDsluCounter, 312 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 81 SdHoareTripleChecker+Valid, 378 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:31,171 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [81 Valid, 378 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:12:31,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2022-11-18 20:12:31,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 108. [2022-11-18 20:12:31,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 92 states have (on average 1.173913043478261) internal successors, (108), 101 states have internal predecessors, (108), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:31,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 118 transitions. [2022-11-18 20:12:31,186 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 118 transitions. Word has length 64 [2022-11-18 20:12:31,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:31,186 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 118 transitions. [2022-11-18 20:12:31,187 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 5.636363636363637) internal successors, (62), 10 states have internal predecessors, (62), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:12:31,187 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 118 transitions. [2022-11-18 20:12:31,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2022-11-18 20:12:31,188 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:31,188 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:31,202 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:31,402 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-11-18 20:12:31,402 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:31,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:31,403 INFO L85 PathProgramCache]: Analyzing trace with hash -1084778802, now seen corresponding path program 1 times [2022-11-18 20:12:31,403 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:31,403 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737817469] [2022-11-18 20:12:31,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:31,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:31,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:31,734 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:31,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:31,741 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:31,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:31,748 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:31,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:31,789 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-18 20:12:31,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:31,790 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737817469] [2022-11-18 20:12:31,790 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737817469] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:12:31,790 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:12:31,790 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 20:12:31,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410483839] [2022-11-18 20:12:31,791 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:12:31,791 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:12:31,791 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:31,792 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:12:31,792 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:12:31,792 INFO L87 Difference]: Start difference. First operand 108 states and 118 transitions. Second operand has 11 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:32,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:32,078 INFO L93 Difference]: Finished difference Result 117 states and 128 transitions. [2022-11-18 20:12:32,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:12:32,078 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 67 [2022-11-18 20:12:32,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:32,080 INFO L225 Difference]: With dead ends: 117 [2022-11-18 20:12:32,080 INFO L226 Difference]: Without dead ends: 117 [2022-11-18 20:12:32,080 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-11-18 20:12:32,081 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 91 mSDsluCounter, 195 mSDsCounter, 0 mSdLazyCounter, 240 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 92 SdHoareTripleChecker+Valid, 230 SdHoareTripleChecker+Invalid, 244 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 240 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:32,081 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [92 Valid, 230 Invalid, 244 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 240 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:12:32,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-11-18 20:12:32,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 109. [2022-11-18 20:12:32,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 94 states have (on average 1.1808510638297873) internal successors, (111), 102 states have internal predecessors, (111), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:32,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 121 transitions. [2022-11-18 20:12:32,089 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 121 transitions. Word has length 67 [2022-11-18 20:12:32,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:32,098 INFO L495 AbstractCegarLoop]: Abstraction has 109 states and 121 transitions. [2022-11-18 20:12:32,098 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:32,098 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 121 transitions. [2022-11-18 20:12:32,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2022-11-18 20:12:32,099 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:32,099 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:32,099 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-11-18 20:12:32,100 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:32,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:32,100 INFO L85 PathProgramCache]: Analyzing trace with hash -1084778801, now seen corresponding path program 1 times [2022-11-18 20:12:32,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:32,100 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383947378] [2022-11-18 20:12:32,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:32,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:32,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:32,469 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:32,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:32,476 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:32,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:32,482 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:32,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:32,551 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-18 20:12:32,551 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:32,551 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383947378] [2022-11-18 20:12:32,551 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [383947378] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:12:32,552 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:12:32,552 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 20:12:32,552 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111155781] [2022-11-18 20:12:32,552 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:12:32,552 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:12:32,552 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:32,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:12:32,553 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:12:32,553 INFO L87 Difference]: Start difference. First operand 109 states and 121 transitions. Second operand has 11 states, 9 states have (on average 5.0) internal successors, (45), 9 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:32,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:32,924 INFO L93 Difference]: Finished difference Result 117 states and 127 transitions. [2022-11-18 20:12:32,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:12:32,925 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 5.0) internal successors, (45), 9 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 67 [2022-11-18 20:12:32,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:32,926 INFO L225 Difference]: With dead ends: 117 [2022-11-18 20:12:32,926 INFO L226 Difference]: Without dead ends: 117 [2022-11-18 20:12:32,927 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2022-11-18 20:12:32,927 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 103 mSDsluCounter, 188 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 104 SdHoareTripleChecker+Valid, 221 SdHoareTripleChecker+Invalid, 243 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:32,928 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [104 Valid, 221 Invalid, 243 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-18 20:12:32,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2022-11-18 20:12:32,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 111. [2022-11-18 20:12:32,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 96 states have (on average 1.1666666666666667) internal successors, (112), 104 states have internal predecessors, (112), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:32,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 122 transitions. [2022-11-18 20:12:32,933 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 122 transitions. Word has length 67 [2022-11-18 20:12:32,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:32,934 INFO L495 AbstractCegarLoop]: Abstraction has 111 states and 122 transitions. [2022-11-18 20:12:32,934 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 5.0) internal successors, (45), 9 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:32,934 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 122 transitions. [2022-11-18 20:12:32,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-11-18 20:12:32,935 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:32,935 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:32,935 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-11-18 20:12:32,936 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:32,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:32,936 INFO L85 PathProgramCache]: Analyzing trace with hash 731594071, now seen corresponding path program 1 times [2022-11-18 20:12:32,936 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:32,937 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031100622] [2022-11-18 20:12:32,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:32,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:32,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,188 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:33,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,195 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:33,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,203 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:33,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,243 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-18 20:12:33,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:33,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031100622] [2022-11-18 20:12:33,244 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031100622] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:12:33,244 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:12:33,244 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2022-11-18 20:12:33,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419298712] [2022-11-18 20:12:33,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:12:33,245 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:12:33,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:33,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:12:33,245 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:12:33,246 INFO L87 Difference]: Start difference. First operand 111 states and 122 transitions. Second operand has 11 states, 10 states have (on average 4.6) internal successors, (46), 9 states have internal predecessors, (46), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:33,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:33,499 INFO L93 Difference]: Finished difference Result 114 states and 124 transitions. [2022-11-18 20:12:33,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 20:12:33,500 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 4.6) internal successors, (46), 9 states have internal predecessors, (46), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 68 [2022-11-18 20:12:33,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:33,501 INFO L225 Difference]: With dead ends: 114 [2022-11-18 20:12:33,501 INFO L226 Difference]: Without dead ends: 114 [2022-11-18 20:12:33,501 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2022-11-18 20:12:33,502 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 98 mSDsluCounter, 248 mSDsCounter, 0 mSdLazyCounter, 175 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 288 SdHoareTripleChecker+Invalid, 175 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 175 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:33,502 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 288 Invalid, 175 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 175 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:12:33,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2022-11-18 20:12:33,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 111. [2022-11-18 20:12:33,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 96 states have (on average 1.15625) internal successors, (111), 104 states have internal predecessors, (111), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:33,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 121 transitions. [2022-11-18 20:12:33,516 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 121 transitions. Word has length 68 [2022-11-18 20:12:33,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:33,516 INFO L495 AbstractCegarLoop]: Abstraction has 111 states and 121 transitions. [2022-11-18 20:12:33,516 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 4.6) internal successors, (46), 9 states have internal predecessors, (46), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:33,517 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 121 transitions. [2022-11-18 20:12:33,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-11-18 20:12:33,517 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:33,518 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:33,518 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-11-18 20:12:33,518 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:33,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:33,519 INFO L85 PathProgramCache]: Analyzing trace with hash -1311285704, now seen corresponding path program 1 times [2022-11-18 20:12:33,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:33,519 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28621810] [2022-11-18 20:12:33,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:33,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:33,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,828 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:33,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,834 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:33,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,839 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:33,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:33,889 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-18 20:12:33,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:33,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28621810] [2022-11-18 20:12:33,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [28621810] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:12:33,890 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:12:33,890 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2022-11-18 20:12:33,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020805898] [2022-11-18 20:12:33,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:12:33,891 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-11-18 20:12:33,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:33,892 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-18 20:12:33,892 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-11-18 20:12:33,892 INFO L87 Difference]: Start difference. First operand 111 states and 121 transitions. Second operand has 11 states, 9 states have (on average 5.333333333333333) internal successors, (48), 9 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:34,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:34,162 INFO L93 Difference]: Finished difference Result 112 states and 122 transitions. [2022-11-18 20:12:34,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-18 20:12:34,163 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 9 states have (on average 5.333333333333333) internal successors, (48), 9 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 70 [2022-11-18 20:12:34,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:34,164 INFO L225 Difference]: With dead ends: 112 [2022-11-18 20:12:34,165 INFO L226 Difference]: Without dead ends: 112 [2022-11-18 20:12:34,165 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2022-11-18 20:12:34,166 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 87 mSDsluCounter, 229 mSDsCounter, 0 mSdLazyCounter, 193 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 269 SdHoareTripleChecker+Invalid, 194 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:34,166 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [88 Valid, 269 Invalid, 194 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 193 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:12:34,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2022-11-18 20:12:34,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2022-11-18 20:12:34,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 97 states have (on average 1.1546391752577319) internal successors, (112), 105 states have internal predecessors, (112), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:34,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 122 transitions. [2022-11-18 20:12:34,172 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 122 transitions. Word has length 70 [2022-11-18 20:12:34,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:34,172 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 122 transitions. [2022-11-18 20:12:34,172 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 9 states have (on average 5.333333333333333) internal successors, (48), 9 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:12:34,172 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 122 transitions. [2022-11-18 20:12:34,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-11-18 20:12:34,173 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:34,174 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:34,174 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-11-18 20:12:34,174 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:34,175 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:34,175 INFO L85 PathProgramCache]: Analyzing trace with hash -1784716013, now seen corresponding path program 1 times [2022-11-18 20:12:34,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:34,175 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422134742] [2022-11-18 20:12:34,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:34,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:34,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:35,439 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:35,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:35,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:35,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:35,524 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:35,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:35,961 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 6 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-18 20:12:35,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:35,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422134742] [2022-11-18 20:12:35,961 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [422134742] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:12:35,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [39246189] [2022-11-18 20:12:35,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:35,962 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:12:35,962 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:35,966 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:12:35,998 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-18 20:12:36,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:36,409 INFO L263 TraceCheckSpWp]: Trace formula consists of 513 conjuncts, 68 conjunts are in the unsatisfiable core [2022-11-18 20:12:36,413 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:36,607 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:12:36,927 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:12:37,654 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:12:37,655 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 21 [2022-11-18 20:12:37,828 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:12:37,828 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 41 [2022-11-18 20:12:38,196 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 46 [2022-11-18 20:12:38,800 INFO L321 Elim1Store]: treesize reduction 42, result has 82.6 percent of original size [2022-11-18 20:12:38,800 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 7 select indices, 7 select index equivalence classes, 0 disjoint index pairs (out of 21 index pairs), introduced 10 new quantified variables, introduced 21 case distinctions, treesize of input 106 treesize of output 251 [2022-11-18 20:12:39,356 INFO L321 Elim1Store]: treesize reduction 15, result has 25.0 percent of original size [2022-11-18 20:12:39,356 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:12:39,361 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 12 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-18 20:12:39,362 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:12:40,085 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:12:40,085 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 41 [2022-11-18 20:12:40,795 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:12:40,796 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 24 [2022-11-18 20:12:41,243 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 161 treesize of output 129 [2022-11-18 20:12:41,413 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:12:41,414 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 370 treesize of output 336 [2022-11-18 20:12:46,170 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:12:46,170 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 196 treesize of output 405 [2022-11-18 20:12:49,484 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 15 proven. 5 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-18 20:12:49,484 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [39246189] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:12:49,485 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:12:49,485 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 23, 23] total 64 [2022-11-18 20:12:49,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812280878] [2022-11-18 20:12:49,485 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:12:49,485 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 65 states [2022-11-18 20:12:49,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:12:49,486 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2022-11-18 20:12:49,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=3942, Unknown=0, NotChecked=0, Total=4160 [2022-11-18 20:12:49,487 INFO L87 Difference]: Start difference. First operand 112 states and 122 transitions. Second operand has 65 states, 61 states have (on average 2.360655737704918) internal successors, (144), 60 states have internal predecessors, (144), 6 states have call successors, (6), 2 states have call predecessors, (6), 4 states have return successors, (7), 7 states have call predecessors, (7), 6 states have call successors, (7) [2022-11-18 20:12:55,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:12:55,257 INFO L93 Difference]: Finished difference Result 123 states and 134 transitions. [2022-11-18 20:12:55,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-11-18 20:12:55,257 INFO L78 Accepts]: Start accepts. Automaton has has 65 states, 61 states have (on average 2.360655737704918) internal successors, (144), 60 states have internal predecessors, (144), 6 states have call successors, (6), 2 states have call predecessors, (6), 4 states have return successors, (7), 7 states have call predecessors, (7), 6 states have call successors, (7) Word has length 73 [2022-11-18 20:12:55,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:12:55,258 INFO L225 Difference]: With dead ends: 123 [2022-11-18 20:12:55,259 INFO L226 Difference]: Without dead ends: 123 [2022-11-18 20:12:55,260 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 106 SyntacticMatches, 6 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1582 ImplicationChecksByTransitivity, 9.7s TimeCoverageRelationStatistics Valid=714, Invalid=7658, Unknown=0, NotChecked=0, Total=8372 [2022-11-18 20:12:55,260 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 364 mSDsluCounter, 643 mSDsCounter, 0 mSdLazyCounter, 1741 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 364 SdHoareTripleChecker+Valid, 665 SdHoareTripleChecker+Invalid, 2093 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 1741 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 328 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-11-18 20:12:55,261 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [364 Valid, 665 Invalid, 2093 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 1741 Invalid, 0 Unknown, 328 Unchecked, 1.7s Time] [2022-11-18 20:12:55,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2022-11-18 20:12:55,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 115. [2022-11-18 20:12:55,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 100 states have (on average 1.17) internal successors, (117), 108 states have internal predecessors, (117), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:12:55,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 127 transitions. [2022-11-18 20:12:55,265 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 127 transitions. Word has length 73 [2022-11-18 20:12:55,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:12:55,266 INFO L495 AbstractCegarLoop]: Abstraction has 115 states and 127 transitions. [2022-11-18 20:12:55,266 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 65 states, 61 states have (on average 2.360655737704918) internal successors, (144), 60 states have internal predecessors, (144), 6 states have call successors, (6), 2 states have call predecessors, (6), 4 states have return successors, (7), 7 states have call predecessors, (7), 6 states have call successors, (7) [2022-11-18 20:12:55,266 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 127 transitions. [2022-11-18 20:12:55,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-11-18 20:12:55,267 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:12:55,267 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:12:55,281 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:12:55,474 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-11-18 20:12:55,474 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:12:55,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:12:55,474 INFO L85 PathProgramCache]: Analyzing trace with hash -1784716012, now seen corresponding path program 1 times [2022-11-18 20:12:55,475 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:12:55,475 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322866553] [2022-11-18 20:12:55,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:55,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:12:55,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:57,188 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:12:57,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:57,196 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:12:57,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:57,280 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:12:57,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:57,553 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 24 proven. 7 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-18 20:12:57,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:12:57,553 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [322866553] [2022-11-18 20:12:57,553 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [322866553] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:12:57,553 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [456084976] [2022-11-18 20:12:57,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:12:57,553 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:12:57,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:12:57,554 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:12:57,557 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-18 20:12:57,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:12:57,898 INFO L263 TraceCheckSpWp]: Trace formula consists of 513 conjuncts, 114 conjunts are in the unsatisfiable core [2022-11-18 20:12:57,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:12:58,464 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2022-11-18 20:12:58,469 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:12:59,012 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:59,013 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 20:12:59,034 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:59,034 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:12:59,041 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:59,042 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-18 20:12:59,055 INFO L321 Elim1Store]: treesize reduction 4, result has 66.7 percent of original size [2022-11-18 20:12:59,055 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2022-11-18 20:12:59,438 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:59,439 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2022-11-18 20:12:59,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:59,454 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2022-11-18 20:12:59,605 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:59,608 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 27 [2022-11-18 20:12:59,618 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:12:59,619 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-18 20:12:59,626 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:13:00,361 INFO L321 Elim1Store]: treesize reduction 15, result has 34.8 percent of original size [2022-11-18 20:13:00,362 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 76 treesize of output 45 [2022-11-18 20:13:00,374 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:13:00,374 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 15 [2022-11-18 20:13:00,632 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 26 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-11-18 20:13:00,633 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:13:01,405 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|)))) (let ((.cse0 (select (select .cse1 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (and (forall ((v_ArrVal_3832 (Array Int Int))) (<= 0 (+ (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_3832) .cse0) 4) 4))) (forall ((v_ArrVal_3832 (Array Int Int))) (<= (+ (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_3832) .cse0) 4) 8) (select |c_#length| (select (select .cse1 .cse0) 4))))))) is different from false [2022-11-18 20:13:01,440 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse3 (+ 4 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))) (let ((.cse2 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse3 |c_ULTIMATE.start_sll_prepend_#t~mem8#1.base|)))) (store .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|))))) (let ((.cse0 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse3 |c_ULTIMATE.start_sll_prepend_#t~mem8#1.offset|))) (.cse1 (select (select .cse2 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (and (forall ((v_ArrVal_3832 (Array Int Int))) (<= (+ (select (select (store .cse0 |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_3832) .cse1) 4) 8) (select |c_#length| (select (select .cse2 .cse1) 4)))) (forall ((v_ArrVal_3832 (Array Int Int))) (<= 0 (+ (select (select (store .cse0 |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_3832) .cse1) 4) 4))))))) is different from false [2022-11-18 20:13:01,869 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse3 (+ |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset| 4))) (let ((.cse2 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) .cse3 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|))))) (let ((.cse0 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) .cse3 (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse1 (select (select .cse2 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (and (forall ((v_ArrVal_3832 (Array Int Int))) (<= (+ (select (select (store .cse0 |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_3832) .cse1) 4) 8) (select |c_#length| (select (select .cse2 .cse1) 4)))) (forall ((v_ArrVal_3832 (Array Int Int))) (<= 0 (+ (select (select (store .cse0 |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_3832) .cse1) 4) 4))))))) is different from false [2022-11-18 20:13:02,777 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [456084976] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:02,777 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:13:02,777 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 26] total 52 [2022-11-18 20:13:02,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575461659] [2022-11-18 20:13:02,777 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:13:02,778 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 53 states [2022-11-18 20:13:02,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:02,778 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2022-11-18 20:13:02,779 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=3558, Unknown=34, NotChecked=366, Total=4160 [2022-11-18 20:13:02,779 INFO L87 Difference]: Start difference. First operand 115 states and 127 transitions. Second operand has 53 states, 50 states have (on average 2.22) internal successors, (111), 47 states have internal predecessors, (111), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:13:05,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:05,199 INFO L93 Difference]: Finished difference Result 123 states and 133 transitions. [2022-11-18 20:13:05,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-18 20:13:05,200 INFO L78 Accepts]: Start accepts. Automaton has has 53 states, 50 states have (on average 2.22) internal successors, (111), 47 states have internal predecessors, (111), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 73 [2022-11-18 20:13:05,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:13:05,201 INFO L225 Difference]: With dead ends: 123 [2022-11-18 20:13:05,201 INFO L226 Difference]: Without dead ends: 123 [2022-11-18 20:13:05,202 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 77 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 1413 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=347, Invalid=5331, Unknown=34, NotChecked=450, Total=6162 [2022-11-18 20:13:05,202 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 132 mSDsluCounter, 720 mSDsCounter, 0 mSdLazyCounter, 1015 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 132 SdHoareTripleChecker+Valid, 748 SdHoareTripleChecker+Invalid, 1265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 1015 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 239 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 20:13:05,203 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [132 Valid, 748 Invalid, 1265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 1015 Invalid, 0 Unknown, 239 Unchecked, 0.9s Time] [2022-11-18 20:13:05,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2022-11-18 20:13:05,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 117. [2022-11-18 20:13:05,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 102 states have (on average 1.1568627450980393) internal successors, (118), 110 states have internal predecessors, (118), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:13:05,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 128 transitions. [2022-11-18 20:13:05,207 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 128 transitions. Word has length 73 [2022-11-18 20:13:05,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:13:05,208 INFO L495 AbstractCegarLoop]: Abstraction has 117 states and 128 transitions. [2022-11-18 20:13:05,208 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 53 states, 50 states have (on average 2.22) internal successors, (111), 47 states have internal predecessors, (111), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:13:05,208 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 128 transitions. [2022-11-18 20:13:05,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-18 20:13:05,212 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:13:05,212 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:13:05,225 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2022-11-18 20:13:05,425 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:05,425 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:13:05,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:05,425 INFO L85 PathProgramCache]: Analyzing trace with hash 508377010, now seen corresponding path program 1 times [2022-11-18 20:13:05,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:05,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543075708] [2022-11-18 20:13:05,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:05,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:05,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:06,380 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:13:06,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:06,388 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:13:06,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:06,451 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:13:06,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:06,708 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 18 proven. 7 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-18 20:13:06,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:06,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543075708] [2022-11-18 20:13:06,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1543075708] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:06,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1424481046] [2022-11-18 20:13:06,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:06,709 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:06,709 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:06,711 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:06,726 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-18 20:13:07,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:07,084 INFO L263 TraceCheckSpWp]: Trace formula consists of 521 conjuncts, 75 conjunts are in the unsatisfiable core [2022-11-18 20:13:07,087 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:07,492 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-11-18 20:13:07,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:07,760 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 12 [2022-11-18 20:13:08,028 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:08,033 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 19 [2022-11-18 20:13:08,135 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:08,136 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2022-11-18 20:13:08,674 INFO L321 Elim1Store]: treesize reduction 15, result has 34.8 percent of original size [2022-11-18 20:13:08,674 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 35 treesize of output 24 [2022-11-18 20:13:08,807 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 20 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-11-18 20:13:08,807 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:13:09,480 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_50| Int) (v_ArrVal_4037 (Array Int Int))) (or (not (< |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_50| |c_#StackHeapBarrier|)) (not (= (select (let ((.cse0 (let ((.cse1 (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_50| (store v_ArrVal_4037 4 (select (select (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_50| v_ArrVal_4037) |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse1 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse1 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_50|))))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) 4) 0)))) is different from false [2022-11-18 20:13:09,482 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1424481046] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:09,482 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:13:09,482 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 44 [2022-11-18 20:13:09,483 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2036043827] [2022-11-18 20:13:09,483 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:13:09,483 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2022-11-18 20:13:09,484 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:09,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-11-18 20:13:09,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=2399, Unknown=1, NotChecked=98, Total=2652 [2022-11-18 20:13:09,485 INFO L87 Difference]: Start difference. First operand 117 states and 128 transitions. Second operand has 44 states, 42 states have (on average 2.5) internal successors, (105), 38 states have internal predecessors, (105), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:13:11,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:11,688 INFO L93 Difference]: Finished difference Result 120 states and 130 transitions. [2022-11-18 20:13:11,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-11-18 20:13:11,689 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 42 states have (on average 2.5) internal successors, (105), 38 states have internal predecessors, (105), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 74 [2022-11-18 20:13:11,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:13:11,690 INFO L225 Difference]: With dead ends: 120 [2022-11-18 20:13:11,690 INFO L226 Difference]: Without dead ends: 120 [2022-11-18 20:13:11,691 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 87 SyntacticMatches, 3 SemanticMatches, 69 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 921 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=415, Invalid=4418, Unknown=1, NotChecked=136, Total=4970 [2022-11-18 20:13:11,692 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 224 mSDsluCounter, 818 mSDsCounter, 0 mSdLazyCounter, 906 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 224 SdHoareTripleChecker+Valid, 854 SdHoareTripleChecker+Invalid, 1008 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 906 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 82 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-18 20:13:11,692 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [224 Valid, 854 Invalid, 1008 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 906 Invalid, 0 Unknown, 82 Unchecked, 0.9s Time] [2022-11-18 20:13:11,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-11-18 20:13:11,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 117. [2022-11-18 20:13:11,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117 states, 102 states have (on average 1.1470588235294117) internal successors, (117), 110 states have internal predecessors, (117), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2022-11-18 20:13:11,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 127 transitions. [2022-11-18 20:13:11,697 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 127 transitions. Word has length 74 [2022-11-18 20:13:11,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:13:11,698 INFO L495 AbstractCegarLoop]: Abstraction has 117 states and 127 transitions. [2022-11-18 20:13:11,698 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 44 states, 42 states have (on average 2.5) internal successors, (105), 38 states have internal predecessors, (105), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:13:11,698 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 127 transitions. [2022-11-18 20:13:11,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-18 20:13:11,699 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:13:11,699 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:13:11,711 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-11-18 20:13:11,907 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:11,907 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:13:11,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:11,908 INFO L85 PathProgramCache]: Analyzing trace with hash -274698947, now seen corresponding path program 2 times [2022-11-18 20:13:11,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:11,908 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996618711] [2022-11-18 20:13:11,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:11,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:11,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:12,039 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:13:12,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:12,047 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:13:12,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:12,061 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-11-18 20:13:12,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:12,070 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-11-18 20:13:12,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:12,078 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 14 proven. 7 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-18 20:13:12,078 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:12,078 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996618711] [2022-11-18 20:13:12,078 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1996618711] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:12,078 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [179422548] [2022-11-18 20:13:12,078 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:13:12,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:12,079 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:12,079 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:12,082 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-18 20:13:12,482 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:13:12,482 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:13:12,485 INFO L263 TraceCheckSpWp]: Trace formula consists of 554 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:13:12,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:12,518 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 49 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-11-18 20:13:12,518 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:13:12,518 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [179422548] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:13:12,519 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-18 20:13:12,519 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6] total 7 [2022-11-18 20:13:12,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [97220104] [2022-11-18 20:13:12,519 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:13:12,519 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:13:12,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:12,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:13:12,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:13:12,520 INFO L87 Difference]: Start difference. First operand 117 states and 127 transitions. Second operand has 5 states, 5 states have (on average 10.2) internal successors, (51), 5 states have internal predecessors, (51), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-11-18 20:13:12,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:12,548 INFO L93 Difference]: Finished difference Result 74 states and 76 transitions. [2022-11-18 20:13:12,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:13:12,548 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.2) internal successors, (51), 5 states have internal predecessors, (51), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 75 [2022-11-18 20:13:12,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:13:12,549 INFO L225 Difference]: With dead ends: 74 [2022-11-18 20:13:12,549 INFO L226 Difference]: Without dead ends: 74 [2022-11-18 20:13:12,550 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:13:12,551 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 37 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:13:12,552 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [38 Valid, 95 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:13:12,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2022-11-18 20:13:12,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2022-11-18 20:13:12,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 65 states have (on average 1.0769230769230769) internal successors, (70), 69 states have internal predecessors, (70), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:13:12,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 76 transitions. [2022-11-18 20:13:12,558 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 76 transitions. Word has length 75 [2022-11-18 20:13:12,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:13:12,558 INFO L495 AbstractCegarLoop]: Abstraction has 74 states and 76 transitions. [2022-11-18 20:13:12,558 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.2) internal successors, (51), 5 states have internal predecessors, (51), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-11-18 20:13:12,558 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 76 transitions. [2022-11-18 20:13:12,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-11-18 20:13:12,561 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:13:12,561 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:13:12,575 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-18 20:13:12,769 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable30 [2022-11-18 20:13:12,769 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr23ASSERT_VIOLATIONMEMORY_FREE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:13:12,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:12,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1074516525, now seen corresponding path program 1 times [2022-11-18 20:13:12,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:12,770 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997229623] [2022-11-18 20:13:12,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:12,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:12,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:13,771 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:13:13,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:13,781 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:13:13,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:13,864 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:13:13,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:14,166 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 24 proven. 5 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-18 20:13:14,166 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:14,166 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997229623] [2022-11-18 20:13:14,166 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [997229623] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:14,167 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [462518355] [2022-11-18 20:13:14,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:14,167 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:14,167 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:14,169 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:14,174 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-18 20:13:14,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:14,566 INFO L263 TraceCheckSpWp]: Trace formula consists of 527 conjuncts, 63 conjunts are in the unsatisfiable core [2022-11-18 20:13:14,570 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:15,047 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2022-11-18 20:13:15,336 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:15,337 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2022-11-18 20:13:15,666 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:15,667 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2022-11-18 20:13:15,798 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:15,798 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 23 [2022-11-18 20:13:16,520 INFO L321 Elim1Store]: treesize reduction 15, result has 34.8 percent of original size [2022-11-18 20:13:16,520 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 25 [2022-11-18 20:13:16,691 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 26 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-11-18 20:13:16,691 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:13:21,844 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_4459 (Array Int Int)) (|v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_53| Int) (v_ArrVal_4452 Int)) (or (< (select (select (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_53| v_ArrVal_4459) |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|) v_ArrVal_4452) (< (select (let ((.cse0 (let ((.cse1 (store |c_#memory_$Pointer$.base| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_53| (store v_ArrVal_4459 4 v_ArrVal_4452)))) (store .cse1 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse1 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_53|))))) (select .cse0 (select (select .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) 4) |c_#StackHeapBarrier|) (not (< |v_ULTIMATE.start_sll_prepend_#t~ret7#1.base_53| |c_#StackHeapBarrier|)))) is different from false [2022-11-18 20:13:21,846 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [462518355] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:21,846 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:13:21,847 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25] total 44 [2022-11-18 20:13:21,847 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111321153] [2022-11-18 20:13:21,847 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:13:21,847 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 45 states [2022-11-18 20:13:21,848 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-18 20:13:21,848 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2022-11-18 20:13:21,848 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=184, Invalid=2469, Unknown=3, NotChecked=100, Total=2756 [2022-11-18 20:13:21,849 INFO L87 Difference]: Start difference. First operand 74 states and 76 transitions. Second operand has 45 states, 42 states have (on average 2.5476190476190474) internal successors, (107), 39 states have internal predecessors, (107), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:13:24,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:13:24,360 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2022-11-18 20:13:24,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-11-18 20:13:24,361 INFO L78 Accepts]: Start accepts. Automaton has has 45 states, 42 states have (on average 2.5476190476190474) internal successors, (107), 39 states have internal predecessors, (107), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 76 [2022-11-18 20:13:24,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:13:24,361 INFO L225 Difference]: With dead ends: 75 [2022-11-18 20:13:24,361 INFO L226 Difference]: Without dead ends: 75 [2022-11-18 20:13:24,362 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 86 SyntacticMatches, 7 SemanticMatches, 70 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1186 ImplicationChecksByTransitivity, 8.6s TimeCoverageRelationStatistics Valid=474, Invalid=4497, Unknown=3, NotChecked=138, Total=5112 [2022-11-18 20:13:24,363 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 204 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 1006 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 204 SdHoareTripleChecker+Valid, 570 SdHoareTripleChecker+Invalid, 1112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 1006 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 83 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:13:24,363 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [204 Valid, 570 Invalid, 1112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 1006 Invalid, 0 Unknown, 83 Unchecked, 1.0s Time] [2022-11-18 20:13:24,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-11-18 20:13:24,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2022-11-18 20:13:24,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 66 states have (on average 1.0757575757575757) internal successors, (71), 70 states have internal predecessors, (71), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:13:24,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 77 transitions. [2022-11-18 20:13:24,367 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 77 transitions. Word has length 76 [2022-11-18 20:13:24,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:13:24,367 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 77 transitions. [2022-11-18 20:13:24,368 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 45 states, 42 states have (on average 2.5476190476190474) internal successors, (107), 39 states have internal predecessors, (107), 4 states have call successors, (4), 3 states have call predecessors, (4), 4 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:13:24,368 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 77 transitions. [2022-11-18 20:13:24,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-18 20:13:24,369 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:13:24,369 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:13:24,383 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-18 20:13:24,577 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:24,577 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:13:24,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:13:24,578 INFO L85 PathProgramCache]: Analyzing trace with hash -530404456, now seen corresponding path program 2 times [2022-11-18 20:13:24,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-18 20:13:24,578 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74336556] [2022-11-18 20:13:24,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:13:24,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-18 20:13:24,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:27,285 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-11-18 20:13:27,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:27,532 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-11-18 20:13:27,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:27,854 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 31 [2022-11-18 20:13:27,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:13:28,346 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 12 proven. 24 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-11-18 20:13:28,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-18 20:13:28,346 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74336556] [2022-11-18 20:13:28,346 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [74336556] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:13:28,346 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [486316966] [2022-11-18 20:13:28,347 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:13:28,347 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:13:28,347 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:13:28,348 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:13:28,351 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-18 20:13:28,841 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:13:28,841 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:13:28,846 INFO L263 TraceCheckSpWp]: Trace formula consists of 537 conjuncts, 157 conjunts are in the unsatisfiable core [2022-11-18 20:13:28,852 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:13:28,932 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:13:29,484 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-18 20:13:29,585 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2022-11-18 20:13:29,804 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-18 20:13:29,804 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-18 20:13:30,047 INFO L321 Elim1Store]: treesize reduction 13, result has 45.8 percent of original size [2022-11-18 20:13:30,048 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 24 [2022-11-18 20:13:30,550 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:13:30,550 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2022-11-18 20:13:30,644 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:13:31,164 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:31,179 INFO L321 Elim1Store]: treesize reduction 19, result has 32.1 percent of original size [2022-11-18 20:13:31,179 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 39 [2022-11-18 20:13:31,193 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2022-11-18 20:13:31,812 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:31,814 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:31,828 INFO L321 Elim1Store]: treesize reduction 13, result has 45.8 percent of original size [2022-11-18 20:13:31,828 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 41 [2022-11-18 20:13:32,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:13:32,092 INFO L321 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-11-18 20:13:32,092 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 2 case distinctions, treesize of input 55 treesize of output 40 [2022-11-18 20:13:34,541 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:13:34,541 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 64 [2022-11-18 20:13:38,218 INFO L321 Elim1Store]: treesize reduction 48, result has 69.4 percent of original size [2022-11-18 20:13:38,219 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 7 new quantified variables, introduced 10 case distinctions, treesize of input 426 treesize of output 386 [2022-11-18 20:14:52,867 WARN L233 SmtUtils]: Spent 28.74s on a formula simplification. DAG size of input: 319 DAG size of output: 87 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:15:01,530 WARN L233 SmtUtils]: Spent 8.12s on a formula simplification that was a NOOP. DAG size: 87 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:15:08,099 WARN L233 SmtUtils]: Spent 6.09s on a formula simplification that was a NOOP. DAG size: 81 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-18 20:15:08,370 INFO L321 Elim1Store]: treesize reduction 114, result has 65.9 percent of original size [2022-11-18 20:15:08,370 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 402 treesize of output 572 [2022-11-18 20:16:24,141 WARN L230 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2022-11-18 20:16:24,142 WARN L319 FreeRefinementEngine]: Global settings require throwing the following exception [2022-11-18 20:16:24,161 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 101 [2022-11-18 20:16:24,162 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2022-11-18 20:16:24,343 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable32 [2022-11-18 20:16:24,344 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:243) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:258) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.push(Scriptor.java:133) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.push(DiffWrapperScript.java:90) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.push(WrapperScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.push(HistoryRecordingScript.java:107) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.push(WrapperScript.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.UndoableWrapperScript.push(UndoableWrapperScript.java:54) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:48) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.getRedundancy(SimplifyDDA.java:620) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.simplify.SimplifyDDAWithTimeout.getRedundancy(SimplifyDDAWithTimeout.java:120) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA$Simplifier.walk(SimplifyDDA.java:370) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:115) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:106) at de.uni_freiburg.informatik.ultimate.logic.simplification.SimplifyDDA.simplifyOnce(SimplifyDDA.java:649) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.simplify.SimplifyDDAWithTimeout.getSimplifiedTerm(SimplifyDDAWithTimeout.java:180) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.simplify(SmtUtils.java:198) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.simplify(SmtUtils.java:165) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:361) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:306) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:582) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:420) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:199) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:299) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:185) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:163) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:266) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:147) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:82) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:336) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:431) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:262) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1465) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:658) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:239) ... 54 more [2022-11-18 20:16:24,348 INFO L158 Benchmark]: Toolchain (without parser) took 546824.01ms. Allocated memory was 115.3MB in the beginning and 362.8MB in the end (delta: 247.5MB). Free memory was 75.2MB in the beginning and 128.7MB in the end (delta: -53.5MB). Peak memory consumption was 220.4MB. Max. memory is 16.1GB. [2022-11-18 20:16:24,348 INFO L158 Benchmark]: CDTParser took 0.22ms. Allocated memory is still 115.3MB. Free memory is still 92.7MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-18 20:16:24,348 INFO L158 Benchmark]: CACSL2BoogieTranslator took 666.40ms. Allocated memory is still 115.3MB. Free memory was 75.0MB in the beginning and 81.8MB in the end (delta: -6.8MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-18 20:16:24,348 INFO L158 Benchmark]: Boogie Procedure Inliner took 64.32ms. Allocated memory is still 115.3MB. Free memory was 81.8MB in the beginning and 79.6MB in the end (delta: 2.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:16:24,348 INFO L158 Benchmark]: Boogie Preprocessor took 64.54ms. Allocated memory is still 115.3MB. Free memory was 79.6MB in the beginning and 78.1MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-18 20:16:24,348 INFO L158 Benchmark]: RCFGBuilder took 817.19ms. Allocated memory is still 115.3MB. Free memory was 78.1MB in the beginning and 59.7MB in the end (delta: 18.4MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2022-11-18 20:16:24,349 INFO L158 Benchmark]: TraceAbstraction took 545201.65ms. Allocated memory was 115.3MB in the beginning and 362.8MB in the end (delta: 247.5MB). Free memory was 58.7MB in the beginning and 128.7MB in the end (delta: -69.9MB). Peak memory consumption was 206.0MB. Max. memory is 16.1GB. [2022-11-18 20:16:24,350 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22ms. Allocated memory is still 115.3MB. Free memory is still 92.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 666.40ms. Allocated memory is still 115.3MB. Free memory was 75.0MB in the beginning and 81.8MB in the end (delta: -6.8MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 64.32ms. Allocated memory is still 115.3MB. Free memory was 81.8MB in the beginning and 79.6MB in the end (delta: 2.2MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 64.54ms. Allocated memory is still 115.3MB. Free memory was 79.6MB in the beginning and 78.1MB in the end (delta: 1.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 817.19ms. Allocated memory is still 115.3MB. Free memory was 78.1MB in the beginning and 59.7MB in the end (delta: 18.4MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * TraceAbstraction took 545201.65ms. Allocated memory was 115.3MB in the beginning and 362.8MB in the end (delta: 247.5MB). Free memory was 58.7MB in the beginning and 128.7MB in the end (delta: -69.9MB). Peak memory consumption was 206.0MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:243) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 277634da297b7f9e262585608ed7ad62cca7d59b0122d4e61ee1b4b78256acae --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-8393723 [2022-11-18 20:16:26,495 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-18 20:16:26,499 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-18 20:16:26,541 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-18 20:16:26,542 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-18 20:16:26,546 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-18 20:16:26,549 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-18 20:16:26,556 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-18 20:16:26,558 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-18 20:16:26,564 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-18 20:16:26,565 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-18 20:16:26,566 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-18 20:16:26,567 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-18 20:16:26,570 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-18 20:16:26,571 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-18 20:16:26,573 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-18 20:16:26,575 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-18 20:16:26,576 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-18 20:16:26,582 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-18 20:16:26,586 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-18 20:16:26,590 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-18 20:16:26,592 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-18 20:16:26,594 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-18 20:16:26,596 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-18 20:16:26,602 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-18 20:16:26,606 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-18 20:16:26,607 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-18 20:16:26,608 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-18 20:16:26,610 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-18 20:16:26,611 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-18 20:16:26,611 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-18 20:16:26,612 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-18 20:16:26,614 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-18 20:16:26,615 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-18 20:16:26,616 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-18 20:16:26,617 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-18 20:16:26,618 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-18 20:16:26,618 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-18 20:16:26,618 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-18 20:16:26,620 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-18 20:16:26,621 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-18 20:16:26,626 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Bitvector.epf [2022-11-18 20:16:26,668 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-18 20:16:26,669 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-18 20:16:26,670 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-18 20:16:26,671 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-18 20:16:26,672 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-18 20:16:26,672 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-18 20:16:26,674 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-18 20:16:26,674 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-18 20:16:26,674 INFO L138 SettingsManager]: * Use SBE=true [2022-11-18 20:16:26,675 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-18 20:16:26,676 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-18 20:16:26,677 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-18 20:16:26,677 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-18 20:16:26,677 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-18 20:16:26,678 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-18 20:16:26,678 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-18 20:16:26,678 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-18 20:16:26,679 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-18 20:16:26,679 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-18 20:16:26,679 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-18 20:16:26,680 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-18 20:16:26,680 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-18 20:16:26,680 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-18 20:16:26,681 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-18 20:16:26,681 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-18 20:16:26,681 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-18 20:16:26,682 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-18 20:16:26,682 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:16:26,683 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-18 20:16:26,683 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-18 20:16:26,683 INFO L138 SettingsManager]: * Trace refinement strategy=WOLF [2022-11-18 20:16:26,684 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-18 20:16:26,684 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-18 20:16:26,685 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 277634da297b7f9e262585608ed7ad62cca7d59b0122d4e61ee1b4b78256acae [2022-11-18 20:16:27,105 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-18 20:16:27,129 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-18 20:16:27,132 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-18 20:16:27,133 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-18 20:16:27,141 INFO L275 PluginConnector]: CDTParser initialized [2022-11-18 20:16:27,143 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/../../sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i [2022-11-18 20:16:27,230 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/e13a9f66b/e1f3ea8192e443df91ef487d05126007/FLAGdc46966a5 [2022-11-18 20:16:27,828 INFO L306 CDTParser]: Found 1 translation units. [2022-11-18 20:16:27,829 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i [2022-11-18 20:16:27,842 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/e13a9f66b/e1f3ea8192e443df91ef487d05126007/FLAGdc46966a5 [2022-11-18 20:16:28,156 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/data/e13a9f66b/e1f3ea8192e443df91ef487d05126007 [2022-11-18 20:16:28,159 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-18 20:16:28,160 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-18 20:16:28,162 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-18 20:16:28,162 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-18 20:16:28,179 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-18 20:16:28,180 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,181 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7882cda and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28, skipping insertion in model container [2022-11-18 20:16:28,182 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,192 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-18 20:16:28,243 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-18 20:16:28,633 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i[24165,24178] [2022-11-18 20:16:28,637 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:16:28,668 INFO L203 MainTranslator]: Completed pre-run [2022-11-18 20:16:28,718 WARN L234 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/sv-benchmarks/c/list-simple/sll2n_prepend_unequal.i[24165,24178] [2022-11-18 20:16:28,719 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-18 20:16:28,764 INFO L208 MainTranslator]: Completed translation [2022-11-18 20:16:28,764 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28 WrapperNode [2022-11-18 20:16:28,764 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-18 20:16:28,766 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-18 20:16:28,766 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-18 20:16:28,767 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-18 20:16:28,775 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,791 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,817 INFO L138 Inliner]: procedures = 130, calls = 32, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 116 [2022-11-18 20:16:28,833 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-18 20:16:28,834 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-18 20:16:28,834 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-18 20:16:28,834 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-18 20:16:28,844 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,844 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,848 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,849 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,865 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,870 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,872 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,873 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,877 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-18 20:16:28,878 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-18 20:16:28,878 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-18 20:16:28,888 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-18 20:16:28,889 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (1/1) ... [2022-11-18 20:16:28,897 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-18 20:16:28,909 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:16:28,923 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-18 20:16:28,939 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-18 20:16:28,971 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2022-11-18 20:16:28,971 INFO L130 BoogieDeclarations]: Found specification of procedure node_create [2022-11-18 20:16:28,971 INFO L138 BoogieDeclarations]: Found implementation of procedure node_create [2022-11-18 20:16:28,971 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-18 20:16:28,971 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-18 20:16:28,972 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-18 20:16:28,972 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-18 20:16:28,972 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-18 20:16:28,972 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-18 20:16:28,972 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2022-11-18 20:16:28,972 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-18 20:16:28,973 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2022-11-18 20:16:28,973 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-18 20:16:28,973 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-18 20:16:29,163 INFO L235 CfgBuilder]: Building ICFG [2022-11-18 20:16:29,166 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-18 20:16:29,838 INFO L276 CfgBuilder]: Performing block encoding [2022-11-18 20:16:29,849 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-18 20:16:29,850 INFO L300 CfgBuilder]: Removed 3 assume(true) statements. [2022-11-18 20:16:29,852 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:16:29 BoogieIcfgContainer [2022-11-18 20:16:29,852 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-18 20:16:29,855 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-18 20:16:29,855 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-18 20:16:29,858 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-18 20:16:29,858 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 08:16:28" (1/3) ... [2022-11-18 20:16:29,859 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@101b5dc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:16:29, skipping insertion in model container [2022-11-18 20:16:29,859 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 08:16:28" (2/3) ... [2022-11-18 20:16:29,860 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@101b5dc1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 08:16:29, skipping insertion in model container [2022-11-18 20:16:29,860 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 08:16:29" (3/3) ... [2022-11-18 20:16:29,862 INFO L112 eAbstractionObserver]: Analyzing ICFG sll2n_prepend_unequal.i [2022-11-18 20:16:29,911 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-18 20:16:29,925 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 31 error locations. [2022-11-18 20:16:30,003 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-18 20:16:30,010 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7ccd016, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-18 20:16:30,011 INFO L358 AbstractCegarLoop]: Starting to check reachability of 31 error locations. [2022-11-18 20:16:30,015 INFO L276 IsEmpty]: Start isEmpty. Operand has 81 states, 46 states have (on average 1.891304347826087) internal successors, (87), 77 states have internal predecessors, (87), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:16:30,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-18 20:16:30,023 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:30,024 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:30,025 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting node_createErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:30,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:30,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1813443002, now seen corresponding path program 1 times [2022-11-18 20:16:30,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:30,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1212639634] [2022-11-18 20:16:30,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:30,044 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:30,045 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:30,053 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:30,096 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-18 20:16:30,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:30,203 INFO L263 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 20:16:30,224 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:30,335 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:16:30,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:16:30,371 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:16:30,372 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:30,372 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1212639634] [2022-11-18 20:16:30,374 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1212639634] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:16:30,374 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:16:30,375 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:16:30,376 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035090609] [2022-11-18 20:16:30,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:16:30,386 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:16:30,387 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:16:30,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:16:30,435 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:16:30,438 INFO L87 Difference]: Start difference. First operand has 81 states, 46 states have (on average 1.891304347826087) internal successors, (87), 77 states have internal predecessors, (87), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:16:30,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:16:30,678 INFO L93 Difference]: Finished difference Result 79 states and 85 transitions. [2022-11-18 20:16:30,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:16:30,681 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-18 20:16:30,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:16:30,690 INFO L225 Difference]: With dead ends: 79 [2022-11-18 20:16:30,690 INFO L226 Difference]: Without dead ends: 76 [2022-11-18 20:16:30,692 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:16:30,696 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 8 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:16:30,698 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 127 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-18 20:16:30,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-11-18 20:16:30,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2022-11-18 20:16:30,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 44 states have (on average 1.75) internal successors, (77), 72 states have internal predecessors, (77), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:16:30,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2022-11-18 20:16:30,753 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 7 [2022-11-18 20:16:30,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:16:30,754 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2022-11-18 20:16:30,754 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:16:30,754 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2022-11-18 20:16:30,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-18 20:16:30,755 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:30,755 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:30,772 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:30,967 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:30,967 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting node_createErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:30,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:30,968 INFO L85 PathProgramCache]: Analyzing trace with hash 1813443001, now seen corresponding path program 1 times [2022-11-18 20:16:30,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:30,972 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1150500791] [2022-11-18 20:16:30,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:30,973 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:30,973 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:30,974 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:30,988 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-18 20:16:31,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:31,057 INFO L263 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-18 20:16:31,059 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:31,068 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:16:31,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:16:31,078 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:16:31,078 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:31,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1150500791] [2022-11-18 20:16:31,079 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1150500791] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:16:31,079 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:16:31,079 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:16:31,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1439780893] [2022-11-18 20:16:31,080 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:16:31,081 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:16:31,081 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:16:31,082 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:16:31,082 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:16:31,083 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:16:31,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:16:31,234 INFO L93 Difference]: Finished difference Result 74 states and 79 transitions. [2022-11-18 20:16:31,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:16:31,235 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-18 20:16:31,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:16:31,236 INFO L225 Difference]: With dead ends: 74 [2022-11-18 20:16:31,236 INFO L226 Difference]: Without dead ends: 74 [2022-11-18 20:16:31,236 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:16:31,238 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 4 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:16:31,238 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 118 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:16:31,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2022-11-18 20:16:31,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2022-11-18 20:16:31,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 44 states have (on average 1.7045454545454546) internal successors, (75), 70 states have internal predecessors, (75), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:16:31,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 79 transitions. [2022-11-18 20:16:31,246 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 79 transitions. Word has length 7 [2022-11-18 20:16:31,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:16:31,247 INFO L495 AbstractCegarLoop]: Abstraction has 74 states and 79 transitions. [2022-11-18 20:16:31,247 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 1 states have call successors, (1), 1 states have call predecessors, (1), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-18 20:16:31,247 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 79 transitions. [2022-11-18 20:16:31,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-18 20:16:31,250 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:31,251 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:31,262 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:31,451 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:31,452 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:31,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:31,453 INFO L85 PathProgramCache]: Analyzing trace with hash 712803264, now seen corresponding path program 1 times [2022-11-18 20:16:31,453 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:31,454 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [462789486] [2022-11-18 20:16:31,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:31,454 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:31,454 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:31,455 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:31,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-18 20:16:31,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:31,591 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:16:31,594 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:31,606 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:16:31,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:16:31,689 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:16:31,689 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:31,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [462789486] [2022-11-18 20:16:31,690 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [462789486] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:16:31,691 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:16:31,691 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:16:31,691 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648429022] [2022-11-18 20:16:31,691 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:16:31,692 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:16:31,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:16:31,693 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:16:31,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:16:31,697 INFO L87 Difference]: Start difference. First operand 74 states and 79 transitions. Second operand has 6 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:16:32,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:16:32,090 INFO L93 Difference]: Finished difference Result 78 states and 86 transitions. [2022-11-18 20:16:32,090 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:16:32,090 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-11-18 20:16:32,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:16:32,093 INFO L225 Difference]: With dead ends: 78 [2022-11-18 20:16:32,093 INFO L226 Difference]: Without dead ends: 78 [2022-11-18 20:16:32,093 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:16:32,094 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 10 mSDsluCounter, 173 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 251 SdHoareTripleChecker+Invalid, 160 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 20:16:32,095 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 251 Invalid, 160 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 20:16:32,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-11-18 20:16:32,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 73. [2022-11-18 20:16:32,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 44 states have (on average 1.6818181818181819) internal successors, (74), 69 states have internal predecessors, (74), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:16:32,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 78 transitions. [2022-11-18 20:16:32,115 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 78 transitions. Word has length 13 [2022-11-18 20:16:32,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:16:32,116 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 78 transitions. [2022-11-18 20:16:32,116 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:16:32,118 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 78 transitions. [2022-11-18 20:16:32,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-11-18 20:16:32,119 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:32,120 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:32,142 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:32,331 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:32,331 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:32,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:32,332 INFO L85 PathProgramCache]: Analyzing trace with hash 712803265, now seen corresponding path program 1 times [2022-11-18 20:16:32,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:32,333 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [631843346] [2022-11-18 20:16:32,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:32,333 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:32,333 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:32,334 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:32,345 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-18 20:16:32,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:32,442 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-18 20:16:32,445 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:32,456 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:16:32,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:16:32,585 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:16:32,585 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:32,585 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [631843346] [2022-11-18 20:16:32,585 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [631843346] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:16:32,586 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:16:32,586 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:16:32,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903885715] [2022-11-18 20:16:32,587 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:16:32,587 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:16:32,588 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:16:32,588 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:16:32,589 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:16:32,592 INFO L87 Difference]: Start difference. First operand 73 states and 78 transitions. Second operand has 6 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:16:32,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:16:32,998 INFO L93 Difference]: Finished difference Result 77 states and 85 transitions. [2022-11-18 20:16:32,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:16:32,999 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-11-18 20:16:33,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:16:33,001 INFO L225 Difference]: With dead ends: 77 [2022-11-18 20:16:33,001 INFO L226 Difference]: Without dead ends: 77 [2022-11-18 20:16:33,001 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:16:33,002 INFO L413 NwaCegarLoop]: 78 mSDtfsCounter, 9 mSDsluCounter, 189 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 267 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 20:16:33,003 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 267 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-18 20:16:33,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-11-18 20:16:33,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 72. [2022-11-18 20:16:33,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 44 states have (on average 1.6590909090909092) internal successors, (73), 68 states have internal predecessors, (73), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:16:33,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2022-11-18 20:16:33,011 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 13 [2022-11-18 20:16:33,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:16:33,011 INFO L495 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2022-11-18 20:16:33,011 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.2) internal successors, (11), 5 states have internal predecessors, (11), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:16:33,012 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2022-11-18 20:16:33,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-18 20:16:33,012 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:33,013 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:33,030 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:33,225 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:33,226 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:33,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:33,226 INFO L85 PathProgramCache]: Analyzing trace with hash 150600896, now seen corresponding path program 1 times [2022-11-18 20:16:33,227 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:33,227 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [749690409] [2022-11-18 20:16:33,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:33,228 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:33,228 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:33,229 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:33,234 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-18 20:16:33,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:33,357 INFO L263 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 20:16:33,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:33,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:16:33,377 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:16:33,378 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:33,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [749690409] [2022-11-18 20:16:33,378 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [749690409] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:16:33,378 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:16:33,378 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:16:33,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [670612485] [2022-11-18 20:16:33,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:16:33,380 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:16:33,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:16:33,380 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:16:33,381 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:16:33,381 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 3 states have internal predecessors, (13), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:16:33,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:16:33,401 INFO L93 Difference]: Finished difference Result 78 states and 84 transitions. [2022-11-18 20:16:33,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:16:33,401 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 3 states have internal predecessors, (13), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-11-18 20:16:33,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:16:33,403 INFO L225 Difference]: With dead ends: 78 [2022-11-18 20:16:33,404 INFO L226 Difference]: Without dead ends: 78 [2022-11-18 20:16:33,404 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:16:33,407 INFO L413 NwaCegarLoop]: 76 mSDtfsCounter, 4 mSDsluCounter, 73 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:16:33,408 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 149 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:16:33,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-11-18 20:16:33,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 73. [2022-11-18 20:16:33,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 45 states have (on average 1.6444444444444444) internal successors, (74), 69 states have internal predecessors, (74), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:16:33,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 78 transitions. [2022-11-18 20:16:33,426 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 78 transitions. Word has length 15 [2022-11-18 20:16:33,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:16:33,427 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 78 transitions. [2022-11-18 20:16:33,427 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.333333333333333) internal successors, (13), 3 states have internal predecessors, (13), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-18 20:16:33,427 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 78 transitions. [2022-11-18 20:16:33,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-18 20:16:33,429 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:33,429 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:33,446 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:33,646 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:33,647 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:33,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:33,647 INFO L85 PathProgramCache]: Analyzing trace with hash -513998014, now seen corresponding path program 1 times [2022-11-18 20:16:33,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:33,648 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [3836567] [2022-11-18 20:16:33,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:33,648 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:33,649 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:33,650 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:33,651 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-18 20:16:33,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:33,798 INFO L263 TraceCheckSpWp]: Trace formula consists of 168 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:16:33,800 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:33,830 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-18 20:16:33,830 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:16:33,895 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-18 20:16:33,895 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:33,896 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [3836567] [2022-11-18 20:16:33,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [3836567] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:16:33,896 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:16:33,896 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2022-11-18 20:16:33,896 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444904355] [2022-11-18 20:16:33,897 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:16:33,897 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:16:33,897 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:16:33,898 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:16:33,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:16:33,898 INFO L87 Difference]: Start difference. First operand 73 states and 78 transitions. Second operand has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-11-18 20:16:33,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:16:33,946 INFO L93 Difference]: Finished difference Result 84 states and 91 transitions. [2022-11-18 20:16:33,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:16:33,947 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) Word has length 28 [2022-11-18 20:16:33,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:16:33,948 INFO L225 Difference]: With dead ends: 84 [2022-11-18 20:16:33,949 INFO L226 Difference]: Without dead ends: 84 [2022-11-18 20:16:33,949 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:16:33,953 INFO L413 NwaCegarLoop]: 81 mSDtfsCounter, 11 mSDsluCounter, 289 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 370 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-18 20:16:33,953 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 370 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-18 20:16:33,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-11-18 20:16:33,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 79. [2022-11-18 20:16:33,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 50 states have (on average 1.58) internal successors, (79), 74 states have internal predecessors, (79), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:16:33,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 85 transitions. [2022-11-18 20:16:33,975 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 85 transitions. Word has length 28 [2022-11-18 20:16:33,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:16:33,975 INFO L495 AbstractCegarLoop]: Abstraction has 79 states and 85 transitions. [2022-11-18 20:16:33,976 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 5.166666666666667) internal successors, (31), 6 states have internal predecessors, (31), 3 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 3 states have call predecessors, (4), 3 states have call successors, (4) [2022-11-18 20:16:33,976 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 85 transitions. [2022-11-18 20:16:33,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-11-18 20:16:33,977 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:33,977 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:33,994 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:34,189 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:34,190 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:34,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:34,191 INFO L85 PathProgramCache]: Analyzing trace with hash -416014336, now seen corresponding path program 2 times [2022-11-18 20:16:34,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:34,192 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [241363130] [2022-11-18 20:16:34,192 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:16:34,192 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:34,192 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:34,193 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:34,194 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-18 20:16:34,429 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:16:34,429 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:16:34,440 INFO L263 TraceCheckSpWp]: Trace formula consists of 239 conjuncts, 19 conjunts are in the unsatisfiable core [2022-11-18 20:16:34,444 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:34,461 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:16:34,511 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-18 20:16:34,568 WARN L859 $PredicateComparison]: unable to prove that (and (exists ((v_ArrVal_154 (_ BitVec 1)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= |c_#valid| (store |c_old(#valid)| |node_create_~temp~0#1.base| v_ArrVal_154)) (= (_ bv0 1) (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) (not (= (bvadd |c_#StackHeapBarrier| (_ bv1 32)) (_ bv0 32)))) is different from true [2022-11-18 20:16:34,789 INFO L321 Elim1Store]: treesize reduction 22, result has 35.3 percent of original size [2022-11-18 20:16:34,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2022-11-18 20:16:34,847 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-18 20:16:34,980 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:16:34,982 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:16:35,216 WARN L859 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| (_ BitVec 32))) (= |c_#valid| (store |c_old(#valid)| |node_create_~temp~0#1.base| (_ bv1 1)))) is different from true [2022-11-18 20:16:35,272 INFO L321 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-11-18 20:16:35,272 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:16:35,326 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 3 trivial. 18 not checked. [2022-11-18 20:16:35,326 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:16:35,689 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:35,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [241363130] [2022-11-18 20:16:35,689 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [241363130] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:16:35,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [925991229] [2022-11-18 20:16:35,689 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:16:35,689 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-18 20:16:35,690 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 [2022-11-18 20:16:35,696 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-18 20:16:35,700 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (9)] Waiting until timeout for monitored process [2022-11-18 20:16:36,005 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-11-18 20:16:36,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [610360705] [2022-11-18 20:16:36,005 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-18 20:16:36,005 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-18 20:16:36,005 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 [2022-11-18 20:16:36,017 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-18 20:16:36,026 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (9)] Forceful destruction successful, exit code 1 [2022-11-18 20:16:36,061 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-18 20:16:36,292 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-18 20:16:36,292 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-18 20:16:36,297 INFO L263 TraceCheckSpWp]: Trace formula consists of 239 conjuncts, 17 conjunts are in the unsatisfiable core [2022-11-18 20:16:36,302 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:36,313 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:16:36,334 WARN L859 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| (_ BitVec 32))) (and (exists ((v_ArrVal_274 (_ BitVec 1))) (= |c_#valid| (store |c_old(#valid)| |node_create_~temp~0#1.base| v_ArrVal_274))) (= (_ bv0 1) (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) is different from true [2022-11-18 20:16:36,414 INFO L321 Elim1Store]: treesize reduction 22, result has 35.3 percent of original size [2022-11-18 20:16:36,415 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2022-11-18 20:16:36,457 WARN L859 $PredicateComparison]: unable to prove that (exists ((v_ArrVal_275 (_ BitVec 1))) (= |c_#valid| (store |c_old(#valid)| |c_node_create_~temp~0#1.base| v_ArrVal_275))) is different from true [2022-11-18 20:16:36,557 INFO L321 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-11-18 20:16:36,557 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:16:36,619 WARN L859 $PredicateComparison]: unable to prove that (exists ((v_ArrVal_276 (_ BitVec 1))) (= (store |c_old(#valid)| |c_node_create_~temp~0#1.base| v_ArrVal_276) |c_#valid|)) is different from true [2022-11-18 20:16:36,720 INFO L321 Elim1Store]: treesize reduction 17, result has 29.2 percent of original size [2022-11-18 20:16:36,720 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:16:36,752 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 14 not checked. [2022-11-18 20:16:36,752 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:16:37,436 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-18 20:16:37,437 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [610360705] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-18 20:16:37,437 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-18 20:16:37,437 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 5] total 17 [2022-11-18 20:16:37,437 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064602675] [2022-11-18 20:16:37,438 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-18 20:16:37,438 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-18 20:16:37,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:16:37,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-18 20:16:37,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=150, Unknown=5, NotChecked=140, Total=342 [2022-11-18 20:16:37,440 INFO L87 Difference]: Start difference. First operand 79 states and 85 transitions. Second operand has 18 states, 17 states have (on average 4.0588235294117645) internal successors, (69), 16 states have internal predecessors, (69), 4 states have call successors, (6), 3 states have call predecessors, (6), 6 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2022-11-18 20:16:56,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:16:56,109 INFO L93 Difference]: Finished difference Result 96 states and 102 transitions. [2022-11-18 20:16:56,110 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-18 20:16:56,110 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 17 states have (on average 4.0588235294117645) internal successors, (69), 16 states have internal predecessors, (69), 4 states have call successors, (6), 3 states have call predecessors, (6), 6 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) Word has length 41 [2022-11-18 20:16:56,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:16:56,111 INFO L225 Difference]: With dead ends: 96 [2022-11-18 20:16:56,111 INFO L226 Difference]: Without dead ends: 96 [2022-11-18 20:16:56,112 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 15 SemanticMatches, 23 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 19.3s TimeCoverageRelationStatistics Valid=84, Invalid=310, Unknown=6, NotChecked=200, Total=600 [2022-11-18 20:16:56,112 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 87 mSDsluCounter, 208 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 87 SdHoareTripleChecker+Valid, 258 SdHoareTripleChecker+Invalid, 611 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 543 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-18 20:16:56,113 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [87 Valid, 258 Invalid, 611 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 65 Invalid, 0 Unknown, 543 Unchecked, 0.2s Time] [2022-11-18 20:16:56,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2022-11-18 20:16:56,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 84. [2022-11-18 20:16:56,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 56 states have (on average 1.4821428571428572) internal successors, (83), 78 states have internal predecessors, (83), 3 states have call successors, (3), 2 states have call predecessors, (3), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:16:56,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 89 transitions. [2022-11-18 20:16:56,119 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 89 transitions. Word has length 41 [2022-11-18 20:16:56,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:16:56,119 INFO L495 AbstractCegarLoop]: Abstraction has 84 states and 89 transitions. [2022-11-18 20:16:56,120 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 17 states have (on average 4.0588235294117645) internal successors, (69), 16 states have internal predecessors, (69), 4 states have call successors, (6), 3 states have call predecessors, (6), 6 states have return successors, (8), 5 states have call predecessors, (8), 4 states have call successors, (8) [2022-11-18 20:16:56,120 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 89 transitions. [2022-11-18 20:16:56,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-11-18 20:16:56,121 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:16:56,121 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:16:56,139 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:56,338 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-18 20:16:56,530 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:56,530 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:16:56,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:16:56,530 INFO L85 PathProgramCache]: Analyzing trace with hash -416014335, now seen corresponding path program 1 times [2022-11-18 20:16:56,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:16:56,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1265769053] [2022-11-18 20:16:56,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:56,531 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:16:56,532 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:16:56,533 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:16:56,534 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-18 20:16:56,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:56,784 INFO L263 TraceCheckSpWp]: Trace formula consists of 239 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-18 20:16:56,789 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:56,800 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:16:56,811 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:16:56,858 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:16:56,864 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-18 20:16:56,910 WARN L859 $PredicateComparison]: unable to prove that (and (exists ((v_ArrVal_344 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_344) |c_#length|) (= (_ bv0 1) (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) (not (= (bvadd |c_#StackHeapBarrier| (_ bv1 32)) (_ bv0 32)))) is different from true [2022-11-18 20:16:57,019 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:16:57,020 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:16:57,041 INFO L321 Elim1Store]: treesize reduction 6, result has 40.0 percent of original size [2022-11-18 20:16:57,041 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 13 [2022-11-18 20:16:57,138 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:16:57,340 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:16:57,342 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:16:57,691 WARN L859 $PredicateComparison]: unable to prove that (exists ((|node_create_~temp~0#1.base| (_ BitVec 32))) (= (store |c_old(#length)| |node_create_~temp~0#1.base| (_ bv8 32)) |c_#length|)) is different from true [2022-11-18 20:16:57,753 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:16:57,753 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 12 treesize of output 18 [2022-11-18 20:16:57,901 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 18 not checked. [2022-11-18 20:16:57,901 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:16:58,234 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:16:58,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1265769053] [2022-11-18 20:16:58,234 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1265769053] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:16:58,234 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1736566065] [2022-11-18 20:16:58,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:16:58,235 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-18 20:16:58,235 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 [2022-11-18 20:16:58,237 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-18 20:16:58,261 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (12)] Waiting until timeout for monitored process [2022-11-18 20:16:58,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:16:58,635 INFO L263 TraceCheckSpWp]: Trace formula consists of 239 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 20:16:58,648 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:16:58,666 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:16:58,694 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:16:58,876 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:16:58,877 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:16:59,014 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:16:59,349 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:16:59,350 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:16:59,668 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:16:59,696 WARN L859 $PredicateComparison]: unable to prove that (and (not (= |c_#StackHeapBarrier| (_ bv0 32))) (exists ((v_ArrVal_407 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_407)) (bvult |node_create_~temp~0#1.base| |c_#StackHeapBarrier|))) (not (= (bvadd |c_#StackHeapBarrier| (_ bv1 32)) (_ bv0 32)))) is different from true [2022-11-18 20:16:59,795 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:16:59,797 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 14 [2022-11-18 20:16:59,915 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 12 not checked. [2022-11-18 20:16:59,915 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:17:00,180 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1736566065] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:17:00,180 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:17:00,181 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 21 [2022-11-18 20:17:00,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1688790752] [2022-11-18 20:17:00,181 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:17:00,181 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-11-18 20:17:00,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:00,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-11-18 20:17:00,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=386, Unknown=16, NotChecked=126, Total=600 [2022-11-18 20:17:00,182 INFO L87 Difference]: Start difference. First operand 84 states and 89 transitions. Second operand has 22 states, 19 states have (on average 3.4210526315789473) internal successors, (65), 17 states have internal predecessors, (65), 5 states have call successors, (5), 4 states have call predecessors, (5), 6 states have return successors, (6), 6 states have call predecessors, (6), 5 states have call successors, (6) [2022-11-18 20:17:00,233 WARN L859 $PredicateComparison]: unable to prove that (and (exists ((v_ArrVal_345 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_345) |c_#length|) (not (= (_ bv0 32) |node_create_~temp~0#1.base|)) (bvult |node_create_~temp~0#1.base| |c_#StackHeapBarrier|))) (exists ((v_ArrVal_344 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_344) |c_#length|) (= (_ bv0 1) (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) (exists ((|node_create_~temp~0#1.base| (_ BitVec 32))) (= (store |c_old(#length)| |node_create_~temp~0#1.base| (_ bv8 32)) |c_#length|)) (not (= (bvadd |c_#StackHeapBarrier| (_ bv1 32)) (_ bv0 32)))) is different from true [2022-11-18 20:17:00,347 WARN L859 $PredicateComparison]: unable to prove that (and (exists ((v_ArrVal_406 (_ BitVec 32))) (= (store |c_old(#length)| |c_node_create_~temp~0#1.base| v_ArrVal_406) |c_#length|)) (exists ((v_ArrVal_345 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_345) |c_#length|) (not (= (_ bv0 32) |node_create_~temp~0#1.base|)) (bvult |node_create_~temp~0#1.base| |c_#StackHeapBarrier|))) (exists ((|node_create_~temp~0#1.base| (_ BitVec 32))) (= (store |c_old(#length)| |node_create_~temp~0#1.base| (_ bv8 32)) |c_#length|)) (not (= |c_#StackHeapBarrier| (_ bv0 32))) (bvult |c_node_create_~temp~0#1.base| |c_#StackHeapBarrier|) (exists ((v_ArrVal_407 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_407)) (bvult |node_create_~temp~0#1.base| |c_#StackHeapBarrier|))) (not (= (bvadd |c_#StackHeapBarrier| (_ bv1 32)) (_ bv0 32)))) is different from true [2022-11-18 20:17:00,357 WARN L859 $PredicateComparison]: unable to prove that (and (exists ((v_ArrVal_345 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_345) |c_#length|) (not (= (_ bv0 32) |node_create_~temp~0#1.base|)) (bvult |node_create_~temp~0#1.base| |c_#StackHeapBarrier|))) (exists ((v_ArrVal_406 (_ BitVec 32))) (= |c_#length| (store |c_old(#length)| |c_node_create_#res#1.base| v_ArrVal_406))) (exists ((|node_create_~temp~0#1.base| (_ BitVec 32))) (= (store |c_old(#length)| |node_create_~temp~0#1.base| (_ bv8 32)) |c_#length|)) (not (= |c_#StackHeapBarrier| (_ bv0 32))) (exists ((v_ArrVal_407 (_ BitVec 32)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= |c_#length| (store |c_old(#length)| |node_create_~temp~0#1.base| v_ArrVal_407)) (bvult |node_create_~temp~0#1.base| |c_#StackHeapBarrier|))) (not (= (bvadd |c_#StackHeapBarrier| (_ bv1 32)) (_ bv0 32))) (bvult |c_node_create_#res#1.base| |c_#StackHeapBarrier|)) is different from true [2022-11-18 20:17:00,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:00,951 INFO L93 Difference]: Finished difference Result 90 states and 94 transitions. [2022-11-18 20:17:00,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-18 20:17:00,951 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 19 states have (on average 3.4210526315789473) internal successors, (65), 17 states have internal predecessors, (65), 5 states have call successors, (5), 4 states have call predecessors, (5), 6 states have return successors, (6), 6 states have call predecessors, (6), 5 states have call successors, (6) Word has length 41 [2022-11-18 20:17:00,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:00,952 INFO L225 Difference]: With dead ends: 90 [2022-11-18 20:17:00,952 INFO L226 Difference]: Without dead ends: 90 [2022-11-18 20:17:00,953 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 63 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 6 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=105, Invalid=539, Unknown=30, NotChecked=318, Total=992 [2022-11-18 20:17:00,954 INFO L413 NwaCegarLoop]: 69 mSDtfsCounter, 4 mSDsluCounter, 415 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 484 SdHoareTripleChecker+Invalid, 528 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 399 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:00,954 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 484 Invalid, 528 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 399 Unchecked, 0.3s Time] [2022-11-18 20:17:00,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2022-11-18 20:17:00,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2022-11-18 20:17:00,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 62 states have (on average 1.4193548387096775) internal successors, (88), 83 states have internal predecessors, (88), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:00,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 94 transitions. [2022-11-18 20:17:00,957 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 94 transitions. Word has length 41 [2022-11-18 20:17:00,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:00,958 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 94 transitions. [2022-11-18 20:17:00,958 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 19 states have (on average 3.4210526315789473) internal successors, (65), 17 states have internal predecessors, (65), 5 states have call successors, (5), 4 states have call predecessors, (5), 6 states have return successors, (6), 6 states have call predecessors, (6), 5 states have call successors, (6) [2022-11-18 20:17:00,958 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 94 transitions. [2022-11-18 20:17:00,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-11-18 20:17:00,959 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:00,959 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:00,968 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (12)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:01,182 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:01,359 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:01,360 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr5REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:01,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:01,360 INFO L85 PathProgramCache]: Analyzing trace with hash -11542527, now seen corresponding path program 1 times [2022-11-18 20:17:01,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:01,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [203532139] [2022-11-18 20:17:01,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:01,361 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:01,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:01,362 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:01,363 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-18 20:17:01,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:01,575 INFO L263 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-18 20:17:01,578 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:01,586 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:01,688 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:17:01,689 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:01,689 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:01,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [203532139] [2022-11-18 20:17:01,689 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [203532139] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:01,689 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:01,689 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:17:01,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24061780] [2022-11-18 20:17:01,689 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:01,690 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:17:01,690 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:01,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:17:01,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:17:01,691 INFO L87 Difference]: Start difference. First operand 90 states and 94 transitions. Second operand has 6 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:17:02,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:02,064 INFO L93 Difference]: Finished difference Result 89 states and 93 transitions. [2022-11-18 20:17:02,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:17:02,065 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 42 [2022-11-18 20:17:02,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:02,066 INFO L225 Difference]: With dead ends: 89 [2022-11-18 20:17:02,066 INFO L226 Difference]: Without dead ends: 89 [2022-11-18 20:17:02,067 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:17:02,067 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 53 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 119 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 184 SdHoareTripleChecker+Invalid, 119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 119 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:02,068 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [53 Valid, 184 Invalid, 119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 119 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-18 20:17:02,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-11-18 20:17:02,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2022-11-18 20:17:02,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 62 states have (on average 1.403225806451613) internal successors, (87), 82 states have internal predecessors, (87), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:02,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 93 transitions. [2022-11-18 20:17:02,073 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 93 transitions. Word has length 42 [2022-11-18 20:17:02,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:02,073 INFO L495 AbstractCegarLoop]: Abstraction has 89 states and 93 transitions. [2022-11-18 20:17:02,073 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:17:02,073 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 93 transitions. [2022-11-18 20:17:02,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-11-18 20:17:02,074 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:02,074 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:02,106 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:02,289 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:02,289 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr4REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:02,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:02,289 INFO L85 PathProgramCache]: Analyzing trace with hash -11542528, now seen corresponding path program 1 times [2022-11-18 20:17:02,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:02,290 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [673992202] [2022-11-18 20:17:02,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:02,290 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:02,290 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:02,291 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:02,297 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-18 20:17:02,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:02,494 INFO L263 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-18 20:17:02,496 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:02,505 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:17:02,559 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:17:02,559 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:02,559 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:02,559 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [673992202] [2022-11-18 20:17:02,559 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [673992202] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:02,559 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:02,560 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-18 20:17:02,560 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1195571030] [2022-11-18 20:17:02,560 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:02,560 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-18 20:17:02,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:02,567 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-18 20:17:02,567 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:17:02,568 INFO L87 Difference]: Start difference. First operand 89 states and 93 transitions. Second operand has 6 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:17:02,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:02,886 INFO L93 Difference]: Finished difference Result 100 states and 105 transitions. [2022-11-18 20:17:02,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:17:02,887 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 42 [2022-11-18 20:17:02,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:02,888 INFO L225 Difference]: With dead ends: 100 [2022-11-18 20:17:02,888 INFO L226 Difference]: Without dead ends: 100 [2022-11-18 20:17:02,888 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:17:02,889 INFO L413 NwaCegarLoop]: 47 mSDtfsCounter, 49 mSDsluCounter, 134 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 181 SdHoareTripleChecker+Invalid, 132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:02,890 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [49 Valid, 181 Invalid, 132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-18 20:17:02,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-11-18 20:17:02,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 88. [2022-11-18 20:17:02,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 62 states have (on average 1.3870967741935485) internal successors, (86), 81 states have internal predecessors, (86), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:02,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 92 transitions. [2022-11-18 20:17:02,894 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 92 transitions. Word has length 42 [2022-11-18 20:17:02,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:02,894 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 92 transitions. [2022-11-18 20:17:02,894 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 1 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:17:02,894 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 92 transitions. [2022-11-18 20:17:02,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-18 20:17:02,895 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:02,895 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:02,909 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:03,105 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:03,105 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr6REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:03,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:03,106 INFO L85 PathProgramCache]: Analyzing trace with hash 1792532577, now seen corresponding path program 1 times [2022-11-18 20:17:03,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:03,106 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [383108161] [2022-11-18 20:17:03,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:03,107 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:03,107 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:03,109 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:03,133 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-18 20:17:03,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:03,308 INFO L263 TraceCheckSpWp]: Trace formula consists of 259 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-18 20:17:03,309 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:03,323 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-18 20:17:03,324 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:03,324 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:03,324 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [383108161] [2022-11-18 20:17:03,324 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [383108161] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:03,324 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:03,325 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-18 20:17:03,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026522682] [2022-11-18 20:17:03,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:03,325 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-18 20:17:03,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:03,326 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-18 20:17:03,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:17:03,327 INFO L87 Difference]: Start difference. First operand 88 states and 92 transitions. Second operand has 3 states, 2 states have (on average 10.5) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:17:03,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:03,447 INFO L93 Difference]: Finished difference Result 99 states and 104 transitions. [2022-11-18 20:17:03,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-18 20:17:03,447 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 10.5) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 44 [2022-11-18 20:17:03,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:03,450 INFO L225 Difference]: With dead ends: 99 [2022-11-18 20:17:03,450 INFO L226 Difference]: Without dead ends: 99 [2022-11-18 20:17:03,450 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-18 20:17:03,451 INFO L413 NwaCegarLoop]: 52 mSDtfsCounter, 44 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:03,451 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 74 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:17:03,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2022-11-18 20:17:03,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 87. [2022-11-18 20:17:03,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 62 states have (on average 1.3709677419354838) internal successors, (85), 80 states have internal predecessors, (85), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:03,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 91 transitions. [2022-11-18 20:17:03,456 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 91 transitions. Word has length 44 [2022-11-18 20:17:03,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:03,456 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 91 transitions. [2022-11-18 20:17:03,456 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 10.5) internal successors, (21), 3 states have internal predecessors, (21), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-11-18 20:17:03,456 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 91 transitions. [2022-11-18 20:17:03,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-18 20:17:03,457 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:03,458 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:03,478 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:03,671 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:03,671 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:03,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:03,672 INFO L85 PathProgramCache]: Analyzing trace with hash 1792532578, now seen corresponding path program 1 times [2022-11-18 20:17:03,672 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:03,672 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2047017050] [2022-11-18 20:17:03,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:03,672 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:03,672 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:03,675 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:03,713 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-18 20:17:03,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:03,929 INFO L263 TraceCheckSpWp]: Trace formula consists of 259 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-18 20:17:03,930 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:04,024 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-18 20:17:04,024 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:04,024 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:04,024 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2047017050] [2022-11-18 20:17:04,025 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2047017050] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:04,025 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:04,025 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:17:04,025 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1883025380] [2022-11-18 20:17:04,025 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:04,025 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:17:04,025 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:04,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:17:04,026 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:17:04,026 INFO L87 Difference]: Start difference. First operand 87 states and 91 transitions. Second operand has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:04,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:04,168 INFO L93 Difference]: Finished difference Result 86 states and 90 transitions. [2022-11-18 20:17:04,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:17:04,168 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 44 [2022-11-18 20:17:04,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:04,169 INFO L225 Difference]: With dead ends: 86 [2022-11-18 20:17:04,169 INFO L226 Difference]: Without dead ends: 86 [2022-11-18 20:17:04,169 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2022-11-18 20:17:04,170 INFO L413 NwaCegarLoop]: 52 mSDtfsCounter, 144 mSDsluCounter, 29 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:04,170 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [144 Valid, 81 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:17:04,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-11-18 20:17:04,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2022-11-18 20:17:04,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 62 states have (on average 1.3548387096774193) internal successors, (84), 79 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:04,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 90 transitions. [2022-11-18 20:17:04,174 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 90 transitions. Word has length 44 [2022-11-18 20:17:04,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:04,174 INFO L495 AbstractCegarLoop]: Abstraction has 86 states and 90 transitions. [2022-11-18 20:17:04,175 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:04,175 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 90 transitions. [2022-11-18 20:17:04,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-11-18 20:17:04,176 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:04,176 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:04,195 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:04,385 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:04,385 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr8REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:04,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:04,386 INFO L85 PathProgramCache]: Analyzing trace with hash 341921058, now seen corresponding path program 1 times [2022-11-18 20:17:04,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:04,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [668758500] [2022-11-18 20:17:04,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:04,386 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:04,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:04,387 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:04,396 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-18 20:17:04,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:04,612 INFO L263 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-18 20:17:04,613 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:04,645 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-18 20:17:04,645 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:04,645 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:04,645 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [668758500] [2022-11-18 20:17:04,646 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [668758500] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:04,646 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:04,646 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-18 20:17:04,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876206678] [2022-11-18 20:17:04,646 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:04,647 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-18 20:17:04,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:04,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-18 20:17:04,647 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-18 20:17:04,648 INFO L87 Difference]: Start difference. First operand 86 states and 90 transitions. Second operand has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:04,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:04,782 INFO L93 Difference]: Finished difference Result 97 states and 102 transitions. [2022-11-18 20:17:04,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-18 20:17:04,783 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 46 [2022-11-18 20:17:04,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:04,784 INFO L225 Difference]: With dead ends: 97 [2022-11-18 20:17:04,784 INFO L226 Difference]: Without dead ends: 97 [2022-11-18 20:17:04,784 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:17:04,785 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 99 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:04,785 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [99 Valid, 88 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:17:04,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-11-18 20:17:04,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 85. [2022-11-18 20:17:04,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 62 states have (on average 1.3387096774193548) internal successors, (83), 78 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:04,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2022-11-18 20:17:04,789 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 46 [2022-11-18 20:17:04,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:04,789 INFO L495 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2022-11-18 20:17:04,790 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:04,790 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2022-11-18 20:17:04,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-11-18 20:17:04,790 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:04,791 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:04,806 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:05,001 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:05,001 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr9REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:05,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:05,002 INFO L85 PathProgramCache]: Analyzing trace with hash 341921059, now seen corresponding path program 1 times [2022-11-18 20:17:05,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:05,002 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1705796355] [2022-11-18 20:17:05,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:05,003 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:05,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:05,004 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:05,010 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-18 20:17:05,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:05,236 INFO L263 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-18 20:17:05,238 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:05,374 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-18 20:17:05,374 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:05,375 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:05,375 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1705796355] [2022-11-18 20:17:05,375 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1705796355] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:05,375 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:05,375 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-18 20:17:05,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850480598] [2022-11-18 20:17:05,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:05,376 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-18 20:17:05,376 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:05,376 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-18 20:17:05,376 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-18 20:17:05,376 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:05,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:05,516 INFO L93 Difference]: Finished difference Result 83 states and 87 transitions. [2022-11-18 20:17:05,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-18 20:17:05,517 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 46 [2022-11-18 20:17:05,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:05,518 INFO L225 Difference]: With dead ends: 83 [2022-11-18 20:17:05,518 INFO L226 Difference]: Without dead ends: 83 [2022-11-18 20:17:05,518 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2022-11-18 20:17:05,519 INFO L413 NwaCegarLoop]: 51 mSDtfsCounter, 130 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:05,519 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [130 Valid, 75 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-18 20:17:05,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-11-18 20:17:05,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2022-11-18 20:17:05,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 62 states have (on average 1.3064516129032258) internal successors, (81), 76 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:05,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2022-11-18 20:17:05,522 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 46 [2022-11-18 20:17:05,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:05,523 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2022-11-18 20:17:05,523 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.75) internal successors, (23), 5 states have internal predecessors, (23), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:05,523 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2022-11-18 20:17:05,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-11-18 20:17:05,524 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:05,524 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:05,543 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:05,733 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:05,733 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr10REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:05,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:05,734 INFO L85 PathProgramCache]: Analyzing trace with hash -2126344669, now seen corresponding path program 1 times [2022-11-18 20:17:05,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:05,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1209795277] [2022-11-18 20:17:05,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:05,734 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:05,734 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:05,735 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:05,736 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-18 20:17:05,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:05,995 INFO L263 TraceCheckSpWp]: Trace formula consists of 281 conjuncts, 15 conjunts are in the unsatisfiable core [2022-11-18 20:17:05,998 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:06,022 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:17:06,171 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:06,201 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2022-11-18 20:17:06,242 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:17:06,242 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:06,242 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:06,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1209795277] [2022-11-18 20:17:06,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1209795277] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:06,243 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:06,243 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-18 20:17:06,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476320934] [2022-11-18 20:17:06,243 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:06,243 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-18 20:17:06,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:06,244 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-18 20:17:06,244 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2022-11-18 20:17:06,244 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:06,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:06,951 INFO L93 Difference]: Finished difference Result 94 states and 98 transitions. [2022-11-18 20:17:06,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 20:17:06,951 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 48 [2022-11-18 20:17:06,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:06,952 INFO L225 Difference]: With dead ends: 94 [2022-11-18 20:17:06,952 INFO L226 Difference]: Without dead ends: 94 [2022-11-18 20:17:06,953 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2022-11-18 20:17:06,953 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 104 mSDsluCounter, 193 mSDsCounter, 0 mSdLazyCounter, 201 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 233 SdHoareTripleChecker+Invalid, 204 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 201 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:06,954 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [105 Valid, 233 Invalid, 204 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 201 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-18 20:17:06,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-11-18 20:17:06,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 80. [2022-11-18 20:17:06,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 62 states have (on average 1.2580645161290323) internal successors, (78), 73 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:06,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 84 transitions. [2022-11-18 20:17:06,961 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 84 transitions. Word has length 48 [2022-11-18 20:17:06,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:06,962 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 84 transitions. [2022-11-18 20:17:06,962 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:06,962 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 84 transitions. [2022-11-18 20:17:06,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-11-18 20:17:06,963 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:06,963 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:06,989 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:07,173 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:07,174 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr11REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:07,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:07,174 INFO L85 PathProgramCache]: Analyzing trace with hash -2126344668, now seen corresponding path program 1 times [2022-11-18 20:17:07,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:07,175 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [633940820] [2022-11-18 20:17:07,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:07,175 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:07,175 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:07,176 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:07,183 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (20)] Waiting until timeout for monitored process [2022-11-18 20:17:07,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:07,485 INFO L263 TraceCheckSpWp]: Trace formula consists of 281 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-18 20:17:07,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:07,516 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:07,713 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:07,720 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:07,760 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-11-18 20:17:07,768 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:17:07,839 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:17:07,839 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:07,840 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:07,840 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [633940820] [2022-11-18 20:17:07,840 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [633940820] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:07,840 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:07,840 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-18 20:17:07,840 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121289637] [2022-11-18 20:17:07,840 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:07,841 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-11-18 20:17:07,841 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:07,841 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-11-18 20:17:07,841 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2022-11-18 20:17:07,841 INFO L87 Difference]: Start difference. First operand 80 states and 84 transitions. Second operand has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:08,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:08,573 INFO L93 Difference]: Finished difference Result 80 states and 83 transitions. [2022-11-18 20:17:08,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-18 20:17:08,574 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 48 [2022-11-18 20:17:08,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:08,574 INFO L225 Difference]: With dead ends: 80 [2022-11-18 20:17:08,575 INFO L226 Difference]: Without dead ends: 80 [2022-11-18 20:17:08,575 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2022-11-18 20:17:08,576 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 120 mSDsluCounter, 195 mSDsCounter, 0 mSdLazyCounter, 168 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 237 SdHoareTripleChecker+Invalid, 169 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 168 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:08,576 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [121 Valid, 237 Invalid, 169 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 168 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-11-18 20:17:08,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-11-18 20:17:08,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 78. [2022-11-18 20:17:08,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 62 states have (on average 1.2258064516129032) internal successors, (76), 71 states have internal predecessors, (76), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:08,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2022-11-18 20:17:08,579 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 82 transitions. Word has length 48 [2022-11-18 20:17:08,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:08,580 INFO L495 AbstractCegarLoop]: Abstraction has 78 states and 82 transitions. [2022-11-18 20:17:08,580 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:08,580 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 82 transitions. [2022-11-18 20:17:08,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-11-18 20:17:08,581 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:08,581 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:08,592 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (20)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:08,788 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:08,789 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:08,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:08,789 INFO L85 PathProgramCache]: Analyzing trace with hash 987206626, now seen corresponding path program 1 times [2022-11-18 20:17:08,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:08,789 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [608602856] [2022-11-18 20:17:08,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:08,790 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:08,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:08,791 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:08,794 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-18 20:17:09,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:09,147 INFO L263 TraceCheckSpWp]: Trace formula consists of 287 conjuncts, 36 conjunts are in the unsatisfiable core [2022-11-18 20:17:09,150 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:09,375 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:09,709 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:09,710 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 20:17:09,776 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:09,787 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:09,814 INFO L321 Elim1Store]: treesize reduction 19, result has 47.2 percent of original size [2022-11-18 20:17:09,814 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 28 [2022-11-18 20:17:09,826 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:17:09,983 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2022-11-18 20:17:09,990 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:17:10,175 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:17:10,223 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-11-18 20:17:10,223 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:10,223 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:10,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [608602856] [2022-11-18 20:17:10,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [608602856] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:10,224 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:10,224 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2022-11-18 20:17:10,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [305806704] [2022-11-18 20:17:10,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:10,224 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-18 20:17:10,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:10,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-18 20:17:10,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2022-11-18 20:17:10,225 INFO L87 Difference]: Start difference. First operand 78 states and 82 transitions. Second operand has 14 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 13 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:10,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:10,699 INFO L93 Difference]: Finished difference Result 78 states and 81 transitions. [2022-11-18 20:17:10,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-18 20:17:10,700 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 13 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 50 [2022-11-18 20:17:10,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:10,701 INFO L225 Difference]: With dead ends: 78 [2022-11-18 20:17:10,701 INFO L226 Difference]: Without dead ends: 78 [2022-11-18 20:17:10,701 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2022-11-18 20:17:10,702 INFO L413 NwaCegarLoop]: 45 mSDtfsCounter, 14 mSDsluCounter, 341 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 386 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 94 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:10,702 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 386 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 94 Unchecked, 0.3s Time] [2022-11-18 20:17:10,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2022-11-18 20:17:10,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2022-11-18 20:17:10,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 62 states have (on average 1.2096774193548387) internal successors, (75), 71 states have internal predecessors, (75), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:10,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 81 transitions. [2022-11-18 20:17:10,706 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 81 transitions. Word has length 50 [2022-11-18 20:17:10,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:10,706 INFO L495 AbstractCegarLoop]: Abstraction has 78 states and 81 transitions. [2022-11-18 20:17:10,707 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 2.5384615384615383) internal successors, (33), 13 states have internal predecessors, (33), 2 states have call successors, (2), 1 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-18 20:17:10,707 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 81 transitions. [2022-11-18 20:17:10,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-11-18 20:17:10,707 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:10,708 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:10,729 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (21)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:10,908 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:10,908 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr14REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:10,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:10,909 INFO L85 PathProgramCache]: Analyzing trace with hash -2063364139, now seen corresponding path program 1 times [2022-11-18 20:17:10,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:10,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1957850711] [2022-11-18 20:17:10,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:10,909 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:10,909 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:10,910 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:10,913 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (22)] Waiting until timeout for monitored process [2022-11-18 20:17:11,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:11,273 INFO L263 TraceCheckSpWp]: Trace formula consists of 297 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-18 20:17:11,277 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:11,350 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:17:11,637 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:12,062 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:17:12,062 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 24 [2022-11-18 20:17:12,087 INFO L321 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-18 20:17:12,087 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 22 [2022-11-18 20:17:12,103 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-11-18 20:17:12,607 INFO L321 Elim1Store]: treesize reduction 29, result has 19.4 percent of original size [2022-11-18 20:17:12,607 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 29 treesize of output 24 [2022-11-18 20:17:12,785 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:12,811 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:12,812 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 25 [2022-11-18 20:17:12,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:17:13,298 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:17:13,298 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 45 treesize of output 24 [2022-11-18 20:17:13,673 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:17:13,673 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:13,673 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:13,673 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1957850711] [2022-11-18 20:17:13,673 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1957850711] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:13,674 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:13,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-11-18 20:17:13,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [252187124] [2022-11-18 20:17:13,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:13,674 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-18 20:17:13,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:13,675 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-18 20:17:13,675 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=483, Unknown=1, NotChecked=0, Total=552 [2022-11-18 20:17:13,675 INFO L87 Difference]: Start difference. First operand 78 states and 81 transitions. Second operand has 24 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:17:14,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:14,170 INFO L93 Difference]: Finished difference Result 80 states and 85 transitions. [2022-11-18 20:17:14,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-18 20:17:14,171 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) Word has length 53 [2022-11-18 20:17:14,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:14,172 INFO L225 Difference]: With dead ends: 80 [2022-11-18 20:17:14,172 INFO L226 Difference]: Without dead ends: 80 [2022-11-18 20:17:14,173 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=92, Invalid=609, Unknown=1, NotChecked=0, Total=702 [2022-11-18 20:17:14,173 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 21 mSDsluCounter, 311 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 349 SdHoareTripleChecker+Invalid, 336 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 203 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:14,174 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 349 Invalid, 336 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 130 Invalid, 0 Unknown, 203 Unchecked, 0.3s Time] [2022-11-18 20:17:14,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-11-18 20:17:14,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2022-11-18 20:17:14,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 64 states have (on average 1.234375) internal successors, (79), 73 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:14,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 85 transitions. [2022-11-18 20:17:14,177 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 85 transitions. Word has length 53 [2022-11-18 20:17:14,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:14,178 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 85 transitions. [2022-11-18 20:17:14,178 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:17:14,178 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 85 transitions. [2022-11-18 20:17:14,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-11-18 20:17:14,179 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:14,179 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:14,195 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (22)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:14,394 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:14,394 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:14,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:14,395 INFO L85 PathProgramCache]: Analyzing trace with hash -2063364138, now seen corresponding path program 1 times [2022-11-18 20:17:14,395 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:14,396 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1734926712] [2022-11-18 20:17:14,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:14,396 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:14,396 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:14,397 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:14,398 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (23)] Waiting until timeout for monitored process [2022-11-18 20:17:14,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:14,757 INFO L263 TraceCheckSpWp]: Trace formula consists of 297 conjuncts, 66 conjunts are in the unsatisfiable core [2022-11-18 20:17:14,763 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:14,829 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:15,011 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:15,020 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:15,249 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2022-11-18 20:17:15,257 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:17:15,789 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:17:15,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 16 treesize of output 22 [2022-11-18 20:17:15,814 INFO L321 Elim1Store]: treesize reduction 21, result has 25.0 percent of original size [2022-11-18 20:17:15,815 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 16 [2022-11-18 20:17:15,831 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-18 20:17:15,875 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:17:15,875 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:17:15,886 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:17:16,418 INFO L321 Elim1Store]: treesize reduction 29, result has 19.4 percent of original size [2022-11-18 20:17:16,419 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 22 [2022-11-18 20:17:16,463 INFO L321 Elim1Store]: treesize reduction 29, result has 19.4 percent of original size [2022-11-18 20:17:16,464 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 20 [2022-11-18 20:17:16,701 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:16,702 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 23 [2022-11-18 20:17:16,733 INFO L321 Elim1Store]: treesize reduction 53, result has 17.2 percent of original size [2022-11-18 20:17:16,734 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 25 [2022-11-18 20:17:17,321 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:17:17,352 INFO L321 Elim1Store]: treesize reduction 31, result has 8.8 percent of original size [2022-11-18 20:17:17,352 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 75 treesize of output 43 [2022-11-18 20:17:17,372 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:17,382 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-18 20:17:17,383 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 18 [2022-11-18 20:17:17,761 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:17:17,761 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:17,761 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:17,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1734926712] [2022-11-18 20:17:17,762 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1734926712] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:17,762 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:17,762 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2022-11-18 20:17:17,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050652401] [2022-11-18 20:17:17,763 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:17,763 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-18 20:17:17,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:17,764 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-18 20:17:17,764 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=483, Unknown=1, NotChecked=0, Total=552 [2022-11-18 20:17:17,765 INFO L87 Difference]: Start difference. First operand 80 states and 85 transitions. Second operand has 24 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:17:18,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:18,313 INFO L93 Difference]: Finished difference Result 80 states and 84 transitions. [2022-11-18 20:17:18,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-18 20:17:18,314 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) Word has length 53 [2022-11-18 20:17:18,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:18,317 INFO L225 Difference]: With dead ends: 80 [2022-11-18 20:17:18,317 INFO L226 Difference]: Without dead ends: 80 [2022-11-18 20:17:18,318 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=92, Invalid=609, Unknown=1, NotChecked=0, Total=702 [2022-11-18 20:17:18,319 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 19 mSDsluCounter, 311 mSDsCounter, 0 mSdLazyCounter, 100 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 350 SdHoareTripleChecker+Invalid, 274 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 100 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 171 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:18,320 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 350 Invalid, 274 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 100 Invalid, 0 Unknown, 171 Unchecked, 0.3s Time] [2022-11-18 20:17:18,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-11-18 20:17:18,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2022-11-18 20:17:18,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 64 states have (on average 1.21875) internal successors, (78), 73 states have internal predecessors, (78), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:18,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 84 transitions. [2022-11-18 20:17:18,329 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 84 transitions. Word has length 53 [2022-11-18 20:17:18,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:18,329 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 84 transitions. [2022-11-18 20:17:18,329 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:17:18,330 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 84 transitions. [2022-11-18 20:17:18,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-18 20:17:18,330 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:18,331 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:18,346 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (23)] Ended with exit code 0 [2022-11-18 20:17:18,546 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:18,546 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:18,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:18,547 INFO L85 PathProgramCache]: Analyzing trace with hash 460219817, now seen corresponding path program 1 times [2022-11-18 20:17:18,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:18,547 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [838546514] [2022-11-18 20:17:18,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:18,547 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:18,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:18,549 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:18,590 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (24)] Waiting until timeout for monitored process [2022-11-18 20:17:18,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:18,899 INFO L263 TraceCheckSpWp]: Trace formula consists of 299 conjuncts, 43 conjunts are in the unsatisfiable core [2022-11-18 20:17:18,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:19,072 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:19,211 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-11-18 20:17:19,523 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:17:19,524 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 21 [2022-11-18 20:17:19,532 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-18 20:17:19,935 INFO L321 Elim1Store]: treesize reduction 29, result has 19.4 percent of original size [2022-11-18 20:17:19,936 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 26 treesize of output 21 [2022-11-18 20:17:20,096 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:20,111 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:20,112 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2022-11-18 20:17:20,241 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:17:20,540 INFO L321 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2022-11-18 20:17:20,541 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 14 [2022-11-18 20:17:20,632 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 20 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:17:20,632 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:17:20,877 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 78 [2022-11-18 20:17:27,240 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (bvadd |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset| (_ bv4 32)))) (let ((.cse0 (let ((.cse2 (let ((.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse1 |c_ULTIMATE.start_sll_prepend_#t~mem8#1.base|)))) (store .cse3 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse3 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|))))) (select .cse2 (select (select .cse2 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))))) (and (not (= (select .cse0 .cse1) (_ bv0 32))) (or (and (= |c_ULTIMATE.start_main_~#s~0#1.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| |c_ULTIMATE.start_sll_prepend_~head#1.offset|)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (not (= (select .cse0 (bvadd (_ bv4 32) v_arrayElimCell_72)) (_ bv0 32)))))))) is different from false [2022-11-18 20:17:29,306 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (bvadd |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset| (_ bv4 32)))) (let ((.cse0 (let ((.cse2 (let ((.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse1 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse3 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse3 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|))))) (select .cse2 (select (select .cse2 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))))) (and (not (= (select .cse0 .cse1) (_ bv0 32))) (or (and (= |c_ULTIMATE.start_main_~#s~0#1.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| |c_ULTIMATE.start_sll_prepend_~head#1.offset|)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (not (= (select .cse0 (bvadd (_ bv4 32) v_arrayElimCell_72)) (_ bv0 32)))))))) is different from false [2022-11-18 20:17:31,360 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse1 (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_prepend_#t~ret7#1.offset|))) (let ((.cse0 (let ((.cse2 (let ((.cse3 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|) .cse1 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse3 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse3 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_#t~ret7#1.base|))))) (select .cse2 (select (select .cse2 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))))) (and (not (= (select .cse0 .cse1) (_ bv0 32))) (or (and (= |c_ULTIMATE.start_main_~#s~0#1.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| |c_ULTIMATE.start_sll_prepend_~head#1.offset|)) (forall ((v_arrayElimCell_72 (_ BitVec 32))) (not (= (select .cse0 (bvadd (_ bv4 32) v_arrayElimCell_72)) (_ bv0 32)))))))) is different from false [2022-11-18 20:17:32,729 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:32,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [838546514] [2022-11-18 20:17:32,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [838546514] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:17:32,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1778467400] [2022-11-18 20:17:32,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:32,729 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-18 20:17:32,729 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 [2022-11-18 20:17:32,731 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-18 20:17:32,732 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (25)] Waiting until timeout for monitored process [2022-11-18 20:17:33,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:33,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 299 conjuncts, 42 conjunts are in the unsatisfiable core [2022-11-18 20:17:33,353 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:34,319 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-11-18 20:17:34,560 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:17:34,561 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 21 [2022-11-18 20:17:34,571 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2022-11-18 20:17:35,303 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:35,303 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2022-11-18 20:17:35,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:35,618 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 22 [2022-11-18 20:17:35,634 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:35,846 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:17:36,694 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:17:36,694 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 14 [2022-11-18 20:17:36,706 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 20 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:17:36,706 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:17:36,749 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 78 [2022-11-18 20:17:38,677 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1778467400] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:17:38,677 INFO L184 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2022-11-18 20:17:38,677 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 37 [2022-11-18 20:17:38,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156893146] [2022-11-18 20:17:38,679 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2022-11-18 20:17:38,679 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-18 20:17:38,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:38,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-18 20:17:38,680 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=1649, Unknown=14, NotChecked=252, Total=2070 [2022-11-18 20:17:38,680 INFO L87 Difference]: Start difference. First operand 80 states and 84 transitions. Second operand has 37 states, 35 states have (on average 2.0285714285714285) internal successors, (71), 32 states have internal predecessors, (71), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:17:39,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:39,594 INFO L93 Difference]: Finished difference Result 86 states and 89 transitions. [2022-11-18 20:17:39,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-18 20:17:39,595 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 35 states have (on average 2.0285714285714285) internal successors, (71), 32 states have internal predecessors, (71), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) Word has length 54 [2022-11-18 20:17:39,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:39,596 INFO L225 Difference]: With dead ends: 86 [2022-11-18 20:17:39,596 INFO L226 Difference]: Without dead ends: 86 [2022-11-18 20:17:39,597 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 90 SyntacticMatches, 4 SemanticMatches, 50 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 689 ImplicationChecksByTransitivity, 17.3s TimeCoverageRelationStatistics Valid=209, Invalid=2139, Unknown=16, NotChecked=288, Total=2652 [2022-11-18 20:17:39,598 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 30 mSDsluCounter, 462 mSDsCounter, 0 mSdLazyCounter, 149 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 500 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 149 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 157 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:39,598 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 500 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 149 Invalid, 0 Unknown, 157 Unchecked, 0.4s Time] [2022-11-18 20:17:39,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2022-11-18 20:17:39,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 80. [2022-11-18 20:17:39,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 64 states have (on average 1.203125) internal successors, (77), 73 states have internal predecessors, (77), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:39,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 83 transitions. [2022-11-18 20:17:39,601 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 83 transitions. Word has length 54 [2022-11-18 20:17:39,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:39,602 INFO L495 AbstractCegarLoop]: Abstraction has 80 states and 83 transitions. [2022-11-18 20:17:39,602 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 35 states have (on average 2.0285714285714285) internal successors, (71), 32 states have internal predecessors, (71), 4 states have call successors, (4), 2 states have call predecessors, (4), 3 states have return successors, (6), 6 states have call predecessors, (6), 4 states have call successors, (6) [2022-11-18 20:17:39,602 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 83 transitions. [2022-11-18 20:17:39,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-11-18 20:17:39,603 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:39,603 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:39,617 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (24)] Forceful destruction successful, exit code 0 [2022-11-18 20:17:39,820 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (25)] Ended with exit code 0 [2022-11-18 20:17:40,017 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3,25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt [2022-11-18 20:17:40,017 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:40,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:40,018 INFO L85 PathProgramCache]: Analyzing trace with hash 1381954359, now seen corresponding path program 1 times [2022-11-18 20:17:40,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:40,018 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1844436729] [2022-11-18 20:17:40,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:40,018 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:40,018 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:40,019 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:40,020 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (26)] Waiting until timeout for monitored process [2022-11-18 20:17:40,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:40,405 INFO L263 TraceCheckSpWp]: Trace formula consists of 305 conjuncts, 44 conjunts are in the unsatisfiable core [2022-11-18 20:17:40,409 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:40,555 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:40,687 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:17:40,990 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:17:40,990 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:17:41,008 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:17:41,372 INFO L321 Elim1Store]: treesize reduction 29, result has 19.4 percent of original size [2022-11-18 20:17:41,372 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 20 [2022-11-18 20:17:41,514 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:41,534 INFO L321 Elim1Store]: treesize reduction 53, result has 17.2 percent of original size [2022-11-18 20:17:41,535 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 30 treesize of output 25 [2022-11-18 20:17:41,639 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2022-11-18 20:17:41,902 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:41,913 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-18 20:17:41,913 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 18 [2022-11-18 20:17:42,102 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:17:42,102 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-18 20:17:42,102 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:42,102 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1844436729] [2022-11-18 20:17:42,102 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1844436729] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-18 20:17:42,102 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-18 20:17:42,102 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2022-11-18 20:17:42,103 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444235985] [2022-11-18 20:17:42,103 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-18 20:17:42,103 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-11-18 20:17:42,103 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2022-11-18 20:17:42,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-18 20:17:42,104 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=526, Unknown=2, NotChecked=0, Total=600 [2022-11-18 20:17:42,104 INFO L87 Difference]: Start difference. First operand 80 states and 83 transitions. Second operand has 25 states, 23 states have (on average 2.0869565217391304) internal successors, (48), 22 states have internal predecessors, (48), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:17:42,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-18 20:17:42,575 INFO L93 Difference]: Finished difference Result 87 states and 89 transitions. [2022-11-18 20:17:42,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-18 20:17:42,576 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 23 states have (on average 2.0869565217391304) internal successors, (48), 22 states have internal predecessors, (48), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) Word has length 55 [2022-11-18 20:17:42,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-18 20:17:42,576 INFO L225 Difference]: With dead ends: 87 [2022-11-18 20:17:42,576 INFO L226 Difference]: Without dead ends: 87 [2022-11-18 20:17:42,577 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=96, Invalid=658, Unknown=2, NotChecked=0, Total=756 [2022-11-18 20:17:42,577 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 49 mSDsluCounter, 341 mSDsCounter, 0 mSdLazyCounter, 141 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 49 SdHoareTripleChecker+Valid, 380 SdHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 94 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-18 20:17:42,578 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [49 Valid, 380 Invalid, 240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 141 Invalid, 0 Unknown, 94 Unchecked, 0.3s Time] [2022-11-18 20:17:42,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-11-18 20:17:42,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 82. [2022-11-18 20:17:42,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 66 states have (on average 1.196969696969697) internal successors, (79), 75 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-18 20:17:42,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 85 transitions. [2022-11-18 20:17:42,581 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 85 transitions. Word has length 55 [2022-11-18 20:17:42,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-18 20:17:42,581 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 85 transitions. [2022-11-18 20:17:42,581 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 23 states have (on average 2.0869565217391304) internal successors, (48), 22 states have internal predecessors, (48), 2 states have call successors, (2), 2 states have call predecessors, (2), 3 states have return successors, (3), 3 states have call predecessors, (3), 2 states have call successors, (3) [2022-11-18 20:17:42,582 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 85 transitions. [2022-11-18 20:17:42,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-11-18 20:17:42,582 INFO L187 NwaCegarLoop]: Found error trace [2022-11-18 20:17:42,582 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-18 20:17:42,593 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (26)] Ended with exit code 0 [2022-11-18 20:17:42,788 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:42,789 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1REQUIRES_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 28 more)] === [2022-11-18 20:17:42,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-18 20:17:42,789 INFO L85 PathProgramCache]: Analyzing trace with hash 913244988, now seen corresponding path program 1 times [2022-11-18 20:17:42,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2022-11-18 20:17:42,789 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1633271550] [2022-11-18 20:17:42,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:42,790 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2022-11-18 20:17:42,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat [2022-11-18 20:17:42,790 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-18 20:17:42,792 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (27)] Waiting until timeout for monitored process [2022-11-18 20:17:43,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:43,221 INFO L263 TraceCheckSpWp]: Trace formula consists of 311 conjuncts, 93 conjunts are in the unsatisfiable core [2022-11-18 20:17:43,227 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:43,250 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:43,250 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:17:43,335 WARN L859 $PredicateComparison]: unable to prove that (and (exists ((v_ArrVal_1475 (_ BitVec 1)) (|node_create_~temp~0#1.base| (_ BitVec 32))) (and (= (store |c_old(#valid)| |node_create_~temp~0#1.base| v_ArrVal_1475) |c_#valid|) (= (_ bv0 1) (select |c_old(#valid)| |node_create_~temp~0#1.base|)))) (bvult (_ bv0 32) |c_#StackHeapBarrier|) (not (= (bvadd |c_#StackHeapBarrier| (_ bv1 32)) (_ bv0 32)))) is different from true [2022-11-18 20:17:43,445 INFO L321 Elim1Store]: treesize reduction 22, result has 35.3 percent of original size [2022-11-18 20:17:43,445 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2022-11-18 20:17:43,654 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:43,836 INFO L321 Elim1Store]: treesize reduction 22, result has 35.3 percent of original size [2022-11-18 20:17:43,837 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2022-11-18 20:17:44,053 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:44,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:44,075 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-18 20:17:44,550 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 22 [2022-11-18 20:17:44,559 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-11-18 20:17:44,565 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:17:44,579 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:17:45,233 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-18 20:17:45,234 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 20 [2022-11-18 20:17:45,249 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:17:45,291 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:45,293 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 40 [2022-11-18 20:17:45,353 INFO L321 Elim1Store]: treesize reduction 19, result has 47.2 percent of original size [2022-11-18 20:17:45,354 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 28 [2022-11-18 20:17:45,367 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:17:45,412 INFO L321 Elim1Store]: treesize reduction 12, result has 52.0 percent of original size [2022-11-18 20:17:45,412 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 24 treesize of output 26 [2022-11-18 20:17:46,198 INFO L321 Elim1Store]: treesize reduction 29, result has 19.4 percent of original size [2022-11-18 20:17:46,198 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 25 treesize of output 20 [2022-11-18 20:17:46,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:46,234 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 35 [2022-11-18 20:17:46,248 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 4 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2022-11-18 20:17:46,893 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:46,895 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 36 [2022-11-18 20:17:46,925 INFO L321 Elim1Store]: treesize reduction 27, result has 48.1 percent of original size [2022-11-18 20:17:46,925 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 36 [2022-11-18 20:17:46,932 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:17:46,998 INFO L321 Elim1Store]: treesize reduction 53, result has 17.2 percent of original size [2022-11-18 20:17:46,999 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 25 [2022-11-18 20:17:47,897 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:17:47,926 INFO L321 Elim1Store]: treesize reduction 31, result has 8.8 percent of original size [2022-11-18 20:17:47,927 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 123 treesize of output 59 [2022-11-18 20:17:47,954 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:17:47,968 INFO L321 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2022-11-18 20:17:47,969 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 18 [2022-11-18 20:17:48,485 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:17:48,583 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 12 not checked. [2022-11-18 20:17:48,584 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:17:49,771 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1491 (Array (_ BitVec 32) (_ BitVec 32))) (v_ArrVal_1497 (Array (_ BitVec 32) (_ BitVec 32)))) (= (let ((.cse5 (bvadd |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset| (_ bv4 32)))) (let ((.cse3 (let ((.cse6 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse5 |c_ULTIMATE.start_sll_prepend_#t~mem8#1.offset|)))) (store .cse6 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse6 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))) (.cse0 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse5 |c_ULTIMATE.start_sll_prepend_#t~mem8#1.base|)))) (store .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|))))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse2 (bvadd (select (select .cse3 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|) (_ bv4 32)))) (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| v_ArrVal_1491) |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1497) (select (select .cse0 .cse1) .cse2)) (select (select .cse3 .cse1) .cse2))))) |c_ULTIMATE.start_main_~data~0#1|)) is different from false [2022-11-18 20:17:49,856 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1491 (Array (_ BitVec 32) (_ BitVec 32))) (v_ArrVal_1497 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (let ((.cse5 (bvadd |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset| (_ bv4 32)))) (let ((.cse3 (let ((.cse6 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse5 (select (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse6 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse6 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))) (.cse0 (let ((.cse4 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|) .cse5 (select (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (store .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select .cse4 |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|))))) (let ((.cse1 (select (select .cse0 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)) (.cse2 (bvadd (_ bv4 32) (select (select .cse3 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|)))) (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base| v_ArrVal_1491) |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1497) (select (select .cse0 .cse1) .cse2)) (select (select .cse3 .cse1) .cse2))))))) is different from false [2022-11-18 20:17:56,241 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2022-11-18 20:17:56,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1633271550] [2022-11-18 20:17:56,241 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1633271550] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-18 20:17:56,241 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [578476254] [2022-11-18 20:17:56,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-18 20:17:56,242 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-18 20:17:56,242 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 [2022-11-18 20:17:56,242 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-18 20:17:56,245 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e680e5f7-9426-42be-96d3-30b53819355d/bin/uautomizer-TMbwUNV5ro/cvc4 --incremental --print-success --lang smt (28)] Waiting until timeout for monitored process [2022-11-18 20:17:56,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-18 20:17:56,865 INFO L263 TraceCheckSpWp]: Trace formula consists of 311 conjuncts, 78 conjunts are in the unsatisfiable core [2022-11-18 20:17:56,883 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-18 20:17:57,494 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 7 [2022-11-18 20:17:57,503 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-18 20:17:57,789 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:17:58,871 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 18 [2022-11-18 20:18:00,345 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 23 [2022-11-18 20:18:00,356 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-11-18 20:18:00,363 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2022-11-18 20:18:00,369 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:18:02,482 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:18:02,483 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 41 [2022-11-18 20:18:02,528 INFO L321 Elim1Store]: treesize reduction 6, result has 57.1 percent of original size [2022-11-18 20:18:02,528 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 17 [2022-11-18 20:18:02,539 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-18 20:18:02,561 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-18 20:18:04,031 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:18:04,032 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 36 [2022-11-18 20:18:04,060 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 22 [2022-11-18 20:18:04,852 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:18:04,853 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 37 [2022-11-18 20:18:04,908 INFO L321 Elim1Store]: treesize reduction 27, result has 48.1 percent of original size [2022-11-18 20:18:04,909 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 36 [2022-11-18 20:18:04,919 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-18 20:18:04,933 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-18 20:18:06,714 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:18:06,728 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:18:06,728 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 97 treesize of output 45 [2022-11-18 20:18:06,749 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-18 20:18:06,750 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 12 [2022-11-18 20:18:08,259 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-18 20:18:08,260 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-18 20:18:08,275 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 14 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-18 20:18:08,276 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-18 20:18:12,320 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-18 20:18:12,320 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 1136 treesize of output 944 [2022-11-18 20:20:19,981 WARN L859 $PredicateComparison]: unable to prove that (let ((.cse930 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base| (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|) |c_ULTIMATE.start_sll_prepend_~head#1.offset| |c_ULTIMATE.start_sll_prepend_~new_head~1#1.base|)))) (let ((.cse641 (select (select .cse930 |c_ULTIMATE.start_main_~#s~0#1.base|) |c_ULTIMATE.start_main_~#s~0#1.offset|))) (let ((.cse25 (select .cse930 .cse641))) (let ((.cse151 (select .cse25 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (let ((.cse24 (bvadd |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset| (_ bv4 32))) (.cse914 (select |c_#length| .cse151))) (let ((.cse4 (= .cse641 |c_ULTIMATE.start_sll_prepend_~head#1.base|)) (.cse633 (bvadd |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset| (_ bv8 32))) (.cse422 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse929 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse151))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse929 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse929 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (.cse126 (not (bvule .cse24 .cse914))) (.cse125 (not (bvule |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset| .cse24))) (.cse141 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))) (.cse0 (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| .cse24)) (.cse22 (select .cse25 .cse24)) (.cse149 (bvadd (_ bv4294967292 32) |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (let ((.cse143 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse928 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse151))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse928 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse928 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (.cse839 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse927 (select .cse25 v_arrayElimIndex_11))) (let ((.cse925 (select |c_#length| .cse927)) (.cse926 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule v_arrayElimIndex_11 .cse925)) (not (bvule .cse926 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse925)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse927) .cse926))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse701 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse924 (select .cse25 v_arrayElimIndex_11))) (let ((.cse923 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse921 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse922 (select |c_#length| .cse924))) (or (not (bvule .cse921 .cse922)) (= (select (select .cse923 .cse924) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse923 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse921)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse922))))))) (.cse144 (not .cse0)) (.cse297 (select |c_#length| .cse22)) (.cse346 (and (or .cse126 .cse125 .cse422) (or .cse126 .cse125 .cse141))) (.cse175 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse920 (select .cse25 v_arrayElimIndex_11))) (let ((.cse918 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse919 (select |c_#length| .cse920))) (or (not (bvule .cse918 .cse919)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse920) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse918)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse919)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse335 (and (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse915 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse915 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse915 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) .cse125) (or .cse125 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse917 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse916 (select .cse917 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse916 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse917 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse916 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))))) (.cse135 (not (bvule .cse633 .cse914))) (.cse154 (not .cse4)) (.cse9 (= |c_ULTIMATE.start_main_~#s~0#1.base| |c_ULTIMATE.start_sll_prepend_~head#1.base|)) (.cse11 (= |c_ULTIMATE.start_main_~#s~0#1.offset| |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (let ((.cse129 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse913 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse912 (select .cse913 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse912 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse913 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse912 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (.cse642 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse911 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse911 .cse22) .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse911 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (.cse231 (and .cse9 .cse11)) (.cse237 (or .cse335 .cse126 .cse0 .cse135 .cse154)) (.cse347 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse909 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse910 (select .cse909 .cse151))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse909 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse910 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse910 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (.cse323 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse908 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse907 (select .cse908 .cse151)) (.cse906 (select .cse908 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse906 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse907 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse907 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse906 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (.cse47 (and (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse902 (select .cse25 v_arrayElimIndex_11))) (let ((.cse899 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse902)) (.cse900 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse901 (select |c_#length| .cse902))) (or (= (select .cse899 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse900 .cse901)) (= (select .cse899 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse900)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse901)))))) (= v_arrayElimIndex_11 .cse24))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse905 (select .cse25 v_arrayElimIndex_11))) (let ((.cse903 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse904 (select |c_#length| .cse905))) (or (not (bvule .cse903 .cse904)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse905) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse903)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse904)))))))) .cse175)) (.cse315 (or .cse0 .cse135 .cse154 .cse346)) (.cse173 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse898 (select .cse25 v_arrayElimIndex_11))) (let ((.cse895 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse898)) (.cse896 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse897 (select |c_#length| .cse898))) (or (= (select .cse895 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse896 .cse897)) (= (select .cse895 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse896)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse897)))))) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse174 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse894 (select .cse25 v_arrayElimIndex_11))) (let ((.cse892 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse893 (select |c_#length| .cse894))) (or (not (bvule .cse892 .cse893)) (= v_arrayElimIndex_11 .cse24) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse894) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse892)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse893)))))) .cse4)) (.cse312 (not .cse9)) (.cse300 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse891 (bvadd v_arrayElimCell_151 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse891)) (not (bvule .cse891 .cse297)))))) (.cse301 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse890 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse889 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse889 v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse890)) (not (bvule .cse890 .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse889 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (.cse313 (not .cse11)) (.cse138 (and .cse141 .cse422)) (.cse420 (or .cse0 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse888 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse887 (select .cse888 .cse151))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse887 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse887 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse888 .cse22) v_arrayElimCell_152)))))))) (.cse421 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse886 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse886 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse886 .cse22) v_arrayElimCell_152))))) .cse0)) (.cse423 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse885 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse885 .cse151) v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse885 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) .cse144)) (.cse424 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse884 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse882 (select .cse884 .cse151)) (.cse883 (select .cse884 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse882 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse882 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse883 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse883 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (.cse425 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse880 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse881 (select .cse880 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse880 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse881 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse881 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (.cse157 (or .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse879 (select .cse25 v_arrayElimIndex_11))) (let ((.cse876 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse878 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse877 (select |c_#length| .cse879))) (or (not (bvule .cse876 .cse877)) (= (select (select .cse878 .cse879) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse876)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse878 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse877)))))) .cse154)) (.cse167 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse874 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse875 (select .cse25 v_arrayElimIndex_11))) (let ((.cse871 (select .cse874 .cse875)) (.cse872 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse873 (select |c_#length| .cse875))) (or (= (select .cse871 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse872 .cse873)) (= (select .cse871 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse872)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse874 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse873)))))) .cse144 .cse154)) (.cse703 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse869 (select .cse25 v_arrayElimIndex_11)) (.cse868 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse866 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse870 (select .cse868 .cse22)) (.cse867 (select |c_#length| .cse869))) (or (not (bvule .cse866 .cse867)) (= (select (select .cse868 .cse869) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse870 v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse866)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse870 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse867)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse710 (or .cse701 .cse0)) (.cse719 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse865 (select .cse25 v_arrayElimIndex_11))) (let ((.cse863 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse864 (select |c_#length| .cse865))) (or (not (bvule .cse863 .cse864)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse865) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse863)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse864)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse763 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse861 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse862 (select .cse25 v_arrayElimIndex_11))) (let ((.cse859 (select .cse861 .cse862)) (.cse860 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse858 (select |c_#length| .cse862))) (or (not (bvule v_arrayElimIndex_11 .cse858)) (= (select .cse859 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse859 .cse860)) (not (bvule .cse860 v_arrayElimIndex_11)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse861 .cse22) .cse860)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse858)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse773 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse856 (select .cse25 v_arrayElimIndex_11))) (let ((.cse855 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse857 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse854 (select |c_#length| .cse856))) (or (not (bvule v_arrayElimIndex_11 .cse854)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse855 .cse856) .cse857)) (not (bvule .cse857 v_arrayElimIndex_11)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse855 .cse22) .cse857)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse854)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse757 (and .cse839 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse850 (select .cse25 v_arrayElimIndex_11))) (let ((.cse848 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse847 (select |c_#length| .cse850))) (or (not (bvule v_arrayElimIndex_11 .cse847)) (not (bvule .cse848 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse849 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse850))) (or (= (select .cse849 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse849 .cse848))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse847)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse852 (select .cse25 v_arrayElimIndex_11))) (let ((.cse853 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse851 (select |c_#length| .cse852))) (or (not (bvule v_arrayElimIndex_11 .cse851)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse852) .cse853)) (not (bvule .cse853 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse851)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) .cse4))) (.cse287 (and .cse141 .cse143)) (.cse800 (and .cse839 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse842 (select .cse25 v_arrayElimIndex_11))) (let ((.cse840 (select |c_#length| .cse842)) (.cse841 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule v_arrayElimIndex_11 .cse840)) (not (bvule .cse841 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse840)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse842) .cse841))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse846 (select .cse25 v_arrayElimIndex_11))) (let ((.cse844 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse843 (select |c_#length| .cse846))) (or (not (bvule v_arrayElimIndex_11 .cse843)) (not (bvule .cse844 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse845 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse846))) (or (= (select .cse845 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse845 .cse844))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse843)))))))) (.cse214 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse838 (select .cse25 v_arrayElimIndex_11))) (let ((.cse836 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse837 (select |c_#length| .cse838))) (or (not (bvule .cse836 .cse837)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse838) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse836)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse837)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (let ((.cse193 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse834 (select .cse25 v_arrayElimIndex_11))) (let ((.cse835 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse833 (select |c_#length| .cse834))) (or (not (bvule v_arrayElimIndex_11 .cse833)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse834) .cse835)) (not (bvule .cse835 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse833)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse213 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse832 (select .cse25 v_arrayElimIndex_11))) (let ((.cse829 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse832)) (.cse830 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse831 (select |c_#length| .cse832))) (or (= (select .cse829 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse830 .cse831)) (= (select .cse829 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse830)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse831)))))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse215 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse828 (select .cse25 v_arrayElimIndex_11))) (let ((.cse826 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse827 (select |c_#length| .cse828))) (or (not (bvule .cse826 .cse827)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse828) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse826)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse827)))))) .cse4)) (.cse66 (and .cse214 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse822 (select .cse25 v_arrayElimIndex_11))) (let ((.cse819 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse822)) (.cse820 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse821 (select |c_#length| .cse822))) (or (= (select .cse819 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse820 .cse821)) (= (select .cse819 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse820)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse821)))))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse825 (select .cse25 v_arrayElimIndex_11))) (let ((.cse823 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse824 (select |c_#length| .cse825))) (or (not (bvule .cse823 .cse824)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse825) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse823)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse824)))))))))) (.cse55 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse818 (select .cse25 v_arrayElimIndex_11))) (let ((.cse814 (select |c_#length| .cse818)) (.cse815 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule v_arrayElimIndex_11 .cse814)) (not (bvule .cse815 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse814)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse817 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse816 (select .cse817 .cse818))) (or (= (select .cse816 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse816 .cse815)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse817 .cse22) .cse815))))))))))) (.cse56 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse812 (select .cse25 v_arrayElimIndex_11))) (let ((.cse813 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse810 (select |c_#length| .cse812))) (or (not (bvule v_arrayElimIndex_11 .cse810)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse811 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse811 .cse812) .cse813)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse811 .cse22) .cse813))))) (not (bvule .cse813 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse810))))))) (.cse81 (or .cse11 .cse800)) (.cse82 (or .cse0 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse808 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse809 (select .cse25 v_arrayElimIndex_11))) (let ((.cse806 (select .cse808 .cse809)) (.cse807 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse805 (select |c_#length| .cse809))) (or (not (bvule v_arrayElimIndex_11 .cse805)) (= (select .cse806 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse806 .cse807)) (not (bvule .cse807 v_arrayElimIndex_11)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse808 .cse22) .cse807)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse805)))))))) (.cse89 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse803 (select .cse25 v_arrayElimIndex_11))) (let ((.cse804 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse801 (select |c_#length| .cse803))) (or (not (bvule v_arrayElimIndex_11 .cse801)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse802 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse802 .cse803) .cse804)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse802 .cse22) .cse804))))) (not (bvule .cse804 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse801)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse102 (or .cse9 .cse800)) (.cse113 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse799 (select .cse25 v_arrayElimIndex_11))) (let ((.cse795 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse794 (select |c_#length| .cse799))) (or (not (bvule v_arrayElimIndex_11 .cse794)) (not (bvule .cse795 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse798 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse796 (select .cse798 .cse799)) (.cse797 (select .cse798 .cse22))) (or (= (select .cse796 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse796 .cse795)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse797 .cse795)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse797 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse794))))))) (.cse5 (or .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse792 (select .cse25 v_arrayElimIndex_11))) (let ((.cse793 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse790 (select |c_#length| .cse792)) (.cse791 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (not (bvule v_arrayElimIndex_11 .cse790)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse791 .cse792) .cse793)) (not (bvule .cse793 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse790)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse791 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse154)) (.cse7 (or .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse788 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse789 (select .cse25 v_arrayElimIndex_11))) (let ((.cse786 (select .cse788 .cse789)) (.cse787 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse785 (select |c_#length| .cse789))) (or (not (bvule v_arrayElimIndex_11 .cse785)) (= (select .cse786 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse786 .cse787)) (not (bvule .cse787 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse785)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse788 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse154)) (.cse8 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse784 (select .cse25 v_arrayElimIndex_11))) (let ((.cse780 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse779 (select |c_#length| .cse784))) (or (not (bvule v_arrayElimIndex_11 .cse779)) (not (bvule .cse780 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse783 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse781 (select .cse783 .cse784)) (.cse782 (select .cse783 .cse22))) (or (= (select .cse781 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse781 .cse780)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse782 .cse780)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse782 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse779)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse127 (or .cse0 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse778 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse777 (select .cse778 .cse151))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse777 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse778 .cse22) .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse777 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) (.cse131 (or .cse287 .cse11)) (.cse132 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse776 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse774 (select .cse776 .cse151)) (.cse775 (select .cse776 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse774 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse775 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse774 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse775 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (.cse133 (or .cse9 .cse287)) (.cse142 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse151) .cse149))) .cse144)) (.cse15 (or .cse757 .cse11)) (.cse88 (or .cse0 .cse773)) (.cse122 (or .cse773 .cse4)) (.cse123 (or .cse763 .cse4)) (.cse91 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse771 (select .cse25 v_arrayElimIndex_11))) (let ((.cse769 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse768 (select |c_#length| .cse771))) (or (not (bvule v_arrayElimIndex_11 .cse768)) (not (bvule .cse769 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse770 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse772 (select .cse770 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse770 .cse771) .cse769)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse772 .cse769)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse772 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse768)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse124 (or .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse767 (select .cse25 v_arrayElimIndex_11))) (let ((.cse764 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse766 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse765 (select |c_#length| .cse767))) (or (not (bvule .cse764 .cse765)) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse766 .cse767) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse764)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse766 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse765)))))) .cse154)) (.cse155 (or .cse0 .cse763)) (.cse156 (or .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse761 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse762 (select .cse25 v_arrayElimIndex_11))) (let ((.cse758 (select .cse761 .cse762)) (.cse759 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse760 (select |c_#length| .cse762))) (or (= (select .cse758 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse759 .cse760)) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse758 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse759)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse761 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse760)))))) .cse154)) (.cse176 (or .cse9 .cse757)) (.cse464 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse756 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) v_arrayElimCell_152))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse756 .cse297)) (not (bvule v_arrayElimCell_152 .cse756)))))) (.cse488 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse754 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse754 .cse297)) (not (bvule v_arrayElimCell_152 .cse754)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse755 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse755 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse755 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))))) (.cse465 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse752 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse751 (select .cse752 (select .cse25 v_arrayElimIndex_11))) (.cse753 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (= (select .cse751 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (= (select .cse751 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse752 .cse22) v_arrayElimCell_152)) (not (bvule .cse753 .cse297)) (not (bvule v_arrayElimCell_152 .cse753))))))) (.cse405 (let ((.cse724 (and (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse746 (select .cse25 v_arrayElimIndex_11))) (let ((.cse744 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse745 (select |c_#length| .cse746))) (or (not (bvule .cse744 .cse745)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse746) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse744)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse745)))))) .cse719 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse750 (select .cse25 v_arrayElimIndex_11))) (let ((.cse747 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse750)) (.cse748 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse749 (select |c_#length| .cse750))) (or (= (select .cse747 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse748 .cse749)) (= (select .cse747 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse748)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse749))))))))) (and (or .cse11 .cse724) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse728 (select .cse25 v_arrayElimIndex_11))) (let ((.cse727 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse725 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse726 (select |c_#length| .cse728))) (or (not (bvule .cse725 .cse726)) (= (select (select .cse727 .cse728) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse727 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse725)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse726)))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse732 (select .cse25 v_arrayElimIndex_11))) (let ((.cse731 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse729 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse730 (select |c_#length| .cse732))) (or (not (bvule .cse729 .cse730)) (= (select (select .cse731 .cse732) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse731 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse729)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse730)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) .cse703 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse738 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse737 (select .cse25 v_arrayElimIndex_11))) (let ((.cse733 (select .cse738 .cse737)) (.cse734 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse736 (select .cse738 .cse22)) (.cse735 (select |c_#length| .cse737))) (or (= (select .cse733 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse734 .cse735)) (= (select .cse733 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse736 v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse734)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse736 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse735)))))) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse742 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse743 (select .cse25 v_arrayElimIndex_11))) (let ((.cse739 (select .cse742 .cse743)) (.cse740 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse741 (select |c_#length| .cse743))) (or (= (select .cse739 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse740 .cse741)) (= (select .cse739 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse742 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse740)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse741)))))) (or .cse9 .cse724) .cse710))) (.cse433 (let ((.cse700 (and (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse718 (select .cse25 v_arrayElimIndex_11))) (let ((.cse716 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse717 (select |c_#length| .cse718))) (or (not (bvule .cse716 .cse717)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse718) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse716)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse717)))))) .cse4) .cse719 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse723 (select .cse25 v_arrayElimIndex_11))) (let ((.cse720 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse723)) (.cse721 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse722 (select |c_#length| .cse723))) (or (= (select .cse720 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse721 .cse722)) (= (select .cse720 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse721)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse722)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (.cse702 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse714 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse715 (select .cse25 v_arrayElimIndex_11))) (let ((.cse711 (select .cse714 .cse715)) (.cse712 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse713 (select |c_#length| .cse715))) (or (= (select .cse711 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse712 .cse713)) (= (select .cse711 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse714 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse712)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse713)))))))) (and (or .cse9 .cse700) (or .cse701 .cse4) (or .cse11 .cse700) (or .cse0 .cse702) .cse703 .cse157 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse709 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse708 (select .cse25 v_arrayElimIndex_11))) (let ((.cse704 (select .cse709 .cse708)) (.cse705 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse707 (select .cse709 .cse22)) (.cse706 (select |c_#length| .cse708))) (or (= (select .cse704 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse705 .cse706)) (= (select .cse704 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse707 v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse705)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse707 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse706)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) .cse167 (or .cse702 .cse4) .cse710))) (.cse426 (and (or .cse11 .cse138) .cse141 .cse420 .cse421 .cse422 .cse423 .cse424 .cse425)) (.cse381 (or .cse312 (and (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse689 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse688 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse686 (select .cse689 (select .cse25 v_arrayElimIndex_11))) (.cse687 (select .cse689 .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= (select .cse686 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse687 v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse688)) (not (bvule .cse688 .cse297)) (= (select .cse686 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse687 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (= v_arrayElimIndex_11 .cse24))) .cse300 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse691 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse690 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse690 .cse22) v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse691)) (not (bvule .cse691 .cse297)) (= (select (select .cse690 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)))) (= v_arrayElimIndex_11 .cse24))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse693 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse692 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse692 .cse22) v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse693)) (not (bvule .cse693 .cse297)) (= (select (select .cse692 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)))) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) .cse301 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse695 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse696 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse694 (select .cse695 (select .cse25 v_arrayElimIndex_11)))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= (select .cse694 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse695 .cse22) v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse696)) (not (bvule .cse696 .cse297)) (= (select .cse694 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse699 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse698 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse697 (select .cse699 .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse697 v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse698)) (not (bvule .cse698 .cse297)) (= (select (select .cse699 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse697 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) .cse313)) (.cse382 (or .cse231 (let ((.cse663 (and (or .cse47 .cse4) .cse315 .cse173 .cse174 .cse175)) (.cse676 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse685 (select .cse25 v_arrayElimIndex_11))) (let ((.cse682 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse683 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse684 (select |c_#length| .cse685))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse682 .cse22) v_arrayElimCell_151)) (not (bvule .cse683 .cse684)) (= v_arrayElimIndex_11 .cse24) (= (select (select .cse682 .cse685) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse683)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse684))))))) (.cse675 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse678 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse681 (select .cse25 v_arrayElimIndex_11))) (let ((.cse677 (select .cse678 .cse681)) (.cse679 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse680 (select |c_#length| .cse681))) (or (= (select .cse677 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse678 .cse22) v_arrayElimCell_151)) (not (bvule .cse679 .cse680)) (= v_arrayElimIndex_11 .cse24) (= (select .cse677 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse679)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse680)))))) .cse4))) (and (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse645 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse648 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse643 (select .cse648 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse643 v_arrayElimCell_151)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse647 (select .cse25 v_arrayElimIndex_11))) (let ((.cse644 (select .cse648 .cse647)) (.cse646 (select |c_#length| .cse647))) (or (= (select .cse644 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse645 .cse646)) (= v_arrayElimIndex_11 .cse24) (= (select .cse644 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse646)))))) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse643 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule v_arrayElimCell_152 .cse645))))) .cse237 (or .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse652 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse653 (select .cse25 v_arrayElimIndex_11))) (let ((.cse649 (select .cse652 .cse653)) (.cse650 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse651 (select |c_#length| .cse653))) (or (= (select .cse649 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse650 .cse651)) (= v_arrayElimIndex_11 .cse24) (= (select .cse649 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse650)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse652 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse651)))))) .cse154) .cse157 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse658 (select .cse25 v_arrayElimIndex_11))) (let ((.cse654 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse655 (select |c_#length| .cse658))) (or (not (bvule .cse654 .cse655)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse657 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse656 (select .cse657 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse656 v_arrayElimCell_151)) (= (select (select .cse657 .cse658) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse656 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule v_arrayElimCell_152 .cse654)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse655)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse662 (select .cse25 v_arrayElimIndex_11))) (let ((.cse659 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse660 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse661 (select |c_#length| .cse662))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse659 .cse22) v_arrayElimCell_151)) (not (bvule .cse660 .cse661)) (= v_arrayElimIndex_11 .cse24) (= (select (select .cse659 .cse662) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse660)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse661)))))) .cse4) (or .cse11 .cse663) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse669 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse668 (select .cse25 v_arrayElimIndex_11))) (let ((.cse664 (select .cse669 .cse668)) (.cse666 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse665 (select .cse669 .cse22)) (.cse667 (select |c_#length| .cse668))) (or (= (select .cse664 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse665 v_arrayElimCell_151)) (not (bvule .cse666 .cse667)) (= v_arrayElimIndex_11 .cse24) (= (select .cse664 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse666)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse665 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse667)))))) .cse4) (or .cse9 .cse663) (or (and (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse672 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse670 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse670 .cse22) v_arrayElimCell_151)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse674 (select .cse25 v_arrayElimIndex_11))) (let ((.cse671 (select .cse670 .cse674)) (.cse673 (select |c_#length| .cse674))) (or (= (select .cse671 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse672 .cse673)) (= v_arrayElimIndex_11 .cse24) (= (select .cse671 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse673))))))))) (not (bvule v_arrayElimCell_152 .cse672))))) (or .cse126 .cse125 .cse135 .cse154 .cse347) .cse675) .cse0) (or .cse0 .cse676) (or .cse676 .cse4) (or .cse323 .cse126 .cse125 .cse0 .cse135 .cse154) .cse675)))) (.cse130 (or .cse141 .cse144)) (.cse134 (or .cse0 .cse642)) (.cse466 (not (bvule (bvadd (_ bv4 32) |c_ULTIMATE.start_sll_prepend_~head#1.offset|) .cse297))) (.cse467 (not (bvule .cse149 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (.cse146 (and .cse129 .cse642)) (.cse468 (not (bvule |c_ULTIMATE.start_sll_prepend_~head#1.offset| .cse297))) (.cse145 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))) (.cse54 (= |c_ULTIMATE.start_main_~#s~0#1.base| .cse641))) (and (or (let ((.cse158 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse230 (select .cse25 v_arrayElimIndex_11))) (let ((.cse227 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse228 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse229 (select |c_#length| .cse230))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse227 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse228 .cse229)) (= v_arrayElimIndex_11 .cse24) (= (select (select .cse227 .cse230) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse228)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse229))))))) (.cse114 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse226 (select .cse25 v_arrayElimIndex_11))) (let ((.cse224 (select |c_#length| .cse226)) (.cse225 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule v_arrayElimIndex_11 .cse224)) (not (bvule .cse225 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse224)) (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse226) .cse225))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse6 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse223 (select .cse25 v_arrayElimIndex_11))) (let ((.cse220 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse221 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse222 (select |c_#length| .cse223))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse220 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse221 .cse222)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse220 .cse223) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse221)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse222))))))) (.cse3 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse218 (select .cse25 v_arrayElimIndex_11))) (let ((.cse217 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse219 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse216 (select |c_#length| .cse218))) (or (not (bvule v_arrayElimIndex_11 .cse216)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse217 .cse218) .cse219)) (not (bvule .cse219 v_arrayElimIndex_11)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse217 .cse22) .cse219)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse216)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))))) (let ((.cse10 (and .cse213 .cse214 .cse215)) (.cse2 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse211 (select .cse25 v_arrayElimIndex_11))) (let ((.cse209 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse208 (select |c_#length| .cse211))) (or (not (bvule v_arrayElimIndex_11 .cse208)) (not (bvule .cse209 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse210 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse212 (select .cse210 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse210 .cse211) .cse209)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse212 .cse209)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse212 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse208)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse13 (or .cse0 .cse3)) (.cse14 (or .cse0 .cse6)) (.cse16 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse207 (select .cse25 v_arrayElimIndex_11)) (.cse206 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse204 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse203 (select .cse206 .cse22)) (.cse205 (select |c_#length| .cse207))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse203 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse204 .cse205)) (= (select (select .cse206 .cse207) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse204)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse203 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse205)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse26 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse199 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse202 (select .cse25 v_arrayElimIndex_11))) (let ((.cse198 (select .cse199 .cse202)) (.cse200 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse201 (select |c_#length| .cse202))) (or (= (select .cse198 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse199 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse200 .cse201)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse198 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse200)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse201))))))) (.cse12 (and (or .cse193 .cse4) .cse114 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse197 (select .cse25 v_arrayElimIndex_11))) (let ((.cse195 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse194 (select |c_#length| .cse197))) (or (not (bvule v_arrayElimIndex_11 .cse194)) (not (bvule .cse195 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse196 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse197))) (or (= (select .cse196 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse196 .cse195))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse194)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))))) (.cse27 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse192 (select .cse25 v_arrayElimIndex_11)) (.cse191 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse189 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse188 (select .cse191 .cse22)) (.cse190 (select |c_#length| .cse192))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse188 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse189 .cse190)) (= (select (select .cse191 .cse192) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse189)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse188 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse190)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse48 (or .cse158 .cse0)) (.cse1 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse186 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse187 (select .cse25 v_arrayElimIndex_11))) (let ((.cse184 (select .cse186 .cse187)) (.cse185 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse183 (select |c_#length| .cse187))) (or (not (bvule v_arrayElimIndex_11 .cse183)) (= (select .cse184 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse184 .cse185)) (not (bvule .cse185 v_arrayElimIndex_11)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse186 .cse22) .cse185)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse183)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))))) (and (or .cse0 .cse1) .cse2 (or .cse3 .cse4) .cse5 (or .cse6 .cse4) .cse7 .cse8 (or .cse9 .cse10) (or .cse11 .cse12) .cse13 .cse14 .cse15 (or .cse11 .cse10) .cse16 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse23 (select .cse25 v_arrayElimIndex_11))) (let ((.cse18 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse17 (select |c_#length| .cse23))) (or (not (bvule v_arrayElimIndex_11 .cse17)) (not (bvule .cse18 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse21 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse19 (select .cse21 .cse23)) (.cse20 (select .cse21 .cse22))) (or (= (select .cse19 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse19 .cse18)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse20 .cse18)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse20 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse17)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (or .cse26 .cse4) (or (let ((.cse90 (and .cse114 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse117 (select .cse25 v_arrayElimIndex_11))) (let ((.cse115 (select |c_#length| .cse117)) (.cse116 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule v_arrayElimIndex_11 .cse115)) (not (bvule .cse116 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse115)) (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse117) .cse116))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse121 (select .cse25 v_arrayElimIndex_11))) (let ((.cse119 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse118 (select |c_#length| .cse121))) (or (not (bvule v_arrayElimIndex_11 .cse118)) (not (bvule .cse119 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse120 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse121))) (or (= (select .cse120 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse120 .cse119))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse118)) (= v_arrayElimIndex_11 .cse24)))))))) (and (or (and .cse27 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse31 (select .cse25 v_arrayElimIndex_11))) (let ((.cse28 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse29 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse30 (select |c_#length| .cse31))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse28 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse29 .cse30)) (= (select (select .cse28 .cse31) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse29)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse30)))))) (= v_arrayElimIndex_11 .cse24))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse37 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse36 (select .cse25 v_arrayElimIndex_11))) (let ((.cse32 (select .cse37 .cse36)) (.cse34 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse33 (select .cse37 .cse22)) (.cse35 (select |c_#length| .cse36))) (or (= (select .cse32 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse33 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse34 .cse35)) (= (select .cse32 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse34)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse33 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse35)))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse41 (select .cse25 v_arrayElimIndex_11))) (let ((.cse38 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse39 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse40 (select |c_#length| .cse41))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse38 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse39 .cse40)) (= (select (select .cse38 .cse41) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse39)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse40)))))) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse43 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse46 (select .cse25 v_arrayElimIndex_11))) (let ((.cse42 (select .cse43 .cse46)) (.cse44 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse45 (select |c_#length| .cse46))) (or (= (select .cse42 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse43 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse44 .cse45)) (= (select .cse42 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse44)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse45)))))))) (or .cse47 .cse11) (or .cse9 .cse47) .cse48 (or .cse0 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse50 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse53 (select .cse25 v_arrayElimIndex_11))) (let ((.cse49 (select .cse50 .cse53)) (.cse51 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse52 (select |c_#length| .cse53))) (or (= (select .cse49 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse50 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse51 .cse52)) (= v_arrayElimIndex_11 .cse24) (= (select .cse49 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse51)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse52)))))))) .cse54) .cse55 .cse2 .cse56 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse60 (select .cse25 v_arrayElimIndex_11))) (let ((.cse57 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse58 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse59 (select |c_#length| .cse60))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse57 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse58 .cse59)) (= (select (select .cse57 .cse60) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse58)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse59)))))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse64 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse65 (select .cse25 v_arrayElimIndex_11))) (let ((.cse62 (select .cse64 .cse65)) (.cse63 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse61 (select |c_#length| .cse65))) (or (not (bvule v_arrayElimIndex_11 .cse61)) (= (select .cse62 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse62 .cse63)) (not (bvule .cse63 v_arrayElimIndex_11)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse64 .cse22) .cse63)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse61)) (= v_arrayElimIndex_11 .cse24))))) .cse0) (or .cse11 .cse66) (or .cse0 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse68 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse71 (select .cse25 v_arrayElimIndex_11))) (let ((.cse67 (select .cse68 .cse71)) (.cse69 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse70 (select |c_#length| .cse71))) (or (= (select .cse67 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse68 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse69 .cse70)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse67 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse69)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse70))))))) .cse13 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse76 (select .cse25 v_arrayElimIndex_11))) (let ((.cse72 (select |c_#length| .cse76)) (.cse73 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule v_arrayElimIndex_11 .cse72)) (not (bvule .cse73 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse72)) (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse75 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse74 (select .cse75 .cse76))) (or (= (select .cse74 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse74 .cse73)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse75 .cse22) .cse73)))))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse79 (select .cse25 v_arrayElimIndex_11))) (let ((.cse80 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse77 (select |c_#length| .cse79))) (or (not (bvule v_arrayElimIndex_11 .cse77)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse78 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse78 .cse79) .cse80)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse78 .cse22) .cse80))))) (not (bvule .cse80 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse77)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) .cse81 .cse14 .cse82 .cse16 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse84 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse87 (select .cse25 v_arrayElimIndex_11))) (let ((.cse83 (select .cse84 .cse87)) (.cse85 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse86 (select |c_#length| .cse87))) (or (= (select .cse83 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse84 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse85 .cse86)) (= (select .cse83 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse85)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse86)))))))) .cse88 .cse89 (or .cse9 .cse90) .cse91 (or .cse90 .cse11) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse97 (select .cse25 v_arrayElimIndex_11))) (let ((.cse93 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse92 (select |c_#length| .cse97))) (or (not (bvule v_arrayElimIndex_11 .cse92)) (not (bvule .cse93 v_arrayElimIndex_11)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse96 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse94 (select .cse96 .cse97)) (.cse95 (select .cse96 .cse22))) (or (= (select .cse94 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse94 .cse93)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse95 .cse93)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse95 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse92)) (= v_arrayElimIndex_11 .cse24))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse100 (select .cse25 v_arrayElimIndex_11))) (let ((.cse101 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse98 (select |c_#length| .cse100))) (or (not (bvule v_arrayElimIndex_11 .cse98)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse99 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse99 .cse100) .cse101)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse99 .cse22) .cse101))))) (not (bvule .cse101 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse98)) (= v_arrayElimIndex_11 .cse24))))) .cse102 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse106 (select .cse25 v_arrayElimIndex_11))) (let ((.cse103 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse104 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse105 (select |c_#length| .cse106))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse103 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse104 .cse105)) (= (select (select .cse103 .cse106) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse104)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse105)))))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11))) (or .cse9 .cse66) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse112 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse111 (select .cse25 v_arrayElimIndex_11))) (let ((.cse107 (select .cse112 .cse111)) (.cse109 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse108 (select .cse112 .cse22)) (.cse110 (select |c_#length| .cse111))) (or (= (select .cse107 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse108 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse109 .cse110)) (= (select .cse107 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse109)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse108 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse110)))))))) .cse113)) .cse4) .cse88 .cse122 (or .cse0 .cse26) .cse123 .cse91 .cse124 (or .cse125 (let ((.cse136 (or .cse126 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse153 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse152 (select .cse153 .cse151))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse152 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse153 .cse22) .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse152 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) (.cse137 (or .cse126 .cse138)) (.cse139 (or .cse126 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse150 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse147 (select .cse150 .cse151)) (.cse148 (select .cse150 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse147 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse148 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse147 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse148 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) (.cse140 (or .cse126 .cse146)) (.cse128 (or .cse144 .cse145))) (and (or .cse126 (and .cse127 .cse128 .cse129 .cse130 .cse131 .cse132 .cse133 .cse134) .cse135) (or (and (or (and .cse136 .cse137 (or .cse126 .cse11 .cse138) .cse139 .cse140) .cse0 .cse135) (or (and .cse127 .cse129 .cse141 .cse131 .cse132 .cse134 .cse142 .cse143) .cse126 .cse135)) .cse54) (or .cse11 (and (or .cse0 .cse135 (and .cse136 (or .cse9 .cse126 .cse138) .cse137 .cse139 .cse140)) (or (and .cse127 .cse128 .cse129 .cse141 .cse132 .cse133 .cse134 .cse143) .cse126 .cse135))))) .cse154) .cse155 .cse156 (or .cse9 .cse12) (or .cse54 (let ((.cse160 (and .cse173 .cse174 .cse175)) (.cse159 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse169 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse172 (select .cse25 v_arrayElimIndex_11))) (let ((.cse168 (select .cse169 .cse172)) (.cse170 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse171 (select |c_#length| .cse172))) (or (= (select .cse168 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse169 .cse22) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse170 .cse171)) (= v_arrayElimIndex_11 .cse24) (= (select .cse168 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse170)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse171)))))))) (and .cse157 .cse27 (or .cse158 .cse4) (or .cse159 .cse4) (or .cse11 .cse160) .cse48 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse166 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse165 (select .cse25 v_arrayElimIndex_11))) (let ((.cse161 (select .cse166 .cse165)) (.cse163 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse162 (select .cse166 .cse22)) (.cse164 (select |c_#length| .cse165))) (or (= (select .cse161 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse162 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse163 .cse164)) (= (select .cse161 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse163)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse162 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse164)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) .cse167 (or .cse9 .cse160) (or .cse0 .cse159)))) (or .cse1 .cse4) .cse176 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse182 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse181 (select .cse25 v_arrayElimIndex_11))) (let ((.cse177 (select .cse182 .cse181)) (.cse179 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse178 (select .cse182 .cse22)) (.cse180 (select |c_#length| .cse181))) (or (= (select .cse177 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse178 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule .cse179 .cse180)) (= (select .cse177 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse179)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse178 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse180)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) .cse231) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| .cse24) (and (or .cse231 (let ((.cse253 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse295 (select .cse25 v_arrayElimIndex_11))) (let ((.cse294 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse296 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse293 (select |c_#length| .cse295))) (or (not (bvule v_arrayElimIndex_11 .cse293)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse294 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse294 .cse295) .cse296)) (not (bvule .cse296 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse293)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (.cse254 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse288 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse288 .cse22) v_arrayElimCell_151)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse292 (select .cse25 v_arrayElimIndex_11))) (let ((.cse290 (select .cse288 .cse292)) (.cse291 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse289 (select |c_#length| .cse292))) (or (not (bvule v_arrayElimIndex_11 .cse289)) (= (select .cse290 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse290 .cse291)) (not (bvule .cse291 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse289)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))))))) (.cse260 (and (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse279 (select .cse25 v_arrayElimIndex_11))) (let ((.cse277 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse279)) (.cse278 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse276 (select |c_#length| .cse279))) (or (not (bvule v_arrayElimIndex_11 .cse276)) (= (select .cse277 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse277 .cse278)) (not (bvule .cse278 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse276)) (= v_arrayElimIndex_11 .cse24))))) .cse4) .cse193 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse283 (select .cse25 v_arrayElimIndex_11))) (let ((.cse281 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse283)) (.cse282 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse280 (select |c_#length| .cse283))) (or (not (bvule v_arrayElimIndex_11 .cse280)) (= (select .cse281 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse281 .cse282)) (not (bvule .cse282 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse280)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (or (and .cse193 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse285 (select .cse25 v_arrayElimIndex_11))) (let ((.cse286 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse284 (select |c_#length| .cse285))) (or (not (bvule v_arrayElimIndex_11 .cse284)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse285) .cse286)) (not (bvule .cse286 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse284)) (= v_arrayElimIndex_11 .cse24)))))) .cse4) (or .cse126 .cse125 .cse0 .cse287 .cse135 .cse154)))) (and (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse236 (select .cse25 v_arrayElimIndex_11))) (let ((.cse232 (select |c_#length| .cse236)) (.cse233 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule v_arrayElimIndex_11 .cse232)) (not (bvule .cse233 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse232)) (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse235 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse234 (select .cse235 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse234 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse235 .cse236) .cse233)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse234 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) .cse5 .cse237 .cse7 (or .cse126 .cse125 .cse0 .cse135 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse240 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse239 (select .cse240 .cse151)) (.cse238 (select .cse240 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse238 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse239 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse239 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse238 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse154) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse245 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse246 (select .cse25 v_arrayElimIndex_11))) (let ((.cse242 (select .cse245 .cse246)) (.cse244 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse241 (select |c_#length| .cse246)) (.cse243 (select .cse245 .cse22))) (or (not (bvule v_arrayElimIndex_11 .cse241)) (= (select .cse242 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse243 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse242 .cse244)) (not (bvule .cse244 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse241)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse243 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse4) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse252 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse247 (select .cse252 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse247 v_arrayElimCell_151)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse251 (select .cse25 v_arrayElimIndex_11))) (let ((.cse249 (select .cse252 .cse251)) (.cse250 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse248 (select |c_#length| .cse251))) (or (not (bvule v_arrayElimIndex_11 .cse248)) (= (select .cse249 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse249 .cse250)) (not (bvule .cse250 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse248)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse247 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse0 .cse253) (or (and .cse254 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse255 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse255 .cse22) v_arrayElimCell_151)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse259 (select .cse25 v_arrayElimIndex_11))) (let ((.cse257 (select .cse255 .cse259)) (.cse258 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse256 (select |c_#length| .cse259))) (or (not (bvule v_arrayElimIndex_11 .cse256)) (= (select .cse257 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse257 .cse258)) (not (bvule .cse258 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse256)) (= v_arrayElimIndex_11 .cse24))))))))) .cse4) (or .cse9 .cse260) (or (and (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse261 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse261 .cse22) v_arrayElimCell_151)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse263 (select .cse25 v_arrayElimIndex_11))) (let ((.cse264 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse262 (select |c_#length| .cse263))) (or (not (bvule v_arrayElimIndex_11 .cse262)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse261 .cse263) .cse264)) (not (bvule .cse264 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse262)) (= v_arrayElimIndex_11 .cse24)))))))) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse265 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse265 .cse22) v_arrayElimCell_151)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse267 (select .cse25 v_arrayElimIndex_11))) (let ((.cse268 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse266 (select |c_#length| .cse267))) (or (not (bvule v_arrayElimIndex_11 .cse266)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse265 .cse267) .cse268)) (not (bvule .cse268 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse266)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))))))) .cse4) (or .cse253 .cse4) (or (and .cse254 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse271 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse273 (select .cse25 v_arrayElimIndex_11))) (let ((.cse270 (select .cse271 .cse273)) (.cse272 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse269 (select |c_#length| .cse273))) (or (not (bvule v_arrayElimIndex_11 .cse269)) (= (select .cse270 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse271 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse270 .cse272)) (not (bvule .cse272 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse269)) (= v_arrayElimIndex_11 .cse24))))) .cse4) (or .cse126 .cse125 .cse135 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse274 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse275 (select .cse274 .cse151))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse274 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse275 .cse149)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse275 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse154)) .cse0) (or .cse11 .cse260)))) (or (and (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse299 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse298 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse298 .cse22) v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse299)) (not (bvule .cse299 .cse297)) (= (select (select .cse298 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11))) .cse300 .cse301 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse303 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse304 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse302 (select .cse303 (select .cse25 v_arrayElimIndex_11)))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= (select .cse302 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse303 .cse22) v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse304)) (not (bvule .cse304 .cse297)) (= (select .cse302 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse307 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse306 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse305 (select .cse307 .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse305 v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse306)) (not (bvule .cse306 .cse297)) (= (select (select .cse307 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse305 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse311 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse310 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse308 (select .cse311 (select .cse25 v_arrayElimIndex_11))) (.cse309 (select .cse311 .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= (select .cse308 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse309 v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse310)) (not (bvule .cse310 .cse297)) (= (select .cse308 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse309 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11)))) .cse312 .cse313) (or .cse231 (let ((.cse321 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse361 (select .cse25 v_arrayElimIndex_11))) (let ((.cse358 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse359 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse360 (select |c_#length| .cse361))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse358 .cse22) v_arrayElimCell_151)) (not (bvule .cse359 .cse360)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse358 .cse361) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse359)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse360))))))) (.cse314 (or .cse66 .cse4)) (.cse322 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse354 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse357 (select .cse25 v_arrayElimIndex_11))) (let ((.cse353 (select .cse354 .cse357)) (.cse355 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse356 (select |c_#length| .cse357))) (or (= (select .cse353 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse354 .cse22) v_arrayElimCell_151)) (not (bvule .cse355 .cse356)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse353 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse355)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse356)))))) .cse4))) (and (or .cse11 (and .cse213 .cse214 .cse314 .cse315 .cse215)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse320 (select .cse25 v_arrayElimIndex_11))) (let ((.cse316 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse317 (select |c_#length| .cse320))) (or (not (bvule .cse316 .cse317)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse319 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse318 (select .cse319 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse318 v_arrayElimCell_151)) (= (select (select .cse319 .cse320) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse318 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule v_arrayElimCell_152 .cse316)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse317)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (or .cse321 .cse4) .cse322 (or .cse323 .cse126 .cse125 .cse0 .cse11 .cse135 .cse154) (or .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse327 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse328 (select .cse25 v_arrayElimIndex_11))) (let ((.cse324 (select .cse327 .cse328)) (.cse325 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse326 (select |c_#length| .cse328))) (or (= (select .cse324 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse325 .cse326)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse324 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse325)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse327 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse326)))))) .cse154) .cse124 (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse334 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse333 (select .cse25 v_arrayElimIndex_11))) (let ((.cse329 (select .cse334 .cse333)) (.cse331 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse330 (select .cse334 .cse22)) (.cse332 (select |c_#length| .cse333))) (or (= (select .cse329 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse330 v_arrayElimCell_151)) (not (bvule .cse331 .cse332)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse329 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse331)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse330 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse332)))))) .cse4) (or .cse335 .cse126 .cse0 .cse11 .cse135 .cse154) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse337 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse340 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse341 (select .cse340 .cse22))) (or (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse339 (select .cse25 v_arrayElimIndex_11))) (let ((.cse336 (select .cse340 .cse339)) (.cse338 (select |c_#length| .cse339))) (or (= (select .cse336 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse337 .cse338)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse336 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse338)))))) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse341 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse341 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule v_arrayElimCell_152 .cse337))))) (or .cse321 .cse0) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse345 (select .cse25 v_arrayElimIndex_11))) (let ((.cse342 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse343 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse344 (select |c_#length| .cse345))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse342 .cse22) v_arrayElimCell_151)) (not (bvule .cse343 .cse344)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse342 .cse345) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse343)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse344)))))) .cse4) (or .cse9 (and .cse213 .cse214 .cse314 .cse215 (or .cse0 .cse11 .cse135 .cse154 .cse346))) (or (and (or .cse126 .cse125 .cse11 .cse135 .cse154 .cse347) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse349 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse352 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse351 (select .cse25 v_arrayElimIndex_11))) (let ((.cse348 (select .cse352 .cse351)) (.cse350 (select |c_#length| .cse351))) (or (= (select .cse348 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse349 .cse350)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse348 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse350)))))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse352 .cse22) v_arrayElimCell_151))))) (not (bvule v_arrayElimCell_152 .cse349))))) .cse322) .cse0)))) (or (and .cse300 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse365 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse362 (select .cse365 (select .cse25 v_arrayElimIndex_11))) (.cse364 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse363 (select .cse365 .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= (select .cse362 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse363 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse362 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule v_arrayElimCell_151 .cse364)) (not (bvule .cse364 .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse363 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse367 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse368 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse366 (select .cse367 .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse366 v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse367 (select .cse25 v_arrayElimIndex_11)) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule v_arrayElimCell_151 .cse368)) (not (bvule .cse368 .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse366 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (or (and (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse371 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse370 (bvadd v_arrayElimCell_151 (_ bv4 32))) (.cse369 (select .cse371 .cse22))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse369 v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse370)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse371 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule .cse370 .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse369 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse372 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse373 (bvadd v_arrayElimCell_151 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse372 .cse22) v_arrayElimCell_151)) (not (bvule v_arrayElimCell_151 .cse373)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse372 .cse151) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule .cse373 .cse297)))))) .cse154) .cse301 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse374 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse375 (bvadd v_arrayElimCell_151 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse374 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse374 (select .cse25 v_arrayElimIndex_11)) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule v_arrayElimCell_151 .cse375)) (not (bvule .cse375 .cse297))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse376 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse377 (bvadd v_arrayElimCell_151 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse376 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse376 (select .cse25 v_arrayElimIndex_11)) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule v_arrayElimCell_151 .cse377)) (not (bvule .cse377 .cse297)) (= v_arrayElimIndex_11 .cse24)))) .cse4) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_151 (_ BitVec 32))) (let ((.cse379 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse378 (select .cse379 (select .cse25 v_arrayElimIndex_11))) (.cse380 (bvadd v_arrayElimCell_151 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_151 (_ bv8 32)) .cse297)) (= (select .cse378 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse379 .cse22) v_arrayElimCell_151)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse378 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (not (bvule v_arrayElimCell_151 .cse380)) (not (bvule .cse380 .cse297)))))) (= v_arrayElimIndex_11 .cse24)))) .cse312 .cse313) (or (and .cse381 .cse382) .cse54) (or .cse231 (let ((.cse412 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse459 (select .cse25 v_arrayElimIndex_11))) (let ((.cse457 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse458 (select |c_#length| .cse459))) (or (not (bvule .cse457 .cse458)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse459) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse457)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse458)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse435 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse456 (select .cse25 v_arrayElimIndex_11))) (let ((.cse455 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse453 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse454 (select |c_#length| .cse456))) (or (not (bvule .cse453 .cse454)) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse455 .cse456) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse455 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse453)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse454)))))))) (let ((.cse384 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse451 (select .cse25 v_arrayElimIndex_11)) (.cse450 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse448 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse452 (select .cse450 .cse22)) (.cse449 (select |c_#length| .cse451))) (or (not (bvule .cse448 .cse449)) (= (select (select .cse450 .cse451) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse452 v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse448)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse452 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse449)))))) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse400 (or .cse435 .cse0)) (.cse383 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse446 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse447 (select .cse25 v_arrayElimIndex_11))) (let ((.cse443 (select .cse446 .cse447)) (.cse444 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse445 (select |c_#length| .cse447))) (or (= (select .cse443 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse444 .cse445)) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse443 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse446 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse444)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse445))))))) (.cse434 (and (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse439 (select .cse25 v_arrayElimIndex_11))) (let ((.cse436 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse439)) (.cse437 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse438 (select |c_#length| .cse439))) (or (= (select .cse436 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse437 .cse438)) (= (select .cse436 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse437)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse438)))))) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse442 (select .cse25 v_arrayElimIndex_11))) (let ((.cse440 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse441 (select |c_#length| .cse442))) (or (not (bvule .cse440 .cse441)) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse442) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse440)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse441)))))) .cse4) .cse412))) (and (or .cse383 .cse4) .cse384 (or (let ((.cse390 (and .cse412 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse416 (select .cse25 v_arrayElimIndex_11))) (let ((.cse413 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse416)) (.cse414 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse415 (select |c_#length| .cse416))) (or (= (select .cse413 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse414 .cse415)) (= (select .cse413 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse414)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse415)))))) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse419 (select .cse25 v_arrayElimIndex_11))) (let ((.cse417 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse418 (select |c_#length| .cse419))) (or (not (bvule .cse417 .cse418)) (= (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse419) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule v_arrayElimCell_152 .cse417)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse418))))))))))) (and .cse55 .cse384 .cse56 (or .cse0 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse388 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse389 (select .cse25 v_arrayElimIndex_11))) (let ((.cse385 (select .cse388 .cse389)) (.cse386 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse387 (select |c_#length| .cse389))) (or (= (select .cse385 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse386 .cse387)) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse385 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse388 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse386)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse387))))))) .cse81 (or .cse11 .cse390) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse394 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse395 (select .cse25 v_arrayElimIndex_11))) (let ((.cse391 (select .cse394 .cse395)) (.cse392 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse393 (select |c_#length| .cse395))) (or (= (select .cse391 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse392 .cse393)) (= (select .cse391 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse394 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse392)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse393)))))))) (or .cse9 .cse390) .cse82 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse399 (select .cse25 v_arrayElimIndex_11))) (let ((.cse398 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse396 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse397 (select |c_#length| .cse399))) (or (not (bvule .cse396 .cse397)) (= (select (select .cse398 .cse399) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse398 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse396)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse397)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) .cse88 .cse89 .cse91 .cse400 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse404 (select .cse25 v_arrayElimIndex_11))) (let ((.cse403 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse401 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse402 (select |c_#length| .cse404))) (or (not (bvule .cse401 .cse402)) (= (select (select .cse403 .cse404) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse403 .cse22) v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse401)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse402)))))))) (or .cse405 .cse54) .cse102 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse411 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse410 (select .cse25 v_arrayElimIndex_11))) (let ((.cse406 (select .cse411 .cse410)) (.cse407 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse409 (select .cse411 .cse22)) (.cse408 (select |c_#length| .cse410))) (or (= (select .cse406 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse407 .cse408)) (= (select .cse406 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse409 v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse407)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse409 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse408)))))))) .cse113)) .cse4) .cse5 .cse7 .cse8 (or .cse125 (and (or .cse126 .cse11 .cse135 (and (or .cse9 .cse138) .cse141 .cse420 .cse421 .cse422 .cse423 .cse424 .cse425)) (or .cse126 .cse135 .cse426 .cse54) (or (and .cse127 .cse129 .cse130 .cse131 .cse132 .cse133 .cse134 .cse142) .cse126 .cse135)) .cse154) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse432 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse431 (select .cse25 v_arrayElimIndex_11))) (let ((.cse427 (select .cse432 .cse431)) (.cse428 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse430 (select .cse432 .cse22)) (.cse429 (select |c_#length| .cse431))) (or (= (select .cse427 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse428 .cse429)) (= (select .cse427 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse430 v_arrayElimCell_152)) (not (bvule v_arrayElimCell_152 .cse428)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse430 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse429)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) .cse15 (or .cse433 .cse54) .cse88 .cse122 .cse123 .cse91 .cse124 .cse155 .cse400 .cse156 (or .cse0 .cse383) .cse176 (or .cse9 .cse434) (or .cse11 .cse434) (or .cse435 .cse4))))) (or (let ((.cse471 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse506 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse505 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse504 (select .cse505 (select .cse25 .cse506)))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse504 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse505 .cse22) v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse504 v_arrayElimCell_152)))))) (not (bvule .cse506 .cse297)) (not (bvule v_arrayElimCell_152 .cse506)))))) (.cse492 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse501 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse501 .cse297)) (not (bvule v_arrayElimCell_152 .cse501)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse503 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse502 (select .cse503 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse502 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse502 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse503 .cse22) v_arrayElimCell_152))))))))) (.cse469 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse499 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse499 .cse297)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse500 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= (select (select .cse500 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse500 .cse22) v_arrayElimCell_152)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (not (bvule v_arrayElimCell_152 .cse499)))))) (.cse470 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse498 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse496 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse497 (select .cse496 .cse22))) (or (= (select (select .cse496 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse497 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse497 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse498 .cse297)) (not (bvule v_arrayElimCell_152 .cse498))))))) (and (or .cse54 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse463 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse460 (select .cse463 (select .cse25 v_arrayElimIndex_11))) (.cse462 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse461 (select .cse463 .cse22))) (or (= (select .cse460 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (= (select .cse460 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse461 v_arrayElimCell_152)) (not (bvule .cse462 .cse297)) (not (bvule v_arrayElimCell_152 .cse462)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse461 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) .cse464 (or .cse54 .cse465) (or .cse466 .cse467 .cse146 .cse468 .cse154) .cse469 .cse470 .cse471 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse475 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse474 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse472 (select .cse474 (select .cse25 .cse475))) (.cse473 (select .cse474 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse472 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse473 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse472 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse473 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse475 .cse297)) (not (bvule v_arrayElimCell_152 .cse475))))) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse479 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse477 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse478 (select .cse477 .cse22))) (or (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse476 (select .cse477 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse476 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse476 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)))) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse478 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse478 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse479 .cse297)) (not (bvule v_arrayElimCell_152 .cse479))))) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse480 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| .cse480) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse481 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse481 .cse22) v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse481 (select .cse25 .cse480)) v_arrayElimCell_152))))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse480 .cse297)) (not (bvule v_arrayElimCell_152 .cse480))))) (or (and (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse483 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse482 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse482 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse482 .cse22) v_arrayElimCell_152))))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse483 .cse297)) (not (bvule v_arrayElimCell_152 .cse483))))) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse485 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse484 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (= (select (select .cse484 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse484 .cse22) v_arrayElimCell_152))))) (not (bvule .cse485 .cse297)) (not (bvule v_arrayElimCell_152 .cse485))))) (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse487 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse486 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse486 .cse22) v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse486 (select .cse25 .cse487)) v_arrayElimCell_152))))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse487 .cse297)) (not (bvule v_arrayElimCell_152 .cse487)))))) .cse4) .cse488 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse489 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (= |c_ULTIMATE.start_sll_prepend_~head#1.offset| .cse489) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse491 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse490 (select .cse491 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse490 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse491 (select .cse25 .cse489)) v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse490 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse489 .cse297)) (not (bvule v_arrayElimCell_152 .cse489))))) .cse492 (or (and .cse471 .cse492 (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse495 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse493 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse493 .cse22) v_arrayElimCell_152)) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse494 (select .cse493 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse494 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= (select .cse494 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))))))) (not (bvule .cse495 .cse297)) (not (bvule v_arrayElimCell_152 .cse495)))))) .cse4) (or (and .cse469 .cse470) .cse54))) .cse312 .cse313))) (or (let ((.cse511 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse528 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse529 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (= (select (select .cse528 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse528 .cse22) v_arrayElimCell_152)) (not (bvule .cse529 .cse297)) (not (bvule v_arrayElimCell_152 .cse529))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (.cse512 (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse527 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse525 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse526 (select .cse525 .cse22))) (or (= (select (select .cse525 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse526 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse526 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse527 .cse297)) (not (bvule v_arrayElimCell_152 .cse527))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))))) (and (or (and (or (and .cse464 (forall ((v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse507 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse507 .cse297)) (not (bvule v_arrayElimCell_152 .cse507)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse510 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse508 (select .cse510 (select .cse25 v_arrayElimIndex_11))) (.cse509 (select .cse510 .cse22))) (or (= (select .cse508 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= (select .cse508 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse509 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse509 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))))) .cse511 .cse488 .cse512 .cse465 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse513 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse514 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (= (select (select .cse513 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse513 .cse22) v_arrayElimCell_152)) (not (bvule .cse514 .cse297)) (not (bvule v_arrayElimCell_152 .cse514)))))) .cse312 .cse313) (or .cse231 .cse405)) .cse4) (or (and (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse515 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (not (bvule .cse515 .cse297)) (not (bvule v_arrayElimCell_152 .cse515)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse518 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse516 (select .cse518 (select .cse25 v_arrayElimIndex_11))) (.cse517 (select .cse518 .cse22))) (or (= (select .cse516 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= (select .cse516 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse517 v_arrayElimCell_152)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse517 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse520 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse519 (select .cse520 (select .cse25 v_arrayElimIndex_11))) (.cse521 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (= (select .cse519 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (= (select .cse519 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse520 .cse22) v_arrayElimCell_152)) (not (bvule .cse521 .cse297)) (not (bvule v_arrayElimCell_152 .cse521)))))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|))) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse523 (bvadd v_arrayElimCell_152 (_ bv4 32))) (.cse522 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse522 v_arrayElimCell_152)) (not (bvule .cse523 .cse297)) (not (bvule v_arrayElimCell_152 .cse523)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse522 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) .cse511 .cse512 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse524 (bvadd v_arrayElimCell_152 (_ bv4 32)))) (or (not (bvule (bvadd v_arrayElimCell_152 (_ bv8 32)) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) v_arrayElimCell_152)) (not (bvule .cse524 .cse297)) (not (bvule v_arrayElimCell_152 .cse524)))))) .cse312 .cse313) (or .cse231 .cse433) (or .cse126 .cse125 .cse135 .cse426 .cse154) .cse381 .cse382)) .cse54) (or (let ((.cse580 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse640 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse640 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) .cse640)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24))))) (.cse537 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse639 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse637 (select .cse639 (select .cse25 v_arrayElimIndex_11))) (.cse638 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (= (select .cse637 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse637 .cse638)) (not (bvule .cse638 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse639 .cse22) .cse638)) (not (bvule v_arrayElimIndex_11 .cse297))))))) (.cse543 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse636 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse634 (select .cse636 (select .cse25 v_arrayElimIndex_11))) (.cse635 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (= (select .cse634 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse634 .cse635)) (not (bvule .cse635 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse636 .cse22) .cse635)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24)))))) (.cse532 (not (bvule .cse24 .cse297))) (.cse533 (not (bvule .cse633 .cse297))) (.cse538 (and .cse0 .cse4)) (.cse631 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse632 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse632 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) .cse632)) (not (bvule v_arrayElimIndex_11 .cse297))))))) (and (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse531 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse530 (select .cse531 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse530 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse530 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse531 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse532 .cse533 .cse125 .cse144 .cse154) (or .cse532 .cse533 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse534 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse534 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse534 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) .cse125 .cse144 .cse154) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse535 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse536 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse535 (select .cse25 v_arrayElimIndex_11)) .cse536)) (not (bvule .cse536 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse535 .cse22) .cse536)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24)))) .cse4) (or .cse537 .cse4) (or .cse538 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse542 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse539 (select .cse542 (select .cse25 v_arrayElimIndex_11))) (.cse540 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse541 (select .cse542 .cse22))) (or (= (select .cse539 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse539 .cse540)) (not (bvule .cse540 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse541 .cse540)) (not (bvule v_arrayElimIndex_11 .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse541 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (or .cse532 .cse533 .cse125 .cse144 .cse145 .cse154) (or .cse543 .cse0) (or .cse538 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse547 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse544 (select .cse547 (select .cse25 v_arrayElimIndex_11))) (.cse545 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse546 (select .cse547 .cse22))) (or (= (select .cse544 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse544 .cse545)) (not (bvule .cse545 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse546 .cse545)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse546 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (or (and .cse466 (or .cse533 .cse144)) (and .cse467 (or .cse125 .cse144)) (and (or .cse532 .cse144) .cse468) (and .cse129 .cse130 .cse134) .cse154) (or .cse532 .cse125 .cse144 (and (or .cse533 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse548 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse548 (select .cse25 v_arrayElimIndex_11)) (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse548 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse533 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse549 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse550 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse551 (select .cse549 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse549 (select .cse25 v_arrayElimIndex_11)) .cse550)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse551 .cse550)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse551 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) .cse154) (or .cse538 (let ((.cse552 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse568 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse569 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (not (bvule .cse568 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse569 .cse22) .cse568)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse569 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))))) (.cse558 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse567 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse567 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) .cse567)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11))))) (.cse553 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse566 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse565 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse564 (select .cse566 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse564 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse565 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse566 .cse22) .cse565)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse564 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))))))) (and (or .cse552 .cse0) (or .cse553 .cse4) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse557 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse555 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse554 (select .cse557 (select .cse25 v_arrayElimIndex_11))) (.cse556 (select .cse557 .cse22))) (or (= (select .cse554 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse555 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse556 .cse555)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse554 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse556 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse552 .cse4) (or .cse558 .cse4) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse559 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse560 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (not (bvule .cse559 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse560 .cse559)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse560 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse563 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse561 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse562 (select .cse563 .cse22))) (or (not (bvule .cse561 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse562 .cse561)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse563 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse562 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse0 .cse558) (or .cse0 .cse553)))) (or .cse532 .cse533 .cse125 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse571 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse570 (select .cse571 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse570 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse570 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse571 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse144 .cse154) (or (let ((.cse572 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse576 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse577 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse576 (select .cse25 v_arrayElimIndex_11)) .cse577)) (not (bvule .cse577 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse576 .cse22) .cse577)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (and (or .cse572 .cse0) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse573 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse574 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse575 (select .cse573 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse573 (select .cse25 v_arrayElimIndex_11)) .cse574)) (not (bvule .cse574 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse575 .cse574)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse575 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse572 .cse4))) .cse538) (or .cse538 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse578 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse579 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (not (bvule .cse578 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse579 .cse578)) (not (bvule v_arrayElimIndex_11 .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse579 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse580 .cse4) (or .cse0 .cse580) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse581 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse582 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse581 (select .cse25 v_arrayElimIndex_11)) .cse582)) (not (bvule .cse582 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse581 .cse22) .cse582)) (not (bvule v_arrayElimIndex_11 .cse297))))) .cse4) (or .cse466 .cse467 .cse0 .cse146 .cse468 .cse154) (or .cse125 .cse144 (and (or .cse532 .cse533 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse585 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse583 (select .cse585 (select .cse25 v_arrayElimIndex_11))) (.cse584 (select .cse585 .cse22))) (or (= (select .cse583 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse584 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse583 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse584 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (or .cse532 .cse533 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse586 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse586 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse586 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse532 .cse533 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse588 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse587 (select .cse588 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse587 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select .cse587 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse588 .cse22) |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))))) (or .cse532 (and (or .cse533 .cse145) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse589 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse589 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse589 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) .cse533))) (or .cse532 .cse533 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse591 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse590 (select .cse591 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse590 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= |c_ULTIMATE.start_main_~#s~0#1.offset| v_arrayElimIndex_11) (= (select (select .cse591 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse590 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) .cse154) (or .cse0 .cse537) (or .cse543 .cse4) (or .cse532 .cse533 .cse125 .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse592 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse592 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse592 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) .cse154) (or .cse532 .cse533 .cse125 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse596 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse593 (select .cse596 (select .cse25 v_arrayElimIndex_11))) (.cse594 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse595 (select .cse596 .cse22))) (or (= (select .cse593 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse593 .cse594)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse595 .cse594)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse595 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse144 .cse154) (or (let ((.cse597 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse601 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593)) (.cse602 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse601 (select .cse25 v_arrayElimIndex_11)) .cse602)) (not (bvule .cse602 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse601 .cse22) .cse602)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) (and (or .cse0 .cse597) (or .cse597 .cse4) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse598 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse599 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse600 (select .cse598 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse598 (select .cse25 v_arrayElimIndex_11)) .cse599)) (not (bvule .cse599 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse600 .cse599)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse600 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))))) .cse538) (or (and (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse603 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse603 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (not (bvule v_arrayElimIndex_11 .cse297)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (= |c_ULTIMATE.start_main_~data~0#1| (select (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22) .cse603))) (= v_arrayElimIndex_11 .cse24)))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse604 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse604 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse606 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse605 (select .cse606 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse605 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse606 .cse22) .cse604)) (= (select .cse605 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)))))))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse609 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse608 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse607 (select .cse609 (select .cse25 v_arrayElimIndex_11)))) (or (= (select .cse607 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (not (bvule .cse608 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse609 .cse22) .cse608)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= (select .cse607 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))))) .cse0) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse612 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse613 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse610 (select .cse613 (select .cse25 v_arrayElimIndex_11))) (.cse611 (select .cse613 .cse22))) (or (= (select .cse610 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse611 .cse612)) (= (select .cse610 v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse611 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule .cse612 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24)))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse614 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse614 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse615 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse615 .cse22) .cse614)) (= (select (select .cse615 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|)))) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse616 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse616 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse618 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse617 (select .cse618 .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse617 .cse616)) (= (select (select .cse618 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse617 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse619 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse619 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse620 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse620 .cse22) .cse619)) (= (select (select .cse620 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|))))))) (forall ((v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse621 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11))) (or (not (bvule .cse621 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32)))) (let ((.cse622 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (= |c_ULTIMATE.start_main_~data~0#1| (select .cse622 .cse621)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse622 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|))))) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24)))) (or .cse0 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32)) (v_arrayElimCell_152 (_ BitVec 32))) (let ((.cse623 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse624 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (or (not (bvule .cse623 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select (select .cse624 .cse22) .cse623)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= (select (select .cse624 (select .cse25 v_arrayElimIndex_11)) v_arrayElimCell_152) |c_ULTIMATE.start_main_~data~0#1|) (= v_arrayElimIndex_11 |c_ULTIMATE.start_sll_prepend_~head#1.offset|)))))) .cse54) (or .cse532 .cse533 .cse125 .cse144 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse628 (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593))) (let ((.cse625 (select .cse628 (select .cse25 v_arrayElimIndex_11))) (.cse626 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse627 (select .cse628 .cse22))) (or (= (select .cse625 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|) |c_ULTIMATE.start_main_~data~0#1|) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse625 .cse626)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse627 .cse626)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse627 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) .cse154) (or .cse538 (forall ((v_ArrVal_1593 (Array (_ BitVec 32) (_ BitVec 32))) (v_arrayElimIndex_11 (_ BitVec 32))) (let ((.cse629 (bvadd (_ bv4294967292 32) v_arrayElimIndex_11)) (.cse630 (select (store |c_#memory_int| |c_ULTIMATE.start_sll_prepend_~head#1.base| v_ArrVal_1593) .cse22))) (or (not (bvule .cse629 v_arrayElimIndex_11)) (not (bvule (bvadd (_ bv4 32) v_arrayElimIndex_11) .cse297)) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse630 .cse629)) (not (bvule v_arrayElimIndex_11 .cse297)) (= v_arrayElimIndex_11 .cse24) (= |c_ULTIMATE.start_main_~data~0#1| (select .cse630 |c_ULTIMATE.start_sll_prepend_~new_head~1#1.offset|)))))) (or .cse631 .cse4) (or .cse0 .cse631))) .cse312 .cse313))))))))))) is different from true