./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_3-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 6b4ec56b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_3-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-6b4ec56 [2022-11-20 12:38:28,315 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-20 12:38:28,317 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-20 12:38:28,338 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-20 12:38:28,338 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-20 12:38:28,339 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-20 12:38:28,341 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-20 12:38:28,343 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-20 12:38:28,344 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-20 12:38:28,346 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-20 12:38:28,347 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-20 12:38:28,348 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-20 12:38:28,349 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-20 12:38:28,350 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-20 12:38:28,351 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-20 12:38:28,352 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-20 12:38:28,353 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-20 12:38:28,354 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-20 12:38:28,356 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-20 12:38:28,358 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-20 12:38:28,359 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-20 12:38:28,361 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-20 12:38:28,362 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-20 12:38:28,363 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-20 12:38:28,367 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-20 12:38:28,367 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-20 12:38:28,368 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-20 12:38:28,369 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-20 12:38:28,369 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-20 12:38:28,370 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-20 12:38:28,371 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-20 12:38:28,372 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-20 12:38:28,372 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-20 12:38:28,373 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-20 12:38:28,375 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-20 12:38:28,375 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-20 12:38:28,376 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-20 12:38:28,376 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-20 12:38:28,377 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-20 12:38:28,378 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-20 12:38:28,379 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-20 12:38:28,384 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-20 12:38:28,422 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-20 12:38:28,423 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-20 12:38:28,424 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-20 12:38:28,424 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-20 12:38:28,426 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-20 12:38:28,426 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-20 12:38:28,426 INFO L138 SettingsManager]: * Use SBE=true [2022-11-20 12:38:28,427 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-20 12:38:28,427 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-20 12:38:28,427 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-20 12:38:28,428 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-20 12:38:28,429 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-20 12:38:28,429 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-20 12:38:28,429 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-20 12:38:28,430 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-20 12:38:28,430 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-20 12:38:28,430 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-20 12:38:28,430 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-20 12:38:28,431 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-20 12:38:28,431 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-20 12:38:28,431 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-20 12:38:28,432 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-20 12:38:28,432 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-20 12:38:28,432 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-20 12:38:28,432 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-20 12:38:28,433 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-20 12:38:28,433 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-20 12:38:28,434 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-20 12:38:28,434 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-20 12:38:28,434 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-20 12:38:28,435 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-20 12:38:28,437 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-20 12:38:28,437 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 [2022-11-20 12:38:28,734 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-20 12:38:28,756 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-20 12:38:28,758 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-20 12:38:28,760 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-20 12:38:28,760 INFO L275 PluginConnector]: CDTParser initialized [2022-11-20 12:38:28,761 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/../../sv-benchmarks/c/loop-acceleration/array_3-1.i [2022-11-20 12:38:31,894 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-20 12:38:32,129 INFO L351 CDTParser]: Found 1 translation units. [2022-11-20 12:38:32,130 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/sv-benchmarks/c/loop-acceleration/array_3-1.i [2022-11-20 12:38:32,140 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/data/e6b649d4e/00294ae7b14f4c0ba0e08f19621f6217/FLAG92a195884 [2022-11-20 12:38:32,475 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/data/e6b649d4e/00294ae7b14f4c0ba0e08f19621f6217 [2022-11-20 12:38:32,478 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-20 12:38:32,479 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-20 12:38:32,481 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-20 12:38:32,481 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-20 12:38:32,487 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-20 12:38:32,488 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,489 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25175936 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32, skipping insertion in model container [2022-11-20 12:38:32,489 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,498 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-20 12:38:32,520 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-20 12:38:32,717 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/sv-benchmarks/c/loop-acceleration/array_3-1.i[849,862] [2022-11-20 12:38:32,733 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 12:38:32,748 INFO L203 MainTranslator]: Completed pre-run [2022-11-20 12:38:32,762 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/sv-benchmarks/c/loop-acceleration/array_3-1.i[849,862] [2022-11-20 12:38:32,773 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 12:38:32,793 INFO L208 MainTranslator]: Completed translation [2022-11-20 12:38:32,794 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32 WrapperNode [2022-11-20 12:38:32,794 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-20 12:38:32,796 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-20 12:38:32,796 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-20 12:38:32,796 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-20 12:38:32,805 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,814 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,836 INFO L138 Inliner]: procedures = 16, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 43 [2022-11-20 12:38:32,837 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-20 12:38:32,838 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-20 12:38:32,838 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-20 12:38:32,838 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-20 12:38:32,849 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,850 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,862 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,863 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,867 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,874 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,878 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,879 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,883 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-20 12:38:32,888 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-20 12:38:32,888 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-20 12:38:32,889 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-20 12:38:32,890 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (1/1) ... [2022-11-20 12:38:32,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:32,911 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:32,929 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:32,960 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-20 12:38:32,983 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-20 12:38:32,984 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-20 12:38:32,984 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-20 12:38:32,984 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-20 12:38:32,984 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-20 12:38:32,985 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-20 12:38:32,985 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-20 12:38:32,985 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-20 12:38:33,071 INFO L235 CfgBuilder]: Building ICFG [2022-11-20 12:38:33,073 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-20 12:38:33,261 INFO L276 CfgBuilder]: Performing block encoding [2022-11-20 12:38:33,267 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-20 12:38:33,268 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-20 12:38:33,271 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 12:38:33 BoogieIcfgContainer [2022-11-20 12:38:33,271 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-20 12:38:33,273 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-20 12:38:33,273 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-20 12:38:33,278 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-20 12:38:33,279 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-20 12:38:33,280 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 20.11 12:38:32" (1/3) ... [2022-11-20 12:38:33,281 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1583ff7b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 12:38:33, skipping insertion in model container [2022-11-20 12:38:33,281 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-20 12:38:33,282 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:38:32" (2/3) ... [2022-11-20 12:38:33,284 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1583ff7b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 12:38:33, skipping insertion in model container [2022-11-20 12:38:33,284 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-20 12:38:33,284 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 12:38:33" (3/3) ... [2022-11-20 12:38:33,288 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_3-1.i [2022-11-20 12:38:33,367 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-20 12:38:33,367 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-20 12:38:33,368 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-20 12:38:33,368 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-20 12:38:33,368 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-20 12:38:33,368 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-20 12:38:33,369 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-20 12:38:33,369 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-20 12:38:33,374 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:33,393 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-20 12:38:33,393 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:33,394 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:33,400 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-20 12:38:33,400 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-20 12:38:33,400 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-20 12:38:33,401 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:33,403 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-11-20 12:38:33,403 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:33,404 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:33,404 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-20 12:38:33,404 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-20 12:38:33,414 INFO L748 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 13#L24-3true [2022-11-20 12:38:33,415 INFO L750 eck$LassoCheckResult]: Loop: 13#L24-3true assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 5#L24-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 13#L24-3true [2022-11-20 12:38:33,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:33,427 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-20 12:38:33,438 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:33,439 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090770158] [2022-11-20 12:38:33,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:33,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:33,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:33,590 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:33,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:33,619 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:33,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:33,622 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-20 12:38:33,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:33,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011987812] [2022-11-20 12:38:33,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:33,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:33,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:33,633 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:33,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:33,642 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:33,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:33,644 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-20 12:38:33,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:33,645 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681778246] [2022-11-20 12:38:33,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:33,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:33,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:33,668 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:33,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:33,688 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:34,155 INFO L210 LassoAnalysis]: Preferences: [2022-11-20 12:38:34,170 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-20 12:38:34,171 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-20 12:38:34,171 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-20 12:38:34,171 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-20 12:38:34,172 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:34,172 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-20 12:38:34,173 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-20 12:38:34,173 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_3-1.i_Iteration1_Lasso [2022-11-20 12:38:34,173 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-20 12:38:34,173 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-20 12:38:34,203 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:38:34,218 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:38:34,223 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:38:34,229 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:38:34,510 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:38:34,515 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:38:34,518 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:38:34,794 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-20 12:38:34,799 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-20 12:38:34,801 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:34,801 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:34,805 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:34,814 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:34,828 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-20 12:38:34,828 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:34,830 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:34,830 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:34,830 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:34,846 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-20 12:38:34,847 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-20 12:38:34,867 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-20 12:38:34,872 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:34,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:34,873 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:34,875 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:34,888 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:34,901 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:34,901 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-20 12:38:34,902 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:34,902 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:34,902 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:34,903 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-20 12:38:34,905 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-20 12:38:34,905 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-20 12:38:34,916 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-20 12:38:34,925 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:34,926 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:34,926 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:34,928 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:34,937 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:34,950 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:34,950 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-20 12:38:34,951 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:34,951 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:34,951 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:34,952 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-20 12:38:34,952 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-20 12:38:34,953 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-20 12:38:34,975 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-20 12:38:34,979 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:34,979 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:34,980 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:34,981 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:34,984 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-20 12:38:34,984 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:34,997 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:34,998 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:34,998 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:34,998 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:35,004 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-20 12:38:35,005 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-20 12:38:35,023 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-20 12:38:35,031 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:35,032 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:35,032 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:35,034 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:35,037 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-20 12:38:35,037 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:35,051 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:35,051 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-20 12:38:35,052 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:35,052 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:35,052 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:35,053 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-20 12:38:35,053 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-20 12:38:35,075 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-20 12:38:35,087 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:35,087 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:35,087 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:35,089 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:35,093 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:35,106 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:35,106 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:35,106 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:35,106 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:35,107 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-20 12:38:35,114 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-20 12:38:35,115 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-20 12:38:35,127 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-20 12:38:35,141 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:35,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:35,141 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:35,143 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:35,156 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:35,169 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:35,169 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:35,169 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:35,169 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:35,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-20 12:38:35,175 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-20 12:38:35,175 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-20 12:38:35,192 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-20 12:38:35,200 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:35,200 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:35,201 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:35,202 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:35,206 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-20 12:38:35,219 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-20 12:38:35,220 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-20 12:38:35,220 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-20 12:38:35,220 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-20 12:38:35,220 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-20 12:38:35,228 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-20 12:38:35,228 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-20 12:38:35,243 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-20 12:38:35,289 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. [2022-11-20 12:38:35,289 INFO L444 ModelExtractionUtils]: 3 out of 13 variables were initially zero. Simplification set additionally 7 variables to zero. [2022-11-20 12:38:35,290 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:38:35,291 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:35,330 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:38:35,337 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-20 12:38:35,349 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-20 12:38:35,365 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-20 12:38:35,365 INFO L513 LassoAnalysis]: Proved termination. [2022-11-20 12:38:35,365 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 2047 Supporting invariants [] [2022-11-20 12:38:35,374 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-20 12:38:35,399 INFO L156 tatePredicateManager]: 5 out of 5 supporting invariants were superfluous and have been removed [2022-11-20 12:38:35,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:35,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:35,455 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-20 12:38:35,457 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 12:38:35,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:35,479 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-20 12:38:35,480 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 12:38:35,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:35,553 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-20 12:38:35,555 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:35,614 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 16 states, 15 states have (on average 1.4) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 31 states and 43 transitions. Complement of second has 8 states. [2022-11-20 12:38:35,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-20 12:38:35,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:35,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 21 transitions. [2022-11-20 12:38:35,627 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-20 12:38:35,627 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-20 12:38:35,627 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-20 12:38:35,627 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-20 12:38:35,628 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 21 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-20 12:38:35,628 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-20 12:38:35,629 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 43 transitions. [2022-11-20 12:38:35,634 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:35,638 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 10 states and 12 transitions. [2022-11-20 12:38:35,639 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-20 12:38:35,639 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-11-20 12:38:35,641 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 12 transitions. [2022-11-20 12:38:35,641 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:38:35,646 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2022-11-20 12:38:35,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 12 transitions. [2022-11-20 12:38:35,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2022-11-20 12:38:35,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:35,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2022-11-20 12:38:35,671 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2022-11-20 12:38:35,671 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2022-11-20 12:38:35,671 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-20 12:38:35,671 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2022-11-20 12:38:35,672 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:35,672 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:35,672 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:35,672 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-20 12:38:35,672 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-20 12:38:35,673 INFO L748 eck$LassoCheckResult]: Stem: 106#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 107#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 114#L24-3 assume !(main_~i~0#1 < 1024); 115#L24-4 main_~i~0#1 := 0; 113#L28-4 [2022-11-20 12:38:35,673 INFO L750 eck$LassoCheckResult]: Loop: 113#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 110#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 111#L29 assume !(main_~i~0#1 >= 1023); 112#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 113#L28-4 [2022-11-20 12:38:35,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:35,673 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-20 12:38:35,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:35,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120536071] [2022-11-20 12:38:35,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:35,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:35,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:35,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:35,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:38:35,737 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1120536071] [2022-11-20 12:38:35,738 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1120536071] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 12:38:35,738 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 12:38:35,738 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-20 12:38:35,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206348595] [2022-11-20 12:38:35,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 12:38:35,741 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-20 12:38:35,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:35,742 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 1 times [2022-11-20 12:38:35,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:35,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [986857121] [2022-11-20 12:38:35,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:35,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:35,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:35,749 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:35,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:35,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:35,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:38:35,815 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-20 12:38:35,816 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-20 12:38:35,817 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:35,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:38:35,839 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-11-20 12:38:35,840 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2022-11-20 12:38:35,841 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:35,841 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2022-11-20 12:38:35,841 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2022-11-20 12:38:35,842 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2022-11-20 12:38:35,842 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2022-11-20 12:38:35,842 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:38:35,842 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-11-20 12:38:35,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2022-11-20 12:38:35,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 10. [2022-11-20 12:38:35,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:35,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2022-11-20 12:38:35,845 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2022-11-20 12:38:35,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-20 12:38:35,847 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2022-11-20 12:38:35,847 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-20 12:38:35,847 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2022-11-20 12:38:35,847 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:35,848 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:35,848 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:35,848 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-20 12:38:35,848 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-20 12:38:35,849 INFO L748 eck$LassoCheckResult]: Stem: 137#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 138#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 145#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 139#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 140#L24-3 assume !(main_~i~0#1 < 1024); 146#L24-4 main_~i~0#1 := 0; 144#L28-4 [2022-11-20 12:38:35,849 INFO L750 eck$LassoCheckResult]: Loop: 144#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 141#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 142#L29 assume !(main_~i~0#1 >= 1023); 143#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 144#L28-4 [2022-11-20 12:38:35,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:35,850 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-11-20 12:38:35,850 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:35,850 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22327760] [2022-11-20 12:38:35,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:35,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:35,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:35,916 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2022-11-20 12:38:35,955 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:35,955 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:38:35,956 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22327760] [2022-11-20 12:38:35,956 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [22327760] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 12:38:35,956 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [566565068] [2022-11-20 12:38:35,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:35,957 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 12:38:35,957 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:35,958 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 12:38:35,988 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-20 12:38:36,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:36,031 INFO L263 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-20 12:38:36,032 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 12:38:36,055 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:36,055 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 12:38:36,090 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:36,090 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [566565068] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 12:38:36,090 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 12:38:36,090 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-20 12:38:36,091 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1983142176] [2022-11-20 12:38:36,091 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 12:38:36,091 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-20 12:38:36,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:36,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 2 times [2022-11-20 12:38:36,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:36,093 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114218765] [2022-11-20 12:38:36,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:36,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:36,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:36,101 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:36,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:36,107 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:36,162 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:38:36,162 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-20 12:38:36,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-20 12:38:36,163 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:36,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:38:36,242 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2022-11-20 12:38:36,242 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2022-11-20 12:38:36,246 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:36,249 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2022-11-20 12:38:36,249 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-20 12:38:36,249 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-11-20 12:38:36,249 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2022-11-20 12:38:36,249 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:38:36,250 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2022-11-20 12:38:36,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2022-11-20 12:38:36,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 16. [2022-11-20 12:38:36,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:36,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2022-11-20 12:38:36,259 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2022-11-20 12:38:36,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-20 12:38:36,262 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2022-11-20 12:38:36,262 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-20 12:38:36,262 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2022-11-20 12:38:36,262 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:36,263 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:36,264 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:36,265 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-11-20 12:38:36,265 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-20 12:38:36,265 INFO L748 eck$LassoCheckResult]: Stem: 214#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 215#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 222#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 216#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 217#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 223#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 229#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 228#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 227#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 226#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 225#L24-3 assume !(main_~i~0#1 < 1024); 224#L24-4 main_~i~0#1 := 0; 221#L28-4 [2022-11-20 12:38:36,265 INFO L750 eck$LassoCheckResult]: Loop: 221#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 218#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 219#L29 assume !(main_~i~0#1 >= 1023); 220#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 221#L28-4 [2022-11-20 12:38:36,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:36,266 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-11-20 12:38:36,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:36,266 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669277987] [2022-11-20 12:38:36,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:36,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:36,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:36,487 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:36,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:38:36,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669277987] [2022-11-20 12:38:36,488 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669277987] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 12:38:36,489 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1527769327] [2022-11-20 12:38:36,489 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-20 12:38:36,489 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 12:38:36,489 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:36,490 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 12:38:36,500 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-20 12:38:36,548 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-20 12:38:36,548 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 12:38:36,549 INFO L263 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-20 12:38:36,550 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 12:38:36,601 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:36,601 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 12:38:36,682 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:36,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1527769327] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 12:38:36,682 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 12:38:36,682 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-20 12:38:36,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1773348176] [2022-11-20 12:38:36,683 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 12:38:36,684 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-20 12:38:36,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:36,685 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 3 times [2022-11-20 12:38:36,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:36,685 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [367421056] [2022-11-20 12:38:36,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:36,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:36,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:36,699 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:36,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:36,707 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:36,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:38:36,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-20 12:38:36,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-20 12:38:36,756 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:36,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:38:36,889 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2022-11-20 12:38:36,889 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 64 transitions. [2022-11-20 12:38:36,895 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:36,896 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 63 states and 64 transitions. [2022-11-20 12:38:36,896 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2022-11-20 12:38:36,897 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2022-11-20 12:38:36,897 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 64 transitions. [2022-11-20 12:38:36,898 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:38:36,898 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 64 transitions. [2022-11-20 12:38:36,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 64 transitions. [2022-11-20 12:38:36,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 28. [2022-11-20 12:38:36,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:36,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2022-11-20 12:38:36,904 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2022-11-20 12:38:36,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-20 12:38:36,905 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2022-11-20 12:38:36,905 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-20 12:38:36,905 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2022-11-20 12:38:36,908 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:36,909 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:36,909 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:36,911 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2022-11-20 12:38:36,911 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-20 12:38:36,912 INFO L748 eck$LassoCheckResult]: Stem: 375#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 376#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 383#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 384#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 385#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 377#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 378#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 402#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 401#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 400#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 399#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 398#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 397#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 396#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 395#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 394#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 393#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 392#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 391#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 390#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 389#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 388#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 387#L24-3 assume !(main_~i~0#1 < 1024); 386#L24-4 main_~i~0#1 := 0; 382#L28-4 [2022-11-20 12:38:36,912 INFO L750 eck$LassoCheckResult]: Loop: 382#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 379#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 380#L29 assume !(main_~i~0#1 >= 1023); 381#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 382#L28-4 [2022-11-20 12:38:36,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:36,913 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2022-11-20 12:38:36,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:36,913 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132970430] [2022-11-20 12:38:36,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:36,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:36,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:37,285 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:37,285 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:38:37,285 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132970430] [2022-11-20 12:38:37,285 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132970430] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 12:38:37,286 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1489707844] [2022-11-20 12:38:37,286 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-20 12:38:37,286 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 12:38:37,286 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:37,290 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 12:38:37,316 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-20 12:38:37,437 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-20 12:38:37,437 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 12:38:37,439 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-20 12:38:37,441 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 12:38:37,499 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:37,499 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 12:38:37,747 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:37,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1489707844] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 12:38:37,748 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 12:38:37,748 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2022-11-20 12:38:37,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1621768738] [2022-11-20 12:38:37,751 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 12:38:37,752 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-20 12:38:37,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:37,752 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 4 times [2022-11-20 12:38:37,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:37,753 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399809175] [2022-11-20 12:38:37,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:37,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:37,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:37,759 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:37,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:37,767 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:37,811 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:38:37,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-20 12:38:37,812 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-11-20 12:38:37,812 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:38,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:38:38,062 INFO L93 Difference]: Finished difference Result 135 states and 136 transitions. [2022-11-20 12:38:38,062 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 136 transitions. [2022-11-20 12:38:38,070 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:38,074 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 135 states and 136 transitions. [2022-11-20 12:38:38,074 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2022-11-20 12:38:38,074 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2022-11-20 12:38:38,074 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 136 transitions. [2022-11-20 12:38:38,077 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:38:38,079 INFO L218 hiAutomatonCegarLoop]: Abstraction has 135 states and 136 transitions. [2022-11-20 12:38:38,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 136 transitions. [2022-11-20 12:38:38,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 52. [2022-11-20 12:38:38,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:38,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2022-11-20 12:38:38,087 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2022-11-20 12:38:38,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-20 12:38:38,089 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2022-11-20 12:38:38,089 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-20 12:38:38,090 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2022-11-20 12:38:38,092 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:38,092 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:38,092 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:38,094 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2022-11-20 12:38:38,094 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-20 12:38:38,096 INFO L748 eck$LassoCheckResult]: Stem: 704#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 705#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 712#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 713#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 714#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 706#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 707#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 755#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 754#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 753#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 752#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 751#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 750#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 749#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 748#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 747#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 746#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 745#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 744#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 743#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 742#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 741#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 740#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 739#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 738#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 737#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 736#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 735#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 734#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 733#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 732#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 731#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 730#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 729#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 728#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 727#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 726#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 725#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 724#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 723#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 722#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 721#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 720#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 719#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 718#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 717#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 716#L24-3 assume !(main_~i~0#1 < 1024); 715#L24-4 main_~i~0#1 := 0; 711#L28-4 [2022-11-20 12:38:38,096 INFO L750 eck$LassoCheckResult]: Loop: 711#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 708#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 709#L29 assume !(main_~i~0#1 >= 1023); 710#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 711#L28-4 [2022-11-20 12:38:38,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:38,096 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2022-11-20 12:38:38,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:38,097 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636959778] [2022-11-20 12:38:38,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:38,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:38,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:38,870 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:38,870 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:38:38,870 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [636959778] [2022-11-20 12:38:38,870 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [636959778] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 12:38:38,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1244804449] [2022-11-20 12:38:38,871 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-20 12:38:38,871 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 12:38:38,871 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:38,878 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 12:38:38,883 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-20 12:38:39,001 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-20 12:38:39,001 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 12:38:39,004 INFO L263 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-20 12:38:39,007 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 12:38:39,125 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:39,126 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 12:38:40,046 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:40,046 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1244804449] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 12:38:40,047 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 12:38:40,047 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2022-11-20 12:38:40,047 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162927966] [2022-11-20 12:38:40,047 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 12:38:40,048 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-20 12:38:40,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:40,048 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 5 times [2022-11-20 12:38:40,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:40,049 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268638526] [2022-11-20 12:38:40,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:40,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:40,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:40,060 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:40,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:40,063 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:40,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:38:40,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-20 12:38:40,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-11-20 12:38:40,132 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:40,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:38:40,765 INFO L93 Difference]: Finished difference Result 279 states and 280 transitions. [2022-11-20 12:38:40,765 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 279 states and 280 transitions. [2022-11-20 12:38:40,767 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:40,769 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 279 states to 279 states and 280 transitions. [2022-11-20 12:38:40,769 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 187 [2022-11-20 12:38:40,770 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 187 [2022-11-20 12:38:40,770 INFO L73 IsDeterministic]: Start isDeterministic. Operand 279 states and 280 transitions. [2022-11-20 12:38:40,771 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:38:40,771 INFO L218 hiAutomatonCegarLoop]: Abstraction has 279 states and 280 transitions. [2022-11-20 12:38:40,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states and 280 transitions. [2022-11-20 12:38:40,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 100. [2022-11-20 12:38:40,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:40,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2022-11-20 12:38:40,778 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2022-11-20 12:38:40,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-20 12:38:40,779 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2022-11-20 12:38:40,779 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-20 12:38:40,780 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2022-11-20 12:38:40,780 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:40,780 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:40,781 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:40,782 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2022-11-20 12:38:40,783 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-20 12:38:40,783 INFO L748 eck$LassoCheckResult]: Stem: 1369#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 1370#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 1377#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1378#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1379#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1371#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1372#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1468#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1467#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1466#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1465#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1464#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1463#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1462#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1461#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1460#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1459#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1458#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1457#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1456#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1455#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1454#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1453#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1452#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1451#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1450#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1449#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1448#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1447#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1446#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1445#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1444#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1443#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1442#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1441#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1440#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1439#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1438#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1437#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1436#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1435#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1434#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1433#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1432#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1431#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1430#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1429#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1428#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1427#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1426#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1425#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1424#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1423#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1422#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1421#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1420#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1419#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1418#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1417#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1416#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1415#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1414#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1413#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1412#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1411#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1410#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1409#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1408#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1407#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1406#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1405#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1404#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1403#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1402#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1401#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1400#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1399#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1398#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1397#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1396#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1395#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1394#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1393#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1392#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1391#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1390#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1389#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1388#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1387#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1386#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1385#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1384#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1383#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 1382#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1381#L24-3 assume !(main_~i~0#1 < 1024); 1380#L24-4 main_~i~0#1 := 0; 1376#L28-4 [2022-11-20 12:38:40,783 INFO L750 eck$LassoCheckResult]: Loop: 1376#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 1373#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 1374#L29 assume !(main_~i~0#1 >= 1023); 1375#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1376#L28-4 [2022-11-20 12:38:40,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:40,784 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2022-11-20 12:38:40,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:40,784 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065177321] [2022-11-20 12:38:40,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:40,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:40,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:38:43,100 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:43,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:38:43,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065177321] [2022-11-20 12:38:43,100 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1065177321] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 12:38:43,101 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1060423509] [2022-11-20 12:38:43,101 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-20 12:38:43,101 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 12:38:43,101 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:38:43,108 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 12:38:43,112 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-20 12:38:47,009 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-11-20 12:38:47,009 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 12:38:47,018 INFO L263 TraceCheckSpWp]: Trace formula consists of 544 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-20 12:38:47,022 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 12:38:47,221 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:47,222 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 12:38:50,475 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:38:50,476 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1060423509] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 12:38:50,476 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 12:38:50,476 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2022-11-20 12:38:50,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672187743] [2022-11-20 12:38:50,476 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 12:38:50,477 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-20 12:38:50,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:50,477 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 6 times [2022-11-20 12:38:50,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:50,478 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432706014] [2022-11-20 12:38:50,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:50,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:50,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:50,482 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:38:50,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:38:50,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:38:50,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:38:50,529 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-11-20 12:38:50,532 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2022-11-20 12:38:50,532 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:53,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:38:53,061 INFO L93 Difference]: Finished difference Result 567 states and 568 transitions. [2022-11-20 12:38:53,061 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 567 states and 568 transitions. [2022-11-20 12:38:53,065 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:53,068 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 567 states to 567 states and 568 transitions. [2022-11-20 12:38:53,069 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 379 [2022-11-20 12:38:53,069 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 379 [2022-11-20 12:38:53,069 INFO L73 IsDeterministic]: Start isDeterministic. Operand 567 states and 568 transitions. [2022-11-20 12:38:53,070 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:38:53,071 INFO L218 hiAutomatonCegarLoop]: Abstraction has 567 states and 568 transitions. [2022-11-20 12:38:53,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states and 568 transitions. [2022-11-20 12:38:53,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 196. [2022-11-20 12:38:53,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:38:53,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2022-11-20 12:38:53,085 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2022-11-20 12:38:53,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-11-20 12:38:53,086 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2022-11-20 12:38:53,087 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-20 12:38:53,087 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2022-11-20 12:38:53,088 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-11-20 12:38:53,088 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:38:53,088 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:38:53,093 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2022-11-20 12:38:53,093 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-20 12:38:53,094 INFO L748 eck$LassoCheckResult]: Stem: 2706#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 2707#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet2#1, main_#t~post1#1, main_#t~post3#1, main_#t~mem4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 2714#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2715#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2716#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2708#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2709#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2901#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2900#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2899#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2898#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2897#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2896#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2895#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2894#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2893#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2892#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2891#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2890#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2889#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2888#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2887#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2886#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2885#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2884#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2883#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2882#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2881#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2880#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2879#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2878#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2877#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2876#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2875#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2874#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2873#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2872#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2871#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2870#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2869#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2868#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2867#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2866#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2865#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2864#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2863#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2862#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2861#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2860#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2859#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2858#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2857#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2856#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2855#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2854#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2853#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2852#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2851#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2850#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2849#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2848#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2847#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2846#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2845#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2844#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2843#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2842#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2841#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2840#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2839#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2838#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2837#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2836#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2835#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2834#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2833#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2832#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2831#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2830#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2829#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2828#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2827#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2826#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2825#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2824#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2823#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2822#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2821#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2820#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2819#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2818#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2817#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2816#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2815#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2814#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2813#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2812#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2811#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2810#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2809#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2808#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2807#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2806#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2805#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2804#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2803#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2802#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2801#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2800#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2799#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2798#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2797#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2796#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2795#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2794#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2793#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2792#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2791#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2790#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2789#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2788#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2787#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2786#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2785#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2784#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2783#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2782#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2781#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2780#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2779#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2778#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2777#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2776#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2775#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2774#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2773#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2772#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2771#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2770#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2769#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2768#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2767#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2766#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2765#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2764#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2763#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2762#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2761#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2760#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2759#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2758#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2757#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2756#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2755#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2754#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2753#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2752#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2751#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2750#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2749#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2748#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2747#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2746#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2745#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2744#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2743#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2742#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2741#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2740#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2739#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2738#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2737#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2736#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2735#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2734#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2733#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2732#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2731#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2730#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2729#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2728#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2727#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2726#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2725#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2724#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2723#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2722#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2721#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2720#L24-3 assume !!(main_~i~0#1 < 1024);call write~int(main_#t~nondet2#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet2#1; 2719#L24-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2718#L24-3 assume !(main_~i~0#1 < 1024); 2717#L24-4 main_~i~0#1 := 0; 2713#L28-4 [2022-11-20 12:38:53,094 INFO L750 eck$LassoCheckResult]: Loop: 2713#L28-4 call main_#t~mem4#1 := read~int(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 2710#L28-1 assume !!(0 != main_#t~mem4#1);havoc main_#t~mem4#1; 2711#L29 assume !(main_~i~0#1 >= 1023); 2712#L28-3 main_#t~post3#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2713#L28-4 [2022-11-20 12:38:53,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:38:53,095 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2022-11-20 12:38:53,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:38:53,095 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000417647] [2022-11-20 12:38:53,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:38:53,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:38:53,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:39:01,028 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:39:01,028 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:39:01,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1000417647] [2022-11-20 12:39:01,028 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1000417647] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 12:39:01,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [811060391] [2022-11-20 12:39:01,028 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-20 12:39:01,029 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 12:39:01,029 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:39:01,031 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 12:39:01,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1d78c913-7366-42bc-a402-7ec452fc9c89/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process