./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 6b4ec56b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash de654b8e722eb26a01715e643a442ee96e677f28cab0e875133e4d1d7edb214d --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-6b4ec56 [2022-11-20 12:36:02,912 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-20 12:36:02,914 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-20 12:36:02,939 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-20 12:36:02,939 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-20 12:36:02,941 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-20 12:36:02,943 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-20 12:36:02,945 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-20 12:36:02,947 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-20 12:36:02,948 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-20 12:36:02,949 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-20 12:36:02,951 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-20 12:36:02,952 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-20 12:36:02,953 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-20 12:36:02,955 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-20 12:36:02,956 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-20 12:36:02,958 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-20 12:36:02,959 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-20 12:36:02,961 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-20 12:36:02,964 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-20 12:36:02,966 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-20 12:36:02,968 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-20 12:36:02,969 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-20 12:36:02,970 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-20 12:36:02,975 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-20 12:36:02,975 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-20 12:36:02,976 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-20 12:36:02,977 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-20 12:36:02,978 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-20 12:36:02,979 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-20 12:36:02,980 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-20 12:36:02,981 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-20 12:36:02,982 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-20 12:36:02,984 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-20 12:36:02,985 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-20 12:36:02,986 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-20 12:36:02,987 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-20 12:36:02,987 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-20 12:36:02,988 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-20 12:36:02,989 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-20 12:36:02,990 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-20 12:36:02,991 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-20 12:36:03,020 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-20 12:36:03,020 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-20 12:36:03,021 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-20 12:36:03,021 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-20 12:36:03,022 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-20 12:36:03,023 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-20 12:36:03,023 INFO L138 SettingsManager]: * Use SBE=true [2022-11-20 12:36:03,023 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-20 12:36:03,024 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-20 12:36:03,024 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-20 12:36:03,024 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-20 12:36:03,025 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-20 12:36:03,025 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-20 12:36:03,025 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-20 12:36:03,026 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-20 12:36:03,026 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-20 12:36:03,026 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-20 12:36:03,027 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-20 12:36:03,027 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-20 12:36:03,027 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-20 12:36:03,027 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-20 12:36:03,028 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-20 12:36:03,028 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-20 12:36:03,028 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-20 12:36:03,029 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-20 12:36:03,029 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-20 12:36:03,029 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-20 12:36:03,030 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-20 12:36:03,030 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-20 12:36:03,030 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-20 12:36:03,031 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-20 12:36:03,032 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-20 12:36:03,032 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> de654b8e722eb26a01715e643a442ee96e677f28cab0e875133e4d1d7edb214d [2022-11-20 12:36:03,376 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-20 12:36:03,439 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-20 12:36:03,452 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-20 12:36:03,454 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-20 12:36:03,466 INFO L275 PluginConnector]: CDTParser initialized [2022-11-20 12:36:03,468 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c [2022-11-20 12:36:06,966 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-20 12:36:07,245 INFO L351 CDTParser]: Found 1 translation units. [2022-11-20 12:36:07,246 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c [2022-11-20 12:36:07,258 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/data/de617d886/171625c3c9a14dd28464a76190c878e8/FLAG4c0ac7082 [2022-11-20 12:36:07,277 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/data/de617d886/171625c3c9a14dd28464a76190c878e8 [2022-11-20 12:36:07,284 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-20 12:36:07,286 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-20 12:36:07,288 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-20 12:36:07,288 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-20 12:36:07,293 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-20 12:36:07,294 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,295 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@32a7bdbe and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07, skipping insertion in model container [2022-11-20 12:36:07,296 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,304 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-20 12:36:07,374 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-20 12:36:07,673 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c[20121,20134] [2022-11-20 12:36:07,674 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 12:36:07,694 INFO L203 MainTranslator]: Completed pre-run [2022-11-20 12:36:07,774 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c[20121,20134] [2022-11-20 12:36:07,775 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 12:36:07,795 INFO L208 MainTranslator]: Completed translation [2022-11-20 12:36:07,795 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07 WrapperNode [2022-11-20 12:36:07,796 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-20 12:36:07,797 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-20 12:36:07,798 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-20 12:36:07,798 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-20 12:36:07,808 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,822 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,866 INFO L138 Inliner]: procedures = 27, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 398 [2022-11-20 12:36:07,867 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-20 12:36:07,876 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-20 12:36:07,876 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-20 12:36:07,877 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-20 12:36:07,888 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,889 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,909 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,910 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,919 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,931 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,947 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,950 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,954 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-20 12:36:07,955 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-20 12:36:07,956 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-20 12:36:07,956 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-20 12:36:07,957 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (1/1) ... [2022-11-20 12:36:07,965 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:36:07,981 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 12:36:07,999 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-20 12:36:08,004 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_405f0f2c-5e21-49eb-bdc7-5cd3b139e572/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-20 12:36:08,051 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-20 12:36:08,052 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-20 12:36:08,052 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-20 12:36:08,052 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-20 12:36:08,181 INFO L235 CfgBuilder]: Building ICFG [2022-11-20 12:36:08,185 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-20 12:36:09,014 INFO L276 CfgBuilder]: Performing block encoding [2022-11-20 12:36:09,033 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-20 12:36:09,033 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-20 12:36:09,036 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 12:36:09 BoogieIcfgContainer [2022-11-20 12:36:09,036 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-20 12:36:09,037 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-20 12:36:09,038 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-20 12:36:09,043 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-20 12:36:09,044 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-20 12:36:09,044 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 20.11 12:36:07" (1/3) ... [2022-11-20 12:36:09,045 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@129a15a7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 12:36:09, skipping insertion in model container [2022-11-20 12:36:09,045 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-20 12:36:09,046 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 12:36:07" (2/3) ... [2022-11-20 12:36:09,046 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@129a15a7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 20.11 12:36:09, skipping insertion in model container [2022-11-20 12:36:09,046 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-20 12:36:09,047 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 12:36:09" (3/3) ... [2022-11-20 12:36:09,048 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c [2022-11-20 12:36:09,116 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-20 12:36:09,117 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-20 12:36:09,117 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-20 12:36:09,117 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-20 12:36:09,117 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-20 12:36:09,117 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-20 12:36:09,118 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-20 12:36:09,118 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-20 12:36:09,124 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 113 states, 112 states have (on average 1.7767857142857142) internal successors, (199), 112 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:09,156 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 53 [2022-11-20 12:36:09,156 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:36:09,156 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:36:09,167 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:09,168 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:09,168 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-20 12:36:09,171 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 113 states, 112 states have (on average 1.7767857142857142) internal successors, (199), 112 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:09,182 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 53 [2022-11-20 12:36:09,183 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:36:09,184 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:36:09,185 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:09,185 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:09,196 INFO L748 eck$LassoCheckResult]: Stem: 104#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 37#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 54#L262true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 24#L262-1true init_#res#1 := init_~tmp~0#1; 38#L463true main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 46#L24true assume !(0 == assume_abort_if_not_~cond#1); 15#L23true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 48#L547-2true [2022-11-20 12:36:09,197 INFO L750 eck$LassoCheckResult]: Loop: 48#L547-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 53#L87true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 6#L87-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 99#L113true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 43#L113-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 62#L138true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 84#L138-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 49#L163true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 44#L163-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 17#L188true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 9#L188-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 106#L213true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 13#L213-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 25#L238true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 88#L238-2true assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 23#L471true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 95#L471-1true check_#res#1 := check_~tmp~1#1; 5#L491true main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 109#L582true assume !(0 == assert_~arg#1 % 256); 66#L577true assume { :end_inline_assert } true; 48#L547-2true [2022-11-20 12:36:09,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:09,205 INFO L85 PathProgramCache]: Analyzing trace with hash 2087378158, now seen corresponding path program 1 times [2022-11-20 12:36:09,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:09,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041616738] [2022-11-20 12:36:09,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:09,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:09,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:36:09,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:36:09,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:36:09,573 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041616738] [2022-11-20 12:36:09,574 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1041616738] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 12:36:09,574 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 12:36:09,575 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-20 12:36:09,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [334469088] [2022-11-20 12:36:09,578 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 12:36:09,583 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-20 12:36:09,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:09,585 INFO L85 PathProgramCache]: Analyzing trace with hash 1398300834, now seen corresponding path program 1 times [2022-11-20 12:36:09,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:09,586 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337035017] [2022-11-20 12:36:09,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:09,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:09,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:36:10,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:36:10,300 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:36:10,301 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1337035017] [2022-11-20 12:36:10,302 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1337035017] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 12:36:10,302 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 12:36:10,303 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-20 12:36:10,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357343529] [2022-11-20 12:36:10,304 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 12:36:10,305 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-20 12:36:10,308 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:36:10,370 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-20 12:36:10,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-20 12:36:10,378 INFO L87 Difference]: Start difference. First operand has 113 states, 112 states have (on average 1.7767857142857142) internal successors, (199), 112 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:10,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:36:10,593 INFO L93 Difference]: Finished difference Result 112 states and 194 transitions. [2022-11-20 12:36:10,595 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 112 states and 194 transitions. [2022-11-20 12:36:10,599 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-11-20 12:36:10,605 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 112 states to 108 states and 141 transitions. [2022-11-20 12:36:10,606 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 108 [2022-11-20 12:36:10,634 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 108 [2022-11-20 12:36:10,635 INFO L73 IsDeterministic]: Start isDeterministic. Operand 108 states and 141 transitions. [2022-11-20 12:36:10,636 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:36:10,636 INFO L218 hiAutomatonCegarLoop]: Abstraction has 108 states and 141 transitions. [2022-11-20 12:36:10,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states and 141 transitions. [2022-11-20 12:36:10,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-11-20 12:36:10,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.3055555555555556) internal successors, (141), 107 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:10,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 141 transitions. [2022-11-20 12:36:10,697 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 141 transitions. [2022-11-20 12:36:10,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-20 12:36:10,703 INFO L428 stractBuchiCegarLoop]: Abstraction has 108 states and 141 transitions. [2022-11-20 12:36:10,703 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-20 12:36:10,704 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 141 transitions. [2022-11-20 12:36:10,706 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-11-20 12:36:10,707 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:36:10,707 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:36:10,709 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:10,710 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:10,711 INFO L748 eck$LassoCheckResult]: Stem: 349#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 303#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 304#L262 assume 0 == ~r1~0 % 256; 320#L263 assume ~id1~0 >= 0; 323#L264 assume 0 == ~st1~0; 324#L265 assume ~send1~0 == ~id1~0; 262#L266 assume 0 == ~mode1~0 % 256; 263#L267 assume ~id2~0 >= 0; 274#L268 assume 0 == ~st2~0; 275#L269 assume ~send2~0 == ~id2~0; 258#L270 assume 0 == ~mode2~0 % 256; 259#L271 assume ~id3~0 >= 0; 297#L272 assume 0 == ~st3~0; 307#L273 assume ~send3~0 == ~id3~0; 322#L274 assume 0 == ~mode3~0 % 256; 342#L275 assume ~id4~0 >= 0; 243#L276 assume 0 == ~st4~0; 244#L277 assume ~send4~0 == ~id4~0; 350#L278 assume 0 == ~mode4~0 % 256; 318#L279 assume ~id5~0 >= 0; 319#L280 assume 0 == ~st5~0; 268#L281 assume ~send5~0 == ~id5~0; 245#L282 assume 0 == ~mode5~0 % 256; 246#L283 assume ~id6~0 >= 0; 325#L284 assume 0 == ~st6~0; 326#L285 assume ~send6~0 == ~id6~0; 341#L286 assume 0 == ~mode6~0 % 256; 330#L287 assume ~id7~0 >= 0; 289#L288 assume 0 == ~st7~0; 290#L289 assume ~send7~0 == ~id7~0; 299#L290 assume 0 == ~mode7~0 % 256; 335#L291 assume ~id1~0 != ~id2~0; 336#L292 assume ~id1~0 != ~id3~0; 344#L293 assume ~id1~0 != ~id4~0; 348#L294 assume ~id1~0 != ~id5~0; 251#L295 assume ~id1~0 != ~id6~0; 252#L296 assume ~id1~0 != ~id7~0; 298#L297 assume ~id2~0 != ~id3~0; 295#L298 assume ~id2~0 != ~id4~0; 296#L299 assume ~id2~0 != ~id5~0; 302#L300 assume ~id2~0 != ~id6~0; 332#L301 assume ~id2~0 != ~id7~0; 339#L302 assume ~id3~0 != ~id4~0; 340#L303 assume ~id3~0 != ~id5~0; 346#L304 assume ~id3~0 != ~id6~0; 327#L305 assume ~id3~0 != ~id7~0; 328#L306 assume ~id4~0 != ~id5~0; 334#L307 assume ~id4~0 != ~id6~0; 260#L308 assume ~id4~0 != ~id7~0; 261#L309 assume ~id5~0 != ~id6~0; 333#L310 assume ~id5~0 != ~id7~0; 314#L311 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 285#L262-1 init_#res#1 := init_~tmp~0#1; 286#L463 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 305#L24 assume !(0 == assume_abort_if_not_~cond#1); 266#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 267#L547-2 [2022-11-20 12:36:10,711 INFO L750 eck$LassoCheckResult]: Loop: 267#L547-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 315#L87 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 249#L87-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 250#L113 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 311#L113-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 312#L138 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 329#L138-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 316#L163 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 313#L163-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 269#L188 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 256#L188-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 257#L213 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 264#L213-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 265#L238 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 288#L238-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 282#L471 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 283#L471-1 check_#res#1 := check_~tmp~1#1; 247#L491 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 248#L582 assume !(0 == assert_~arg#1 % 256); 331#L577 assume { :end_inline_assert } true; 267#L547-2 [2022-11-20 12:36:10,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:10,712 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 1 times [2022-11-20 12:36:10,713 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:10,713 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262316043] [2022-11-20 12:36:10,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:10,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:10,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:10,751 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:36:10,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:10,827 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:36:10,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:10,828 INFO L85 PathProgramCache]: Analyzing trace with hash 1398300834, now seen corresponding path program 2 times [2022-11-20 12:36:10,829 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:10,829 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846233026] [2022-11-20 12:36:10,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:10,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:10,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:36:11,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:36:11,108 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:36:11,109 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846233026] [2022-11-20 12:36:11,109 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846233026] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 12:36:11,109 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 12:36:11,110 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-20 12:36:11,110 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962154623] [2022-11-20 12:36:11,110 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 12:36:11,111 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-20 12:36:11,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:36:11,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-20 12:36:11,112 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-20 12:36:11,112 INFO L87 Difference]: Start difference. First operand 108 states and 141 transitions. cyclomatic complexity: 34 Second operand has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:11,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:36:11,175 INFO L93 Difference]: Finished difference Result 111 states and 143 transitions. [2022-11-20 12:36:11,175 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111 states and 143 transitions. [2022-11-20 12:36:11,178 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-11-20 12:36:11,180 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111 states to 108 states and 138 transitions. [2022-11-20 12:36:11,180 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 108 [2022-11-20 12:36:11,181 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 108 [2022-11-20 12:36:11,181 INFO L73 IsDeterministic]: Start isDeterministic. Operand 108 states and 138 transitions. [2022-11-20 12:36:11,182 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:36:11,182 INFO L218 hiAutomatonCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-11-20 12:36:11,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states and 138 transitions. [2022-11-20 12:36:11,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-11-20 12:36:11,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.2777777777777777) internal successors, (138), 107 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:11,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 138 transitions. [2022-11-20 12:36:11,191 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-11-20 12:36:11,191 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-20 12:36:11,192 INFO L428 stractBuchiCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-11-20 12:36:11,192 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-20 12:36:11,193 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 138 transitions. [2022-11-20 12:36:11,194 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-11-20 12:36:11,194 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:36:11,195 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:36:11,196 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:11,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:11,197 INFO L748 eck$LassoCheckResult]: Stem: 580#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 533#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 534#L262 assume 0 == ~r1~0 % 256; 551#L263 assume ~id1~0 >= 0; 554#L264 assume 0 == ~st1~0; 555#L265 assume ~send1~0 == ~id1~0; 493#L266 assume 0 == ~mode1~0 % 256; 494#L267 assume ~id2~0 >= 0; 505#L268 assume 0 == ~st2~0; 506#L269 assume ~send2~0 == ~id2~0; 489#L270 assume 0 == ~mode2~0 % 256; 490#L271 assume ~id3~0 >= 0; 527#L272 assume 0 == ~st3~0; 538#L273 assume ~send3~0 == ~id3~0; 553#L274 assume 0 == ~mode3~0 % 256; 573#L275 assume ~id4~0 >= 0; 474#L276 assume 0 == ~st4~0; 475#L277 assume ~send4~0 == ~id4~0; 581#L278 assume 0 == ~mode4~0 % 256; 549#L279 assume ~id5~0 >= 0; 550#L280 assume 0 == ~st5~0; 499#L281 assume ~send5~0 == ~id5~0; 476#L282 assume 0 == ~mode5~0 % 256; 477#L283 assume ~id6~0 >= 0; 556#L284 assume 0 == ~st6~0; 557#L285 assume ~send6~0 == ~id6~0; 572#L286 assume 0 == ~mode6~0 % 256; 561#L287 assume ~id7~0 >= 0; 519#L288 assume 0 == ~st7~0; 520#L289 assume ~send7~0 == ~id7~0; 529#L290 assume 0 == ~mode7~0 % 256; 566#L291 assume ~id1~0 != ~id2~0; 567#L292 assume ~id1~0 != ~id3~0; 575#L293 assume ~id1~0 != ~id4~0; 579#L294 assume ~id1~0 != ~id5~0; 482#L295 assume ~id1~0 != ~id6~0; 483#L296 assume ~id1~0 != ~id7~0; 528#L297 assume ~id2~0 != ~id3~0; 525#L298 assume ~id2~0 != ~id4~0; 526#L299 assume ~id2~0 != ~id5~0; 532#L300 assume ~id2~0 != ~id6~0; 563#L301 assume ~id2~0 != ~id7~0; 570#L302 assume ~id3~0 != ~id4~0; 571#L303 assume ~id3~0 != ~id5~0; 577#L304 assume ~id3~0 != ~id6~0; 558#L305 assume ~id3~0 != ~id7~0; 559#L306 assume ~id4~0 != ~id5~0; 565#L307 assume ~id4~0 != ~id6~0; 491#L308 assume ~id4~0 != ~id7~0; 492#L309 assume ~id5~0 != ~id6~0; 564#L310 assume ~id5~0 != ~id7~0; 545#L311 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 515#L262-1 init_#res#1 := init_~tmp~0#1; 516#L463 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 535#L24 assume !(0 == assume_abort_if_not_~cond#1); 497#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 498#L547-2 [2022-11-20 12:36:11,198 INFO L750 eck$LassoCheckResult]: Loop: 498#L547-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 546#L87 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 480#L87-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 481#L113 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 542#L113-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 543#L138 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 560#L138-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 547#L163 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 544#L163-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 500#L188 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 487#L188-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 488#L213 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 495#L213-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 496#L238 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 518#L238-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 513#L471 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 514#L472 assume ~r1~0 % 256 >= 7; 530#L476 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 536#L471-1 check_#res#1 := check_~tmp~1#1; 478#L491 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 479#L582 assume !(0 == assert_~arg#1 % 256); 562#L577 assume { :end_inline_assert } true; 498#L547-2 [2022-11-20 12:36:11,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:11,199 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 2 times [2022-11-20 12:36:11,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:11,199 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896540139] [2022-11-20 12:36:11,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:11,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:11,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,225 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:36:11,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,261 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:36:11,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:11,262 INFO L85 PathProgramCache]: Analyzing trace with hash -1973476622, now seen corresponding path program 1 times [2022-11-20 12:36:11,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:11,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384687007] [2022-11-20 12:36:11,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:11,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:11,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 12:36:11,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 12:36:11,307 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 12:36:11,308 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384687007] [2022-11-20 12:36:11,308 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1384687007] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 12:36:11,308 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 12:36:11,309 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-20 12:36:11,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435163467] [2022-11-20 12:36:11,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 12:36:11,310 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-20 12:36:11,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 12:36:11,310 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-20 12:36:11,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-20 12:36:11,311 INFO L87 Difference]: Start difference. First operand 108 states and 138 transitions. cyclomatic complexity: 31 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:11,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 12:36:11,344 INFO L93 Difference]: Finished difference Result 154 states and 209 transitions. [2022-11-20 12:36:11,345 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 154 states and 209 transitions. [2022-11-20 12:36:11,347 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 98 [2022-11-20 12:36:11,349 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 154 states to 154 states and 209 transitions. [2022-11-20 12:36:11,349 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 154 [2022-11-20 12:36:11,350 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 154 [2022-11-20 12:36:11,350 INFO L73 IsDeterministic]: Start isDeterministic. Operand 154 states and 209 transitions. [2022-11-20 12:36:11,351 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-20 12:36:11,352 INFO L218 hiAutomatonCegarLoop]: Abstraction has 154 states and 209 transitions. [2022-11-20 12:36:11,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states and 209 transitions. [2022-11-20 12:36:11,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2022-11-20 12:36:11,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 154 states have (on average 1.3571428571428572) internal successors, (209), 153 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 12:36:11,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 209 transitions. [2022-11-20 12:36:11,361 INFO L240 hiAutomatonCegarLoop]: Abstraction has 154 states and 209 transitions. [2022-11-20 12:36:11,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-20 12:36:11,363 INFO L428 stractBuchiCegarLoop]: Abstraction has 154 states and 209 transitions. [2022-11-20 12:36:11,363 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-20 12:36:11,363 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 154 states and 209 transitions. [2022-11-20 12:36:11,364 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 98 [2022-11-20 12:36:11,365 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-20 12:36:11,365 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-20 12:36:11,367 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:11,367 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-20 12:36:11,367 INFO L748 eck$LassoCheckResult]: Stem: 851#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 801#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 802#L262 assume 0 == ~r1~0 % 256; 820#L263 assume ~id1~0 >= 0; 823#L264 assume 0 == ~st1~0; 824#L265 assume ~send1~0 == ~id1~0; 761#L266 assume 0 == ~mode1~0 % 256; 762#L267 assume ~id2~0 >= 0; 773#L268 assume 0 == ~st2~0; 774#L269 assume ~send2~0 == ~id2~0; 757#L270 assume 0 == ~mode2~0 % 256; 758#L271 assume ~id3~0 >= 0; 795#L272 assume 0 == ~st3~0; 805#L273 assume ~send3~0 == ~id3~0; 822#L274 assume 0 == ~mode3~0 % 256; 844#L275 assume ~id4~0 >= 0; 742#L276 assume 0 == ~st4~0; 743#L277 assume ~send4~0 == ~id4~0; 852#L278 assume 0 == ~mode4~0 % 256; 818#L279 assume ~id5~0 >= 0; 819#L280 assume 0 == ~st5~0; 767#L281 assume ~send5~0 == ~id5~0; 744#L282 assume 0 == ~mode5~0 % 256; 745#L283 assume ~id6~0 >= 0; 825#L284 assume 0 == ~st6~0; 826#L285 assume ~send6~0 == ~id6~0; 843#L286 assume 0 == ~mode6~0 % 256; 830#L287 assume ~id7~0 >= 0; 787#L288 assume 0 == ~st7~0; 788#L289 assume ~send7~0 == ~id7~0; 797#L290 assume 0 == ~mode7~0 % 256; 837#L291 assume ~id1~0 != ~id2~0; 838#L292 assume ~id1~0 != ~id3~0; 846#L293 assume ~id1~0 != ~id4~0; 850#L294 assume ~id1~0 != ~id5~0; 750#L295 assume ~id1~0 != ~id6~0; 751#L296 assume ~id1~0 != ~id7~0; 796#L297 assume ~id2~0 != ~id3~0; 793#L298 assume ~id2~0 != ~id4~0; 794#L299 assume ~id2~0 != ~id5~0; 800#L300 assume ~id2~0 != ~id6~0; 832#L301 assume ~id2~0 != ~id7~0; 841#L302 assume ~id3~0 != ~id4~0; 842#L303 assume ~id3~0 != ~id5~0; 848#L304 assume ~id3~0 != ~id6~0; 827#L305 assume ~id3~0 != ~id7~0; 828#L306 assume ~id4~0 != ~id5~0; 836#L307 assume ~id4~0 != ~id6~0; 759#L308 assume ~id4~0 != ~id7~0; 760#L309 assume ~id5~0 != ~id6~0; 835#L310 assume ~id5~0 != ~id7~0; 813#L311 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 783#L262-1 init_#res#1 := init_~tmp~0#1; 784#L463 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 803#L24 assume !(0 == assume_abort_if_not_~cond#1); 765#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 766#L547-2 [2022-11-20 12:36:11,368 INFO L750 eck$LassoCheckResult]: Loop: 766#L547-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 891#L87 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 799#L87-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 887#L113 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 883#L113-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 881#L138 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 877#L138-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 875#L163 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 873#L163-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 868#L188 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 865#L188-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 863#L213 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 859#L213-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 857#L238 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 855#L238-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 854#L471 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 853#L472 assume !(~r1~0 % 256 >= 7); 833#L475 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0; 834#L476 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 895#L471-1 check_#res#1 := check_~tmp~1#1; 894#L491 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 893#L582 assume !(0 == assert_~arg#1 % 256); 892#L577 assume { :end_inline_assert } true; 766#L547-2 [2022-11-20 12:36:11,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:11,369 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 3 times [2022-11-20 12:36:11,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:11,369 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934199224] [2022-11-20 12:36:11,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:11,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:11,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,403 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:36:11,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,470 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:36:11,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:11,472 INFO L85 PathProgramCache]: Analyzing trace with hash 598338978, now seen corresponding path program 1 times [2022-11-20 12:36:11,473 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:11,474 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083518491] [2022-11-20 12:36:11,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:11,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:11,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,550 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:36:11,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,672 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:36:11,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 12:36:11,673 INFO L85 PathProgramCache]: Analyzing trace with hash 75614321, now seen corresponding path program 1 times [2022-11-20 12:36:11,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 12:36:11,673 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072527136] [2022-11-20 12:36:11,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 12:36:11,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 12:36:11,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,762 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-20 12:36:11,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-20 12:36:11,827 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-20 12:36:21,795 INFO L210 LassoAnalysis]: Preferences: [2022-11-20 12:36:21,796 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-20 12:36:21,796 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-20 12:36:21,797 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-20 12:36:21,797 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-20 12:36:21,797 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-20 12:36:21,797 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-20 12:36:21,798 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-20 12:36:21,798 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-11-20 12:36:21,798 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-20 12:36:21,798 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-20 12:36:21,880 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:21,894 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:21,901 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:21,905 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:21,912 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:21,919 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:26,144 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:26,156 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:26,161 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:26,167 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:26,173 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:26,178 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:26,180 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-20 12:36:31,210 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 41