./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/loop-acceleration/simple_4-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 6b4ec56b Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/config/AutomizerReach.xml -i ../../sv-benchmarks/c/loop-acceleration/simple_4-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9950a3ef699b75b517ce9b65b2c32dbbe13ac0a027bb7e02ceeaeee924f6aade --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-6b4ec56 [2022-11-20 10:30:03,009 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-20 10:30:03,012 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-20 10:30:03,060 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-20 10:30:03,065 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-20 10:30:03,066 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-20 10:30:03,069 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-20 10:30:03,074 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-20 10:30:03,077 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-20 10:30:03,078 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-20 10:30:03,080 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-20 10:30:03,082 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-20 10:30:03,083 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-20 10:30:03,087 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-20 10:30:03,089 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-20 10:30:03,091 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-20 10:30:03,093 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-20 10:30:03,104 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-20 10:30:03,106 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-20 10:30:03,109 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-20 10:30:03,111 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-20 10:30:03,113 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-20 10:30:03,114 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-20 10:30:03,115 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-20 10:30:03,119 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-20 10:30:03,119 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-20 10:30:03,120 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-20 10:30:03,121 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-20 10:30:03,121 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-20 10:30:03,122 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-20 10:30:03,123 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-20 10:30:03,123 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-20 10:30:03,124 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-20 10:30:03,125 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-20 10:30:03,127 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-20 10:30:03,127 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-20 10:30:03,128 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-20 10:30:03,128 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-20 10:30:03,128 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-20 10:30:03,129 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-20 10:30:03,130 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-20 10:30:03,131 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/config/svcomp-Reach-32bit-Automizer_Default.epf [2022-11-20 10:30:03,154 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-20 10:30:03,154 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-20 10:30:03,155 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-20 10:30:03,155 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-20 10:30:03,156 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-20 10:30:03,156 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-20 10:30:03,157 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-20 10:30:03,157 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-20 10:30:03,157 INFO L138 SettingsManager]: * Use SBE=true [2022-11-20 10:30:03,158 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-20 10:30:03,158 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-20 10:30:03,158 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-20 10:30:03,158 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-20 10:30:03,158 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-20 10:30:03,159 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-20 10:30:03,159 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-20 10:30:03,159 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-20 10:30:03,159 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-20 10:30:03,160 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-20 10:30:03,160 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-20 10:30:03,160 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-20 10:30:03,160 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-20 10:30:03,161 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-20 10:30:03,161 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-20 10:30:03,161 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-20 10:30:03,161 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-20 10:30:03,162 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-20 10:30:03,162 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-20 10:30:03,162 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-20 10:30:03,162 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-20 10:30:03,163 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-20 10:30:03,163 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-20 10:30:03,163 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-20 10:30:03,163 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9950a3ef699b75b517ce9b65b2c32dbbe13ac0a027bb7e02ceeaeee924f6aade [2022-11-20 10:30:03,463 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-20 10:30:03,498 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-20 10:30:03,501 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-20 10:30:03,502 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-20 10:30:03,503 INFO L275 PluginConnector]: CDTParser initialized [2022-11-20 10:30:03,505 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/../../sv-benchmarks/c/loop-acceleration/simple_4-1.c [2022-11-20 10:30:06,553 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-20 10:30:06,844 INFO L351 CDTParser]: Found 1 translation units. [2022-11-20 10:30:06,845 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/sv-benchmarks/c/loop-acceleration/simple_4-1.c [2022-11-20 10:30:06,854 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/data/c463313aa/967fc863ee234801a971978b28fce66a/FLAG382ef7320 [2022-11-20 10:30:06,879 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/data/c463313aa/967fc863ee234801a971978b28fce66a [2022-11-20 10:30:06,881 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-20 10:30:06,883 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-20 10:30:06,884 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-20 10:30:06,884 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-20 10:30:06,888 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-20 10:30:06,889 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 10:30:06" (1/1) ... [2022-11-20 10:30:06,891 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1cd7bf86 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:06, skipping insertion in model container [2022-11-20 10:30:06,891 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.11 10:30:06" (1/1) ... [2022-11-20 10:30:06,902 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-20 10:30:06,926 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-20 10:30:07,108 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/sv-benchmarks/c/loop-acceleration/simple_4-1.c[322,335] [2022-11-20 10:30:07,121 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 10:30:07,137 INFO L203 MainTranslator]: Completed pre-run [2022-11-20 10:30:07,152 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/sv-benchmarks/c/loop-acceleration/simple_4-1.c[322,335] [2022-11-20 10:30:07,160 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-20 10:30:07,177 INFO L208 MainTranslator]: Completed translation [2022-11-20 10:30:07,178 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07 WrapperNode [2022-11-20 10:30:07,178 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-20 10:30:07,180 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-20 10:30:07,180 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-20 10:30:07,180 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-20 10:30:07,190 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,200 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,221 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 23 [2022-11-20 10:30:07,221 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-20 10:30:07,222 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-20 10:30:07,222 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-20 10:30:07,222 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-20 10:30:07,232 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,233 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,235 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,235 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,239 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,245 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,252 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,253 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,257 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-20 10:30:07,258 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-20 10:30:07,258 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-20 10:30:07,259 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-20 10:30:07,261 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (1/1) ... [2022-11-20 10:30:07,268 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-20 10:30:07,283 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 10:30:07,300 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-20 10:30:07,330 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-20 10:30:07,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-20 10:30:07,360 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-20 10:30:07,360 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-20 10:30:07,360 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-20 10:30:07,438 INFO L235 CfgBuilder]: Building ICFG [2022-11-20 10:30:07,440 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-20 10:30:07,592 INFO L276 CfgBuilder]: Performing block encoding [2022-11-20 10:30:07,605 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-20 10:30:07,605 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-20 10:30:07,607 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 10:30:07 BoogieIcfgContainer [2022-11-20 10:30:07,607 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-20 10:30:07,613 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-20 10:30:07,613 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-20 10:30:07,617 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-20 10:30:07,617 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.11 10:30:06" (1/3) ... [2022-11-20 10:30:07,618 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1b8e6f91 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.11 10:30:07, skipping insertion in model container [2022-11-20 10:30:07,618 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.11 10:30:07" (2/3) ... [2022-11-20 10:30:07,621 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1b8e6f91 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.11 10:30:07, skipping insertion in model container [2022-11-20 10:30:07,621 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.11 10:30:07" (3/3) ... [2022-11-20 10:30:07,625 INFO L112 eAbstractionObserver]: Analyzing ICFG simple_4-1.c [2022-11-20 10:30:07,652 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-20 10:30:07,652 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-20 10:30:07,730 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-20 10:30:07,740 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7a2a0f48, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-20 10:30:07,741 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-20 10:30:07,748 INFO L276 IsEmpty]: Start isEmpty. Operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:07,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-11-20 10:30:07,756 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 10:30:07,757 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-11-20 10:30:07,757 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 10:30:07,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 10:30:07,767 INFO L85 PathProgramCache]: Analyzing trace with hash 889633835, now seen corresponding path program 1 times [2022-11-20 10:30:07,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 10:30:07,779 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1951050092] [2022-11-20 10:30:07,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 10:30:07,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 10:30:07,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 10:30:08,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:08,138 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 10:30:08,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1951050092] [2022-11-20 10:30:08,139 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1951050092] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-20 10:30:08,140 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-20 10:30:08,140 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-20 10:30:08,142 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910848578] [2022-11-20 10:30:08,143 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-20 10:30:08,148 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-20 10:30:08,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 10:30:08,179 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-20 10:30:08,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-20 10:30:08,182 INFO L87 Difference]: Start difference. First operand has 11 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:08,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 10:30:08,209 INFO L93 Difference]: Finished difference Result 20 states and 24 transitions. [2022-11-20 10:30:08,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-20 10:30:08,212 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-11-20 10:30:08,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 10:30:08,221 INFO L225 Difference]: With dead ends: 20 [2022-11-20 10:30:08,221 INFO L226 Difference]: Without dead ends: 8 [2022-11-20 10:30:08,224 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-20 10:30:08,229 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 0 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 17 SdHoareTripleChecker+Invalid, 4 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-20 10:30:08,230 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 17 Invalid, 4 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-20 10:30:08,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states. [2022-11-20 10:30:08,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2022-11-20 10:30:08,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:08,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-20 10:30:08,266 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 6 [2022-11-20 10:30:08,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 10:30:08,267 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-20 10:30:08,267 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:08,268 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-20 10:30:08,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-20 10:30:08,268 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 10:30:08,268 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-20 10:30:08,269 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-20 10:30:08,269 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 10:30:08,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 10:30:08,270 INFO L85 PathProgramCache]: Analyzing trace with hash 1810510480, now seen corresponding path program 1 times [2022-11-20 10:30:08,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 10:30:08,271 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1045937953] [2022-11-20 10:30:08,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 10:30:08,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 10:30:08,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 10:30:08,442 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:08,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 10:30:08,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1045937953] [2022-11-20 10:30:08,443 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1045937953] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 10:30:08,473 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1253167779] [2022-11-20 10:30:08,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 10:30:08,474 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:30:08,474 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 10:30:08,478 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 10:30:08,490 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-20 10:30:08,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 10:30:08,540 INFO L263 TraceCheckSpWp]: Trace formula consists of 38 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-20 10:30:08,544 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 10:30:08,702 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:08,702 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 10:30:08,772 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:08,772 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1253167779] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 10:30:08,773 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 10:30:08,773 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-20 10:30:08,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757640412] [2022-11-20 10:30:08,775 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 10:30:08,776 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-20 10:30:08,776 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 10:30:08,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-20 10:30:08,781 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2022-11-20 10:30:08,782 INFO L87 Difference]: Start difference. First operand 8 states and 8 transitions. Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:08,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 10:30:08,833 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-11-20 10:30:08,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-20 10:30:08,835 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-20 10:30:08,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 10:30:08,835 INFO L225 Difference]: With dead ends: 15 [2022-11-20 10:30:08,836 INFO L226 Difference]: Without dead ends: 11 [2022-11-20 10:30:08,836 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=30, Unknown=0, NotChecked=0, Total=56 [2022-11-20 10:30:08,839 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 3 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-20 10:30:08,840 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 9 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-20 10:30:08,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states. [2022-11-20 10:30:08,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2022-11-20 10:30:08,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 10 states have (on average 1.1) internal successors, (11), 10 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:08,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 11 transitions. [2022-11-20 10:30:08,846 INFO L78 Accepts]: Start accepts. Automaton has 11 states and 11 transitions. Word has length 7 [2022-11-20 10:30:08,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 10:30:08,847 INFO L495 AbstractCegarLoop]: Abstraction has 11 states and 11 transitions. [2022-11-20 10:30:08,847 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:08,848 INFO L276 IsEmpty]: Start isEmpty. Operand 11 states and 11 transitions. [2022-11-20 10:30:08,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-11-20 10:30:08,849 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 10:30:08,849 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1] [2022-11-20 10:30:08,863 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-20 10:30:09,055 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:30:09,056 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 10:30:09,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 10:30:09,057 INFO L85 PathProgramCache]: Analyzing trace with hash -1922847381, now seen corresponding path program 2 times [2022-11-20 10:30:09,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 10:30:09,057 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589678313] [2022-11-20 10:30:09,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 10:30:09,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 10:30:09,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 10:30:09,349 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:09,350 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 10:30:09,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589678313] [2022-11-20 10:30:09,356 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1589678313] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 10:30:09,360 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [697464369] [2022-11-20 10:30:09,361 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-20 10:30:09,361 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:30:09,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 10:30:09,370 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 10:30:09,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-20 10:30:09,425 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-20 10:30:09,426 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 10:30:09,427 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 11 conjunts are in the unsatisfiable core [2022-11-20 10:30:09,428 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 10:30:09,538 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:09,538 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 10:30:09,692 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:09,693 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [697464369] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 10:30:09,693 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 10:30:09,693 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-20 10:30:09,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128373016] [2022-11-20 10:30:09,694 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 10:30:09,695 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-11-20 10:30:09,695 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 10:30:09,696 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-20 10:30:09,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2022-11-20 10:30:09,699 INFO L87 Difference]: Start difference. First operand 11 states and 11 transitions. Second operand has 13 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:10,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 10:30:10,261 INFO L93 Difference]: Finished difference Result 21 states and 26 transitions. [2022-11-20 10:30:10,262 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-20 10:30:10,262 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-11-20 10:30:10,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 10:30:10,263 INFO L225 Difference]: With dead ends: 21 [2022-11-20 10:30:10,263 INFO L226 Difference]: Without dead ends: 17 [2022-11-20 10:30:10,264 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=123, Invalid=183, Unknown=0, NotChecked=0, Total=306 [2022-11-20 10:30:10,265 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 12 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 15 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-20 10:30:10,265 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 15 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-20 10:30:10,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-11-20 10:30:10,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-11-20 10:30:10,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:10,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 17 transitions. [2022-11-20 10:30:10,275 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 17 transitions. Word has length 10 [2022-11-20 10:30:10,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 10:30:10,275 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 17 transitions. [2022-11-20 10:30:10,275 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 1.3846153846153846) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:10,275 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 17 transitions. [2022-11-20 10:30:10,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-20 10:30:10,276 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 10:30:10,276 INFO L195 NwaCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1] [2022-11-20 10:30:10,283 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-20 10:30:10,477 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:30:10,477 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 10:30:10,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 10:30:10,478 INFO L85 PathProgramCache]: Analyzing trace with hash 1628318539, now seen corresponding path program 3 times [2022-11-20 10:30:10,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 10:30:10,479 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64802235] [2022-11-20 10:30:10,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 10:30:10,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 10:30:10,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 10:30:11,051 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:11,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 10:30:11,052 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64802235] [2022-11-20 10:30:11,052 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [64802235] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 10:30:11,052 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1513926130] [2022-11-20 10:30:11,053 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-20 10:30:11,053 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:30:11,053 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 10:30:11,058 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 10:30:11,090 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-20 10:30:11,151 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-11-20 10:30:11,151 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 10:30:11,154 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 23 conjunts are in the unsatisfiable core [2022-11-20 10:30:11,155 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 10:30:11,298 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:11,299 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 10:30:11,739 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:11,740 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1513926130] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 10:30:11,740 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 10:30:11,740 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2022-11-20 10:30:11,740 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [498915792] [2022-11-20 10:30:11,740 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 10:30:11,741 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-11-20 10:30:11,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 10:30:11,741 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-20 10:30:11,742 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=410, Unknown=0, NotChecked=0, Total=600 [2022-11-20 10:30:11,742 INFO L87 Difference]: Start difference. First operand 17 states and 17 transitions. Second operand has 25 states, 25 states have (on average 1.2) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:24,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 10:30:24,755 INFO L93 Difference]: Finished difference Result 33 states and 44 transitions. [2022-11-20 10:30:24,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-11-20 10:30:24,757 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.2) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-11-20 10:30:24,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 10:30:24,760 INFO L225 Difference]: With dead ends: 33 [2022-11-20 10:30:24,760 INFO L226 Difference]: Without dead ends: 29 [2022-11-20 10:30:24,761 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 20 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 13.1s TimeCoverageRelationStatistics Valid=465, Invalid=795, Unknown=0, NotChecked=0, Total=1260 [2022-11-20 10:30:24,762 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 30 mSDsluCounter, 19 mSDsCounter, 0 mSdLazyCounter, 141 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-20 10:30:24,762 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [30 Valid, 24 Invalid, 163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 141 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-11-20 10:30:24,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-11-20 10:30:24,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2022-11-20 10:30:24,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 28 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:24,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2022-11-20 10:30:24,781 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 16 [2022-11-20 10:30:24,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 10:30:24,783 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2022-11-20 10:30:24,783 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.2) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:30:24,783 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2022-11-20 10:30:24,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-20 10:30:24,790 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 10:30:24,791 INFO L195 NwaCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1] [2022-11-20 10:30:24,808 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-20 10:30:24,997 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-11-20 10:30:24,998 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 10:30:24,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 10:30:24,999 INFO L85 PathProgramCache]: Analyzing trace with hash 1394044683, now seen corresponding path program 4 times [2022-11-20 10:30:24,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 10:30:24,999 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669295860] [2022-11-20 10:30:24,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 10:30:24,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 10:30:25,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 10:30:25,828 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:25,829 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 10:30:25,829 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669295860] [2022-11-20 10:30:25,829 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669295860] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 10:30:25,829 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1957875085] [2022-11-20 10:30:25,829 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-20 10:30:25,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:30:25,830 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 10:30:25,835 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 10:30:25,859 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-20 10:30:25,937 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-20 10:30:25,938 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 10:30:25,939 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 47 conjunts are in the unsatisfiable core [2022-11-20 10:30:25,942 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 10:30:26,116 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:26,116 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 10:30:27,603 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:30:27,604 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1957875085] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 10:30:27,604 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 10:30:27,604 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2022-11-20 10:30:27,605 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057555416] [2022-11-20 10:30:27,605 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 10:30:27,605 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 49 states [2022-11-20 10:30:27,606 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 10:30:27,606 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-20 10:30:27,608 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=670, Invalid=1682, Unknown=0, NotChecked=0, Total=2352 [2022-11-20 10:30:27,608 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand has 49 states, 49 states have (on average 1.1020408163265305) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:31:26,979 WARN L233 SmtUtils]: Spent 48.05s on a formula simplification that was a NOOP. DAG size: 94 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:31:29,457 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:31:31,470 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:32:26,516 WARN L233 SmtUtils]: Spent 34.95s on a formula simplification that was a NOOP. DAG size: 82 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:33:07,842 WARN L233 SmtUtils]: Spent 27.32s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:33:09,979 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:33:12,017 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:33:33,765 WARN L233 SmtUtils]: Spent 12.03s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:33:53,553 WARN L233 SmtUtils]: Spent 13.64s on a formula simplification that was a NOOP. DAG size: 62 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:34:04,093 WARN L233 SmtUtils]: Spent 7.49s on a formula simplification that was a NOOP. DAG size: 58 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:34:12,660 WARN L233 SmtUtils]: Spent 6.13s on a formula simplification that was a NOOP. DAG size: 54 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:35:33,462 WARN L233 SmtUtils]: Spent 41.54s on a formula simplification that was a NOOP. DAG size: 92 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:35:34,922 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.46s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:35:37,048 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.93s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:35:39,055 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:35:40,128 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.07s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:35:42,953 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:35:45,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-20 10:35:45,289 INFO L93 Difference]: Finished difference Result 57 states and 80 transitions. [2022-11-20 10:35:45,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-11-20 10:35:45,289 INFO L78 Accepts]: Start accepts. Automaton has has 49 states, 49 states have (on average 1.1020408163265305) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-11-20 10:35:45,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-20 10:35:45,290 INFO L225 Difference]: With dead ends: 57 [2022-11-20 10:35:45,291 INFO L226 Difference]: Without dead ends: 53 [2022-11-20 10:35:45,293 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 71 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 288 ImplicationChecksByTransitivity, 307.4s TimeCoverageRelationStatistics Valid=1584, Invalid=3117, Unknown=7, NotChecked=548, Total=5256 [2022-11-20 10:35:45,294 INFO L413 NwaCegarLoop]: 5 mSDtfsCounter, 33 mSDsluCounter, 58 mSDsCounter, 0 mSdLazyCounter, 585 mSolverCounterSat, 85 mSolverCounterUnsat, 2 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 11.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 676 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 85 IncrementalHoareTripleChecker+Valid, 585 IncrementalHoareTripleChecker+Invalid, 2 IncrementalHoareTripleChecker+Unknown, 4 IncrementalHoareTripleChecker+Unchecked, 12.0s IncrementalHoareTripleChecker+Time [2022-11-20 10:35:45,295 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 63 Invalid, 676 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [85 Valid, 585 Invalid, 2 Unknown, 4 Unchecked, 12.0s Time] [2022-11-20 10:35:45,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-11-20 10:35:45,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2022-11-20 10:35:45,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 52 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:35:45,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2022-11-20 10:35:45,324 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 28 [2022-11-20 10:35:45,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-20 10:35:45,324 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2022-11-20 10:35:45,325 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 49 states, 49 states have (on average 1.1020408163265305) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:35:45,325 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2022-11-20 10:35:45,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-11-20 10:35:45,326 INFO L187 NwaCegarLoop]: Found error trace [2022-11-20 10:35:45,327 INFO L195 NwaCegarLoop]: trace histogram [46, 1, 1, 1, 1, 1, 1] [2022-11-20 10:35:45,335 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-11-20 10:35:45,533 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:35:45,533 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-20 10:35:45,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-20 10:35:45,534 INFO L85 PathProgramCache]: Analyzing trace with hash 469964427, now seen corresponding path program 5 times [2022-11-20 10:35:45,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-20 10:35:45,534 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383676310] [2022-11-20 10:35:45,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-20 10:35:45,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-20 10:35:45,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-20 10:35:47,956 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:35:47,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-20 10:35:47,956 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383676310] [2022-11-20 10:35:47,957 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1383676310] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-20 10:35:47,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1965039259] [2022-11-20 10:35:47,957 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-20 10:35:47,957 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-20 10:35:47,957 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 [2022-11-20 10:35:47,959 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-20 10:35:47,964 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f7f5fb2d-a7aa-41ef-9b92-d7acbed43003/bin/uautomizer-ug76WZFUDN/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-20 10:40:55,958 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2022-11-20 10:40:55,958 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-20 10:40:56,004 WARN L261 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 95 conjunts are in the unsatisfiable core [2022-11-20 10:40:56,006 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-20 10:40:56,295 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:40:56,295 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-20 10:41:01,303 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-20 10:41:01,303 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1965039259] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-20 10:41:01,304 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-20 10:41:01,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2022-11-20 10:41:01,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [56183613] [2022-11-20 10:41:01,305 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-20 10:41:01,307 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 97 states [2022-11-20 10:41:01,308 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-20 10:41:01,309 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-11-20 10:41:01,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2494, Invalid=6818, Unknown=0, NotChecked=0, Total=9312 [2022-11-20 10:41:01,313 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand has 97 states, 97 states have (on average 1.0515463917525774) internal successors, (102), 97 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-20 10:41:04,579 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967204) 4294967296)) (< 1 (mod (+ 4294967206 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967208) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:06,596 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ 4294967206 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967208) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:08,609 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967208) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:10,621 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967210 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:12,635 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967212 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:14,646 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967214) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:16,660 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967216) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:18,679 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967218) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:20,691 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967220) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:22,703 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967222) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:24,713 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967224) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:26,730 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967226) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:28,749 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967228) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:30,760 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967230 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:32,772 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967232) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:41:34,785 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967234) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967236) 4294967296))) is different from false [2022-11-20 10:44:07,792 WARN L233 SmtUtils]: Spent 1.48m on a formula simplification that was a NOOP. DAG size: 126 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-20 10:44:09,800 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:13,634 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.77s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:15,639 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:17,987 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.98s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:19,994 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:21,519 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.53s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:23,845 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:25,849 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:27,854 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:29,858 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:31,871 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:33,877 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-20 10:44:35,893 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967238) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:44:37,904 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967240) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:44:39,919 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967242) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:44:41,933 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967244) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:44:43,946 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ 4294967246 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:44:45,959 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967248) 4294967296)) (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:44:47,971 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967250 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false [2022-11-20 10:44:49,983 WARN L837 $PredicateComparison]: unable to prove that (and (< 1 (mod (+ 4294967276 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967264) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967268) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967258) 4294967296)) (< 1 (mod (+ 4294967274 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ 4294967272 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967290) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967262) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967284) 4294967296)) (< 1 (mod (+ 4294967260 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967252) 4294967296)) (< 1 (mod (+ 4294967292 |c_ULTIMATE.start_main_~x~0#1|) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967270) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967266) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967256) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967286) 4294967296)) (< 1 (mod |c_ULTIMATE.start_main_~x~0#1| 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967254) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967278) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967288) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967280) 4294967296)) (< 1 (mod (+ |c_ULTIMATE.start_main_~x~0#1| 4294967294) 4294967296)) (< 1 (mod (+ 4294967282 |c_ULTIMATE.start_main_~x~0#1|) 4294967296))) is different from false