./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loops/eureka_05.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b5237d83 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loops/eureka_05.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-b5237d8 [2022-11-21 16:22:06,226 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-21 16:22:06,229 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-21 16:22:06,276 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-21 16:22:06,279 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-21 16:22:06,282 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-21 16:22:06,286 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-21 16:22:06,289 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-21 16:22:06,292 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-21 16:22:06,294 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-21 16:22:06,296 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-21 16:22:06,299 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-21 16:22:06,300 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-21 16:22:06,300 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-21 16:22:06,302 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-21 16:22:06,303 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-21 16:22:06,304 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-21 16:22:06,306 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-21 16:22:06,307 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-21 16:22:06,322 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-21 16:22:06,324 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-21 16:22:06,332 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-21 16:22:06,333 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-21 16:22:06,334 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-21 16:22:06,337 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-21 16:22:06,337 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-21 16:22:06,338 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-21 16:22:06,339 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-21 16:22:06,339 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-21 16:22:06,340 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-21 16:22:06,341 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-21 16:22:06,342 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-21 16:22:06,349 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-21 16:22:06,350 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-21 16:22:06,351 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-21 16:22:06,381 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-21 16:22:06,382 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-21 16:22:06,382 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-21 16:22:06,382 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-21 16:22:06,384 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-21 16:22:06,385 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-21 16:22:06,387 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-21 16:22:06,428 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-21 16:22:06,428 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-21 16:22:06,429 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-21 16:22:06,429 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-21 16:22:06,430 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-21 16:22:06,431 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-21 16:22:06,431 INFO L138 SettingsManager]: * Use SBE=true [2022-11-21 16:22:06,431 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-21 16:22:06,431 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-21 16:22:06,432 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-21 16:22:06,433 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-21 16:22:06,433 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-21 16:22:06,433 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-21 16:22:06,434 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-21 16:22:06,434 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-21 16:22:06,434 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-21 16:22:06,434 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-21 16:22:06,435 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-21 16:22:06,435 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-21 16:22:06,435 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-21 16:22:06,435 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-21 16:22:06,435 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-21 16:22:06,436 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-21 16:22:06,436 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-21 16:22:06,436 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-21 16:22:06,437 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-21 16:22:06,438 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-21 16:22:06,438 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-21 16:22:06,438 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-21 16:22:06,439 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-21 16:22:06,439 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-21 16:22:06,441 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-21 16:22:06,441 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab [2022-11-21 16:22:06,746 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-21 16:22:06,769 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-21 16:22:06,772 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-21 16:22:06,774 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-21 16:22:06,774 INFO L275 PluginConnector]: CDTParser initialized [2022-11-21 16:22:06,775 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/../../sv-benchmarks/c/loops/eureka_05.i [2022-11-21 16:22:09,920 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-21 16:22:10,180 INFO L351 CDTParser]: Found 1 translation units. [2022-11-21 16:22:10,181 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/sv-benchmarks/c/loops/eureka_05.i [2022-11-21 16:22:10,190 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/data/650ca8531/febf9549060a4720a932b3d6e718b645/FLAG2a393b811 [2022-11-21 16:22:10,212 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/data/650ca8531/febf9549060a4720a932b3d6e718b645 [2022-11-21 16:22:10,217 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-21 16:22:10,219 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-21 16:22:10,221 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-21 16:22:10,221 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-21 16:22:10,225 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-21 16:22:10,226 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,228 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a43775c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10, skipping insertion in model container [2022-11-21 16:22:10,228 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,237 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-21 16:22:10,262 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-21 16:22:10,429 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-11-21 16:22:10,468 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-21 16:22:10,490 INFO L203 MainTranslator]: Completed pre-run [2022-11-21 16:22:10,510 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-11-21 16:22:10,526 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-21 16:22:10,551 INFO L208 MainTranslator]: Completed translation [2022-11-21 16:22:10,553 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10 WrapperNode [2022-11-21 16:22:10,553 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-21 16:22:10,556 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-21 16:22:10,556 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-21 16:22:10,556 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-21 16:22:10,565 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,590 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,627 INFO L138 Inliner]: procedures = 16, calls = 24, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 84 [2022-11-21 16:22:10,627 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-21 16:22:10,628 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-21 16:22:10,629 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-21 16:22:10,629 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-21 16:22:10,680 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,681 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,709 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,709 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,722 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,726 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,747 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,748 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,750 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-21 16:22:10,751 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-21 16:22:10,751 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-21 16:22:10,751 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-21 16:22:10,752 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (1/1) ... [2022-11-21 16:22:10,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:10,787 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:10,807 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:10,820 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-21 16:22:10,863 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-21 16:22:10,863 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-21 16:22:10,863 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-21 16:22:10,864 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-21 16:22:10,864 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-21 16:22:10,864 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-21 16:22:10,864 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-21 16:22:10,865 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-21 16:22:10,961 INFO L235 CfgBuilder]: Building ICFG [2022-11-21 16:22:10,964 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-21 16:22:11,199 INFO L276 CfgBuilder]: Performing block encoding [2022-11-21 16:22:11,206 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-21 16:22:11,207 INFO L300 CfgBuilder]: Removed 4 assume(true) statements. [2022-11-21 16:22:11,209 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 04:22:11 BoogieIcfgContainer [2022-11-21 16:22:11,222 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-21 16:22:11,224 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-21 16:22:11,224 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-21 16:22:11,229 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-21 16:22:11,230 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-21 16:22:11,230 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 21.11 04:22:10" (1/3) ... [2022-11-21 16:22:11,232 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2a22a773 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.11 04:22:11, skipping insertion in model container [2022-11-21 16:22:11,232 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-21 16:22:11,232 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.11 04:22:10" (2/3) ... [2022-11-21 16:22:11,233 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2a22a773 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 21.11 04:22:11, skipping insertion in model container [2022-11-21 16:22:11,233 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-21 16:22:11,233 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.11 04:22:11" (3/3) ... [2022-11-21 16:22:11,235 INFO L332 chiAutomizerObserver]: Analyzing ICFG eureka_05.i [2022-11-21 16:22:11,350 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-21 16:22:11,350 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-21 16:22:11,351 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-21 16:22:11,351 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-21 16:22:11,351 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-21 16:22:11,370 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-21 16:22:11,371 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-21 16:22:11,371 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-21 16:22:11,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:11,396 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-21 16:22:11,396 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:11,397 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:11,402 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-21 16:22:11,403 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-21 16:22:11,403 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-21 16:22:11,403 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:11,406 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-21 16:22:11,406 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:11,407 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:11,407 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-21 16:22:11,407 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-21 16:22:11,416 INFO L748 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 13#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6#L44-3true [2022-11-21 16:22:11,417 INFO L750 eck$LassoCheckResult]: Loop: 6#L44-3true assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 18#L44-2true main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6#L44-3true [2022-11-21 16:22:11,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:11,430 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-21 16:22:11,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:11,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635244196] [2022-11-21 16:22:11,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:11,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:11,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:11,553 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:11,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:11,606 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:11,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:11,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-21 16:22:11,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:11,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063734787] [2022-11-21 16:22:11,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:11,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:11,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:11,639 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:11,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:11,657 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:11,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:11,671 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-21 16:22:11,672 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:11,672 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177679514] [2022-11-21 16:22:11,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:11,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:11,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:11,715 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:11,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:11,736 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:12,335 INFO L210 LassoAnalysis]: Preferences: [2022-11-21 16:22:12,335 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-21 16:22:12,336 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-21 16:22:12,336 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-21 16:22:12,336 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-21 16:22:12,336 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:12,337 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-21 16:22:12,337 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-21 16:22:12,337 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration1_Lasso [2022-11-21 16:22:12,337 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-21 16:22:12,338 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-21 16:22:12,360 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:12,371 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:12,375 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:12,385 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:12,388 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:12,986 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:12,990 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:12,995 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-21 16:22:13,420 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-21 16:22:13,425 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-21 16:22:13,427 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,427 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,434 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,436 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-21 16:22:13,439 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,454 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,454 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-21 16:22:13,455 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,455 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,455 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,458 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-21 16:22:13,459 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-21 16:22:13,469 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,483 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,483 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,484 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,486 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,495 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-21 16:22:13,496 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,508 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,508 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,508 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,508 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,512 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,512 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,523 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,528 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,528 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,530 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,542 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-21 16:22:13,543 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,557 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,557 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,557 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,557 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,560 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,561 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,579 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,588 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,589 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,590 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,600 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,614 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-21 16:22:13,615 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,615 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-21 16:22:13,615 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,615 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,615 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,617 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-21 16:22:13,617 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-21 16:22:13,635 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,644 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,644 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,644 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,646 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,658 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-21 16:22:13,659 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,672 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,672 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,672 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,673 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,680 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,680 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,707 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,716 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,717 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,719 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,728 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,742 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-21 16:22:13,742 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,742 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,743 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,743 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,747 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,748 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,762 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,771 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,773 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,782 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-21 16:22:13,796 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,796 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,796 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,796 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,809 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,809 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,821 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,831 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,831 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,831 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,833 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,843 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,857 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-21 16:22:13,857 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,858 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,858 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,858 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,863 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,863 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,883 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,889 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,890 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,893 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,905 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,918 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-21 16:22:13,919 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,919 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,919 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,919 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,922 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,923 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,934 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,938 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,939 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,940 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:13,952 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:13,959 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-21 16:22:13,965 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:13,965 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:13,965 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:13,966 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:13,969 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:13,969 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:13,987 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:13,996 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:13,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:13,997 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:13,998 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:14,012 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:14,025 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-21 16:22:14,025 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:14,025 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:14,026 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:14,026 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:14,028 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:14,029 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:14,047 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-21 16:22:14,051 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:14,052 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:14,052 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:14,054 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:14,068 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-21 16:22:14,081 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-21 16:22:14,081 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-21 16:22:14,081 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-21 16:22:14,082 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-21 16:22:14,087 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-21 16:22:14,097 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-21 16:22:14,098 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-21 16:22:14,112 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-21 16:22:14,175 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-11-21 16:22:14,175 INFO L444 ModelExtractionUtils]: 1 out of 16 variables were initially zero. Simplification set additionally 12 variables to zero. [2022-11-21 16:22:14,177 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-21 16:22:14,177 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:14,210 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-21 16:22:14,216 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-21 16:22:14,229 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-21 16:22:14,251 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-21 16:22:14,252 INFO L513 LassoAnalysis]: Proved termination. [2022-11-21 16:22:14,252 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1) = 8*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1 Supporting invariants [] [2022-11-21 16:22:14,257 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:14,333 INFO L156 tatePredicateManager]: 17 out of 17 supporting invariants were superfluous and have been removed [2022-11-21 16:22:14,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:14,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:14,402 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-21 16:22:14,403 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:14,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:14,432 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-21 16:22:14,434 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:14,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:14,546 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-21 16:22:14,548 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:14,618 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-21 16:22:14,643 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 48 states and 71 transitions. Complement of second has 8 states. [2022-11-21 16:22:14,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-21 16:22:14,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:14,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 42 transitions. [2022-11-21 16:22:14,654 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-21 16:22:14,654 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-21 16:22:14,654 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-21 16:22:14,655 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-21 16:22:14,655 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-21 16:22:14,655 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-21 16:22:14,656 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 71 transitions. [2022-11-21 16:22:14,659 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-11-21 16:22:14,663 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 18 states and 24 transitions. [2022-11-21 16:22:14,664 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-11-21 16:22:14,665 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-11-21 16:22:14,665 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2022-11-21 16:22:14,666 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:14,666 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-11-21 16:22:14,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2022-11-21 16:22:14,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-11-21 16:22:14,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:14,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2022-11-21 16:22:14,695 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-11-21 16:22:14,695 INFO L428 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-11-21 16:22:14,696 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-21 16:22:14,696 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2022-11-21 16:22:14,697 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-11-21 16:22:14,697 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:14,697 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:14,697 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-21 16:22:14,698 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:22:14,698 INFO L748 eck$LassoCheckResult]: Stem: 180#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 181#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 182#L44-3 assume !(main_~i~1#1 >= 0); 183#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 179#L30-3 [2022-11-21 16:22:14,698 INFO L750 eck$LassoCheckResult]: Loop: 179#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 192#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 193#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 178#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 179#L30-3 [2022-11-21 16:22:14,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:14,699 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-21 16:22:14,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:14,700 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553080392] [2022-11-21 16:22:14,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:14,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:14,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:14,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:14,763 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:14,763 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553080392] [2022-11-21 16:22:14,764 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1553080392] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-21 16:22:14,764 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-21 16:22:14,764 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-21 16:22:14,764 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949149022] [2022-11-21 16:22:14,765 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-21 16:22:14,767 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:22:14,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:14,768 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 1 times [2022-11-21 16:22:14,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:14,769 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950051755] [2022-11-21 16:22:14,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:14,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:14,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:14,781 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:14,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:14,790 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:14,912 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:14,915 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-21 16:22:14,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-21 16:22:14,916 INFO L87 Difference]: Start difference. First operand 18 states and 24 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:14,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:14,936 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2022-11-21 16:22:14,937 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 23 transitions. [2022-11-21 16:22:14,938 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:14,939 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 22 transitions. [2022-11-21 16:22:14,939 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-11-21 16:22:14,939 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-11-21 16:22:14,939 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2022-11-21 16:22:14,940 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:14,940 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-11-21 16:22:14,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2022-11-21 16:22:14,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2022-11-21 16:22:14,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:14,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-11-21 16:22:14,943 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-11-21 16:22:14,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-21 16:22:14,944 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-11-21 16:22:14,944 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-21 16:22:14,945 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2022-11-21 16:22:14,945 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:14,946 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:14,946 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:14,946 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-21 16:22:14,946 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:22:14,947 INFO L748 eck$LassoCheckResult]: Stem: 221#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 222#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 223#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 224#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 225#L44-3 assume !(main_~i~1#1 >= 0); 226#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 220#L30-3 [2022-11-21 16:22:14,947 INFO L750 eck$LassoCheckResult]: Loop: 220#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 234#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 235#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 219#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 220#L30-3 [2022-11-21 16:22:14,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:14,948 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-11-21 16:22:14,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:14,948 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046277917] [2022-11-21 16:22:14,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:14,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:14,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:15,011 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:15,011 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:15,012 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046277917] [2022-11-21 16:22:15,012 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2046277917] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:22:15,012 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1220107615] [2022-11-21 16:22:15,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:15,013 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:22:15,013 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:15,014 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:22:15,039 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-21 16:22:15,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:15,087 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-21 16:22:15,089 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:15,102 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:15,102 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:22:15,130 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:15,131 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1220107615] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:22:15,131 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:22:15,131 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2022-11-21 16:22:15,131 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1942206742] [2022-11-21 16:22:15,132 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:22:15,132 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:22:15,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:15,133 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 2 times [2022-11-21 16:22:15,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:15,134 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520881633] [2022-11-21 16:22:15,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:15,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:15,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:15,163 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:15,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:15,180 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:15,301 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:15,302 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-21 16:22:15,303 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-11-21 16:22:15,303 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:15,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:15,366 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-11-21 16:22:15,366 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 31 transitions. [2022-11-21 16:22:15,370 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:15,370 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 31 transitions. [2022-11-21 16:22:15,371 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-21 16:22:15,371 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-11-21 16:22:15,371 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 31 transitions. [2022-11-21 16:22:15,372 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:15,372 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-11-21 16:22:15,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 31 transitions. [2022-11-21 16:22:15,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 23. [2022-11-21 16:22:15,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.173913043478261) internal successors, (27), 22 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:15,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-11-21 16:22:15,376 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-11-21 16:22:15,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-21 16:22:15,380 INFO L428 stractBuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-11-21 16:22:15,381 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-21 16:22:15,381 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 27 transitions. [2022-11-21 16:22:15,385 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:15,385 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:15,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:15,387 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-11-21 16:22:15,387 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:22:15,387 INFO L748 eck$LassoCheckResult]: Stem: 304#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 305#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 306#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 307#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 308#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 309#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 324#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 323#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 322#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 321#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 320#L44-3 assume !(main_~i~1#1 >= 0); 310#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 303#L30-3 [2022-11-21 16:22:15,387 INFO L750 eck$LassoCheckResult]: Loop: 303#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 318#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 319#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 302#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 303#L30-3 [2022-11-21 16:22:15,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:15,388 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-11-21 16:22:15,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:15,389 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580461781] [2022-11-21 16:22:15,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:15,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:15,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:15,574 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:15,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:15,574 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1580461781] [2022-11-21 16:22:15,575 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1580461781] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:22:15,575 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2097095788] [2022-11-21 16:22:15,575 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-21 16:22:15,575 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:22:15,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:15,579 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:22:15,591 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-21 16:22:15,674 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-21 16:22:15,674 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:22:15,675 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-21 16:22:15,677 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:15,699 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:15,700 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:22:15,752 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:15,752 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2097095788] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:22:15,753 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:22:15,753 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 7 [2022-11-21 16:22:15,753 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1384407378] [2022-11-21 16:22:15,753 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:22:15,759 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:22:15,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:15,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 3 times [2022-11-21 16:22:15,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:15,761 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443279249] [2022-11-21 16:22:15,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:15,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:15,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:15,787 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:15,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:15,799 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:15,926 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:15,927 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-21 16:22:15,927 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-21 16:22:15,927 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:16,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:16,005 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2022-11-21 16:22:16,005 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 45 transitions. [2022-11-21 16:22:16,006 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:16,006 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 41 states and 45 transitions. [2022-11-21 16:22:16,006 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2022-11-21 16:22:16,007 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2022-11-21 16:22:16,007 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 45 transitions. [2022-11-21 16:22:16,007 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:16,007 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-11-21 16:22:16,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 45 transitions. [2022-11-21 16:22:16,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 25. [2022-11-21 16:22:16,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.16) internal successors, (29), 24 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:16,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2022-11-21 16:22:16,010 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-11-21 16:22:16,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-21 16:22:16,014 INFO L428 stractBuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-11-21 16:22:16,014 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-21 16:22:16,014 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 29 transitions. [2022-11-21 16:22:16,019 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:16,020 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:16,020 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:16,021 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2022-11-21 16:22:16,021 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:22:16,021 INFO L748 eck$LassoCheckResult]: Stem: 444#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 445#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 446#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 447#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 448#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 449#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 466#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 465#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 464#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 463#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 462#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 461#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 460#L44-3 assume !(main_~i~1#1 >= 0); 450#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 443#L30-3 [2022-11-21 16:22:16,021 INFO L750 eck$LassoCheckResult]: Loop: 443#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 458#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 459#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 442#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 443#L30-3 [2022-11-21 16:22:16,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:16,023 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 3 times [2022-11-21 16:22:16,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:16,026 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1870987388] [2022-11-21 16:22:16,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:16,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:16,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,055 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:16,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,089 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:16,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:16,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 4 times [2022-11-21 16:22:16,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:16,096 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335260218] [2022-11-21 16:22:16,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:16,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:16,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,107 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:16,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,117 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:16,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:16,118 INFO L85 PathProgramCache]: Analyzing trace with hash -743535747, now seen corresponding path program 1 times [2022-11-21 16:22:16,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:16,119 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729957097] [2022-11-21 16:22:16,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:16,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:16,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:16,296 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-21 16:22:16,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:16,299 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729957097] [2022-11-21 16:22:16,299 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1729957097] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-21 16:22:16,299 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-21 16:22:16,300 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-21 16:22:16,300 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1461863433] [2022-11-21 16:22:16,300 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-21 16:22:16,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:16,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-21 16:22:16,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-21 16:22:16,428 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. cyclomatic complexity: 7 Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:16,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:16,489 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2022-11-21 16:22:16,489 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 41 transitions. [2022-11-21 16:22:16,489 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-21 16:22:16,490 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 41 transitions. [2022-11-21 16:22:16,490 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-11-21 16:22:16,490 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-11-21 16:22:16,490 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 41 transitions. [2022-11-21 16:22:16,491 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:16,491 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 41 transitions. [2022-11-21 16:22:16,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 41 transitions. [2022-11-21 16:22:16,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2022-11-21 16:22:16,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 26 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:16,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2022-11-21 16:22:16,493 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-11-21 16:22:16,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-21 16:22:16,498 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-11-21 16:22:16,498 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-21 16:22:16,499 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. [2022-11-21 16:22:16,499 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:16,499 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:16,499 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:16,500 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1] [2022-11-21 16:22:16,500 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-21 16:22:16,500 INFO L748 eck$LassoCheckResult]: Stem: 515#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 516#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 517#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 518#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 519#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 520#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 539#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 538#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 537#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 536#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 535#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 534#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 533#L44-3 assume !(main_~i~1#1 >= 0); 521#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 522#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 531#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 527#L33 [2022-11-21 16:22:16,501 INFO L750 eck$LassoCheckResult]: Loop: 527#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 528#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 530#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 527#L33 [2022-11-21 16:22:16,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:16,501 INFO L85 PathProgramCache]: Analyzing trace with hash 1715425501, now seen corresponding path program 1 times [2022-11-21 16:22:16,501 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:16,502 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636923091] [2022-11-21 16:22:16,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:16,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:16,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,521 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:16,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,536 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:16,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:16,537 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 1 times [2022-11-21 16:22:16,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:16,537 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418378378] [2022-11-21 16:22:16,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:16,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:16,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:16,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:16,546 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:16,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:16,547 INFO L85 PathProgramCache]: Analyzing trace with hash -1574719937, now seen corresponding path program 1 times [2022-11-21 16:22:16,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:16,547 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650000505] [2022-11-21 16:22:16,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:16,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:16,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:17,582 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-21 16:22:17,582 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:17,582 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1650000505] [2022-11-21 16:22:17,582 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1650000505] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:22:17,583 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1038966416] [2022-11-21 16:22:17,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:17,583 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:22:17,583 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:17,587 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:22:17,611 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-21 16:22:17,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:17,674 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-21 16:22:17,677 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:17,755 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-21 16:22:17,760 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-21 16:22:17,831 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:17,905 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:17,989 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:18,070 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:18,117 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:18,295 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-11-21 16:22:18,330 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-21 16:22:18,330 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:22:18,681 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_122 (Array Int Int)) (|v_ULTIMATE.start_main_~#array~1#1.base_54| Int)) (or (not (= (select |c_#valid| |v_ULTIMATE.start_main_~#array~1#1.base_54|) 0)) (let ((.cse0 (select (store |c_#memory_int| |v_ULTIMATE.start_main_~#array~1#1.base_54| v_ArrVal_122) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ |c_~#array~0.offset| 4)) 1))))) is different from false [2022-11-21 16:22:18,683 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-21 16:22:18,683 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1038966416] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:22:18,684 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:22:18,684 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 7] total 26 [2022-11-21 16:22:18,684 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434499106] [2022-11-21 16:22:18,684 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:22:18,797 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:18,799 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-21 16:22:18,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=542, Unknown=4, NotChecked=48, Total=702 [2022-11-21 16:22:18,803 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 7 Second operand has 27 states, 27 states have (on average 1.7407407407407407) internal successors, (47), 26 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:19,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:19,611 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2022-11-21 16:22:19,611 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 41 transitions. [2022-11-21 16:22:19,612 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-11-21 16:22:19,613 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 41 transitions. [2022-11-21 16:22:19,613 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-11-21 16:22:19,613 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-11-21 16:22:19,613 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 41 transitions. [2022-11-21 16:22:19,614 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:19,614 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 41 transitions. [2022-11-21 16:22:19,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 41 transitions. [2022-11-21 16:22:19,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2022-11-21 16:22:19,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:19,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-11-21 16:22:19,617 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-21 16:22:19,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-21 16:22:19,618 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-21 16:22:19,618 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-21 16:22:19,618 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2022-11-21 16:22:19,619 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:19,619 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:19,619 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:19,620 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:22:19,620 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-21 16:22:19,620 INFO L748 eck$LassoCheckResult]: Stem: 736#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 737#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 738#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 739#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 740#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 741#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 760#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 759#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 758#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 757#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 756#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 755#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 754#L44-3 assume !(main_~i~1#1 >= 0); 742#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 743#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 752#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 748#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 749#L32-2 [2022-11-21 16:22:19,621 INFO L750 eck$LassoCheckResult]: Loop: 749#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 751#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 761#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 749#L32-2 [2022-11-21 16:22:19,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:19,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1638583016, now seen corresponding path program 1 times [2022-11-21 16:22:19,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:19,622 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353454083] [2022-11-21 16:22:19,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:19,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:19,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:19,638 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:19,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:19,651 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:19,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:19,652 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 2 times [2022-11-21 16:22:19,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:19,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514846718] [2022-11-21 16:22:19,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:19,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:19,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:19,658 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:19,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:19,663 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:19,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:19,664 INFO L85 PathProgramCache]: Analyzing trace with hash -1571618174, now seen corresponding path program 1 times [2022-11-21 16:22:19,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:19,664 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855703193] [2022-11-21 16:22:19,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:19,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:19,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:20,144 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-21 16:22:20,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:20,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855703193] [2022-11-21 16:22:20,145 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [855703193] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:22:20,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [218765032] [2022-11-21 16:22:20,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:20,146 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:22:20,146 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:20,151 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:22:20,182 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-21 16:22:20,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:20,234 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-21 16:22:20,237 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:20,293 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-21 16:22:20,294 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-21 16:22:20,345 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:20,414 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:20,482 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:20,511 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:20,552 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:20,811 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-11-21 16:22:20,842 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-21 16:22:20,842 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:22:21,237 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-21 16:22:21,238 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [218765032] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:22:21,238 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:22:21,238 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 7] total 25 [2022-11-21 16:22:21,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1474857894] [2022-11-21 16:22:21,238 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:22:21,311 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:21,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-21 16:22:21,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=610, Unknown=8, NotChecked=0, Total=702 [2022-11-21 16:22:21,312 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 27 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:22,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:22,297 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-11-21 16:22:22,297 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-11-21 16:22:22,298 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 23 [2022-11-21 16:22:22,298 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-11-21 16:22:22,299 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-11-21 16:22:22,299 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-11-21 16:22:22,299 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-11-21 16:22:22,299 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:22,299 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-11-21 16:22:22,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-11-21 16:22:22,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 31. [2022-11-21 16:22:22,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 30 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:22,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 36 transitions. [2022-11-21 16:22:22,307 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-11-21 16:22:22,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-21 16:22:22,308 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-11-21 16:22:22,310 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-21 16:22:22,310 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 36 transitions. [2022-11-21 16:22:22,311 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:22,311 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:22,311 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:22,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:22:22,313 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:22:22,313 INFO L748 eck$LassoCheckResult]: Stem: 985#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 986#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 987#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 988#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 989#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 990#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1010#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1009#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1008#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1007#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1006#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1005#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1004#L44-3 assume !(main_~i~1#1 >= 0); 991#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 992#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1001#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1002#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1013#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1012#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1003#L32-4 [2022-11-21 16:22:22,313 INFO L750 eck$LassoCheckResult]: Loop: 1003#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 983#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 984#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1000#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1003#L32-4 [2022-11-21 16:22:22,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:22,314 INFO L85 PathProgramCache]: Analyzing trace with hash -1574718017, now seen corresponding path program 1 times [2022-11-21 16:22:22,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:22,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003196890] [2022-11-21 16:22:22,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:22,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:22,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:22,390 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-21 16:22:22,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:22,391 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003196890] [2022-11-21 16:22:22,391 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2003196890] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:22:22,391 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1936030667] [2022-11-21 16:22:22,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:22,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:22:22,392 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:22,398 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:22:22,411 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-21 16:22:22,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:22,478 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-21 16:22:22,479 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:22,563 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-21 16:22:22,563 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:22:22,622 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-21 16:22:22,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1936030667] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:22:22,623 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:22:22,623 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 11 [2022-11-21 16:22:22,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [885051597] [2022-11-21 16:22:22,624 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:22:22,624 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:22:22,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:22,625 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 5 times [2022-11-21 16:22:22,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:22,625 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958704461] [2022-11-21 16:22:22,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:22,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:22,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:22,633 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:22,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:22,637 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:22,764 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:22,764 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-21 16:22:22,764 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2022-11-21 16:22:22,765 INFO L87 Difference]: Start difference. First operand 31 states and 36 transitions. cyclomatic complexity: 8 Second operand has 13 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 12 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:22,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:22,953 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-11-21 16:22:22,953 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-11-21 16:22:22,954 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2022-11-21 16:22:22,954 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-11-21 16:22:22,954 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-11-21 16:22:22,955 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-11-21 16:22:22,955 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-11-21 16:22:22,955 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:22,955 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-11-21 16:22:22,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-11-21 16:22:22,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2022-11-21 16:22:22,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:22,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2022-11-21 16:22:22,958 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-11-21 16:22:22,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-21 16:22:22,965 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-11-21 16:22:22,967 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-21 16:22:22,967 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2022-11-21 16:22:22,968 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-21 16:22:22,968 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:22,968 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:22,969 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2022-11-21 16:22:22,969 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-21 16:22:22,970 INFO L748 eck$LassoCheckResult]: Stem: 1207#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1208#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1209#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1210#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1211#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1212#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1239#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1237#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1234#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1232#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1231#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1228#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1227#L44-3 assume !(main_~i~1#1 >= 0); 1213#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1214#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1249#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1248#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1247#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1246#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1245#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1244#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1243#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1242#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1241#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1240#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1236#L33 [2022-11-21 16:22:22,970 INFO L750 eck$LassoCheckResult]: Loop: 1236#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1238#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1235#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1236#L33 [2022-11-21 16:22:22,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:22,971 INFO L85 PathProgramCache]: Analyzing trace with hash 649240641, now seen corresponding path program 1 times [2022-11-21 16:22:22,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:22,972 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006862369] [2022-11-21 16:22:22,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:22,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:22,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,000 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:23,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,034 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:23,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:23,039 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 3 times [2022-11-21 16:22:23,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:23,039 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174541893] [2022-11-21 16:22:23,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:23,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:23,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,045 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:23,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,049 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:23,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:23,050 INFO L85 PathProgramCache]: Analyzing trace with hash 1290237019, now seen corresponding path program 2 times [2022-11-21 16:22:23,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:23,051 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814089492] [2022-11-21 16:22:23,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:23,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:23,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:23,256 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-21 16:22:23,257 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:23,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1814089492] [2022-11-21 16:22:23,257 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1814089492] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-21 16:22:23,257 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-21 16:22:23,257 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-21 16:22:23,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [645720058] [2022-11-21 16:22:23,258 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-21 16:22:23,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:23,342 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-21 16:22:23,342 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-11-21 16:22:23,343 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 12 Second operand has 9 states, 8 states have (on average 2.5) internal successors, (20), 8 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:23,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:22:23,440 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2022-11-21 16:22:23,440 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 53 transitions. [2022-11-21 16:22:23,441 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:23,441 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 53 transitions. [2022-11-21 16:22:23,441 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2022-11-21 16:22:23,441 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2022-11-21 16:22:23,442 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 53 transitions. [2022-11-21 16:22:23,442 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:22:23,442 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-11-21 16:22:23,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 53 transitions. [2022-11-21 16:22:23,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-11-21 16:22:23,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1521739130434783) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:22:23,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2022-11-21 16:22:23,445 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-11-21 16:22:23,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-21 16:22:23,449 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-11-21 16:22:23,449 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-21 16:22:23,449 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 53 transitions. [2022-11-21 16:22:23,449 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-21 16:22:23,449 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:22:23,450 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:22:23,450 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:22:23,451 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-21 16:22:23,451 INFO L748 eck$LassoCheckResult]: Stem: 1325#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1326#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1327#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1328#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1329#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1330#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1356#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1355#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1353#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1351#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1349#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1345#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1344#L44-3 assume !(main_~i~1#1 >= 0); 1331#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1332#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1343#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1368#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1340#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1341#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1337#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1338#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1367#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1366#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1365#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1364#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1363#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1362#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1361#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1342#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1323#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1324#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1360#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1359#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1358#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1357#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1352#L33 [2022-11-21 16:22:23,451 INFO L750 eck$LassoCheckResult]: Loop: 1352#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1354#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1347#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1352#L33 [2022-11-21 16:22:23,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:23,452 INFO L85 PathProgramCache]: Analyzing trace with hash -264183975, now seen corresponding path program 1 times [2022-11-21 16:22:23,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:23,452 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95836134] [2022-11-21 16:22:23,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:23,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:23,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,482 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:23,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:23,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:23,505 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 4 times [2022-11-21 16:22:23,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:23,505 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849064887] [2022-11-21 16:22:23,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:23,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:23,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,509 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:22:23,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:22:23,513 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:22:23,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:22:23,513 INFO L85 PathProgramCache]: Analyzing trace with hash -1924678077, now seen corresponding path program 1 times [2022-11-21 16:22:23,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:22:23,514 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251581498] [2022-11-21 16:22:23,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:23,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:22:23,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:24,599 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-21 16:22:24,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:22:24,600 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251581498] [2022-11-21 16:22:24,600 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251581498] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:22:24,600 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1371863055] [2022-11-21 16:22:24,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:22:24,600 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:22:24,601 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:22:24,607 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:22:24,638 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-21 16:22:24,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:22:24,750 INFO L263 TraceCheckSpWp]: Trace formula consists of 237 conjuncts, 50 conjunts are in the unsatisfiable core [2022-11-21 16:22:24,754 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:22:24,805 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-21 16:22:24,805 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-21 16:22:24,856 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:24,918 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:24,980 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:25,014 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:25,069 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:22:25,704 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:22:25,706 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-21 16:22:25,707 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:22:25,708 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:22:25,712 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-11-21 16:22:26,104 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-21 16:22:26,105 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-11-21 16:22:26,201 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 66 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-21 16:22:26,201 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:22:55,787 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 25 proven. 41 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-21 16:22:55,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1371863055] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:22:55,787 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:22:55,787 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 19, 17] total 46 [2022-11-21 16:22:55,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766273308] [2022-11-21 16:22:55,788 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:22:55,919 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:22:55,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-11-21 16:22:55,920 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=198, Invalid=1956, Unknown=8, NotChecked=0, Total=2162 [2022-11-21 16:22:55,921 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. cyclomatic complexity: 10 Second operand has 47 states, 47 states have (on average 1.8085106382978724) internal successors, (85), 46 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:10,146 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.32s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-21 16:23:31,760 WARN L233 SmtUtils]: Spent 21.24s on a formula simplification. DAG size of input: 49 DAG size of output: 31 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:23:34,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:23:34,597 INFO L93 Difference]: Finished difference Result 100 states and 121 transitions. [2022-11-21 16:23:34,597 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 121 transitions. [2022-11-21 16:23:34,598 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 30 [2022-11-21 16:23:34,600 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 121 transitions. [2022-11-21 16:23:34,600 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 90 [2022-11-21 16:23:34,601 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 90 [2022-11-21 16:23:34,601 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 121 transitions. [2022-11-21 16:23:34,602 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:23:34,602 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 121 transitions. [2022-11-21 16:23:34,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 121 transitions. [2022-11-21 16:23:34,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 71. [2022-11-21 16:23:34,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 71 states have (on average 1.1971830985915493) internal successors, (85), 70 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:34,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 85 transitions. [2022-11-21 16:23:34,608 INFO L240 hiAutomatonCegarLoop]: Abstraction has 71 states and 85 transitions. [2022-11-21 16:23:34,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-11-21 16:23:34,617 INFO L428 stractBuchiCegarLoop]: Abstraction has 71 states and 85 transitions. [2022-11-21 16:23:34,617 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-21 16:23:34,618 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71 states and 85 transitions. [2022-11-21 16:23:34,618 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-21 16:23:34,618 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:23:34,619 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:23:34,619 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:23:34,620 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-21 16:23:34,620 INFO L748 eck$LassoCheckResult]: Stem: 1815#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1816#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1817#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1818#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1819#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1820#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1844#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1843#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1842#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1841#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1840#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1839#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1838#L44-3 assume !(main_~i~1#1 >= 0); 1821#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1822#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1866#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1865#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1864#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1863#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1862#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1861#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1860#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1859#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1858#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1857#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1855#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1856#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1851#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1852#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1813#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1814#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1869#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1870#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1873#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1832#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1833#L33 [2022-11-21 16:23:34,622 INFO L750 eck$LassoCheckResult]: Loop: 1833#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1828#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1846#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1833#L33 [2022-11-21 16:23:34,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:34,623 INFO L85 PathProgramCache]: Analyzing trace with hash 128843035, now seen corresponding path program 2 times [2022-11-21 16:23:34,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:34,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145164449] [2022-11-21 16:23:34,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:34,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:34,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:23:35,855 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-21 16:23:35,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:23:35,855 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145164449] [2022-11-21 16:23:35,855 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1145164449] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:23:35,856 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1387319745] [2022-11-21 16:23:35,856 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-21 16:23:35,856 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:23:35,856 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:23:35,862 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:23:35,871 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-21 16:23:35,973 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-21 16:23:35,973 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:23:35,975 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 31 conjunts are in the unsatisfiable core [2022-11-21 16:23:35,977 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:23:36,052 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-21 16:23:36,053 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-21 16:23:36,127 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:36,162 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:36,212 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:36,244 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:36,281 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:36,995 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-21 16:23:36,995 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-11-21 16:23:37,070 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-21 16:23:37,070 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:23:37,713 WARN L837 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_SelectionSort_~rh~0#1| Int) (v_ArrVal_302 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_302) |c_~#array~0.base|))) (let ((.cse1 (select .cse0 (+ |c_~#array~0.offset| (* |ULTIMATE.start_SelectionSort_~rh~0#1| 4))))) (or (< (select .cse0 (+ |c_~#array~0.offset| 8)) .cse1) (< .cse1 (+ (select .cse0 (+ 16 |c_~#array~0.offset|)) 1)))))) is different from false [2022-11-21 16:23:37,967 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 15 refuted. 0 times theorem prover too weak. 20 trivial. 9 not checked. [2022-11-21 16:23:37,968 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1387319745] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:23:37,968 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:23:37,968 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 35 [2022-11-21 16:23:37,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170676961] [2022-11-21 16:23:37,968 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:23:37,969 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:23:37,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:37,969 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 5 times [2022-11-21 16:23:37,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:37,970 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85803737] [2022-11-21 16:23:37,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:37,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:37,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:37,979 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:37,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:37,986 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:38,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:23:38,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-21 16:23:38,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=1073, Unknown=1, NotChecked=66, Total=1260 [2022-11-21 16:23:38,116 INFO L87 Difference]: Start difference. First operand 71 states and 85 transitions. cyclomatic complexity: 18 Second operand has 36 states, 36 states have (on average 1.8611111111111112) internal successors, (67), 35 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:39,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:23:39,760 INFO L93 Difference]: Finished difference Result 64 states and 76 transitions. [2022-11-21 16:23:39,760 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 64 states and 76 transitions. [2022-11-21 16:23:39,760 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2022-11-21 16:23:39,761 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 64 states to 64 states and 76 transitions. [2022-11-21 16:23:39,761 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2022-11-21 16:23:39,762 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54 [2022-11-21 16:23:39,762 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 76 transitions. [2022-11-21 16:23:39,762 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:23:39,763 INFO L218 hiAutomatonCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-11-21 16:23:39,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 76 transitions. [2022-11-21 16:23:39,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2022-11-21 16:23:39,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.1935483870967742) internal successors, (74), 61 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:39,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 74 transitions. [2022-11-21 16:23:39,767 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 74 transitions. [2022-11-21 16:23:39,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-21 16:23:39,768 INFO L428 stractBuchiCegarLoop]: Abstraction has 62 states and 74 transitions. [2022-11-21 16:23:39,769 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-21 16:23:39,769 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 74 transitions. [2022-11-21 16:23:39,769 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-21 16:23:39,770 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:23:39,770 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:23:39,771 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:23:39,771 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-21 16:23:39,771 INFO L748 eck$LassoCheckResult]: Stem: 2218#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2219#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2220#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2221#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2222#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2223#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2248#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2247#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2246#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2245#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2244#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2241#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2240#L44-3 assume !(main_~i~1#1 >= 0); 2224#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2225#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2264#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2263#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2262#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2261#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2260#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2259#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2258#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2257#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2256#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2255#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2254#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2253#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2252#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2251#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2216#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2217#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2239#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2268#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2269#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2277#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2230#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2231#L32-2 [2022-11-21 16:23:39,771 INFO L750 eck$LassoCheckResult]: Loop: 2231#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2243#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2270#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2231#L32-2 [2022-11-21 16:23:39,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:39,772 INFO L85 PathProgramCache]: Analyzing trace with hash 400231404, now seen corresponding path program 2 times [2022-11-21 16:23:39,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:39,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926254096] [2022-11-21 16:23:39,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:39,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:39,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:39,794 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:39,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:39,814 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:39,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:39,815 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 6 times [2022-11-21 16:23:39,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:39,815 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185203832] [2022-11-21 16:23:39,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:39,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:39,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:39,820 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:39,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:39,825 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:39,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:39,825 INFO L85 PathProgramCache]: Analyzing trace with hash 464581374, now seen corresponding path program 3 times [2022-11-21 16:23:39,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:39,826 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077118969] [2022-11-21 16:23:39,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:39,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:39,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:23:41,095 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-21 16:23:41,095 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:23:41,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077118969] [2022-11-21 16:23:41,099 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1077118969] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:23:41,099 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [853645173] [2022-11-21 16:23:41,099 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-21 16:23:41,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:23:41,100 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:23:41,103 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:23:41,112 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-21 16:23:41,241 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-11-21 16:23:41,241 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:23:41,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-21 16:23:41,251 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:23:41,325 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-21 16:23:41,325 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-21 16:23:41,387 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:41,421 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:41,467 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:41,507 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:41,548 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:23:41,973 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:41,975 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:41,977 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:41,979 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:42,001 INFO L321 Elim1Store]: treesize reduction 21, result has 47.5 percent of original size [2022-11-21 16:23:42,001 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 55 [2022-11-21 16:23:42,413 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:42,413 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-21 16:23:42,415 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2022-11-21 16:23:42,459 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-21 16:23:42,459 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:23:43,140 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_352 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_352) |c_~#array~0.base|))) (< (select .cse0 (+ |c_~#array~0.offset| 4)) (+ (select .cse0 (+ 16 |c_~#array~0.offset|)) 1)))) is different from false [2022-11-21 16:23:43,256 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2022-11-21 16:23:43,256 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [853645173] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:23:43,257 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:23:43,257 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10, 10] total 33 [2022-11-21 16:23:43,257 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [217595857] [2022-11-21 16:23:43,257 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:23:43,354 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:23:43,355 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-21 16:23:43,355 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=1014, Unknown=1, NotChecked=64, Total=1190 [2022-11-21 16:23:43,355 INFO L87 Difference]: Start difference. First operand 62 states and 74 transitions. cyclomatic complexity: 16 Second operand has 35 states, 34 states have (on average 2.1176470588235294) internal successors, (72), 34 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:46,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:23:46,555 INFO L93 Difference]: Finished difference Result 114 states and 138 transitions. [2022-11-21 16:23:46,555 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 138 transitions. [2022-11-21 16:23:46,557 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 42 [2022-11-21 16:23:46,558 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 138 transitions. [2022-11-21 16:23:46,558 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 104 [2022-11-21 16:23:46,559 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 104 [2022-11-21 16:23:46,559 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 138 transitions. [2022-11-21 16:23:46,560 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:23:46,560 INFO L218 hiAutomatonCegarLoop]: Abstraction has 114 states and 138 transitions. [2022-11-21 16:23:46,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 138 transitions. [2022-11-21 16:23:46,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 64. [2022-11-21 16:23:46,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.1875) internal successors, (76), 63 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:46,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 76 transitions. [2022-11-21 16:23:46,565 INFO L240 hiAutomatonCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-11-21 16:23:46,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-11-21 16:23:46,567 INFO L428 stractBuchiCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-11-21 16:23:46,567 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-11-21 16:23:46,567 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 76 transitions. [2022-11-21 16:23:46,568 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-21 16:23:46,568 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:23:46,568 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:23:46,569 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:23:46,569 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:23:46,570 INFO L748 eck$LassoCheckResult]: Stem: 2717#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2718#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2719#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2720#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2721#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2722#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2744#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2743#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2742#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2741#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2740#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2739#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2738#L44-3 assume !(main_~i~1#1 >= 0); 2723#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2724#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2759#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2758#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2757#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2756#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2755#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2754#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2753#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2752#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2751#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2750#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2749#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2748#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2747#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2746#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2745#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2736#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2737#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2763#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2764#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2733#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2734#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2778#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2777#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2735#L32-4 [2022-11-21 16:23:46,570 INFO L750 eck$LassoCheckResult]: Loop: 2735#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2715#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2716#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2732#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2735#L32-4 [2022-11-21 16:23:46,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:46,571 INFO L85 PathProgramCache]: Analyzing trace with hash -1981934459, now seen corresponding path program 4 times [2022-11-21 16:23:46,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:46,571 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [285675877] [2022-11-21 16:23:46,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:46,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:46,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:23:46,737 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-21 16:23:46,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:23:46,753 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [285675877] [2022-11-21 16:23:46,753 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [285675877] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:23:46,753 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [156145654] [2022-11-21 16:23:46,753 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-21 16:23:46,753 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:23:46,754 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:23:46,759 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:23:46,784 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-21 16:23:46,863 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-21 16:23:46,864 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:23:46,865 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-21 16:23:46,867 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:23:47,021 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 13 proven. 46 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-21 16:23:47,022 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:23:47,196 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 13 proven. 46 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-21 16:23:47,196 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [156145654] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:23:47,196 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:23:47,196 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 10, 10] total 12 [2022-11-21 16:23:47,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1528382804] [2022-11-21 16:23:47,197 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:23:47,197 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:23:47,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:47,198 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 6 times [2022-11-21 16:23:47,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:47,198 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303041780] [2022-11-21 16:23:47,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:47,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:47,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:47,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:47,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:47,207 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:47,365 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:23:47,365 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-21 16:23:47,365 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2022-11-21 16:23:47,366 INFO L87 Difference]: Start difference. First operand 64 states and 76 transitions. cyclomatic complexity: 16 Second operand has 13 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 13 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:47,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:23:47,914 INFO L93 Difference]: Finished difference Result 121 states and 146 transitions. [2022-11-21 16:23:47,914 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 146 transitions. [2022-11-21 16:23:47,915 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 54 [2022-11-21 16:23:47,917 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 121 states and 146 transitions. [2022-11-21 16:23:47,917 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2022-11-21 16:23:47,917 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2022-11-21 16:23:47,917 INFO L73 IsDeterministic]: Start isDeterministic. Operand 121 states and 146 transitions. [2022-11-21 16:23:47,918 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:23:47,918 INFO L218 hiAutomatonCegarLoop]: Abstraction has 121 states and 146 transitions. [2022-11-21 16:23:47,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states and 146 transitions. [2022-11-21 16:23:47,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 97. [2022-11-21 16:23:47,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.2268041237113403) internal successors, (119), 96 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:47,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 119 transitions. [2022-11-21 16:23:47,925 INFO L240 hiAutomatonCegarLoop]: Abstraction has 97 states and 119 transitions. [2022-11-21 16:23:47,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-21 16:23:47,926 INFO L428 stractBuchiCegarLoop]: Abstraction has 97 states and 119 transitions. [2022-11-21 16:23:47,926 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2022-11-21 16:23:47,927 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 119 transitions. [2022-11-21 16:23:47,927 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 33 [2022-11-21 16:23:47,928 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:23:47,928 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:23:47,929 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:23:47,929 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 1, 1, 1, 1] [2022-11-21 16:23:47,930 INFO L748 eck$LassoCheckResult]: Stem: 3174#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3175#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3176#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3177#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3178#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3179#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3201#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3200#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3199#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3198#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3197#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3196#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3195#L44-3 assume !(main_~i~1#1 >= 0); 3180#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3181#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3225#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3224#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3223#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3222#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3221#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3220#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3219#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3218#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3217#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3216#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3214#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3215#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3208#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3209#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3204#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3205#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3191#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3186#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3188#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3246#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3247#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3238#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3239#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3233#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3232#L32-2 [2022-11-21 16:23:47,930 INFO L750 eck$LassoCheckResult]: Loop: 3232#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3227#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3192#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3172#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3173#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3257#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3252#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3248#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3249#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3264#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3266#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3265#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3231#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3232#L32-2 [2022-11-21 16:23:47,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:47,931 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 3 times [2022-11-21 16:23:47,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:47,931 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175708591] [2022-11-21 16:23:47,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:47,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:47,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:47,958 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:47,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:47,992 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:47,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:47,993 INFO L85 PathProgramCache]: Analyzing trace with hash 1952620257, now seen corresponding path program 1 times [2022-11-21 16:23:47,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:47,993 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192583925] [2022-11-21 16:23:47,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:47,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:48,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:48,006 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:48,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:48,039 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:48,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:48,040 INFO L85 PathProgramCache]: Analyzing trace with hash 2067186242, now seen corresponding path program 5 times [2022-11-21 16:23:48,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:48,040 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784226737] [2022-11-21 16:23:48,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:48,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:48,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:23:48,258 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 15 proven. 103 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-21 16:23:48,259 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:23:48,259 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784226737] [2022-11-21 16:23:48,259 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1784226737] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:23:48,259 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1702797308] [2022-11-21 16:23:48,259 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-21 16:23:48,259 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:23:48,260 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:23:48,264 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:23:48,298 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-21 16:23:48,555 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-21 16:23:48,555 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:23:48,558 INFO L263 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-21 16:23:48,560 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:23:49,020 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 37 proven. 95 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-21 16:23:49,020 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:23:49,294 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 75 proven. 57 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-21 16:23:49,294 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1702797308] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:23:49,295 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:23:49,295 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9, 9] total 19 [2022-11-21 16:23:49,295 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783554622] [2022-11-21 16:23:49,295 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:23:49,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:23:49,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-11-21 16:23:49,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2022-11-21 16:23:49,877 INFO L87 Difference]: Start difference. First operand 97 states and 119 transitions. cyclomatic complexity: 26 Second operand has 20 states, 20 states have (on average 3.9) internal successors, (78), 19 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:50,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:23:50,446 INFO L93 Difference]: Finished difference Result 163 states and 192 transitions. [2022-11-21 16:23:50,446 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 163 states and 192 transitions. [2022-11-21 16:23:50,448 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 64 [2022-11-21 16:23:50,449 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 163 states to 134 states and 158 transitions. [2022-11-21 16:23:50,449 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 124 [2022-11-21 16:23:50,450 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 124 [2022-11-21 16:23:50,450 INFO L73 IsDeterministic]: Start isDeterministic. Operand 134 states and 158 transitions. [2022-11-21 16:23:50,450 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:23:50,451 INFO L218 hiAutomatonCegarLoop]: Abstraction has 134 states and 158 transitions. [2022-11-21 16:23:50,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states and 158 transitions. [2022-11-21 16:23:50,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 75. [2022-11-21 16:23:50,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 74 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:50,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 89 transitions. [2022-11-21 16:23:50,455 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 89 transitions. [2022-11-21 16:23:50,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-21 16:23:50,461 INFO L428 stractBuchiCegarLoop]: Abstraction has 75 states and 89 transitions. [2022-11-21 16:23:50,462 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2022-11-21 16:23:50,462 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 89 transitions. [2022-11-21 16:23:50,462 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 17 [2022-11-21 16:23:50,463 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:23:50,463 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:23:50,467 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:23:50,467 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-21 16:23:50,467 INFO L748 eck$LassoCheckResult]: Stem: 3801#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3802#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3803#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3804#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3805#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3806#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3820#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3828#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3827#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3826#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3825#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3824#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3823#L44-3 assume !(main_~i~1#1 >= 0); 3807#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3808#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3845#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3844#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3843#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3842#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3841#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3840#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3839#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3838#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3837#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3836#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3835#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3834#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3833#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3821#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3799#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3800#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3822#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3857#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3856#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3853#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3850#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3851#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3818#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3819#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3854#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3855#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3849#L33 [2022-11-21 16:23:50,467 INFO L750 eck$LassoCheckResult]: Loop: 3849#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3847#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3848#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3849#L33 [2022-11-21 16:23:50,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:50,468 INFO L85 PathProgramCache]: Analyzing trace with hash -893953577, now seen corresponding path program 6 times [2022-11-21 16:23:50,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:50,468 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607634414] [2022-11-21 16:23:50,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:50,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:50,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:23:50,640 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 12 proven. 45 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-21 16:23:50,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:23:50,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607634414] [2022-11-21 16:23:50,640 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [607634414] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:23:50,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [460134977] [2022-11-21 16:23:50,640 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-21 16:23:50,641 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:23:50,641 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:23:50,645 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:23:50,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-21 16:23:50,798 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-11-21 16:23:50,798 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:23:50,800 INFO L263 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-21 16:23:50,802 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:23:51,101 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 13 proven. 44 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-21 16:23:51,101 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:23:51,273 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 13 proven. 44 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-21 16:23:51,273 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [460134977] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:23:51,273 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:23:51,273 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 14 [2022-11-21 16:23:51,273 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945894351] [2022-11-21 16:23:51,274 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:23:51,274 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:23:51,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:51,274 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 7 times [2022-11-21 16:23:51,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:51,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912240011] [2022-11-21 16:23:51,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:51,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:51,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:51,278 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:51,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:51,284 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:51,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:23:51,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-21 16:23:51,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2022-11-21 16:23:51,413 INFO L87 Difference]: Start difference. First operand 75 states and 89 transitions. cyclomatic complexity: 18 Second operand has 16 states, 15 states have (on average 3.4) internal successors, (51), 15 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:51,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:23:51,688 INFO L93 Difference]: Finished difference Result 96 states and 110 transitions. [2022-11-21 16:23:51,689 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 110 transitions. [2022-11-21 16:23:51,689 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 32 [2022-11-21 16:23:51,690 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 96 states and 110 transitions. [2022-11-21 16:23:51,691 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 86 [2022-11-21 16:23:51,691 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 86 [2022-11-21 16:23:51,691 INFO L73 IsDeterministic]: Start isDeterministic. Operand 96 states and 110 transitions. [2022-11-21 16:23:51,691 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:23:51,692 INFO L218 hiAutomatonCegarLoop]: Abstraction has 96 states and 110 transitions. [2022-11-21 16:23:51,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states and 110 transitions. [2022-11-21 16:23:51,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 69. [2022-11-21 16:23:51,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.1594202898550725) internal successors, (80), 68 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:23:51,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 80 transitions. [2022-11-21 16:23:51,696 INFO L240 hiAutomatonCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-11-21 16:23:51,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-21 16:23:51,710 INFO L428 stractBuchiCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-11-21 16:23:51,710 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2022-11-21 16:23:51,711 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 80 transitions. [2022-11-21 16:23:51,711 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-21 16:23:51,712 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:23:51,713 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:23:51,713 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:23:51,716 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 1, 1, 1, 1] [2022-11-21 16:23:51,716 INFO L748 eck$LassoCheckResult]: Stem: 4249#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4250#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4251#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4252#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4253#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4254#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4275#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4274#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4273#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4272#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4271#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4270#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4269#L44-3 assume !(main_~i~1#1 >= 0); 4255#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4256#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4291#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4290#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4289#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4288#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4287#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4286#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4285#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4284#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4283#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4282#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4281#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4280#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4279#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4278#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4277#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4267#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4268#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4294#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4292#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4293#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4296#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4297#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4265#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4261#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4262#L32-2 [2022-11-21 16:23:51,717 INFO L750 eck$LassoCheckResult]: Loop: 4262#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4264#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4266#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4247#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4248#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4276#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4313#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4314#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4315#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4302#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4262#L32-2 [2022-11-21 16:23:51,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:51,717 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 4 times [2022-11-21 16:23:51,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:51,718 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474533388] [2022-11-21 16:23:51,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:51,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:51,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:51,752 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:51,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:51,777 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:51,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:51,778 INFO L85 PathProgramCache]: Analyzing trace with hash 372024041, now seen corresponding path program 2 times [2022-11-21 16:23:51,778 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:51,779 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627082285] [2022-11-21 16:23:51,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:51,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:51,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:51,789 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:23:51,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:23:51,800 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:23:51,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:23:51,801 INFO L85 PathProgramCache]: Analyzing trace with hash -693820632, now seen corresponding path program 7 times [2022-11-21 16:23:51,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:23:51,802 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114397071] [2022-11-21 16:23:51,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:23:51,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:23:51,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:23:54,567 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-21 16:23:54,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:23:54,567 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114397071] [2022-11-21 16:23:54,568 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2114397071] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:23:54,568 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [968549497] [2022-11-21 16:23:54,568 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-21 16:23:54,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:23:54,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:23:54,574 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:23:54,581 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-11-21 16:23:54,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:23:54,707 INFO L263 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 73 conjunts are in the unsatisfiable core [2022-11-21 16:23:54,710 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:23:54,807 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-21 16:23:54,807 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-21 16:23:54,901 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:23:55,011 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:23:55,127 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:23:55,236 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:23:55,283 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-21 16:23:56,358 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-21 16:23:56,360 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:56,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:56,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:56,371 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-11-21 16:23:57,428 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:57,430 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:57,431 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:23:57,433 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-21 16:23:57,436 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 42 [2022-11-21 16:23:58,185 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 18 [2022-11-21 16:23:58,262 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-21 16:23:58,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:24:01,571 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_531 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_531) |c_~#array~0.base|))) (let ((.cse2 (select .cse0 (+ |c_~#array~0.offset| 4))) (.cse1 (select .cse0 (+ |c_~#array~0.offset| 12))) (.cse3 (select .cse0 (+ 16 |c_~#array~0.offset|)))) (or (< (select .cse0 (+ |c_~#array~0.offset| 8)) (+ 1 .cse1)) (< .cse2 (select .cse0 |c_~#array~0.offset|)) (< .cse3 .cse2) (< .cse1 (+ .cse3 1)))))) is different from false [2022-11-21 16:24:01,931 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 14 proven. 95 refuted. 0 times theorem prover too weak. 31 trivial. 9 not checked. [2022-11-21 16:24:01,931 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [968549497] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:24:01,931 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:24:01,931 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 27, 21] total 67 [2022-11-21 16:24:01,932 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495654107] [2022-11-21 16:24:01,932 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:24:02,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:24:02,371 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2022-11-21 16:24:02,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=475, Invalid=4083, Unknown=2, NotChecked=132, Total=4692 [2022-11-21 16:24:02,373 INFO L87 Difference]: Start difference. First operand 69 states and 80 transitions. cyclomatic complexity: 14 Second operand has 69 states, 68 states have (on average 1.7352941176470589) internal successors, (118), 68 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:24:26,338 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-21 16:25:15,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:25:15,793 INFO L93 Difference]: Finished difference Result 182 states and 215 transitions. [2022-11-21 16:25:15,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 182 states and 215 transitions. [2022-11-21 16:25:15,794 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 40 [2022-11-21 16:25:15,795 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 182 states to 182 states and 215 transitions. [2022-11-21 16:25:15,795 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 172 [2022-11-21 16:25:15,795 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 172 [2022-11-21 16:25:15,796 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 215 transitions. [2022-11-21 16:25:15,796 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:25:15,796 INFO L218 hiAutomatonCegarLoop]: Abstraction has 182 states and 215 transitions. [2022-11-21 16:25:15,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 215 transitions. [2022-11-21 16:25:15,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 87. [2022-11-21 16:25:15,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 87 states have (on average 1.1954022988505748) internal successors, (104), 86 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:25:15,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 104 transitions. [2022-11-21 16:25:15,811 INFO L240 hiAutomatonCegarLoop]: Abstraction has 87 states and 104 transitions. [2022-11-21 16:25:15,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-11-21 16:25:15,814 INFO L428 stractBuchiCegarLoop]: Abstraction has 87 states and 104 transitions. [2022-11-21 16:25:15,814 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2022-11-21 16:25:15,814 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 87 states and 104 transitions. [2022-11-21 16:25:15,815 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-21 16:25:15,815 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:25:15,815 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:25:15,815 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-21 16:25:15,815 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:25:15,816 INFO L748 eck$LassoCheckResult]: Stem: 4981#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4982#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4983#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4984#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4985#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4986#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5000#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5009#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5008#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5007#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5006#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5005#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5004#L44-3 assume !(main_~i~1#1 >= 0); 4987#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4988#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5025#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5024#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5023#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5022#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5021#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5020#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5019#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5018#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5017#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5016#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5015#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5014#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5013#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5012#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5011#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5002#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5003#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5030#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 5028#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5029#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5032#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5033#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5026#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5027#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5058#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5057#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5056#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5055#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5054#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 4995#L26 assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 4992#L49-3 [2022-11-21 16:25:15,816 INFO L750 eck$LassoCheckResult]: Loop: 4992#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 4989#L15 assume !(0 == __VERIFIER_assert_~cond#1); 4990#L15-2 assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 4991#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 4992#L49-3 [2022-11-21 16:25:15,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:25:15,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1993302254, now seen corresponding path program 1 times [2022-11-21 16:25:15,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:25:15,817 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205552513] [2022-11-21 16:25:15,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:25:15,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:25:15,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:25:15,948 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-21 16:25:15,949 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:25:15,949 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205552513] [2022-11-21 16:25:15,949 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1205552513] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:25:15,949 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1832869908] [2022-11-21 16:25:15,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:25:15,950 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:25:15,950 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:25:15,958 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:25:15,983 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-21 16:25:16,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:25:16,079 INFO L263 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-21 16:25:16,080 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:25:16,304 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-21 16:25:16,305 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:25:16,463 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-21 16:25:16,463 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1832869908] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:25:16,463 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:25:16,464 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2022-11-21 16:25:16,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811976624] [2022-11-21 16:25:16,464 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:25:16,465 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:25:16,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:25:16,465 INFO L85 PathProgramCache]: Analyzing trace with hash 2685258, now seen corresponding path program 1 times [2022-11-21 16:25:16,465 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:25:16,465 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265478569] [2022-11-21 16:25:16,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:25:16,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:25:16,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:25:16,473 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:25:16,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:25:16,482 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:25:16,585 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:25:16,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-21 16:25:16,586 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2022-11-21 16:25:16,586 INFO L87 Difference]: Start difference. First operand 87 states and 104 transitions. cyclomatic complexity: 20 Second operand has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 11 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:25:16,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:25:16,709 INFO L93 Difference]: Finished difference Result 105 states and 124 transitions. [2022-11-21 16:25:16,710 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 124 transitions. [2022-11-21 16:25:16,711 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-21 16:25:16,711 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 105 states and 124 transitions. [2022-11-21 16:25:16,711 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2022-11-21 16:25:16,712 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2022-11-21 16:25:16,712 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 124 transitions. [2022-11-21 16:25:16,712 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:25:16,712 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-11-21 16:25:16,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 124 transitions. [2022-11-21 16:25:16,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2022-11-21 16:25:16,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 105 states have (on average 1.180952380952381) internal successors, (124), 104 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:25:16,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 124 transitions. [2022-11-21 16:25:16,723 INFO L240 hiAutomatonCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-11-21 16:25:16,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-21 16:25:16,724 INFO L428 stractBuchiCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-11-21 16:25:16,724 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2022-11-21 16:25:16,724 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 124 transitions. [2022-11-21 16:25:16,725 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-21 16:25:16,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:25:16,726 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:25:16,726 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1] [2022-11-21 16:25:16,728 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:25:16,728 INFO L748 eck$LassoCheckResult]: Stem: 5456#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 5457#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 5458#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5459#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5460#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5461#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5489#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5488#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5487#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5485#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5483#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5479#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5478#L44-3 assume !(main_~i~1#1 >= 0); 5462#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 5463#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5473#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5474#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5557#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5556#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5555#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5554#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5553#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5551#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5549#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5547#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5545#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5543#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5541#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5475#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5476#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5538#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5537#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5535#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 5534#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5533#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5532#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5531#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5530#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5529#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5528#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5527#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5526#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5525#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5524#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5523#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5507#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5502#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5503#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5514#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5494#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5493#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5492#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5481#L32-3 [2022-11-21 16:25:16,728 INFO L750 eck$LassoCheckResult]: Loop: 5481#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5484#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5482#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5480#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5481#L32-3 [2022-11-21 16:25:16,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:25:16,729 INFO L85 PathProgramCache]: Analyzing trace with hash -1926449103, now seen corresponding path program 8 times [2022-11-21 16:25:16,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:25:16,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804268968] [2022-11-21 16:25:16,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:25:16,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:25:16,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:25:16,870 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-21 16:25:16,871 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:25:16,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804268968] [2022-11-21 16:25:16,871 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1804268968] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:25:16,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1336855419] [2022-11-21 16:25:16,871 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-21 16:25:16,871 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:25:16,872 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:25:16,879 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:25:16,909 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-11-21 16:25:17,012 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-21 16:25:17,012 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:25:17,014 INFO L263 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-21 16:25:17,015 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:25:17,261 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-21 16:25:17,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:25:17,415 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-21 16:25:17,415 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1336855419] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:25:17,415 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:25:17,415 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2022-11-21 16:25:17,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761887041] [2022-11-21 16:25:17,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:25:17,416 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:25:17,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:25:17,416 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 7 times [2022-11-21 16:25:17,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:25:17,417 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912364781] [2022-11-21 16:25:17,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:25:17,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:25:17,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:25:17,423 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:25:17,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:25:17,426 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:25:17,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:25:17,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-21 16:25:17,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2022-11-21 16:25:17,583 INFO L87 Difference]: Start difference. First operand 105 states and 124 transitions. cyclomatic complexity: 22 Second operand has 14 states, 14 states have (on average 4.357142857142857) internal successors, (61), 13 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:25:17,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-21 16:25:17,783 INFO L93 Difference]: Finished difference Result 105 states and 118 transitions. [2022-11-21 16:25:17,783 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 118 transitions. [2022-11-21 16:25:17,783 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-21 16:25:17,784 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 105 states and 118 transitions. [2022-11-21 16:25:17,784 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2022-11-21 16:25:17,784 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2022-11-21 16:25:17,784 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 118 transitions. [2022-11-21 16:25:17,785 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-21 16:25:17,785 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-11-21 16:25:17,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 118 transitions. [2022-11-21 16:25:17,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2022-11-21 16:25:17,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 105 states have (on average 1.1238095238095238) internal successors, (118), 104 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:25:17,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 118 transitions. [2022-11-21 16:25:17,787 INFO L240 hiAutomatonCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-11-21 16:25:17,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-21 16:25:17,796 INFO L428 stractBuchiCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-11-21 16:25:17,796 INFO L335 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2022-11-21 16:25:17,796 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 118 transitions. [2022-11-21 16:25:17,797 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-21 16:25:17,797 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-21 16:25:17,797 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-21 16:25:17,798 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 8, 5, 5, 5, 4, 4, 4, 2, 1, 1, 1, 1] [2022-11-21 16:25:17,798 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-21 16:25:17,799 INFO L748 eck$LassoCheckResult]: Stem: 6007#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 6008#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6009#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6010#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6011#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6012#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6037#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6036#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6035#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6033#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6031#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6027#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6026#L44-3 assume !(main_~i~1#1 >= 0); 6013#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 6014#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6025#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6109#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6022#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6023#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6019#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6020#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6108#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6107#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6106#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6105#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6104#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6103#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6102#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6024#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6005#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6006#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6101#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6100#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 6098#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6096#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6094#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6092#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6090#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6088#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6086#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6084#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6082#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6080#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6078#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6065#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6066#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 6076#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6075#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6074#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6073#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6072#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6071#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6070#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6069#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6067#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6049#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6047#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6048#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6042#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6041#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6040#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6029#L32-3 [2022-11-21 16:25:17,799 INFO L750 eck$LassoCheckResult]: Loop: 6029#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6032#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6030#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6028#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6029#L32-3 [2022-11-21 16:25:17,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:25:17,800 INFO L85 PathProgramCache]: Analyzing trace with hash 308108643, now seen corresponding path program 9 times [2022-11-21 16:25:17,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:25:17,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199578017] [2022-11-21 16:25:17,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:25:17,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:25:17,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-21 16:25:20,056 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 91 proven. 85 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2022-11-21 16:25:20,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-21 16:25:20,056 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199578017] [2022-11-21 16:25:20,057 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [199578017] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-21 16:25:20,057 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1240556757] [2022-11-21 16:25:20,057 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-21 16:25:20,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-21 16:25:20,057 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 [2022-11-21 16:25:20,059 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-21 16:25:20,060 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a049e9f3-c8b0-4000-8bf2-8a9b5fbeeda7/bin/uautomizer-vX5HgA9Q3a/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-11-21 16:25:20,359 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2022-11-21 16:25:20,359 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-21 16:25:20,362 INFO L263 TraceCheckSpWp]: Trace formula consists of 350 conjuncts, 80 conjunts are in the unsatisfiable core [2022-11-21 16:25:20,366 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-21 16:25:20,439 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-21 16:25:20,439 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-21 16:25:20,548 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:25:20,599 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:25:20,628 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:25:20,686 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:25:20,721 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-21 16:25:21,290 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:25:21,292 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:25:21,293 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-11-21 16:25:22,199 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-21 16:25:22,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:25:22,290 INFO L321 Elim1Store]: treesize reduction 59, result has 61.2 percent of original size [2022-11-21 16:25:22,290 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 8 case distinctions, treesize of input 69 treesize of output 113 [2022-11-21 16:25:25,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-21 16:25:25,554 INFO L321 Elim1Store]: treesize reduction 178, result has 40.7 percent of original size [2022-11-21 16:25:25,555 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 14 case distinctions, treesize of input 132 treesize of output 194 [2022-11-21 16:25:26,920 INFO L321 Elim1Store]: treesize reduction 10, result has 71.4 percent of original size [2022-11-21 16:25:26,920 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 72 [2022-11-21 16:25:27,496 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 5 proven. 195 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-21 16:25:27,496 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-21 16:27:31,510 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_677 (Array Int Int)) (|v_ULTIMATE.start_SelectionSort_~lh~0#1_74| Int) (v_ArrVal_682 Int) (|v_ULTIMATE.start_SelectionSort_~i~0#1_183| Int) (|ULTIMATE.start_SelectionSort_~i~0#1| Int) (v_ArrVal_678 Int)) (let ((.cse6 (* |ULTIMATE.start_SelectionSort_~i~0#1| 4))) (let ((.cse3 (store (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_677) |c_~#array~0.base|) |c_~#array~0.offset| v_ArrVal_678)) (.cse5 (+ .cse6 |c_~#array~0.offset|)) (.cse0 (+ |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 3) c_~n~0) (< c_~n~0 .cse0) (let ((.cse2 (* |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (let ((.cse1 (let ((.cse4 (+ |c_~#array~0.offset| .cse2))) (store (store .cse3 .cse4 v_ArrVal_682) .cse5 (select .cse3 .cse4))))) (< (select .cse1 (+ |c_~#array~0.offset| .cse2 4)) (+ 1 (select .cse1 (+ (* |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 4) |c_~#array~0.offset|)))))) (not (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 1) c_~n~0)) (< (select .cse3 (+ .cse6 |c_~#array~0.offset| 4)) (select .cse3 .cse5)) (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 2) c_~n~0) (< .cse0 c_~n~0))))) is different from false [2022-11-21 16:27:32,317 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 16 proven. 165 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2022-11-21 16:27:32,317 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1240556757] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-21 16:27:32,317 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-21 16:27:32,318 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 30, 29] total 77 [2022-11-21 16:27:32,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255428843] [2022-11-21 16:27:32,318 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-21 16:27:32,318 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-21 16:27:32,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-21 16:27:32,319 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 8 times [2022-11-21 16:27:32,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-21 16:27:32,319 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041918045] [2022-11-21 16:27:32,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-21 16:27:32,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-21 16:27:32,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:27:32,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-21 16:27:32,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-21 16:27:32,334 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-21 16:27:32,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-21 16:27:32,477 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2022-11-21 16:27:32,479 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=758, Invalid=5092, Unknown=6, NotChecked=150, Total=6006 [2022-11-21 16:27:32,479 INFO L87 Difference]: Start difference. First operand 105 states and 118 transitions. cyclomatic complexity: 16 Second operand has 78 states, 78 states have (on average 1.705128205128205) internal successors, (133), 77 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-21 16:27:45,327 WARN L233 SmtUtils]: Spent 12.17s on a formula simplification. DAG size of input: 142 DAG size of output: 38 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:28:11,904 WARN L233 SmtUtils]: Spent 12.14s on a formula simplification that was a NOOP. DAG size: 86 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:28:15,731 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.77s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-21 16:28:28,520 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:28:42,031 WARN L233 SmtUtils]: Spent 12.38s on a formula simplification. DAG size of input: 150 DAG size of output: 93 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:28:55,727 WARN L233 SmtUtils]: Spent 12.33s on a formula simplification. DAG size of input: 149 DAG size of output: 92 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:29:07,752 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:29:25,164 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:29:37,220 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:29:49,259 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:30:01,299 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:30:14,080 WARN L233 SmtUtils]: Spent 12.50s on a formula simplification. DAG size of input: 173 DAG size of output: 96 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:30:31,235 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:30:43,280 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:30:55,366 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:31:07,633 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:31:19,546 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 11.79s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:31:31,634 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:31:43,722 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:31:55,764 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.04s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:32:11,612 WARN L233 SmtUtils]: Spent 15.04s on a formula simplification. DAG size of input: 156 DAG size of output: 98 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:32:25,379 WARN L233 SmtUtils]: Spent 13.04s on a formula simplification. DAG size of input: 168 DAG size of output: 90 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:32:37,384 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:32:50,375 WARN L233 SmtUtils]: Spent 12.35s on a formula simplification. DAG size of input: 152 DAG size of output: 94 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:33:02,888 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:33:15,690 WARN L233 SmtUtils]: Spent 12.53s on a formula simplification. DAG size of input: 154 DAG size of output: 100 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:33:27,697 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:33:39,728 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:33:44,162 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.43s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:34:23,706 WARN L233 SmtUtils]: Spent 27.14s on a formula simplification. DAG size of input: 166 DAG size of output: 85 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:35:13,820 WARN L233 SmtUtils]: Spent 36.56s on a formula simplification. DAG size of input: 128 DAG size of output: 103 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:35:38,959 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-21 16:36:33,550 WARN L233 SmtUtils]: Spent 24.70s on a formula simplification. DAG size of input: 168 DAG size of output: 108 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-21 16:37:01,006 WARN L233 SmtUtils]: Spent 12.70s on a formula simplification. DAG size of input: 169 DAG size of output: 109 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)