./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loops/eureka_05.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4e7fbc69 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loops/eureka_05.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 03:14:25,666 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 03:14:25,668 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 03:14:25,686 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 03:14:25,687 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 03:14:25,688 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 03:14:25,689 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 03:14:25,691 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 03:14:25,692 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 03:14:25,693 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 03:14:25,694 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 03:14:25,695 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 03:14:25,696 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 03:14:25,697 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 03:14:25,698 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 03:14:25,699 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 03:14:25,700 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 03:14:25,701 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 03:14:25,703 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 03:14:25,705 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 03:14:25,706 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 03:14:25,708 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 03:14:25,709 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 03:14:25,710 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 03:14:25,714 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 03:14:25,714 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 03:14:25,715 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 03:14:25,716 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 03:14:25,717 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 03:14:25,718 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 03:14:25,727 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 03:14:25,728 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 03:14:25,729 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 03:14:25,730 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 03:14:25,731 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 03:14:25,731 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 03:14:25,732 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 03:14:25,732 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 03:14:25,733 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 03:14:25,734 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 03:14:25,734 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 03:14:25,740 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-23 03:14:25,770 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 03:14:25,770 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 03:14:25,776 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 03:14:25,776 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 03:14:25,778 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-23 03:14:25,778 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-23 03:14:25,778 INFO L138 SettingsManager]: * Use SBE=true [2022-11-23 03:14:25,778 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-23 03:14:25,778 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-23 03:14:25,779 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-23 03:14:25,780 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-23 03:14:25,780 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-23 03:14:25,780 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-23 03:14:25,780 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 03:14:25,780 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-23 03:14:25,781 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-23 03:14:25,781 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-23 03:14:25,781 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-23 03:14:25,781 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 03:14:25,781 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-23 03:14:25,781 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-23 03:14:25,782 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-23 03:14:25,782 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-23 03:14:25,782 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-23 03:14:25,783 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-23 03:14:25,783 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 03:14:25,783 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-23 03:14:25,784 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 03:14:25,784 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-23 03:14:25,784 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 03:14:25,784 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-23 03:14:25,786 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-23 03:14:25,786 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab [2022-11-23 03:14:26,064 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 03:14:26,092 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 03:14:26,095 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 03:14:26,096 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 03:14:26,096 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 03:14:26,097 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/../../sv-benchmarks/c/loops/eureka_05.i [2022-11-23 03:14:29,264 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 03:14:29,453 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 03:14:29,454 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/sv-benchmarks/c/loops/eureka_05.i [2022-11-23 03:14:29,462 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/data/0dcc1679b/260f31cfea204071b42c2bdc932026f2/FLAG82816b789 [2022-11-23 03:14:29,480 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/data/0dcc1679b/260f31cfea204071b42c2bdc932026f2 [2022-11-23 03:14:29,486 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 03:14:29,488 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 03:14:29,494 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 03:14:29,494 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 03:14:29,498 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 03:14:29,499 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,500 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@311f2992 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29, skipping insertion in model container [2022-11-23 03:14:29,500 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,508 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 03:14:29,531 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 03:14:29,684 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-11-23 03:14:29,716 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 03:14:29,733 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 03:14:29,750 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-11-23 03:14:29,772 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 03:14:29,787 INFO L208 MainTranslator]: Completed translation [2022-11-23 03:14:29,788 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29 WrapperNode [2022-11-23 03:14:29,788 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 03:14:29,789 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 03:14:29,790 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 03:14:29,790 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 03:14:29,797 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,821 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,845 INFO L138 Inliner]: procedures = 16, calls = 24, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 84 [2022-11-23 03:14:29,846 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 03:14:29,847 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 03:14:29,847 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 03:14:29,847 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 03:14:29,858 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,858 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,864 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,865 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,884 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,893 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,894 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,895 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,897 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 03:14:29,898 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 03:14:29,898 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 03:14:29,898 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 03:14:29,899 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (1/1) ... [2022-11-23 03:14:29,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:29,921 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:29,938 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:29,959 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-23 03:14:29,990 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-23 03:14:29,990 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-23 03:14:29,991 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-23 03:14:29,992 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-23 03:14:29,992 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 03:14:29,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 03:14:29,992 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-23 03:14:29,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-23 03:14:30,072 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 03:14:30,075 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 03:14:30,310 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 03:14:30,316 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 03:14:30,316 INFO L300 CfgBuilder]: Removed 4 assume(true) statements. [2022-11-23 03:14:30,318 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:14:30 BoogieIcfgContainer [2022-11-23 03:14:30,319 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 03:14:30,320 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-23 03:14:30,320 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-23 03:14:30,324 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-23 03:14:30,325 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-23 03:14:30,325 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 23.11 03:14:29" (1/3) ... [2022-11-23 03:14:30,326 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@e860bf1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 03:14:30, skipping insertion in model container [2022-11-23 03:14:30,327 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-23 03:14:30,327 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 03:14:29" (2/3) ... [2022-11-23 03:14:30,327 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@e860bf1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 03:14:30, skipping insertion in model container [2022-11-23 03:14:30,327 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-23 03:14:30,327 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 03:14:30" (3/3) ... [2022-11-23 03:14:30,328 INFO L332 chiAutomizerObserver]: Analyzing ICFG eureka_05.i [2022-11-23 03:14:30,425 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-23 03:14:30,425 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-23 03:14:30,426 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-23 03:14:30,426 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-23 03:14:30,426 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-23 03:14:30,426 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-23 03:14:30,426 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-23 03:14:30,427 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-23 03:14:30,431 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:30,455 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-23 03:14:30,455 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:30,455 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:30,461 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-23 03:14:30,461 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-23 03:14:30,462 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-23 03:14:30,462 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:30,466 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-23 03:14:30,467 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:30,467 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:30,467 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-23 03:14:30,467 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-23 03:14:30,476 INFO L748 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 13#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6#L44-3true [2022-11-23 03:14:30,477 INFO L750 eck$LassoCheckResult]: Loop: 6#L44-3true assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 18#L44-2true main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6#L44-3true [2022-11-23 03:14:30,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:30,489 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-23 03:14:30,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:30,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722522313] [2022-11-23 03:14:30,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:30,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:30,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:30,601 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:30,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:30,633 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:30,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:30,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-23 03:14:30,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:30,637 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879159332] [2022-11-23 03:14:30,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:30,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:30,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:30,647 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:30,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:30,655 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:30,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:30,657 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-23 03:14:30,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:30,658 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379422335] [2022-11-23 03:14:30,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:30,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:30,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:30,682 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:30,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:30,702 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:31,448 INFO L210 LassoAnalysis]: Preferences: [2022-11-23 03:14:31,448 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-23 03:14:31,449 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-23 03:14:31,449 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-23 03:14:31,449 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-23 03:14:31,449 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:31,450 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-23 03:14:31,450 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-23 03:14:31,450 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration1_Lasso [2022-11-23 03:14:31,450 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-23 03:14:31,451 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-23 03:14:31,474 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:31,486 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:31,491 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:31,495 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:31,498 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:32,012 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:32,016 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:32,019 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-23 03:14:32,406 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-23 03:14:32,411 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-23 03:14:32,413 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,413 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,417 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,423 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,436 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,437 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-23 03:14:32,437 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,438 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,438 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,440 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-23 03:14:32,441 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-23 03:14:32,442 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-23 03:14:32,447 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,456 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,462 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,476 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-23 03:14:32,476 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,489 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,489 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,489 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,489 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,498 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,498 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,515 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,523 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,525 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,534 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,546 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,547 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,547 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,547 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,550 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,550 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,551 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-23 03:14:32,567 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,575 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,577 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,586 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,598 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,599 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-23 03:14:32,599 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,599 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,599 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,600 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-23 03:14:32,600 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-23 03:14:32,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-23 03:14:32,615 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,618 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2022-11-23 03:14:32,618 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,619 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,620 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,624 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-23 03:14:32,625 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,638 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,638 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,638 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,638 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,647 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,647 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,671 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,680 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,681 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,681 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,682 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,691 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,704 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,704 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,704 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,704 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,709 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-23 03:14:32,709 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,712 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,723 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,731 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,732 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,733 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,739 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-23 03:14:32,740 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,753 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,753 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,753 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,753 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,762 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,763 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,779 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,791 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,791 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,791 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,793 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,797 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,809 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,809 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,809 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,809 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,812 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,812 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,813 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-23 03:14:32,824 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,832 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,833 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,833 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,834 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,843 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,856 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,856 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,856 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,856 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,859 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,859 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,860 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-23 03:14:32,875 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,883 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,884 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,885 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,890 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,902 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,902 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,902 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,903 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,905 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,905 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,907 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-23 03:14:32,924 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,935 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,935 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,935 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,936 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,947 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-23 03:14:32,948 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,959 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,959 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,960 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,960 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:32,962 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:32,962 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:32,974 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-23 03:14:32,979 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:32,979 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:32,980 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:32,981 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:32,985 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-23 03:14:32,985 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-23 03:14:32,996 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-23 03:14:32,996 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-23 03:14:32,996 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-23 03:14:32,996 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-23 03:14:33,002 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-23 03:14:33,003 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-23 03:14:33,026 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-23 03:14:33,058 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-11-23 03:14:33,058 INFO L444 ModelExtractionUtils]: 1 out of 16 variables were initially zero. Simplification set additionally 12 variables to zero. [2022-11-23 03:14:33,060 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-23 03:14:33,060 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:33,094 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-23 03:14:33,105 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-23 03:14:33,117 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-23 03:14:33,123 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-23 03:14:33,123 INFO L513 LassoAnalysis]: Proved termination. [2022-11-23 03:14:33,124 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1) = 8*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1 Supporting invariants [] [2022-11-23 03:14:33,136 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:33,191 INFO L156 tatePredicateManager]: 17 out of 17 supporting invariants were superfluous and have been removed [2022-11-23 03:14:33,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:33,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:33,234 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-23 03:14:33,235 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:33,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:33,250 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-23 03:14:33,251 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:33,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:33,314 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-23 03:14:33,316 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:33,370 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 48 states and 71 transitions. Complement of second has 8 states. [2022-11-23 03:14:33,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-23 03:14:33,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:33,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 42 transitions. [2022-11-23 03:14:33,379 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-23 03:14:33,380 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-23 03:14:33,380 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-23 03:14:33,380 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-23 03:14:33,380 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-23 03:14:33,381 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-23 03:14:33,381 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 71 transitions. [2022-11-23 03:14:33,384 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-11-23 03:14:33,388 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 18 states and 24 transitions. [2022-11-23 03:14:33,389 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-11-23 03:14:33,389 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-11-23 03:14:33,390 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2022-11-23 03:14:33,390 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:33,391 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-11-23 03:14:33,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2022-11-23 03:14:33,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-11-23 03:14:33,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:33,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2022-11-23 03:14:33,420 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-11-23 03:14:33,420 INFO L428 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-11-23 03:14:33,420 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-23 03:14:33,420 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2022-11-23 03:14:33,421 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-11-23 03:14:33,421 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:33,421 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:33,421 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-23 03:14:33,422 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:14:33,422 INFO L748 eck$LassoCheckResult]: Stem: 180#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 181#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 182#L44-3 assume !(main_~i~1#1 >= 0); 183#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 179#L30-3 [2022-11-23 03:14:33,422 INFO L750 eck$LassoCheckResult]: Loop: 179#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 192#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 193#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 178#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 179#L30-3 [2022-11-23 03:14:33,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:33,423 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-23 03:14:33,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:33,423 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960348921] [2022-11-23 03:14:33,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:33,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:33,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:33,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:33,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:33,488 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960348921] [2022-11-23 03:14:33,488 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [960348921] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 03:14:33,489 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 03:14:33,489 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-23 03:14:33,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [804506028] [2022-11-23 03:14:33,490 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 03:14:33,492 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:14:33,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:33,492 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 1 times [2022-11-23 03:14:33,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:33,493 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730343949] [2022-11-23 03:14:33,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:33,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:33,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:33,504 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:33,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:33,528 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:33,652 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:33,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-23 03:14:33,655 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-23 03:14:33,656 INFO L87 Difference]: Start difference. First operand 18 states and 24 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:33,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:33,674 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2022-11-23 03:14:33,674 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 23 transitions. [2022-11-23 03:14:33,675 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:33,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 22 transitions. [2022-11-23 03:14:33,676 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-11-23 03:14:33,676 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-11-23 03:14:33,676 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2022-11-23 03:14:33,676 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:33,676 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-11-23 03:14:33,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2022-11-23 03:14:33,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2022-11-23 03:14:33,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:33,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-11-23 03:14:33,678 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-11-23 03:14:33,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-23 03:14:33,680 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-11-23 03:14:33,680 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-23 03:14:33,680 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2022-11-23 03:14:33,681 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:33,681 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:33,681 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:33,681 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-11-23 03:14:33,681 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:14:33,681 INFO L748 eck$LassoCheckResult]: Stem: 221#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 222#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 223#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 224#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 225#L44-3 assume !(main_~i~1#1 >= 0); 226#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 220#L30-3 [2022-11-23 03:14:33,682 INFO L750 eck$LassoCheckResult]: Loop: 220#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 234#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 235#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 219#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 220#L30-3 [2022-11-23 03:14:33,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:33,682 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-11-23 03:14:33,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:33,682 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146898701] [2022-11-23 03:14:33,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:33,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:33,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:33,776 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:33,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:33,780 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146898701] [2022-11-23 03:14:33,781 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2146898701] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:14:33,781 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1382701305] [2022-11-23 03:14:33,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:33,785 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:14:33,785 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:33,786 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:14:33,807 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-23 03:14:33,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:33,845 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-23 03:14:33,846 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:33,854 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:33,854 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:14:33,875 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:33,876 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1382701305] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:14:33,876 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:14:33,876 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2022-11-23 03:14:33,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [729636570] [2022-11-23 03:14:33,876 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:14:33,877 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:14:33,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:33,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 2 times [2022-11-23 03:14:33,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:33,878 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616926463] [2022-11-23 03:14:33,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:33,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:33,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:33,899 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:33,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:33,918 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:34,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:34,029 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-23 03:14:34,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-11-23 03:14:34,029 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:34,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:34,084 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-11-23 03:14:34,085 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 31 transitions. [2022-11-23 03:14:34,088 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:34,088 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 31 transitions. [2022-11-23 03:14:34,089 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-23 03:14:34,089 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-11-23 03:14:34,089 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 31 transitions. [2022-11-23 03:14:34,089 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:34,089 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-11-23 03:14:34,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 31 transitions. [2022-11-23 03:14:34,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 23. [2022-11-23 03:14:34,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.173913043478261) internal successors, (27), 22 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:34,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-11-23 03:14:34,093 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-11-23 03:14:34,094 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-23 03:14:34,097 INFO L428 stractBuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-11-23 03:14:34,097 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-23 03:14:34,097 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 27 transitions. [2022-11-23 03:14:34,101 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:34,101 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:34,101 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:34,102 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-11-23 03:14:34,102 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:14:34,102 INFO L748 eck$LassoCheckResult]: Stem: 304#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 305#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 306#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 307#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 308#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 309#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 324#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 323#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 322#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 321#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 320#L44-3 assume !(main_~i~1#1 >= 0); 310#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 303#L30-3 [2022-11-23 03:14:34,103 INFO L750 eck$LassoCheckResult]: Loop: 303#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 318#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 319#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 302#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 303#L30-3 [2022-11-23 03:14:34,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:34,103 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-11-23 03:14:34,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:34,103 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1887643400] [2022-11-23 03:14:34,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:34,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:34,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:34,296 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:34,296 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:34,297 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1887643400] [2022-11-23 03:14:34,297 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1887643400] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:14:34,297 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [627788341] [2022-11-23 03:14:34,297 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 03:14:34,297 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:14:34,298 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:34,303 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:14:34,323 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-23 03:14:34,368 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 03:14:34,368 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:14:34,369 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-23 03:14:34,370 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:34,398 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:34,398 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:14:34,438 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:34,439 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [627788341] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:14:34,439 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:14:34,439 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 7 [2022-11-23 03:14:34,439 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665782286] [2022-11-23 03:14:34,440 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:14:34,441 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:14:34,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:34,441 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 3 times [2022-11-23 03:14:34,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:34,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328240230] [2022-11-23 03:14:34,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:34,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:34,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:34,460 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:34,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:34,473 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:34,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:34,584 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-23 03:14:34,584 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-23 03:14:34,584 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:34,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:34,658 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2022-11-23 03:14:34,658 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 45 transitions. [2022-11-23 03:14:34,662 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:34,663 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 41 states and 45 transitions. [2022-11-23 03:14:34,664 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2022-11-23 03:14:34,664 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2022-11-23 03:14:34,664 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 45 transitions. [2022-11-23 03:14:34,664 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:34,665 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-11-23 03:14:34,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 45 transitions. [2022-11-23 03:14:34,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 25. [2022-11-23 03:14:34,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.16) internal successors, (29), 24 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:34,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2022-11-23 03:14:34,671 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-11-23 03:14:34,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-23 03:14:34,673 INFO L428 stractBuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-11-23 03:14:34,673 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-23 03:14:34,673 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 29 transitions. [2022-11-23 03:14:34,679 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:34,679 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:34,680 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:34,680 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2022-11-23 03:14:34,681 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:14:34,681 INFO L748 eck$LassoCheckResult]: Stem: 444#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 445#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 446#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 447#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 448#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 449#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 466#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 465#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 464#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 463#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 462#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 461#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 460#L44-3 assume !(main_~i~1#1 >= 0); 450#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 443#L30-3 [2022-11-23 03:14:34,681 INFO L750 eck$LassoCheckResult]: Loop: 443#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 458#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 459#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 442#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 443#L30-3 [2022-11-23 03:14:34,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:34,682 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 3 times [2022-11-23 03:14:34,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:34,685 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [157833743] [2022-11-23 03:14:34,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:34,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:34,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:34,720 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:34,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:34,745 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:34,749 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:34,749 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 4 times [2022-11-23 03:14:34,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:34,750 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325395219] [2022-11-23 03:14:34,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:34,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:34,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:34,763 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:34,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:34,769 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:34,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:34,769 INFO L85 PathProgramCache]: Analyzing trace with hash -743535747, now seen corresponding path program 1 times [2022-11-23 03:14:34,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:34,770 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1879229745] [2022-11-23 03:14:34,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:34,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:34,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:34,877 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-23 03:14:34,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:34,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1879229745] [2022-11-23 03:14:34,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1879229745] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 03:14:34,878 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 03:14:34,878 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-23 03:14:34,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979090175] [2022-11-23 03:14:34,879 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 03:14:34,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:34,992 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-23 03:14:34,992 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-11-23 03:14:34,993 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. cyclomatic complexity: 7 Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:35,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:35,040 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2022-11-23 03:14:35,040 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 41 transitions. [2022-11-23 03:14:35,041 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-23 03:14:35,041 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 41 transitions. [2022-11-23 03:14:35,041 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-11-23 03:14:35,041 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-11-23 03:14:35,041 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 41 transitions. [2022-11-23 03:14:35,042 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:35,042 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 41 transitions. [2022-11-23 03:14:35,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 41 transitions. [2022-11-23 03:14:35,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2022-11-23 03:14:35,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 26 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:35,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2022-11-23 03:14:35,044 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-11-23 03:14:35,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 03:14:35,045 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-11-23 03:14:35,046 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-23 03:14:35,046 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. [2022-11-23 03:14:35,046 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:35,046 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:35,046 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:35,047 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1] [2022-11-23 03:14:35,047 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-23 03:14:35,047 INFO L748 eck$LassoCheckResult]: Stem: 515#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 516#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 517#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 518#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 519#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 520#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 539#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 538#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 537#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 536#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 535#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 534#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 533#L44-3 assume !(main_~i~1#1 >= 0); 521#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 522#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 531#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 527#L33 [2022-11-23 03:14:35,048 INFO L750 eck$LassoCheckResult]: Loop: 527#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 528#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 530#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 527#L33 [2022-11-23 03:14:35,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:35,048 INFO L85 PathProgramCache]: Analyzing trace with hash 1715425501, now seen corresponding path program 1 times [2022-11-23 03:14:35,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:35,049 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796951738] [2022-11-23 03:14:35,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:35,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:35,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:35,066 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:35,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:35,089 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:35,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:35,090 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 1 times [2022-11-23 03:14:35,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:35,090 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277579115] [2022-11-23 03:14:35,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:35,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:35,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:35,095 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:35,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:35,100 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:35,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:35,101 INFO L85 PathProgramCache]: Analyzing trace with hash -1574719937, now seen corresponding path program 1 times [2022-11-23 03:14:35,101 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:35,101 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25639239] [2022-11-23 03:14:35,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:35,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:35,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:35,172 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-23 03:14:36,159 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 03:14:36,159 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:36,160 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [25639239] [2022-11-23 03:14:36,160 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [25639239] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:14:36,160 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1882283087] [2022-11-23 03:14:36,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:36,160 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:14:36,160 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:36,161 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:14:36,168 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-23 03:14:36,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:36,250 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-23 03:14:36,253 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:36,332 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-23 03:14:36,333 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-23 03:14:36,418 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:36,489 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:36,562 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:36,636 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:36,679 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:36,835 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-11-23 03:14:36,871 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 03:14:36,871 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:14:37,125 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_122 (Array Int Int)) (|v_ULTIMATE.start_main_~#array~1#1.base_54| Int)) (or (not (= (select |c_#valid| |v_ULTIMATE.start_main_~#array~1#1.base_54|) 0)) (let ((.cse0 (select (store |c_#memory_int| |v_ULTIMATE.start_main_~#array~1#1.base_54| v_ArrVal_122) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ |c_~#array~0.offset| 4)) 1))))) is different from false [2022-11-23 03:14:37,127 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-23 03:14:37,127 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1882283087] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:14:37,128 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:14:37,128 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 7] total 26 [2022-11-23 03:14:37,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [11524150] [2022-11-23 03:14:37,128 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:14:37,218 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:37,218 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-23 03:14:37,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=542, Unknown=4, NotChecked=48, Total=702 [2022-11-23 03:14:37,219 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 7 Second operand has 27 states, 27 states have (on average 1.7407407407407407) internal successors, (47), 26 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:38,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:38,012 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2022-11-23 03:14:38,012 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 41 transitions. [2022-11-23 03:14:38,012 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-11-23 03:14:38,013 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 41 transitions. [2022-11-23 03:14:38,013 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-11-23 03:14:38,013 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-11-23 03:14:38,013 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 41 transitions. [2022-11-23 03:14:38,013 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:38,013 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 41 transitions. [2022-11-23 03:14:38,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 41 transitions. [2022-11-23 03:14:38,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2022-11-23 03:14:38,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:38,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-11-23 03:14:38,015 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-23 03:14:38,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-23 03:14:38,017 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-11-23 03:14:38,017 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-23 03:14:38,017 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2022-11-23 03:14:38,018 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:38,018 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:38,018 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:38,018 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:14:38,019 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-23 03:14:38,019 INFO L748 eck$LassoCheckResult]: Stem: 736#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 737#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 738#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 739#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 740#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 741#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 760#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 759#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 758#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 757#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 756#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 755#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 754#L44-3 assume !(main_~i~1#1 >= 0); 742#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 743#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 752#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 748#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 749#L32-2 [2022-11-23 03:14:38,019 INFO L750 eck$LassoCheckResult]: Loop: 749#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 751#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 761#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 749#L32-2 [2022-11-23 03:14:38,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:38,020 INFO L85 PathProgramCache]: Analyzing trace with hash 1638583016, now seen corresponding path program 1 times [2022-11-23 03:14:38,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:38,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829549634] [2022-11-23 03:14:38,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:38,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:38,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:38,078 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:38,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:38,090 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:38,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:38,103 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 2 times [2022-11-23 03:14:38,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:38,103 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653117407] [2022-11-23 03:14:38,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:38,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:38,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:38,108 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:38,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:38,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:38,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:38,128 INFO L85 PathProgramCache]: Analyzing trace with hash -1571618174, now seen corresponding path program 1 times [2022-11-23 03:14:38,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:38,128 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [979985576] [2022-11-23 03:14:38,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:38,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:38,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:38,622 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-23 03:14:38,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:38,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [979985576] [2022-11-23 03:14:38,622 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [979985576] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:14:38,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1543596270] [2022-11-23 03:14:38,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:38,623 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:14:38,623 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:38,635 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:14:38,659 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-23 03:14:38,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:38,715 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-23 03:14:38,717 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:38,771 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-23 03:14:38,772 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-23 03:14:38,822 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:38,890 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:38,957 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:38,982 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:39,019 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:39,261 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-11-23 03:14:39,288 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-23 03:14:39,288 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:14:39,618 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-11-23 03:14:39,619 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1543596270] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:14:39,619 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:14:39,619 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 7] total 25 [2022-11-23 03:14:39,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894096138] [2022-11-23 03:14:39,620 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:14:39,700 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:39,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-23 03:14:39,701 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=610, Unknown=8, NotChecked=0, Total=702 [2022-11-23 03:14:39,701 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 27 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:40,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:40,685 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-11-23 03:14:40,685 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-11-23 03:14:40,686 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 23 [2022-11-23 03:14:40,686 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-11-23 03:14:40,687 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-11-23 03:14:40,687 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-11-23 03:14:40,687 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-11-23 03:14:40,687 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:40,687 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-11-23 03:14:40,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-11-23 03:14:40,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 31. [2022-11-23 03:14:40,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 30 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:40,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 36 transitions. [2022-11-23 03:14:40,689 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-11-23 03:14:40,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-23 03:14:40,693 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-11-23 03:14:40,695 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-23 03:14:40,695 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 36 transitions. [2022-11-23 03:14:40,695 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:40,695 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:40,696 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:40,696 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:14:40,697 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:14:40,697 INFO L748 eck$LassoCheckResult]: Stem: 985#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 986#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 987#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 988#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 989#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 990#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1010#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1009#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1008#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1007#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1006#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1005#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1004#L44-3 assume !(main_~i~1#1 >= 0); 991#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 992#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1001#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1002#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1013#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1012#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1003#L32-4 [2022-11-23 03:14:40,697 INFO L750 eck$LassoCheckResult]: Loop: 1003#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 983#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 984#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1000#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1003#L32-4 [2022-11-23 03:14:40,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:40,698 INFO L85 PathProgramCache]: Analyzing trace with hash -1574718017, now seen corresponding path program 1 times [2022-11-23 03:14:40,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:40,698 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472699909] [2022-11-23 03:14:40,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:40,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:40,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:40,765 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-23 03:14:40,765 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:40,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1472699909] [2022-11-23 03:14:40,766 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1472699909] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:14:40,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1606988744] [2022-11-23 03:14:40,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:40,766 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:14:40,767 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:40,770 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:14:40,795 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-23 03:14:40,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:40,851 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-23 03:14:40,852 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:40,913 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-23 03:14:40,913 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:14:40,971 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-23 03:14:40,971 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1606988744] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:14:40,972 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:14:40,972 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 11 [2022-11-23 03:14:40,972 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464939021] [2022-11-23 03:14:40,972 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:14:40,973 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:14:40,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:40,973 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 5 times [2022-11-23 03:14:40,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:40,973 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507068988] [2022-11-23 03:14:40,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:40,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:40,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:40,980 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:40,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:40,983 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:41,085 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:41,085 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-23 03:14:41,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2022-11-23 03:14:41,086 INFO L87 Difference]: Start difference. First operand 31 states and 36 transitions. cyclomatic complexity: 8 Second operand has 13 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 12 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:41,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:41,283 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-11-23 03:14:41,283 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-11-23 03:14:41,286 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2022-11-23 03:14:41,288 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-11-23 03:14:41,288 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-11-23 03:14:41,289 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-11-23 03:14:41,289 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-11-23 03:14:41,293 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:41,293 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-11-23 03:14:41,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-11-23 03:14:41,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2022-11-23 03:14:41,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:41,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2022-11-23 03:14:41,298 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-11-23 03:14:41,298 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-23 03:14:41,299 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-11-23 03:14:41,299 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-23 03:14:41,299 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2022-11-23 03:14:41,300 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-23 03:14:41,300 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:41,300 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:41,300 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2022-11-23 03:14:41,300 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-23 03:14:41,301 INFO L748 eck$LassoCheckResult]: Stem: 1207#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1208#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1209#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1210#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1211#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1212#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1239#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1237#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1234#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1232#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1231#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1228#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1227#L44-3 assume !(main_~i~1#1 >= 0); 1213#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1214#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1249#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1248#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1247#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1246#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1245#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1244#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1243#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1242#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1241#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1240#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1236#L33 [2022-11-23 03:14:41,301 INFO L750 eck$LassoCheckResult]: Loop: 1236#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1238#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1235#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1236#L33 [2022-11-23 03:14:41,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:41,301 INFO L85 PathProgramCache]: Analyzing trace with hash 649240641, now seen corresponding path program 1 times [2022-11-23 03:14:41,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:41,302 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029658867] [2022-11-23 03:14:41,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:41,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:41,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,317 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:41,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,331 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:41,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:41,332 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 3 times [2022-11-23 03:14:41,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:41,332 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261777410] [2022-11-23 03:14:41,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:41,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:41,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,336 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:41,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,339 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:41,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:41,339 INFO L85 PathProgramCache]: Analyzing trace with hash 1290237019, now seen corresponding path program 2 times [2022-11-23 03:14:41,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:41,340 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952189889] [2022-11-23 03:14:41,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:41,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:41,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:41,508 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-23 03:14:41,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:41,508 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952189889] [2022-11-23 03:14:41,508 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1952189889] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 03:14:41,508 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 03:14:41,508 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-23 03:14:41,509 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518626930] [2022-11-23 03:14:41,509 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 03:14:41,596 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:14:41,596 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-23 03:14:41,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-11-23 03:14:41,597 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 12 Second operand has 9 states, 8 states have (on average 2.5) internal successors, (20), 8 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:41,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:14:41,697 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2022-11-23 03:14:41,697 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 53 transitions. [2022-11-23 03:14:41,697 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:41,698 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 53 transitions. [2022-11-23 03:14:41,698 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2022-11-23 03:14:41,698 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2022-11-23 03:14:41,698 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 53 transitions. [2022-11-23 03:14:41,698 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:14:41,698 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-11-23 03:14:41,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 53 transitions. [2022-11-23 03:14:41,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-11-23 03:14:41,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1521739130434783) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:14:41,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2022-11-23 03:14:41,701 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-11-23 03:14:41,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-23 03:14:41,705 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-11-23 03:14:41,706 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-23 03:14:41,706 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 53 transitions. [2022-11-23 03:14:41,707 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-23 03:14:41,707 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:14:41,707 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:14:41,708 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:14:41,709 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-23 03:14:41,709 INFO L748 eck$LassoCheckResult]: Stem: 1325#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1326#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1327#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1328#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1329#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1330#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1356#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1355#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1353#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1351#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1349#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1345#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1344#L44-3 assume !(main_~i~1#1 >= 0); 1331#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1332#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1343#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1368#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1340#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1341#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1337#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1338#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1367#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1366#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1365#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1364#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1363#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1362#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1361#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1342#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1323#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1324#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1360#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1359#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1358#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1357#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1352#L33 [2022-11-23 03:14:41,709 INFO L750 eck$LassoCheckResult]: Loop: 1352#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1354#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1347#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1352#L33 [2022-11-23 03:14:41,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:41,710 INFO L85 PathProgramCache]: Analyzing trace with hash -264183975, now seen corresponding path program 1 times [2022-11-23 03:14:41,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:41,711 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105793338] [2022-11-23 03:14:41,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:41,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:41,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:41,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,782 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:41,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:41,783 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 4 times [2022-11-23 03:14:41,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:41,783 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526125555] [2022-11-23 03:14:41,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:41,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:41,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,791 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:14:41,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:14:41,801 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:14:41,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:14:41,802 INFO L85 PathProgramCache]: Analyzing trace with hash -1924678077, now seen corresponding path program 1 times [2022-11-23 03:14:41,802 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:14:41,802 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995565435] [2022-11-23 03:14:41,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:41,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:14:41,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:42,810 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-23 03:14:42,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:14:42,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995565435] [2022-11-23 03:14:42,810 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995565435] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:14:42,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2000511913] [2022-11-23 03:14:42,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:14:42,811 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:14:42,811 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:14:42,819 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:14:42,827 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-23 03:14:42,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:14:42,923 INFO L263 TraceCheckSpWp]: Trace formula consists of 237 conjuncts, 50 conjunts are in the unsatisfiable core [2022-11-23 03:14:42,926 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:14:42,980 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-23 03:14:42,981 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-23 03:14:43,032 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:43,091 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:43,152 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:43,177 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:43,223 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:14:43,852 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:14:43,854 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-23 03:14:43,855 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:14:43,856 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:14:43,861 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-11-23 03:14:44,271 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-23 03:14:44,271 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-11-23 03:14:44,367 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 66 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-23 03:14:44,367 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:15:22,365 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 25 proven. 41 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-11-23 03:15:22,365 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2000511913] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:15:22,366 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:15:22,366 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 19, 17] total 46 [2022-11-23 03:15:22,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508223485] [2022-11-23 03:15:22,366 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:15:22,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:15:22,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-11-23 03:15:22,474 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=198, Invalid=1959, Unknown=5, NotChecked=0, Total=2162 [2022-11-23 03:15:22,475 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. cyclomatic complexity: 10 Second operand has 47 states, 47 states have (on average 1.8085106382978724) internal successors, (85), 46 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:15:46,763 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 6.49s for a HTC check with result VALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-23 03:15:48,448 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.66s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-23 03:15:55,974 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 7.47s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-23 03:16:56,904 WARN L233 SmtUtils]: Spent 1.00m on a formula simplification that was a NOOP. DAG size: 49 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:16:59,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:16:59,200 INFO L93 Difference]: Finished difference Result 100 states and 121 transitions. [2022-11-23 03:16:59,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 121 transitions. [2022-11-23 03:16:59,201 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 30 [2022-11-23 03:16:59,203 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 121 transitions. [2022-11-23 03:16:59,203 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 90 [2022-11-23 03:16:59,203 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 90 [2022-11-23 03:16:59,204 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 121 transitions. [2022-11-23 03:16:59,204 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:16:59,204 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 121 transitions. [2022-11-23 03:16:59,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 121 transitions. [2022-11-23 03:16:59,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 71. [2022-11-23 03:16:59,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 71 states have (on average 1.1971830985915493) internal successors, (85), 70 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:16:59,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 85 transitions. [2022-11-23 03:16:59,210 INFO L240 hiAutomatonCegarLoop]: Abstraction has 71 states and 85 transitions. [2022-11-23 03:16:59,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-11-23 03:16:59,212 INFO L428 stractBuchiCegarLoop]: Abstraction has 71 states and 85 transitions. [2022-11-23 03:16:59,212 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-23 03:16:59,212 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71 states and 85 transitions. [2022-11-23 03:16:59,213 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-23 03:16:59,213 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:16:59,213 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:16:59,214 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:16:59,214 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-23 03:16:59,214 INFO L748 eck$LassoCheckResult]: Stem: 1815#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1816#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1817#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1818#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1819#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1820#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1844#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1843#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1842#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1841#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1840#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1839#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1838#L44-3 assume !(main_~i~1#1 >= 0); 1821#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1822#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1866#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1865#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1864#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1863#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1862#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1861#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1860#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1859#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1858#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1857#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1855#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1856#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1851#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1852#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1813#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1814#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1869#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1870#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1873#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1832#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1833#L33 [2022-11-23 03:16:59,215 INFO L750 eck$LassoCheckResult]: Loop: 1833#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1828#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1846#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1833#L33 [2022-11-23 03:16:59,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:16:59,215 INFO L85 PathProgramCache]: Analyzing trace with hash 128843035, now seen corresponding path program 2 times [2022-11-23 03:16:59,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:16:59,216 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [729952088] [2022-11-23 03:16:59,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:16:59,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:16:59,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:17:00,268 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-23 03:17:00,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:17:00,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [729952088] [2022-11-23 03:17:00,269 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [729952088] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:17:00,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1733741629] [2022-11-23 03:17:00,269 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 03:17:00,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:17:00,269 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:17:00,273 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:17:00,294 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-23 03:17:00,365 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 03:17:00,366 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:17:00,367 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 31 conjunts are in the unsatisfiable core [2022-11-23 03:17:00,370 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:17:00,437 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-23 03:17:00,437 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-23 03:17:00,507 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:00,543 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:00,584 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:00,615 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:00,653 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:01,377 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-23 03:17:01,378 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-11-23 03:17:01,474 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-23 03:17:01,474 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:17:14,575 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-11-23 03:17:14,575 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1733741629] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:17:14,575 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:17:14,575 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 35 [2022-11-23 03:17:14,575 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041859110] [2022-11-23 03:17:14,575 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:17:14,576 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:17:14,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:14,576 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 5 times [2022-11-23 03:17:14,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:14,576 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574706721] [2022-11-23 03:17:14,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:14,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:14,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:14,580 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:14,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:14,584 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:14,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:17:14,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-23 03:17:14,715 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=1137, Unknown=2, NotChecked=0, Total=1260 [2022-11-23 03:17:14,715 INFO L87 Difference]: Start difference. First operand 71 states and 85 transitions. cyclomatic complexity: 18 Second operand has 36 states, 36 states have (on average 1.8611111111111112) internal successors, (67), 35 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:16,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:17:16,419 INFO L93 Difference]: Finished difference Result 64 states and 76 transitions. [2022-11-23 03:17:16,419 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 64 states and 76 transitions. [2022-11-23 03:17:16,419 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2022-11-23 03:17:16,420 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 64 states to 64 states and 76 transitions. [2022-11-23 03:17:16,420 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2022-11-23 03:17:16,420 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54 [2022-11-23 03:17:16,420 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 76 transitions. [2022-11-23 03:17:16,421 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:17:16,421 INFO L218 hiAutomatonCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-11-23 03:17:16,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 76 transitions. [2022-11-23 03:17:16,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2022-11-23 03:17:16,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.1935483870967742) internal successors, (74), 61 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:16,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 74 transitions. [2022-11-23 03:17:16,424 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 74 transitions. [2022-11-23 03:17:16,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-23 03:17:16,431 INFO L428 stractBuchiCegarLoop]: Abstraction has 62 states and 74 transitions. [2022-11-23 03:17:16,431 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-23 03:17:16,431 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 74 transitions. [2022-11-23 03:17:16,432 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-23 03:17:16,432 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:17:16,432 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:17:16,433 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:17:16,433 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-23 03:17:16,433 INFO L748 eck$LassoCheckResult]: Stem: 2217#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2218#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2219#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2220#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2221#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2222#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2247#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2246#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2245#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2244#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2243#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2240#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2239#L44-3 assume !(main_~i~1#1 >= 0); 2223#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2224#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2263#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2262#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2261#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2260#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2259#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2258#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2257#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2256#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2255#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2254#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2253#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2252#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2251#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2250#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2215#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2216#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2238#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2267#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2268#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2276#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2229#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2230#L32-2 [2022-11-23 03:17:16,433 INFO L750 eck$LassoCheckResult]: Loop: 2230#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2242#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2269#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2230#L32-2 [2022-11-23 03:17:16,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:16,439 INFO L85 PathProgramCache]: Analyzing trace with hash 400231404, now seen corresponding path program 2 times [2022-11-23 03:17:16,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:16,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960956304] [2022-11-23 03:17:16,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:16,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:16,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:16,469 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:16,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:16,497 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:16,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:16,498 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 6 times [2022-11-23 03:17:16,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:16,499 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753397706] [2022-11-23 03:17:16,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:16,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:16,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:16,504 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:16,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:16,513 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:16,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:16,515 INFO L85 PathProgramCache]: Analyzing trace with hash 464581374, now seen corresponding path program 3 times [2022-11-23 03:17:16,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:16,515 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290428103] [2022-11-23 03:17:16,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:16,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:16,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:17:17,775 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-23 03:17:17,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:17:17,775 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [290428103] [2022-11-23 03:17:17,775 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [290428103] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:17:17,776 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1551259985] [2022-11-23 03:17:17,776 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 03:17:17,776 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:17:17,776 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:17:17,783 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:17:17,807 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-23 03:17:17,918 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-11-23 03:17:17,918 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:17:17,920 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-23 03:17:17,922 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:17:18,003 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-23 03:17:18,003 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-23 03:17:18,068 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:18,097 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:18,138 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:18,169 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:18,220 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:17:18,708 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:18,709 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:18,711 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:18,713 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:18,736 INFO L321 Elim1Store]: treesize reduction 21, result has 47.5 percent of original size [2022-11-23 03:17:18,736 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 55 [2022-11-23 03:17:19,142 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:19,143 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-23 03:17:19,144 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2022-11-23 03:17:19,196 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-23 03:17:19,196 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:17:19,886 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_352 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_352) |c_~#array~0.base|))) (< (select .cse0 (+ |c_~#array~0.offset| 4)) (+ (select .cse0 (+ 16 |c_~#array~0.offset|)) 1)))) is different from false [2022-11-23 03:17:20,012 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2022-11-23 03:17:20,015 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1551259985] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:17:20,015 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:17:20,015 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10, 10] total 33 [2022-11-23 03:17:20,016 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [802410767] [2022-11-23 03:17:20,016 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:17:20,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:17:20,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-23 03:17:20,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=1014, Unknown=1, NotChecked=64, Total=1190 [2022-11-23 03:17:20,126 INFO L87 Difference]: Start difference. First operand 62 states and 74 transitions. cyclomatic complexity: 16 Second operand has 35 states, 34 states have (on average 2.1176470588235294) internal successors, (72), 34 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:23,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:17:23,709 INFO L93 Difference]: Finished difference Result 114 states and 138 transitions. [2022-11-23 03:17:23,709 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 138 transitions. [2022-11-23 03:17:23,710 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 42 [2022-11-23 03:17:23,711 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 138 transitions. [2022-11-23 03:17:23,711 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 104 [2022-11-23 03:17:23,711 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 104 [2022-11-23 03:17:23,712 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 138 transitions. [2022-11-23 03:17:23,712 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:17:23,712 INFO L218 hiAutomatonCegarLoop]: Abstraction has 114 states and 138 transitions. [2022-11-23 03:17:23,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 138 transitions. [2022-11-23 03:17:23,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 64. [2022-11-23 03:17:23,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.1875) internal successors, (76), 63 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:23,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 76 transitions. [2022-11-23 03:17:23,717 INFO L240 hiAutomatonCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-11-23 03:17:23,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-11-23 03:17:23,718 INFO L428 stractBuchiCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-11-23 03:17:23,718 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-11-23 03:17:23,718 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 76 transitions. [2022-11-23 03:17:23,719 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-11-23 03:17:23,719 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:17:23,719 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:17:23,720 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:17:23,720 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:17:23,720 INFO L748 eck$LassoCheckResult]: Stem: 2716#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2717#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2718#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2719#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2720#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2721#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2743#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2742#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2741#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2740#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2739#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2738#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2737#L44-3 assume !(main_~i~1#1 >= 0); 2722#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2723#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2758#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2757#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2756#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2755#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2754#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2753#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2752#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2751#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2750#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2749#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2748#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2747#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2746#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2745#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2744#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2735#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2736#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2762#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2763#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2732#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2733#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2777#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2776#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2734#L32-4 [2022-11-23 03:17:23,721 INFO L750 eck$LassoCheckResult]: Loop: 2734#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2714#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2715#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2731#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2734#L32-4 [2022-11-23 03:17:23,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:23,721 INFO L85 PathProgramCache]: Analyzing trace with hash -1981934459, now seen corresponding path program 4 times [2022-11-23 03:17:23,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:23,722 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995577836] [2022-11-23 03:17:23,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:23,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:23,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:17:23,862 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-23 03:17:23,863 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:17:23,863 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995577836] [2022-11-23 03:17:23,863 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995577836] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:17:23,863 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [11626709] [2022-11-23 03:17:23,863 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-23 03:17:23,863 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:17:23,863 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:17:23,870 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:17:23,872 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-23 03:17:23,962 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-23 03:17:23,962 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:17:23,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-23 03:17:23,965 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:17:24,108 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 13 proven. 46 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-23 03:17:24,108 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:17:24,259 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 13 proven. 46 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-11-23 03:17:24,259 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [11626709] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:17:24,259 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:17:24,259 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 10, 10] total 12 [2022-11-23 03:17:24,260 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89147344] [2022-11-23 03:17:24,260 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:17:24,260 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:17:24,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:24,260 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 6 times [2022-11-23 03:17:24,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:24,261 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629089760] [2022-11-23 03:17:24,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:24,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:24,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:24,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:24,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:24,270 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:24,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:17:24,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-23 03:17:24,429 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2022-11-23 03:17:24,429 INFO L87 Difference]: Start difference. First operand 64 states and 76 transitions. cyclomatic complexity: 16 Second operand has 13 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 13 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:24,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:17:24,892 INFO L93 Difference]: Finished difference Result 121 states and 146 transitions. [2022-11-23 03:17:24,892 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 146 transitions. [2022-11-23 03:17:24,893 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 54 [2022-11-23 03:17:24,894 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 121 states and 146 transitions. [2022-11-23 03:17:24,894 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2022-11-23 03:17:24,894 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2022-11-23 03:17:24,895 INFO L73 IsDeterministic]: Start isDeterministic. Operand 121 states and 146 transitions. [2022-11-23 03:17:24,895 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:17:24,895 INFO L218 hiAutomatonCegarLoop]: Abstraction has 121 states and 146 transitions. [2022-11-23 03:17:24,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states and 146 transitions. [2022-11-23 03:17:24,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 97. [2022-11-23 03:17:24,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.2268041237113403) internal successors, (119), 96 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:24,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 119 transitions. [2022-11-23 03:17:24,900 INFO L240 hiAutomatonCegarLoop]: Abstraction has 97 states and 119 transitions. [2022-11-23 03:17:24,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-23 03:17:24,909 INFO L428 stractBuchiCegarLoop]: Abstraction has 97 states and 119 transitions. [2022-11-23 03:17:24,909 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2022-11-23 03:17:24,910 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 119 transitions. [2022-11-23 03:17:24,910 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 33 [2022-11-23 03:17:24,911 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:17:24,911 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:17:24,912 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:17:24,912 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 1, 1, 1, 1] [2022-11-23 03:17:24,912 INFO L748 eck$LassoCheckResult]: Stem: 3173#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3174#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3175#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3176#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3177#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3178#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3200#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3199#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3198#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3197#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3196#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3195#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3194#L44-3 assume !(main_~i~1#1 >= 0); 3179#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3180#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3224#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3223#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3222#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3221#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3220#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3219#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3218#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3217#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3216#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3215#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3213#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3214#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3207#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3208#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3203#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3204#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3190#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3185#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3187#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3245#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3246#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3237#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3238#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3232#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3231#L32-2 [2022-11-23 03:17:24,912 INFO L750 eck$LassoCheckResult]: Loop: 3231#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3226#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3191#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3171#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3172#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3256#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3251#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3247#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3248#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3263#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3265#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3264#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3230#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3231#L32-2 [2022-11-23 03:17:24,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:24,913 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 3 times [2022-11-23 03:17:24,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:24,913 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447122450] [2022-11-23 03:17:24,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:24,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:24,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:24,935 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:24,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:24,968 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:24,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:24,969 INFO L85 PathProgramCache]: Analyzing trace with hash 1952620257, now seen corresponding path program 1 times [2022-11-23 03:17:24,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:24,969 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858034486] [2022-11-23 03:17:24,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:24,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:24,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:24,996 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:25,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:25,003 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:25,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:25,003 INFO L85 PathProgramCache]: Analyzing trace with hash 2067186242, now seen corresponding path program 5 times [2022-11-23 03:17:25,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:25,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [822831829] [2022-11-23 03:17:25,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:25,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:25,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:17:25,191 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 15 proven. 103 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-23 03:17:25,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:17:25,191 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [822831829] [2022-11-23 03:17:25,191 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [822831829] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:17:25,191 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2030347461] [2022-11-23 03:17:25,191 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-23 03:17:25,192 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:17:25,192 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:17:25,199 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:17:25,223 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-23 03:17:25,476 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-11-23 03:17:25,476 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:17:25,479 INFO L263 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-23 03:17:25,481 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:17:25,942 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 37 proven. 95 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-23 03:17:25,942 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:17:26,197 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 75 proven. 57 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-11-23 03:17:26,197 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2030347461] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:17:26,198 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:17:26,198 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9, 9] total 19 [2022-11-23 03:17:26,198 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243465319] [2022-11-23 03:17:26,198 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:17:26,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:17:26,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-11-23 03:17:26,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2022-11-23 03:17:26,795 INFO L87 Difference]: Start difference. First operand 97 states and 119 transitions. cyclomatic complexity: 26 Second operand has 20 states, 20 states have (on average 3.9) internal successors, (78), 19 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:27,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:17:27,333 INFO L93 Difference]: Finished difference Result 163 states and 192 transitions. [2022-11-23 03:17:27,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 163 states and 192 transitions. [2022-11-23 03:17:27,335 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 64 [2022-11-23 03:17:27,336 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 163 states to 134 states and 158 transitions. [2022-11-23 03:17:27,337 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 124 [2022-11-23 03:17:27,337 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 124 [2022-11-23 03:17:27,337 INFO L73 IsDeterministic]: Start isDeterministic. Operand 134 states and 158 transitions. [2022-11-23 03:17:27,337 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:17:27,338 INFO L218 hiAutomatonCegarLoop]: Abstraction has 134 states and 158 transitions. [2022-11-23 03:17:27,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states and 158 transitions. [2022-11-23 03:17:27,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 75. [2022-11-23 03:17:27,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 74 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:27,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 89 transitions. [2022-11-23 03:17:27,341 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 89 transitions. [2022-11-23 03:17:27,351 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-23 03:17:27,351 INFO L428 stractBuchiCegarLoop]: Abstraction has 75 states and 89 transitions. [2022-11-23 03:17:27,352 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2022-11-23 03:17:27,352 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 89 transitions. [2022-11-23 03:17:27,353 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 17 [2022-11-23 03:17:27,353 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:17:27,353 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:17:27,354 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:17:27,354 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-23 03:17:27,354 INFO L748 eck$LassoCheckResult]: Stem: 3800#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3801#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3802#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3803#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3804#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3805#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3819#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3827#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3826#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3825#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3824#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3823#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3822#L44-3 assume !(main_~i~1#1 >= 0); 3806#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3807#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3844#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3843#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3842#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3841#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3840#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3839#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3838#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3837#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3836#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3835#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3834#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3833#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3832#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3820#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3798#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3799#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3821#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3856#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3855#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3852#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3849#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3850#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3817#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3818#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3853#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3854#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3848#L33 [2022-11-23 03:17:27,354 INFO L750 eck$LassoCheckResult]: Loop: 3848#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3846#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3847#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3848#L33 [2022-11-23 03:17:27,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:27,355 INFO L85 PathProgramCache]: Analyzing trace with hash -893953577, now seen corresponding path program 6 times [2022-11-23 03:17:27,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:27,355 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209637878] [2022-11-23 03:17:27,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:27,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:27,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:17:27,552 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 12 proven. 45 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-23 03:17:27,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:17:27,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209637878] [2022-11-23 03:17:27,552 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [209637878] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:17:27,552 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [291885162] [2022-11-23 03:17:27,552 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-23 03:17:27,552 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:17:27,552 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:17:27,559 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:17:27,588 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-23 03:17:27,691 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-11-23 03:17:27,691 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:17:27,693 INFO L263 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-23 03:17:27,694 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:17:28,006 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 13 proven. 44 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-23 03:17:28,007 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:17:28,162 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 13 proven. 44 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-23 03:17:28,162 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [291885162] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:17:28,162 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:17:28,162 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 14 [2022-11-23 03:17:28,162 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906559923] [2022-11-23 03:17:28,163 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:17:28,163 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:17:28,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:28,163 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 7 times [2022-11-23 03:17:28,163 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:28,163 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432519436] [2022-11-23 03:17:28,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:28,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:28,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:28,167 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:28,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:28,170 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:28,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:17:28,284 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-23 03:17:28,285 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2022-11-23 03:17:28,285 INFO L87 Difference]: Start difference. First operand 75 states and 89 transitions. cyclomatic complexity: 18 Second operand has 16 states, 15 states have (on average 3.4) internal successors, (51), 15 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:28,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:17:28,549 INFO L93 Difference]: Finished difference Result 96 states and 110 transitions. [2022-11-23 03:17:28,549 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 110 transitions. [2022-11-23 03:17:28,550 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 32 [2022-11-23 03:17:28,551 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 96 states and 110 transitions. [2022-11-23 03:17:28,551 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 86 [2022-11-23 03:17:28,551 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 86 [2022-11-23 03:17:28,551 INFO L73 IsDeterministic]: Start isDeterministic. Operand 96 states and 110 transitions. [2022-11-23 03:17:28,552 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:17:28,552 INFO L218 hiAutomatonCegarLoop]: Abstraction has 96 states and 110 transitions. [2022-11-23 03:17:28,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states and 110 transitions. [2022-11-23 03:17:28,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 69. [2022-11-23 03:17:28,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.1594202898550725) internal successors, (80), 68 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:17:28,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 80 transitions. [2022-11-23 03:17:28,555 INFO L240 hiAutomatonCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-11-23 03:17:28,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-23 03:17:28,564 INFO L428 stractBuchiCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-11-23 03:17:28,564 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2022-11-23 03:17:28,565 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 80 transitions. [2022-11-23 03:17:28,565 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-23 03:17:28,565 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:17:28,565 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:17:28,566 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:17:28,566 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 1, 1, 1, 1] [2022-11-23 03:17:28,567 INFO L748 eck$LassoCheckResult]: Stem: 4248#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4249#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4250#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4251#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4252#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4253#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4274#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4273#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4272#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4271#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4270#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4269#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4268#L44-3 assume !(main_~i~1#1 >= 0); 4254#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4255#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4290#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4289#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4288#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4287#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4286#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4285#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4284#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4283#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4282#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4281#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4280#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4279#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4278#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4277#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4276#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4266#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4267#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4293#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4291#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4292#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4295#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4296#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4264#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4260#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4261#L32-2 [2022-11-23 03:17:28,567 INFO L750 eck$LassoCheckResult]: Loop: 4261#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4263#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4265#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4246#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4247#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4275#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4312#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4313#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4314#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4301#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4261#L32-2 [2022-11-23 03:17:28,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:28,568 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 4 times [2022-11-23 03:17:28,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:28,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [525281095] [2022-11-23 03:17:28,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:28,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:28,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:28,605 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:28,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:28,625 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:28,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:28,626 INFO L85 PathProgramCache]: Analyzing trace with hash 372024041, now seen corresponding path program 2 times [2022-11-23 03:17:28,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:28,626 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147854887] [2022-11-23 03:17:28,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:28,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:28,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:28,634 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:17:28,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:17:28,641 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:17:28,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:17:28,642 INFO L85 PathProgramCache]: Analyzing trace with hash -693820632, now seen corresponding path program 7 times [2022-11-23 03:17:28,642 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:17:28,643 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182390161] [2022-11-23 03:17:28,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:17:28,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:17:28,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:17:31,063 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-11-23 03:17:31,063 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:17:31,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [182390161] [2022-11-23 03:17:31,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [182390161] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:17:31,063 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1968955270] [2022-11-23 03:17:31,063 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-23 03:17:31,063 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:17:31,063 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:17:31,068 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:17:31,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-11-23 03:17:31,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:17:31,188 INFO L263 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 73 conjunts are in the unsatisfiable core [2022-11-23 03:17:31,191 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:17:31,283 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-23 03:17:31,283 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-23 03:17:31,368 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:17:31,470 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:17:31,588 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:17:31,694 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:17:31,738 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-11-23 03:17:32,794 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-23 03:17:32,796 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:32,797 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:32,799 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:32,800 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-11-23 03:17:33,675 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:33,676 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:33,677 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:17:33,678 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-23 03:17:33,680 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 42 [2022-11-23 03:17:34,358 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 18 [2022-11-23 03:17:34,435 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-23 03:17:34,435 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:17:37,591 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_531 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_531) |c_~#array~0.base|))) (let ((.cse2 (select .cse0 (+ |c_~#array~0.offset| 4))) (.cse1 (select .cse0 (+ |c_~#array~0.offset| 12))) (.cse3 (select .cse0 (+ 16 |c_~#array~0.offset|)))) (or (< (select .cse0 (+ |c_~#array~0.offset| 8)) (+ 1 .cse1)) (< .cse2 (select .cse0 |c_~#array~0.offset|)) (< .cse3 .cse2) (< .cse1 (+ .cse3 1)))))) is different from false [2022-11-23 03:17:37,921 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 14 proven. 95 refuted. 0 times theorem prover too weak. 31 trivial. 9 not checked. [2022-11-23 03:17:37,921 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1968955270] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:17:37,921 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:17:37,921 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 27, 21] total 67 [2022-11-23 03:17:37,921 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031706810] [2022-11-23 03:17:37,921 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:17:38,361 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:17:38,362 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2022-11-23 03:17:38,363 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=475, Invalid=4084, Unknown=1, NotChecked=132, Total=4692 [2022-11-23 03:17:38,364 INFO L87 Difference]: Start difference. First operand 69 states and 80 transitions. cyclomatic complexity: 14 Second operand has 69 states, 68 states have (on average 1.7352941176470589) internal successors, (118), 68 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:18:21,022 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-23 03:18:24,543 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.77s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-11-23 03:18:24,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:18:24,711 INFO L93 Difference]: Finished difference Result 182 states and 215 transitions. [2022-11-23 03:18:24,711 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 182 states and 215 transitions. [2022-11-23 03:18:24,712 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 40 [2022-11-23 03:18:24,713 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 182 states to 182 states and 215 transitions. [2022-11-23 03:18:24,713 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 172 [2022-11-23 03:18:24,714 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 172 [2022-11-23 03:18:24,714 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 215 transitions. [2022-11-23 03:18:24,714 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:18:24,714 INFO L218 hiAutomatonCegarLoop]: Abstraction has 182 states and 215 transitions. [2022-11-23 03:18:24,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 215 transitions. [2022-11-23 03:18:24,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 87. [2022-11-23 03:18:24,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 87 states have (on average 1.1954022988505748) internal successors, (104), 86 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:18:24,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 104 transitions. [2022-11-23 03:18:24,737 INFO L240 hiAutomatonCegarLoop]: Abstraction has 87 states and 104 transitions. [2022-11-23 03:18:24,738 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-11-23 03:18:24,739 INFO L428 stractBuchiCegarLoop]: Abstraction has 87 states and 104 transitions. [2022-11-23 03:18:24,739 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2022-11-23 03:18:24,739 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 87 states and 104 transitions. [2022-11-23 03:18:24,740 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-23 03:18:24,740 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:18:24,740 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:18:24,741 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 03:18:24,741 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:18:24,741 INFO L748 eck$LassoCheckResult]: Stem: 4980#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4981#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4982#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4983#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4984#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4985#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4999#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5008#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5007#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5006#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5005#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5004#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5003#L44-3 assume !(main_~i~1#1 >= 0); 4986#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4987#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5024#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5023#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5022#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5021#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5020#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5019#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5018#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5017#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5016#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5015#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5014#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5013#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5012#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5011#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5010#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5001#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5002#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5029#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 5027#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5028#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5031#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5032#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5025#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5026#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5057#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5056#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5055#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5054#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5053#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 4994#L26 assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 4991#L49-3 [2022-11-23 03:18:24,742 INFO L750 eck$LassoCheckResult]: Loop: 4991#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 4988#L15 assume !(0 == __VERIFIER_assert_~cond#1); 4989#L15-2 assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 4990#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 4991#L49-3 [2022-11-23 03:18:24,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:18:24,742 INFO L85 PathProgramCache]: Analyzing trace with hash -1993302254, now seen corresponding path program 1 times [2022-11-23 03:18:24,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:18:24,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [789652174] [2022-11-23 03:18:24,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:18:24,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:18:24,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:18:24,873 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-23 03:18:24,873 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:18:24,873 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [789652174] [2022-11-23 03:18:24,873 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [789652174] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:18:24,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1616118036] [2022-11-23 03:18:24,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:18:24,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:18:24,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:18:24,878 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:18:24,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-23 03:18:24,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:18:24,993 INFO L263 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-23 03:18:24,994 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:18:25,229 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-23 03:18:25,230 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:18:25,380 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-11-23 03:18:25,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1616118036] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:18:25,380 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:18:25,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2022-11-23 03:18:25,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [535232007] [2022-11-23 03:18:25,381 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:18:25,381 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:18:25,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:18:25,381 INFO L85 PathProgramCache]: Analyzing trace with hash 2685258, now seen corresponding path program 1 times [2022-11-23 03:18:25,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:18:25,381 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912104757] [2022-11-23 03:18:25,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:18:25,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:18:25,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:18:25,386 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:18:25,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:18:25,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:18:25,488 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:18:25,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-11-23 03:18:25,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2022-11-23 03:18:25,488 INFO L87 Difference]: Start difference. First operand 87 states and 104 transitions. cyclomatic complexity: 20 Second operand has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 11 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:18:25,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:18:25,598 INFO L93 Difference]: Finished difference Result 105 states and 124 transitions. [2022-11-23 03:18:25,598 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 124 transitions. [2022-11-23 03:18:25,599 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-23 03:18:25,599 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 105 states and 124 transitions. [2022-11-23 03:18:25,600 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2022-11-23 03:18:25,600 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2022-11-23 03:18:25,600 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 124 transitions. [2022-11-23 03:18:25,600 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:18:25,600 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-11-23 03:18:25,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 124 transitions. [2022-11-23 03:18:25,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2022-11-23 03:18:25,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 105 states have (on average 1.180952380952381) internal successors, (124), 104 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:18:25,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 124 transitions. [2022-11-23 03:18:25,605 INFO L240 hiAutomatonCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-11-23 03:18:25,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-23 03:18:25,606 INFO L428 stractBuchiCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-11-23 03:18:25,606 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2022-11-23 03:18:25,606 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 124 transitions. [2022-11-23 03:18:25,607 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-23 03:18:25,607 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:18:25,607 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:18:25,608 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1] [2022-11-23 03:18:25,608 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:18:25,608 INFO L748 eck$LassoCheckResult]: Stem: 5455#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 5456#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 5457#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5458#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5459#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5460#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5488#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5487#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5486#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5484#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5482#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5478#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5477#L44-3 assume !(main_~i~1#1 >= 0); 5461#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 5462#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5472#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5473#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5556#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5555#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5554#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5553#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5552#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5550#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5548#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5546#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5544#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5542#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5540#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5474#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5475#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5537#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5536#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5534#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 5533#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5532#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5531#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5530#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5529#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5528#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5527#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5526#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5525#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5524#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5523#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5522#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5506#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5501#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5502#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5513#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5493#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5492#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5491#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5480#L32-3 [2022-11-23 03:18:25,609 INFO L750 eck$LassoCheckResult]: Loop: 5480#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5483#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5481#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5479#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5480#L32-3 [2022-11-23 03:18:25,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:18:25,609 INFO L85 PathProgramCache]: Analyzing trace with hash -1926449103, now seen corresponding path program 8 times [2022-11-23 03:18:25,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:18:25,609 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321106052] [2022-11-23 03:18:25,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:18:25,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:18:25,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:18:25,758 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-23 03:18:25,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:18:25,758 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321106052] [2022-11-23 03:18:25,759 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321106052] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:18:25,759 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1822051795] [2022-11-23 03:18:25,759 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 03:18:25,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:18:25,759 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:18:25,763 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:18:25,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-11-23 03:18:25,892 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 03:18:25,892 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:18:25,894 INFO L263 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-23 03:18:25,895 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:18:26,159 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-23 03:18:26,159 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:18:26,332 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-11-23 03:18:26,332 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1822051795] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:18:26,333 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:18:26,333 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2022-11-23 03:18:26,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219525349] [2022-11-23 03:18:26,333 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:18:26,333 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:18:26,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:18:26,333 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 7 times [2022-11-23 03:18:26,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:18:26,334 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90813937] [2022-11-23 03:18:26,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:18:26,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:18:26,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:18:26,337 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:18:26,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:18:26,341 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:18:26,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:18:26,490 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-23 03:18:26,491 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2022-11-23 03:18:26,491 INFO L87 Difference]: Start difference. First operand 105 states and 124 transitions. cyclomatic complexity: 22 Second operand has 14 states, 14 states have (on average 4.357142857142857) internal successors, (61), 13 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:18:26,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 03:18:26,786 INFO L93 Difference]: Finished difference Result 105 states and 118 transitions. [2022-11-23 03:18:26,786 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 118 transitions. [2022-11-23 03:18:26,787 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-23 03:18:26,787 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 105 states and 118 transitions. [2022-11-23 03:18:26,787 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2022-11-23 03:18:26,788 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2022-11-23 03:18:26,788 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 118 transitions. [2022-11-23 03:18:26,788 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-23 03:18:26,788 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-11-23 03:18:26,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 118 transitions. [2022-11-23 03:18:26,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2022-11-23 03:18:26,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 105 states have (on average 1.1238095238095238) internal successors, (118), 104 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:18:26,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 118 transitions. [2022-11-23 03:18:26,790 INFO L240 hiAutomatonCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-11-23 03:18:26,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-23 03:18:26,791 INFO L428 stractBuchiCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-11-23 03:18:26,792 INFO L335 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2022-11-23 03:18:26,792 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 118 transitions. [2022-11-23 03:18:26,792 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-11-23 03:18:26,793 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-23 03:18:26,793 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-23 03:18:26,793 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 8, 5, 5, 5, 4, 4, 4, 2, 1, 1, 1, 1] [2022-11-23 03:18:26,793 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-11-23 03:18:26,794 INFO L748 eck$LassoCheckResult]: Stem: 6006#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 6007#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6008#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6009#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6010#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6011#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6036#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6035#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6034#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6032#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6030#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6026#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6025#L44-3 assume !(main_~i~1#1 >= 0); 6012#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 6013#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6024#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6108#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6021#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6022#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6018#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6019#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6107#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6106#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6105#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6104#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6103#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6102#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6101#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6023#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6004#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6005#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6100#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6099#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 6097#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6095#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6093#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6091#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6089#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6087#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6085#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6083#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6081#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6079#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6077#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6064#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6065#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 6075#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6074#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6073#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6072#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6071#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6070#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6069#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6068#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6066#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6048#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6046#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6047#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6041#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6040#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6039#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6028#L32-3 [2022-11-23 03:18:26,794 INFO L750 eck$LassoCheckResult]: Loop: 6028#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6031#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6029#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6027#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6028#L32-3 [2022-11-23 03:18:26,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:18:26,794 INFO L85 PathProgramCache]: Analyzing trace with hash 308108643, now seen corresponding path program 9 times [2022-11-23 03:18:26,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:18:26,795 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1917360117] [2022-11-23 03:18:26,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:18:26,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:18:26,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 03:18:29,021 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 91 proven. 85 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2022-11-23 03:18:29,022 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 03:18:29,022 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1917360117] [2022-11-23 03:18:29,022 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1917360117] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 03:18:29,022 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [114407696] [2022-11-23 03:18:29,022 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 03:18:29,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 03:18:29,023 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 03:18:29,026 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 03:18:29,028 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88043a75-74f3-41f0-8fbf-7de55f58bca8/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-11-23 03:18:29,322 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2022-11-23 03:18:29,322 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 03:18:29,326 INFO L263 TraceCheckSpWp]: Trace formula consists of 350 conjuncts, 80 conjunts are in the unsatisfiable core [2022-11-23 03:18:29,329 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 03:18:29,404 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-23 03:18:29,404 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-23 03:18:29,476 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:18:29,523 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:18:29,553 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:18:29,596 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:18:29,627 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-23 03:18:30,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:18:30,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:18:30,206 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-11-23 03:18:31,105 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-23 03:18:31,107 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:18:31,197 INFO L321 Elim1Store]: treesize reduction 59, result has 61.2 percent of original size [2022-11-23 03:18:31,197 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 8 case distinctions, treesize of input 69 treesize of output 113 [2022-11-23 03:18:34,208 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 03:18:34,354 INFO L321 Elim1Store]: treesize reduction 178, result has 40.7 percent of original size [2022-11-23 03:18:34,355 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 14 case distinctions, treesize of input 132 treesize of output 194 [2022-11-23 03:18:35,599 INFO L321 Elim1Store]: treesize reduction 10, result has 71.4 percent of original size [2022-11-23 03:18:35,599 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 72 [2022-11-23 03:18:36,195 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 5 proven. 195 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-23 03:18:36,195 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 03:20:41,547 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_677 (Array Int Int)) (|v_ULTIMATE.start_SelectionSort_~lh~0#1_74| Int) (v_ArrVal_682 Int) (|v_ULTIMATE.start_SelectionSort_~i~0#1_183| Int) (|ULTIMATE.start_SelectionSort_~i~0#1| Int) (v_ArrVal_678 Int)) (let ((.cse6 (* |ULTIMATE.start_SelectionSort_~i~0#1| 4))) (let ((.cse3 (store (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_677) |c_~#array~0.base|) |c_~#array~0.offset| v_ArrVal_678)) (.cse5 (+ .cse6 |c_~#array~0.offset|)) (.cse0 (+ |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 3) c_~n~0) (< c_~n~0 .cse0) (let ((.cse2 (* |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (let ((.cse1 (let ((.cse4 (+ |c_~#array~0.offset| .cse2))) (store (store .cse3 .cse4 v_ArrVal_682) .cse5 (select .cse3 .cse4))))) (< (select .cse1 (+ |c_~#array~0.offset| .cse2 4)) (+ 1 (select .cse1 (+ (* |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 4) |c_~#array~0.offset|)))))) (not (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 1) c_~n~0)) (< (select .cse3 (+ .cse6 |c_~#array~0.offset| 4)) (select .cse3 .cse5)) (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 2) c_~n~0) (< .cse0 c_~n~0))))) is different from false [2022-11-23 03:20:42,314 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 16 proven. 165 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2022-11-23 03:20:42,314 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [114407696] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 03:20:42,314 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 03:20:42,314 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 30, 29] total 77 [2022-11-23 03:20:42,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365744393] [2022-11-23 03:20:42,314 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 03:20:42,314 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-23 03:20:42,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 03:20:42,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 8 times [2022-11-23 03:20:42,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 03:20:42,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785044497] [2022-11-23 03:20:42,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 03:20:42,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 03:20:42,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:20:42,320 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-23 03:20:42,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-23 03:20:42,323 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-23 03:20:42,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 03:20:42,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2022-11-23 03:20:42,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=755, Invalid=5092, Unknown=9, NotChecked=150, Total=6006 [2022-11-23 03:20:42,489 INFO L87 Difference]: Start difference. First operand 105 states and 118 transitions. cyclomatic complexity: 16 Second operand has 78 states, 78 states have (on average 1.705128205128205) internal successors, (133), 77 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 03:20:55,469 WARN L233 SmtUtils]: Spent 12.32s on a formula simplification. DAG size of input: 142 DAG size of output: 38 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:21:27,315 WARN L233 SmtUtils]: Spent 12.34s on a formula simplification. DAG size of input: 166 DAG size of output: 89 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:21:40,999 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 11.85s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:21:53,828 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:22:05,906 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:22:17,925 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:22:29,954 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:22:41,975 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:23:06,720 WARN L233 SmtUtils]: Spent 24.49s on a formula simplification. DAG size of input: 173 DAG size of output: 96 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:23:20,973 WARN L233 SmtUtils]: Spent 12.50s on a formula simplification. DAG size of input: 156 DAG size of output: 98 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:23:45,697 WARN L233 SmtUtils]: Spent 12.47s on a formula simplification. DAG size of input: 168 DAG size of output: 90 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:23:57,905 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:24:34,601 WARN L233 SmtUtils]: Spent 12.33s on a formula simplification. DAG size of input: 148 DAG size of output: 90 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:24:45,658 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 10.04s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:24:58,439 WARN L233 SmtUtils]: Spent 12.52s on a formula simplification. DAG size of input: 154 DAG size of output: 100 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:25:10,447 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:25:15,186 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.71s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:25:19,587 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.40s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:26:12,612 WARN L233 SmtUtils]: Spent 28.64s on a formula simplification. DAG size of input: 166 DAG size of output: 85 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:26:24,653 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:26:27,689 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.99s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:26:39,735 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:26:51,853 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:27:03,875 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:27:09,639 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 5.76s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:27:21,702 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-11-23 03:28:12,694 WARN L233 SmtUtils]: Spent 36.57s on a formula simplification. DAG size of input: 128 DAG size of output: 103 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:29:04,009 WARN L233 SmtUtils]: Spent 12.55s on a formula simplification. DAG size of input: 151 DAG size of output: 96 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 03:29:18,775 WARN L233 SmtUtils]: Spent 12.53s on a formula simplification. DAG size of input: 154 DAG size of output: 98 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)