./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety/20051113-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 4e7fbc69 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety/20051113-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2a43a02844acf962bfa6f77d0e1512c06ac1cc2fb3c3905e584a292a069b5426 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-4e7fbc6 [2022-11-23 02:13:56,292 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-23 02:13:56,294 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-23 02:13:56,336 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-23 02:13:56,337 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-23 02:13:56,340 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-23 02:13:56,343 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-23 02:13:56,346 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-23 02:13:56,348 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-23 02:13:56,353 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-23 02:13:56,354 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-23 02:13:56,355 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-23 02:13:56,356 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-23 02:13:56,357 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-23 02:13:56,358 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-23 02:13:56,359 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-23 02:13:56,360 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-23 02:13:56,361 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-23 02:13:56,365 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-23 02:13:56,373 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-23 02:13:56,376 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-23 02:13:56,379 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-23 02:13:56,381 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-23 02:13:56,383 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-23 02:13:56,393 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-23 02:13:56,394 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-23 02:13:56,394 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-23 02:13:56,396 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-23 02:13:56,397 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-23 02:13:56,398 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-23 02:13:56,398 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-23 02:13:56,399 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-23 02:13:56,401 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-23 02:13:56,402 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-23 02:13:56,403 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-23 02:13:56,403 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-23 02:13:56,404 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-23 02:13:56,406 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-23 02:13:56,406 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-23 02:13:56,407 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-23 02:13:56,423 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-23 02:13:56,424 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-11-23 02:13:56,462 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-23 02:13:56,462 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-23 02:13:56,463 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-23 02:13:56,463 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-23 02:13:56,464 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-23 02:13:56,464 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-23 02:13:56,465 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-23 02:13:56,465 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-23 02:13:56,466 INFO L138 SettingsManager]: * Use SBE=true [2022-11-23 02:13:56,466 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-23 02:13:56,468 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-23 02:13:56,468 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-23 02:13:56,468 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-23 02:13:56,468 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-23 02:13:56,468 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-23 02:13:56,468 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-11-23 02:13:56,468 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-11-23 02:13:56,469 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-11-23 02:13:56,469 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-23 02:13:56,469 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-23 02:13:56,469 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-23 02:13:56,470 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-23 02:13:56,471 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-23 02:13:56,471 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-23 02:13:56,471 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-23 02:13:56,471 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 02:13:56,471 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-23 02:13:56,471 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-23 02:13:56,471 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-23 02:13:56,472 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-23 02:13:56,472 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-11-23 02:13:56,473 INFO L138 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2022-11-23 02:13:56,473 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-23 02:13:56,473 INFO L138 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a43a02844acf962bfa6f77d0e1512c06ac1cc2fb3c3905e584a292a069b5426 [2022-11-23 02:13:56,720 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-23 02:13:56,768 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-23 02:13:56,771 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-23 02:13:56,773 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-23 02:13:56,773 INFO L275 PluginConnector]: CDTParser initialized [2022-11-23 02:13:56,774 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/../../sv-benchmarks/c/memsafety/20051113-1.i [2022-11-23 02:13:59,725 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-23 02:14:00,013 INFO L351 CDTParser]: Found 1 translation units. [2022-11-23 02:14:00,014 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/sv-benchmarks/c/memsafety/20051113-1.i [2022-11-23 02:14:00,025 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/data/6c4241d09/f0fffe6be30b433ba9f7ce95383c3b75/FLAGd975e0fae [2022-11-23 02:14:00,058 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/data/6c4241d09/f0fffe6be30b433ba9f7ce95383c3b75 [2022-11-23 02:14:00,061 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-23 02:14:00,063 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-23 02:14:00,064 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-23 02:14:00,064 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-23 02:14:00,071 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-23 02:14:00,072 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,073 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b7daa14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00, skipping insertion in model container [2022-11-23 02:14:00,073 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,082 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-23 02:14:00,152 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-23 02:14:00,540 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 02:14:00,552 INFO L203 MainTranslator]: Completed pre-run [2022-11-23 02:14:00,622 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-23 02:14:00,659 INFO L208 MainTranslator]: Completed translation [2022-11-23 02:14:00,660 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00 WrapperNode [2022-11-23 02:14:00,662 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-23 02:14:00,664 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-23 02:14:00,664 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-23 02:14:00,664 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-23 02:14:00,671 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,704 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,736 INFO L138 Inliner]: procedures = 125, calls = 23, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 77 [2022-11-23 02:14:00,737 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-23 02:14:00,738 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-23 02:14:00,738 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-23 02:14:00,738 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-23 02:14:00,747 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,747 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,756 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,757 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,772 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,778 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,784 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,790 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,792 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-23 02:14:00,796 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-23 02:14:00,796 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-23 02:14:00,796 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-23 02:14:00,797 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (1/1) ... [2022-11-23 02:14:00,804 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-23 02:14:00,815 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:00,836 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-23 02:14:00,871 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-23 02:14:00,889 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-23 02:14:00,889 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-23 02:14:00,889 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-23 02:14:00,889 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-23 02:14:00,890 INFO L130 BoogieDeclarations]: Found specification of procedure dummy_abort [2022-11-23 02:14:00,890 INFO L138 BoogieDeclarations]: Found implementation of procedure dummy_abort [2022-11-23 02:14:00,890 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-23 02:14:00,890 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-23 02:14:00,890 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-23 02:14:01,032 INFO L235 CfgBuilder]: Building ICFG [2022-11-23 02:14:01,034 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-23 02:14:01,397 INFO L276 CfgBuilder]: Performing block encoding [2022-11-23 02:14:01,404 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-23 02:14:01,404 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-23 02:14:01,407 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:14:01 BoogieIcfgContainer [2022-11-23 02:14:01,407 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-23 02:14:01,411 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-23 02:14:01,411 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-23 02:14:01,415 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-23 02:14:01,415 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.11 02:14:00" (1/3) ... [2022-11-23 02:14:01,416 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@655d2169 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:14:01, skipping insertion in model container [2022-11-23 02:14:01,416 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:14:00" (2/3) ... [2022-11-23 02:14:01,416 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@655d2169 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.11 02:14:01, skipping insertion in model container [2022-11-23 02:14:01,416 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:14:01" (3/3) ... [2022-11-23 02:14:01,418 INFO L112 eAbstractionObserver]: Analyzing ICFG 20051113-1.i [2022-11-23 02:14:01,442 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-23 02:14:01,442 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 25 error locations. [2022-11-23 02:14:01,491 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-23 02:14:01,497 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@470e4ad6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-23 02:14:01,497 INFO L358 AbstractCegarLoop]: Starting to check reachability of 25 error locations. [2022-11-23 02:14:01,502 INFO L276 IsEmpty]: Start isEmpty. Operand has 64 states, 35 states have (on average 1.9142857142857144) internal successors, (67), 62 states have internal predecessors, (67), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:01,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-11-23 02:14:01,509 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:01,509 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-11-23 02:14:01,510 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:01,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:01,515 INFO L85 PathProgramCache]: Analyzing trace with hash 30849, now seen corresponding path program 1 times [2022-11-23 02:14:01,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:01,525 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112715422] [2022-11-23 02:14:01,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:01,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:01,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:01,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:01,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:01,799 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112715422] [2022-11-23 02:14:01,800 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [112715422] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:01,800 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:01,800 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-23 02:14:01,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387288326] [2022-11-23 02:14:01,803 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:01,807 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-23 02:14:01,807 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:01,836 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-23 02:14:01,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-23 02:14:01,839 INFO L87 Difference]: Start difference. First operand has 64 states, 35 states have (on average 1.9142857142857144) internal successors, (67), 62 states have internal predecessors, (67), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:01,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:01,977 INFO L93 Difference]: Finished difference Result 63 states and 68 transitions. [2022-11-23 02:14:01,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-23 02:14:01,984 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-11-23 02:14:01,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:01,991 INFO L225 Difference]: With dead ends: 63 [2022-11-23 02:14:01,992 INFO L226 Difference]: Without dead ends: 61 [2022-11-23 02:14:01,993 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-23 02:14:01,997 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 61 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:01,998 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 40 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:02,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2022-11-23 02:14:02,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2022-11-23 02:14:02,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 34 states have (on average 1.8235294117647058) internal successors, (62), 59 states have internal predecessors, (62), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:02,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2022-11-23 02:14:02,052 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 3 [2022-11-23 02:14:02,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:02,053 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2022-11-23 02:14:02,054 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:02,054 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2022-11-23 02:14:02,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-23 02:14:02,055 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:02,055 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-23 02:14:02,055 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-23 02:14:02,056 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:02,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:02,057 INFO L85 PathProgramCache]: Analyzing trace with hash 956356, now seen corresponding path program 1 times [2022-11-23 02:14:02,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:02,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564476727] [2022-11-23 02:14:02,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:02,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:02,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:02,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:02,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:02,291 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564476727] [2022-11-23 02:14:02,291 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564476727] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:02,292 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:02,292 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-23 02:14:02,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625791837] [2022-11-23 02:14:02,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:02,293 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-23 02:14:02,294 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:02,294 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-23 02:14:02,295 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-23 02:14:02,295 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:02,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:02,356 INFO L93 Difference]: Finished difference Result 60 states and 65 transitions. [2022-11-23 02:14:02,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-23 02:14:02,357 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-23 02:14:02,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:02,358 INFO L225 Difference]: With dead ends: 60 [2022-11-23 02:14:02,359 INFO L226 Difference]: Without dead ends: 60 [2022-11-23 02:14:02,359 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-23 02:14:02,360 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 57 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:02,361 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 39 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:02,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-11-23 02:14:02,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2022-11-23 02:14:02,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 34 states have (on average 1.7941176470588236) internal successors, (61), 58 states have internal predecessors, (61), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:02,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 65 transitions. [2022-11-23 02:14:02,368 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 65 transitions. Word has length 4 [2022-11-23 02:14:02,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:02,369 INFO L495 AbstractCegarLoop]: Abstraction has 60 states and 65 transitions. [2022-11-23 02:14:02,369 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:02,369 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 65 transitions. [2022-11-23 02:14:02,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-23 02:14:02,370 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:02,370 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:02,370 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-23 02:14:02,371 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:02,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:02,372 INFO L85 PathProgramCache]: Analyzing trace with hash -1573926710, now seen corresponding path program 1 times [2022-11-23 02:14:02,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:02,372 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060444180] [2022-11-23 02:14:02,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:02,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:02,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:02,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:02,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:02,536 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1060444180] [2022-11-23 02:14:02,536 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1060444180] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:02,537 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:02,537 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-23 02:14:02,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215029620] [2022-11-23 02:14:02,537 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:02,538 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-23 02:14:02,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:02,538 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-23 02:14:02,539 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:02,539 INFO L87 Difference]: Start difference. First operand 60 states and 65 transitions. Second operand has 5 states, 4 states have (on average 1.75) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:02,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:02,697 INFO L93 Difference]: Finished difference Result 53 states and 58 transitions. [2022-11-23 02:14:02,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-23 02:14:02,698 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 1.75) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-23 02:14:02,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:02,699 INFO L225 Difference]: With dead ends: 53 [2022-11-23 02:14:02,699 INFO L226 Difference]: Without dead ends: 53 [2022-11-23 02:14:02,699 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:02,700 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 98 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 100 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:02,701 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [100 Valid, 32 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:02,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-11-23 02:14:02,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2022-11-23 02:14:02,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 34 states have (on average 1.588235294117647) internal successors, (54), 51 states have internal predecessors, (54), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:02,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2022-11-23 02:14:02,706 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 7 [2022-11-23 02:14:02,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:02,707 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2022-11-23 02:14:02,707 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 1.75) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:02,707 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2022-11-23 02:14:02,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-23 02:14:02,708 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:02,708 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:02,708 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-23 02:14:02,708 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:02,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:02,709 INFO L85 PathProgramCache]: Analyzing trace with hash -1573926709, now seen corresponding path program 1 times [2022-11-23 02:14:02,709 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:02,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054597899] [2022-11-23 02:14:02,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:02,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:02,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:02,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:02,834 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:02,835 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2054597899] [2022-11-23 02:14:02,835 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2054597899] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:02,835 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:02,835 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-23 02:14:02,836 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291370318] [2022-11-23 02:14:02,836 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:02,836 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-23 02:14:02,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:02,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-23 02:14:02,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-23 02:14:02,838 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:02,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:02,885 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-11-23 02:14:02,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-23 02:14:02,886 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-11-23 02:14:02,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:02,887 INFO L225 Difference]: With dead ends: 46 [2022-11-23 02:14:02,887 INFO L226 Difference]: Without dead ends: 46 [2022-11-23 02:14:02,887 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-23 02:14:02,889 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 38 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:02,890 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 35 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:02,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-11-23 02:14:02,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-11-23 02:14:02,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 44 states have internal predecessors, (47), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:02,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2022-11-23 02:14:02,895 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 7 [2022-11-23 02:14:02,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:02,896 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2022-11-23 02:14:02,896 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:02,896 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-11-23 02:14:02,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-23 02:14:02,897 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:02,897 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:02,897 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-23 02:14:02,898 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:02,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:02,899 INFO L85 PathProgramCache]: Analyzing trace with hash 1365553495, now seen corresponding path program 1 times [2022-11-23 02:14:02,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:02,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547868897] [2022-11-23 02:14:02,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:02,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:02,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:03,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:03,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:03,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [547868897] [2022-11-23 02:14:03,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [547868897] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:03,101 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:03,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-23 02:14:03,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255126393] [2022-11-23 02:14:03,102 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:03,102 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-23 02:14:03,102 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:03,103 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-23 02:14:03,103 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-23 02:14:03,103 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:03,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:03,173 INFO L93 Difference]: Finished difference Result 44 states and 49 transitions. [2022-11-23 02:14:03,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:03,174 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-23 02:14:03,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:03,175 INFO L225 Difference]: With dead ends: 44 [2022-11-23 02:14:03,175 INFO L226 Difference]: Without dead ends: 44 [2022-11-23 02:14:03,176 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-23 02:14:03,177 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 72 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 72 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:03,178 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [72 Valid, 35 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:03,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-11-23 02:14:03,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2022-11-23 02:14:03,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 34 states have (on average 1.3235294117647058) internal successors, (45), 42 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:03,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 49 transitions. [2022-11-23 02:14:03,184 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 49 transitions. Word has length 15 [2022-11-23 02:14:03,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:03,184 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 49 transitions. [2022-11-23 02:14:03,185 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:03,185 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 49 transitions. [2022-11-23 02:14:03,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-23 02:14:03,185 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:03,186 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:03,186 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-23 02:14:03,186 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:03,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:03,187 INFO L85 PathProgramCache]: Analyzing trace with hash 1365553496, now seen corresponding path program 1 times [2022-11-23 02:14:03,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:03,188 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1426465112] [2022-11-23 02:14:03,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:03,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:03,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:03,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:03,354 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:03,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1426465112] [2022-11-23 02:14:03,354 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1426465112] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:03,354 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:03,355 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-23 02:14:03,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1509126942] [2022-11-23 02:14:03,355 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:03,356 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 02:14:03,356 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:03,356 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 02:14:03,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 02:14:03,357 INFO L87 Difference]: Start difference. First operand 44 states and 49 transitions. Second operand has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:03,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:03,413 INFO L93 Difference]: Finished difference Result 43 states and 48 transitions. [2022-11-23 02:14:03,413 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:03,414 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-11-23 02:14:03,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:03,415 INFO L225 Difference]: With dead ends: 43 [2022-11-23 02:14:03,415 INFO L226 Difference]: Without dead ends: 43 [2022-11-23 02:14:03,415 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:03,417 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 56 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:03,417 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 38 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:03,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2022-11-23 02:14:03,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2022-11-23 02:14:03,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 41 states have internal predecessors, (44), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:03,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 48 transitions. [2022-11-23 02:14:03,422 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 48 transitions. Word has length 15 [2022-11-23 02:14:03,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:03,423 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 48 transitions. [2022-11-23 02:14:03,423 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:03,423 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 48 transitions. [2022-11-23 02:14:03,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-23 02:14:03,424 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:03,424 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:03,424 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-23 02:14:03,425 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:03,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:03,426 INFO L85 PathProgramCache]: Analyzing trace with hash -1963083303, now seen corresponding path program 1 times [2022-11-23 02:14:03,426 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:03,426 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670246468] [2022-11-23 02:14:03,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:03,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:03,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:03,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:03,662 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:03,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670246468] [2022-11-23 02:14:03,662 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [670246468] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:03,662 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:03,662 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-23 02:14:03,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002154324] [2022-11-23 02:14:03,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:03,663 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 02:14:03,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:03,664 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 02:14:03,665 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 02:14:03,665 INFO L87 Difference]: Start difference. First operand 43 states and 48 transitions. Second operand has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:03,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:03,768 INFO L93 Difference]: Finished difference Result 69 states and 79 transitions. [2022-11-23 02:14:03,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:03,770 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-11-23 02:14:03,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:03,773 INFO L225 Difference]: With dead ends: 69 [2022-11-23 02:14:03,773 INFO L226 Difference]: Without dead ends: 69 [2022-11-23 02:14:03,773 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:03,776 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 77 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 53 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:03,777 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 54 Invalid, 53 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:03,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-11-23 02:14:03,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 46. [2022-11-23 02:14:03,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 37 states have (on average 1.2972972972972974) internal successors, (48), 44 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:03,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 52 transitions. [2022-11-23 02:14:03,799 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 52 transitions. Word has length 17 [2022-11-23 02:14:03,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:03,800 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 52 transitions. [2022-11-23 02:14:03,801 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:03,801 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 52 transitions. [2022-11-23 02:14:03,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-23 02:14:03,802 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:03,802 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:03,802 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-23 02:14:03,803 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:03,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:03,804 INFO L85 PathProgramCache]: Analyzing trace with hash -58695891, now seen corresponding path program 1 times [2022-11-23 02:14:03,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:03,805 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125010178] [2022-11-23 02:14:03,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:03,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:03,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:03,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:03,922 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:03,922 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125010178] [2022-11-23 02:14:03,923 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2125010178] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:03,923 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:03,923 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-23 02:14:03,924 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110331157] [2022-11-23 02:14:03,924 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:03,925 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-23 02:14:03,925 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:03,926 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-23 02:14:03,926 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:03,926 INFO L87 Difference]: Start difference. First operand 46 states and 52 transitions. Second operand has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:04,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:04,004 INFO L93 Difference]: Finished difference Result 44 states and 50 transitions. [2022-11-23 02:14:04,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-23 02:14:04,005 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-23 02:14:04,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:04,006 INFO L225 Difference]: With dead ends: 44 [2022-11-23 02:14:04,006 INFO L226 Difference]: Without dead ends: 44 [2022-11-23 02:14:04,007 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-23 02:14:04,011 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 70 mSDsluCounter, 20 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:04,013 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [70 Valid, 47 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:04,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-11-23 02:14:04,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2022-11-23 02:14:04,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 37 states have (on average 1.2432432432432432) internal successors, (46), 42 states have internal predecessors, (46), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:04,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 50 transitions. [2022-11-23 02:14:04,032 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 50 transitions. Word has length 21 [2022-11-23 02:14:04,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:04,033 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 50 transitions. [2022-11-23 02:14:04,034 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:04,034 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 50 transitions. [2022-11-23 02:14:04,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-11-23 02:14:04,038 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:04,038 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:04,038 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-11-23 02:14:04,039 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:04,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:04,039 INFO L85 PathProgramCache]: Analyzing trace with hash -58695890, now seen corresponding path program 1 times [2022-11-23 02:14:04,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:04,040 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [234314924] [2022-11-23 02:14:04,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:04,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:04,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:04,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:04,173 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:04,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [234314924] [2022-11-23 02:14:04,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [234314924] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:04,174 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:04,174 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-23 02:14:04,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [84614484] [2022-11-23 02:14:04,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:04,175 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-23 02:14:04,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:04,176 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-23 02:14:04,176 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:04,177 INFO L87 Difference]: Start difference. First operand 44 states and 50 transitions. Second operand has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:04,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:04,217 INFO L93 Difference]: Finished difference Result 64 states and 73 transitions. [2022-11-23 02:14:04,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:04,218 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-11-23 02:14:04,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:04,219 INFO L225 Difference]: With dead ends: 64 [2022-11-23 02:14:04,219 INFO L226 Difference]: Without dead ends: 64 [2022-11-23 02:14:04,219 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-23 02:14:04,223 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 37 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 171 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:04,224 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 171 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:04,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-11-23 02:14:04,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 47. [2022-11-23 02:14:04,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 40 states have (on average 1.225) internal successors, (49), 45 states have internal predecessors, (49), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:04,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 53 transitions. [2022-11-23 02:14:04,228 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 53 transitions. Word has length 21 [2022-11-23 02:14:04,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:04,229 INFO L495 AbstractCegarLoop]: Abstraction has 47 states and 53 transitions. [2022-11-23 02:14:04,229 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:04,229 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 53 transitions. [2022-11-23 02:14:04,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-23 02:14:04,230 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:04,230 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:04,231 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-23 02:14:04,231 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:04,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:04,232 INFO L85 PathProgramCache]: Analyzing trace with hash -309999949, now seen corresponding path program 1 times [2022-11-23 02:14:04,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:04,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1480122149] [2022-11-23 02:14:04,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:04,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:04,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:04,450 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:04,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:04,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1480122149] [2022-11-23 02:14:04,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1480122149] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:04,451 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1955189775] [2022-11-23 02:14:04,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:04,452 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:04,452 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:04,459 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:04,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-23 02:14:04,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:04,552 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-23 02:14:04,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:04,826 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:04,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:05,071 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-23 02:14:05,072 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-11-23 02:14:05,138 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:05,138 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1955189775] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:05,138 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:05,139 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6, 6] total 13 [2022-11-23 02:14:05,139 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [433489764] [2022-11-23 02:14:05,139 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:05,139 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-11-23 02:14:05,140 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:05,140 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-11-23 02:14:05,140 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2022-11-23 02:14:05,140 INFO L87 Difference]: Start difference. First operand 47 states and 53 transitions. Second operand has 14 states, 13 states have (on average 4.6923076923076925) internal successors, (61), 14 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:05,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:05,513 INFO L93 Difference]: Finished difference Result 111 states and 130 transitions. [2022-11-23 02:14:05,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-11-23 02:14:05,515 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 4.6923076923076925) internal successors, (61), 14 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-11-23 02:14:05,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:05,516 INFO L225 Difference]: With dead ends: 111 [2022-11-23 02:14:05,516 INFO L226 Difference]: Without dead ends: 111 [2022-11-23 02:14:05,516 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2022-11-23 02:14:05,517 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 431 mSDsluCounter, 104 mSDsCounter, 0 mSdLazyCounter, 182 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 431 SdHoareTripleChecker+Valid, 148 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 182 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:05,518 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [431 Valid, 148 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 182 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-23 02:14:05,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-11-23 02:14:05,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 57. [2022-11-23 02:14:05,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 50 states have (on average 1.22) internal successors, (61), 55 states have internal predecessors, (61), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:05,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 65 transitions. [2022-11-23 02:14:05,529 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 65 transitions. Word has length 22 [2022-11-23 02:14:05,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:05,530 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 65 transitions. [2022-11-23 02:14:05,531 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 4.6923076923076925) internal successors, (61), 14 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:05,531 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 65 transitions. [2022-11-23 02:14:05,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-11-23 02:14:05,532 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:05,532 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:05,547 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:05,738 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-23 02:14:05,738 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:05,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:05,739 INFO L85 PathProgramCache]: Analyzing trace with hash -612311662, now seen corresponding path program 1 times [2022-11-23 02:14:05,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:05,739 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1610154686] [2022-11-23 02:14:05,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:05,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:05,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:05,928 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-11-23 02:14:05,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:05,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:05,938 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:05,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1610154686] [2022-11-23 02:14:05,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1610154686] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:05,939 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:05,939 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-23 02:14:05,939 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1715950329] [2022-11-23 02:14:05,939 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:05,941 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 02:14:05,941 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:05,942 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 02:14:05,943 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 02:14:05,943 INFO L87 Difference]: Start difference. First operand 57 states and 65 transitions. Second operand has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:06,000 INFO L93 Difference]: Finished difference Result 56 states and 64 transitions. [2022-11-23 02:14:06,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:06,001 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-11-23 02:14:06,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:06,002 INFO L225 Difference]: With dead ends: 56 [2022-11-23 02:14:06,002 INFO L226 Difference]: Without dead ends: 56 [2022-11-23 02:14:06,003 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:06,004 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 32 mSDsluCounter, 15 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:06,005 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 44 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:06,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-11-23 02:14:06,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2022-11-23 02:14:06,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 50 states have (on average 1.2) internal successors, (60), 54 states have internal predecessors, (60), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:06,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 64 transitions. [2022-11-23 02:14:06,017 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 64 transitions. Word has length 24 [2022-11-23 02:14:06,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:06,017 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 64 transitions. [2022-11-23 02:14:06,018 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,018 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 64 transitions. [2022-11-23 02:14:06,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-11-23 02:14:06,022 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:06,023 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:06,023 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-11-23 02:14:06,024 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:06,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:06,024 INFO L85 PathProgramCache]: Analyzing trace with hash -20987021, now seen corresponding path program 1 times [2022-11-23 02:14:06,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:06,025 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550535950] [2022-11-23 02:14:06,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:06,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:06,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:06,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-11-23 02:14:06,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:06,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:06,176 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:06,177 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550535950] [2022-11-23 02:14:06,177 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1550535950] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:06,177 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:06,177 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-23 02:14:06,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871256269] [2022-11-23 02:14:06,178 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:06,178 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 02:14:06,178 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:06,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 02:14:06,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-23 02:14:06,179 INFO L87 Difference]: Start difference. First operand 56 states and 64 transitions. Second operand has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:06,241 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-11-23 02:14:06,241 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:06,242 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-11-23 02:14:06,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:06,242 INFO L225 Difference]: With dead ends: 68 [2022-11-23 02:14:06,243 INFO L226 Difference]: Without dead ends: 68 [2022-11-23 02:14:06,243 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:06,243 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 38 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:06,244 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 49 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:06,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2022-11-23 02:14:06,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 59. [2022-11-23 02:14:06,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 53 states have (on average 1.2075471698113207) internal successors, (64), 57 states have internal predecessors, (64), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:06,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 68 transitions. [2022-11-23 02:14:06,249 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 68 transitions. Word has length 26 [2022-11-23 02:14:06,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:06,250 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 68 transitions. [2022-11-23 02:14:06,250 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,250 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 68 transitions. [2022-11-23 02:14:06,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-11-23 02:14:06,255 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:06,256 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:06,256 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-11-23 02:14:06,256 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:06,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:06,257 INFO L85 PathProgramCache]: Analyzing trace with hash 1184799620, now seen corresponding path program 1 times [2022-11-23 02:14:06,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:06,257 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98236250] [2022-11-23 02:14:06,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:06,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:06,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:06,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-11-23 02:14:06,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:06,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:06,339 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:06,339 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98236250] [2022-11-23 02:14:06,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98236250] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:06,339 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:06,339 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-23 02:14:06,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557346116] [2022-11-23 02:14:06,340 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:06,341 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-23 02:14:06,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:06,342 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-23 02:14:06,342 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:06,343 INFO L87 Difference]: Start difference. First operand 59 states and 68 transitions. Second operand has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:06,371 INFO L93 Difference]: Finished difference Result 67 states and 76 transitions. [2022-11-23 02:14:06,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:06,372 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-11-23 02:14:06,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:06,373 INFO L225 Difference]: With dead ends: 67 [2022-11-23 02:14:06,373 INFO L226 Difference]: Without dead ends: 67 [2022-11-23 02:14:06,373 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-23 02:14:06,374 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 11 mSDsluCounter, 125 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:06,374 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 169 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:06,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-11-23 02:14:06,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 62. [2022-11-23 02:14:06,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 60 states have internal predecessors, (67), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:06,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 71 transitions. [2022-11-23 02:14:06,381 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 71 transitions. Word has length 30 [2022-11-23 02:14:06,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:06,383 INFO L495 AbstractCegarLoop]: Abstraction has 62 states and 71 transitions. [2022-11-23 02:14:06,383 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,384 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 71 transitions. [2022-11-23 02:14:06,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-23 02:14:06,384 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:06,385 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:06,385 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-23 02:14:06,385 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:06,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:06,386 INFO L85 PathProgramCache]: Analyzing trace with hash -416344648, now seen corresponding path program 1 times [2022-11-23 02:14:06,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:06,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725835297] [2022-11-23 02:14:06,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:06,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:06,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:06,638 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-11-23 02:14:06,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:06,645 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:06,645 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:06,645 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725835297] [2022-11-23 02:14:06,646 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1725835297] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:06,646 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:06,646 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-23 02:14:06,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [983791903] [2022-11-23 02:14:06,646 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:06,648 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-23 02:14:06,648 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:06,648 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-23 02:14:06,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-11-23 02:14:06,649 INFO L87 Difference]: Start difference. First operand 62 states and 71 transitions. Second operand has 7 states, 7 states have (on average 4.142857142857143) internal successors, (29), 7 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:06,799 INFO L93 Difference]: Finished difference Result 73 states and 83 transitions. [2022-11-23 02:14:06,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-23 02:14:06,800 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.142857142857143) internal successors, (29), 7 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-11-23 02:14:06,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:06,800 INFO L225 Difference]: With dead ends: 73 [2022-11-23 02:14:06,800 INFO L226 Difference]: Without dead ends: 73 [2022-11-23 02:14:06,801 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2022-11-23 02:14:06,801 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 27 mSDsluCounter, 134 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 175 SdHoareTripleChecker+Invalid, 115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:06,802 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 175 Invalid, 115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 111 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:06,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-11-23 02:14:06,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 66. [2022-11-23 02:14:06,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 59 states have (on average 1.1864406779661016) internal successors, (70), 63 states have internal predecessors, (70), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-11-23 02:14:06,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 76 transitions. [2022-11-23 02:14:06,805 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 76 transitions. Word has length 31 [2022-11-23 02:14:06,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:06,805 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 76 transitions. [2022-11-23 02:14:06,805 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 4.142857142857143) internal successors, (29), 7 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-11-23 02:14:06,805 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 76 transitions. [2022-11-23 02:14:06,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-11-23 02:14:06,807 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:06,808 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:06,808 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-11-23 02:14:06,808 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:06,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:06,809 INFO L85 PathProgramCache]: Analyzing trace with hash 241915192, now seen corresponding path program 1 times [2022-11-23 02:14:06,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:06,809 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090240215] [2022-11-23 02:14:06,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:06,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:06,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:07,218 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-11-23 02:14:07,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:07,222 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-11-23 02:14:07,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:07,225 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-23 02:14:07,225 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:07,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090240215] [2022-11-23 02:14:07,225 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1090240215] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:07,226 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-23 02:14:07,226 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-23 02:14:07,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233525660] [2022-11-23 02:14:07,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:07,229 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-23 02:14:07,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:07,229 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-23 02:14:07,229 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-23 02:14:07,230 INFO L87 Difference]: Start difference. First operand 66 states and 76 transitions. Second operand has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:07,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:07,302 INFO L93 Difference]: Finished difference Result 65 states and 73 transitions. [2022-11-23 02:14:07,303 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-23 02:14:07,303 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 33 [2022-11-23 02:14:07,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:07,305 INFO L225 Difference]: With dead ends: 65 [2022-11-23 02:14:07,305 INFO L226 Difference]: Without dead ends: 58 [2022-11-23 02:14:07,307 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-11-23 02:14:07,308 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 27 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:07,308 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 88 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:07,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-11-23 02:14:07,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2022-11-23 02:14:07,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 50 states have (on average 1.18) internal successors, (59), 54 states have internal predecessors, (59), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:07,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 63 transitions. [2022-11-23 02:14:07,311 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 63 transitions. Word has length 33 [2022-11-23 02:14:07,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:07,311 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 63 transitions. [2022-11-23 02:14:07,312 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:07,312 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 63 transitions. [2022-11-23 02:14:07,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-11-23 02:14:07,312 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:07,312 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:07,313 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-11-23 02:14:07,313 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:07,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:07,313 INFO L85 PathProgramCache]: Analyzing trace with hash 701429363, now seen corresponding path program 2 times [2022-11-23 02:14:07,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:07,314 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232456883] [2022-11-23 02:14:07,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:07,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:07,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:07,763 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-23 02:14:07,763 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:07,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232456883] [2022-11-23 02:14:07,764 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [232456883] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:07,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [233462411] [2022-11-23 02:14:07,764 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 02:14:07,764 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:07,765 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:07,767 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:07,779 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-23 02:14:07,868 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-23 02:14:07,868 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 02:14:07,869 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-23 02:14:07,871 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:07,907 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-11-23 02:14:07,907 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-23 02:14:07,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [233462411] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-23 02:14:07,908 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-23 02:14:07,908 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [9] total 11 [2022-11-23 02:14:07,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994134563] [2022-11-23 02:14:07,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-23 02:14:07,909 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-23 02:14:07,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:07,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-23 02:14:07,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2022-11-23 02:14:07,910 INFO L87 Difference]: Start difference. First operand 56 states and 63 transitions. Second operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:07,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:07,924 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2022-11-23 02:14:07,924 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-11-23 02:14:07,924 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 32 [2022-11-23 02:14:07,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:07,925 INFO L225 Difference]: With dead ends: 57 [2022-11-23 02:14:07,925 INFO L226 Difference]: Without dead ends: 57 [2022-11-23 02:14:07,925 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2022-11-23 02:14:07,926 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 38 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:07,926 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 81 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:07,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2022-11-23 02:14:07,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2022-11-23 02:14:07,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 51 states have (on average 1.1764705882352942) internal successors, (60), 55 states have internal predecessors, (60), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:07,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 64 transitions. [2022-11-23 02:14:07,929 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 64 transitions. Word has length 32 [2022-11-23 02:14:07,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:07,930 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 64 transitions. [2022-11-23 02:14:07,930 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:07,930 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 64 transitions. [2022-11-23 02:14:07,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-11-23 02:14:07,931 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:07,931 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:07,943 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-11-23 02:14:08,136 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-11-23 02:14:08,137 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:08,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:08,137 INFO L85 PathProgramCache]: Analyzing trace with hash 1203352596, now seen corresponding path program 1 times [2022-11-23 02:14:08,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:08,139 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602866552] [2022-11-23 02:14:08,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:08,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:08,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:08,685 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 10 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:08,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:08,685 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [602866552] [2022-11-23 02:14:08,685 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [602866552] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:08,685 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1790935189] [2022-11-23 02:14:08,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:08,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:08,686 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:08,687 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:08,699 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-23 02:14:08,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:08,787 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-23 02:14:08,791 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:08,823 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-23 02:14:08,849 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:08,850 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:08,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:08,864 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:08,883 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:08,883 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:08,900 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:08,901 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:08,913 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:08,913 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:08,933 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:08,934 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:09,143 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-23 02:14:09,167 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:09,167 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:09,280 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:09,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1790935189] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:09,281 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:09,281 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 17 [2022-11-23 02:14:09,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899838115] [2022-11-23 02:14:09,281 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:09,282 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-11-23 02:14:09,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:09,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-23 02:14:09,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2022-11-23 02:14:09,283 INFO L87 Difference]: Start difference. First operand 57 states and 64 transitions. Second operand has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:09,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:09,688 INFO L93 Difference]: Finished difference Result 97 states and 111 transitions. [2022-11-23 02:14:09,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-23 02:14:09,689 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-11-23 02:14:09,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:09,690 INFO L225 Difference]: With dead ends: 97 [2022-11-23 02:14:09,690 INFO L226 Difference]: Without dead ends: 97 [2022-11-23 02:14:09,690 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 59 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=170, Invalid=480, Unknown=0, NotChecked=0, Total=650 [2022-11-23 02:14:09,691 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 133 mSDsluCounter, 333 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 133 SdHoareTripleChecker+Valid, 401 SdHoareTripleChecker+Invalid, 325 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:09,691 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [133 Valid, 401 Invalid, 325 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-23 02:14:09,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-11-23 02:14:09,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 55. [2022-11-23 02:14:09,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 50 states have (on average 1.14) internal successors, (57), 53 states have internal predecessors, (57), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:09,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 61 transitions. [2022-11-23 02:14:09,694 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 61 transitions. Word has length 33 [2022-11-23 02:14:09,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:09,694 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 61 transitions. [2022-11-23 02:14:09,694 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:09,694 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 61 transitions. [2022-11-23 02:14:09,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-23 02:14:09,695 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:09,695 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:09,710 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:09,901 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-11-23 02:14:09,902 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:09,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:09,902 INFO L85 PathProgramCache]: Analyzing trace with hash -149943807, now seen corresponding path program 1 times [2022-11-23 02:14:09,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:09,902 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469099148] [2022-11-23 02:14:09,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:09,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:09,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:10,376 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-11-23 02:14:10,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:10,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469099148] [2022-11-23 02:14:10,377 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [469099148] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:10,377 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1293984497] [2022-11-23 02:14:10,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:10,378 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:10,378 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:10,379 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:10,407 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-23 02:14:10,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:10,486 INFO L263 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 18 conjunts are in the unsatisfiable core [2022-11-23 02:14:10,489 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:10,746 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-23 02:14:10,746 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:11,016 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-23 02:14:11,017 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-11-23 02:14:11,063 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-23 02:14:11,063 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1293984497] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:11,063 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:11,063 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 18 [2022-11-23 02:14:11,063 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182213469] [2022-11-23 02:14:11,063 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:11,064 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-23 02:14:11,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:11,064 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-23 02:14:11,065 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2022-11-23 02:14:11,065 INFO L87 Difference]: Start difference. First operand 55 states and 61 transitions. Second operand has 18 states, 18 states have (on average 5.333333333333333) internal successors, (96), 18 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:11,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:11,517 INFO L93 Difference]: Finished difference Result 79 states and 88 transitions. [2022-11-23 02:14:11,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-11-23 02:14:11,518 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 5.333333333333333) internal successors, (96), 18 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-11-23 02:14:11,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:11,518 INFO L225 Difference]: With dead ends: 79 [2022-11-23 02:14:11,519 INFO L226 Difference]: Without dead ends: 79 [2022-11-23 02:14:11,519 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=168, Invalid=588, Unknown=0, NotChecked=0, Total=756 [2022-11-23 02:14:11,520 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 211 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 217 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 126 SdHoareTripleChecker+Invalid, 238 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 217 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:11,520 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 126 Invalid, 238 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 217 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-23 02:14:11,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2022-11-23 02:14:11,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 65. [2022-11-23 02:14:11,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.1333333333333333) internal successors, (68), 63 states have internal predecessors, (68), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:11,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 72 transitions. [2022-11-23 02:14:11,523 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 72 transitions. Word has length 34 [2022-11-23 02:14:11,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:11,523 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 72 transitions. [2022-11-23 02:14:11,523 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 5.333333333333333) internal successors, (96), 18 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:11,523 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 72 transitions. [2022-11-23 02:14:11,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-11-23 02:14:11,524 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:11,524 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:11,535 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:11,730 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-11-23 02:14:11,731 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:11,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:11,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1336889422, now seen corresponding path program 1 times [2022-11-23 02:14:11,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:11,732 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000541932] [2022-11-23 02:14:11,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:11,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:11,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:12,155 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-23 02:14:12,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:12,155 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000541932] [2022-11-23 02:14:12,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2000541932] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:12,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [74440035] [2022-11-23 02:14:12,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:12,156 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:12,156 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:12,157 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:12,167 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-23 02:14:12,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:12,278 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-23 02:14:12,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:12,312 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-23 02:14:12,553 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-23 02:14:12,572 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:12,573 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:12,769 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:12,769 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [74440035] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:12,769 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:12,769 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 9] total 24 [2022-11-23 02:14:12,771 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429574484] [2022-11-23 02:14:12,771 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:12,773 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-11-23 02:14:12,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:12,774 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-11-23 02:14:12,776 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=469, Unknown=0, NotChecked=0, Total=552 [2022-11-23 02:14:12,777 INFO L87 Difference]: Start difference. First operand 65 states and 72 transitions. Second operand has 24 states, 24 states have (on average 4.583333333333333) internal successors, (110), 24 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:13,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:13,448 INFO L93 Difference]: Finished difference Result 65 states and 70 transitions. [2022-11-23 02:14:13,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-23 02:14:13,449 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 4.583333333333333) internal successors, (110), 24 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2022-11-23 02:14:13,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:13,450 INFO L225 Difference]: With dead ends: 65 [2022-11-23 02:14:13,450 INFO L226 Difference]: Without dead ends: 65 [2022-11-23 02:14:13,450 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=293, Invalid=1039, Unknown=0, NotChecked=0, Total=1332 [2022-11-23 02:14:13,451 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 185 mSDsluCounter, 192 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 219 SdHoareTripleChecker+Invalid, 296 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:13,451 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [185 Valid, 219 Invalid, 296 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-23 02:14:13,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-11-23 02:14:13,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2022-11-23 02:14:13,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.1) internal successors, (66), 63 states have internal predecessors, (66), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:13,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 70 transitions. [2022-11-23 02:14:13,453 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 70 transitions. Word has length 43 [2022-11-23 02:14:13,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:13,454 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 70 transitions. [2022-11-23 02:14:13,454 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 4.583333333333333) internal successors, (110), 24 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:13,454 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 70 transitions. [2022-11-23 02:14:13,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-11-23 02:14:13,454 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:13,455 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:13,466 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:13,661 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:13,661 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:13,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:13,662 INFO L85 PathProgramCache]: Analyzing trace with hash -990509317, now seen corresponding path program 2 times [2022-11-23 02:14:13,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:13,662 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240042340] [2022-11-23 02:14:13,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:13,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:13,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:14,314 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-23 02:14:14,315 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:14,315 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240042340] [2022-11-23 02:14:14,315 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1240042340] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:14,315 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [598794004] [2022-11-23 02:14:14,316 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 02:14:14,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:14,316 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:14,317 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:14,324 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-23 02:14:14,473 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 02:14:14,473 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 02:14:14,476 INFO L263 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 31 conjunts are in the unsatisfiable core [2022-11-23 02:14:14,478 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:14,508 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-23 02:14:14,853 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-23 02:14:14,872 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 7 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:14,873 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:15,095 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 19 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:15,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [598794004] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:15,096 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:15,096 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 11] total 27 [2022-11-23 02:14:15,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307559480] [2022-11-23 02:14:15,098 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:15,099 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-11-23 02:14:15,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:15,099 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-11-23 02:14:15,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=125, Invalid=577, Unknown=0, NotChecked=0, Total=702 [2022-11-23 02:14:15,100 INFO L87 Difference]: Start difference. First operand 65 states and 70 transitions. Second operand has 27 states, 27 states have (on average 4.518518518518518) internal successors, (122), 27 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:15,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:15,798 INFO L93 Difference]: Finished difference Result 67 states and 71 transitions. [2022-11-23 02:14:15,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-23 02:14:15,799 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 4.518518518518518) internal successors, (122), 27 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2022-11-23 02:14:15,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:15,800 INFO L225 Difference]: With dead ends: 67 [2022-11-23 02:14:15,800 INFO L226 Difference]: Without dead ends: 67 [2022-11-23 02:14:15,801 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 93 SyntacticMatches, 4 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 432 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=421, Invalid=1219, Unknown=0, NotChecked=0, Total=1640 [2022-11-23 02:14:15,801 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 204 mSDsluCounter, 154 mSDsCounter, 0 mSdLazyCounter, 269 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 204 SdHoareTripleChecker+Valid, 182 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 269 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:15,801 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [204 Valid, 182 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 269 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-23 02:14:15,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-11-23 02:14:15,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 65. [2022-11-23 02:14:15,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 63 states have internal predecessors, (65), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:15,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 69 transitions. [2022-11-23 02:14:15,804 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 69 transitions. Word has length 53 [2022-11-23 02:14:15,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:15,804 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 69 transitions. [2022-11-23 02:14:15,804 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 4.518518518518518) internal successors, (122), 27 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:15,805 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 69 transitions. [2022-11-23 02:14:15,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-23 02:14:15,805 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:15,805 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:15,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:16,011 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:16,012 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:16,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:16,012 INFO L85 PathProgramCache]: Analyzing trace with hash 868555041, now seen corresponding path program 2 times [2022-11-23 02:14:16,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:16,012 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843192122] [2022-11-23 02:14:16,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:16,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:16,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:16,493 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 10 proven. 35 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-23 02:14:16,494 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:16,494 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843192122] [2022-11-23 02:14:16,494 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [843192122] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:16,494 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1410080185] [2022-11-23 02:14:16,494 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-23 02:14:16,494 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:16,494 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:16,496 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:16,504 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-23 02:14:16,647 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-23 02:14:16,647 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 02:14:16,649 INFO L263 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 31 conjunts are in the unsatisfiable core [2022-11-23 02:14:16,653 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:16,686 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-23 02:14:16,725 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:16,726 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:16,741 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:16,742 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:16,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:16,756 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:16,768 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:16,769 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:16,779 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:16,783 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:16,805 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-23 02:14:16,806 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-23 02:14:17,117 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-23 02:14:17,139 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-11-23 02:14:17,139 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:17,303 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-11-23 02:14:17,303 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1410080185] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:17,304 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:17,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 9, 8] total 23 [2022-11-23 02:14:17,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743435978] [2022-11-23 02:14:17,304 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:17,305 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-11-23 02:14:17,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:17,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-11-23 02:14:17,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=424, Unknown=0, NotChecked=0, Total=506 [2022-11-23 02:14:17,306 INFO L87 Difference]: Start difference. First operand 65 states and 69 transitions. Second operand has 23 states, 23 states have (on average 5.0) internal successors, (115), 23 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:17,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:17,886 INFO L93 Difference]: Finished difference Result 63 states and 66 transitions. [2022-11-23 02:14:17,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-23 02:14:17,887 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 5.0) internal successors, (115), 23 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-11-23 02:14:17,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:17,888 INFO L225 Difference]: With dead ends: 63 [2022-11-23 02:14:17,888 INFO L226 Difference]: Without dead ends: 63 [2022-11-23 02:14:17,888 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 96 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 368 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=266, Invalid=1140, Unknown=0, NotChecked=0, Total=1406 [2022-11-23 02:14:17,889 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 137 mSDsluCounter, 232 mSDsCounter, 0 mSdLazyCounter, 370 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 137 SdHoareTripleChecker+Valid, 258 SdHoareTripleChecker+Invalid, 385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 370 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:17,889 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [137 Valid, 258 Invalid, 385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 370 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-23 02:14:17,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2022-11-23 02:14:17,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2022-11-23 02:14:17,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 61 states have internal predecessors, (62), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:17,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 66 transitions. [2022-11-23 02:14:17,892 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 66 transitions. Word has length 54 [2022-11-23 02:14:17,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:17,892 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 66 transitions. [2022-11-23 02:14:17,892 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 5.0) internal successors, (115), 23 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:17,892 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 66 transitions. [2022-11-23 02:14:17,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-23 02:14:17,893 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:17,893 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:17,904 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:18,093 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2022-11-23 02:14:18,094 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:18,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:18,094 INFO L85 PathProgramCache]: Analyzing trace with hash 679832114, now seen corresponding path program 3 times [2022-11-23 02:14:18,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:18,094 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248224214] [2022-11-23 02:14:18,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:18,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:18,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:18,261 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:18,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:18,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248224214] [2022-11-23 02:14:18,262 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [248224214] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:18,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [663564812] [2022-11-23 02:14:18,262 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-23 02:14:18,262 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:18,263 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:18,264 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:18,279 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-23 02:14:18,623 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-11-23 02:14:18,624 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 02:14:18,625 INFO L263 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-23 02:14:18,627 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:18,678 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:18,679 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:18,743 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:18,744 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [663564812] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:18,744 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:18,744 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2022-11-23 02:14:18,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739080885] [2022-11-23 02:14:18,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:18,745 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-23 02:14:18,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:18,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-23 02:14:18,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2022-11-23 02:14:18,746 INFO L87 Difference]: Start difference. First operand 63 states and 66 transitions. Second operand has 9 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:18,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:18,856 INFO L93 Difference]: Finished difference Result 66 states and 69 transitions. [2022-11-23 02:14:18,858 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-23 02:14:18,859 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-11-23 02:14:18,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:18,859 INFO L225 Difference]: With dead ends: 66 [2022-11-23 02:14:18,859 INFO L226 Difference]: Without dead ends: 66 [2022-11-23 02:14:18,860 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=79, Unknown=0, NotChecked=0, Total=132 [2022-11-23 02:14:18,860 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 71 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:18,860 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 90 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-23 02:14:18,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-11-23 02:14:18,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2022-11-23 02:14:18,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 64 states have internal predecessors, (65), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:18,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 69 transitions. [2022-11-23 02:14:18,864 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 69 transitions. Word has length 58 [2022-11-23 02:14:18,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:18,864 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 69 transitions. [2022-11-23 02:14:18,865 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:18,865 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 69 transitions. [2022-11-23 02:14:18,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-11-23 02:14:18,865 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:18,866 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:18,875 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:19,072 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-11-23 02:14:19,073 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:19,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:19,074 INFO L85 PathProgramCache]: Analyzing trace with hash -220059533, now seen corresponding path program 4 times [2022-11-23 02:14:19,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:19,074 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026221846] [2022-11-23 02:14:19,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:19,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:19,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:19,375 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:19,375 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:19,376 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1026221846] [2022-11-23 02:14:19,376 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1026221846] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:19,376 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1929735355] [2022-11-23 02:14:19,376 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-23 02:14:19,376 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:19,377 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:19,378 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:19,394 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-23 02:14:19,921 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-23 02:14:19,921 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 02:14:19,923 INFO L263 TraceCheckSpWp]: Trace formula consists of 300 conjuncts, 13 conjunts are in the unsatisfiable core [2022-11-23 02:14:19,925 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:20,032 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:20,032 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:20,159 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:20,159 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1929735355] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:20,159 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:20,159 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 18 [2022-11-23 02:14:20,159 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1545296025] [2022-11-23 02:14:20,159 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:20,160 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-23 02:14:20,160 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:20,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-23 02:14:20,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=202, Unknown=0, NotChecked=0, Total=306 [2022-11-23 02:14:20,161 INFO L87 Difference]: Start difference. First operand 66 states and 69 transitions. Second operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 18 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:20,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:20,684 INFO L93 Difference]: Finished difference Result 72 states and 75 transitions. [2022-11-23 02:14:20,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-23 02:14:20,684 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 18 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-11-23 02:14:20,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:20,685 INFO L225 Difference]: With dead ends: 72 [2022-11-23 02:14:20,685 INFO L226 Difference]: Without dead ends: 72 [2022-11-23 02:14:20,685 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=174, Invalid=332, Unknown=0, NotChecked=0, Total=506 [2022-11-23 02:14:20,686 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 45 mSDsluCounter, 230 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 270 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:20,686 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 270 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-23 02:14:20,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-11-23 02:14:20,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2022-11-23 02:14:20,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 70 states have internal predecessors, (71), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:20,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 75 transitions. [2022-11-23 02:14:20,689 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 75 transitions. Word has length 61 [2022-11-23 02:14:20,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:20,689 INFO L495 AbstractCegarLoop]: Abstraction has 72 states and 75 transitions. [2022-11-23 02:14:20,689 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 18 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:20,689 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 75 transitions. [2022-11-23 02:14:20,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2022-11-23 02:14:20,690 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:20,690 INFO L195 NwaCegarLoop]: trace histogram [10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:20,703 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:20,903 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-11-23 02:14:20,903 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:20,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:20,904 INFO L85 PathProgramCache]: Analyzing trace with hash -179470317, now seen corresponding path program 5 times [2022-11-23 02:14:20,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:20,904 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079743478] [2022-11-23 02:14:20,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:20,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:20,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:21,379 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:21,380 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:21,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079743478] [2022-11-23 02:14:21,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079743478] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:21,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [437900110] [2022-11-23 02:14:21,380 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-23 02:14:21,380 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:21,380 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:21,382 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:21,407 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-23 02:14:22,409 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-11-23 02:14:22,410 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 02:14:22,413 INFO L263 TraceCheckSpWp]: Trace formula consists of 342 conjuncts, 25 conjunts are in the unsatisfiable core [2022-11-23 02:14:22,415 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:14:22,738 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:22,738 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:14:23,239 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:23,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [437900110] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:14:23,239 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:14:23,240 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 36 [2022-11-23 02:14:23,240 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943605019] [2022-11-23 02:14:23,240 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:14:23,240 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-23 02:14:23,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:14:23,241 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-23 02:14:23,242 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=362, Invalid=898, Unknown=0, NotChecked=0, Total=1260 [2022-11-23 02:14:23,242 INFO L87 Difference]: Start difference. First operand 72 states and 75 transitions. Second operand has 36 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 36 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:30,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:14:30,210 INFO L93 Difference]: Finished difference Result 84 states and 87 transitions. [2022-11-23 02:14:30,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-11-23 02:14:30,211 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 36 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2022-11-23 02:14:30,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:14:30,212 INFO L225 Difference]: With dead ends: 84 [2022-11-23 02:14:30,212 INFO L226 Difference]: Without dead ends: 84 [2022-11-23 02:14:30,212 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 493 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=648, Invalid=1514, Unknown=0, NotChecked=0, Total=2162 [2022-11-23 02:14:30,213 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 57 mSDsluCounter, 415 mSDsCounter, 0 mSdLazyCounter, 253 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 455 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 253 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-23 02:14:30,213 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 455 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 253 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-23 02:14:30,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-11-23 02:14:30,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2022-11-23 02:14:30,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 80 states have (on average 1.0375) internal successors, (83), 82 states have internal predecessors, (83), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:14:30,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 87 transitions. [2022-11-23 02:14:30,216 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 87 transitions. Word has length 67 [2022-11-23 02:14:30,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:14:30,216 INFO L495 AbstractCegarLoop]: Abstraction has 84 states and 87 transitions. [2022-11-23 02:14:30,217 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 36 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:14:30,217 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 87 transitions. [2022-11-23 02:14:30,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-23 02:14:30,217 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:14:30,217 INFO L195 NwaCegarLoop]: trace histogram [22, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:14:30,228 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-11-23 02:14:30,418 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-11-23 02:14:30,418 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:14:30,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:14:30,419 INFO L85 PathProgramCache]: Analyzing trace with hash -595228845, now seen corresponding path program 6 times [2022-11-23 02:14:30,419 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:14:30,419 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733491818] [2022-11-23 02:14:30,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:14:30,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:14:30,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:14:31,700 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:14:31,700 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:14:31,700 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [733491818] [2022-11-23 02:14:31,700 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [733491818] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:14:31,700 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1995407944] [2022-11-23 02:14:31,700 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-23 02:14:31,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:14:31,701 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:14:31,702 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:14:31,709 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-23 02:14:59,118 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2022-11-23 02:14:59,118 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-23 02:14:59,135 INFO L263 TraceCheckSpWp]: Trace formula consists of 426 conjuncts, 62 conjunts are in the unsatisfiable core [2022-11-23 02:14:59,139 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:15:00,244 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:15:00,244 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:15:02,559 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:15:02,560 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1995407944] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:15:02,560 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:15:02,560 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26] total 72 [2022-11-23 02:15:02,560 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231890678] [2022-11-23 02:15:02,560 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:15:02,561 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 72 states [2022-11-23 02:15:02,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:15:02,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2022-11-23 02:15:02,563 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1310, Invalid=3802, Unknown=0, NotChecked=0, Total=5112 [2022-11-23 02:15:02,563 INFO L87 Difference]: Start difference. First operand 84 states and 87 transitions. Second operand has 72 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 72 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:15:18,205 WARN L233 SmtUtils]: Spent 8.51s on a formula simplification. DAG size of input: 120 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 02:15:29,639 WARN L233 SmtUtils]: Spent 5.83s on a formula simplification. DAG size of input: 114 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 02:18:30,523 WARN L233 SmtUtils]: Spent 30.09s on a formula simplification. DAG size of input: 116 DAG size of output: 26 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 02:18:34,646 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.46s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-23 02:18:35,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-23 02:18:35,344 INFO L93 Difference]: Finished difference Result 108 states and 111 transitions. [2022-11-23 02:18:35,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-11-23 02:18:35,345 INFO L78 Accepts]: Start accepts. Automaton has has 72 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 72 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2022-11-23 02:18:35,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-23 02:18:35,346 INFO L225 Difference]: With dead ends: 108 [2022-11-23 02:18:35,346 INFO L226 Difference]: Without dead ends: 108 [2022-11-23 02:18:35,349 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2190 ImplicationChecksByTransitivity, 210.7s TimeCoverageRelationStatistics Valid=2493, Invalid=6621, Unknown=6, NotChecked=0, Total=9120 [2022-11-23 02:18:35,349 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 514 mSDsluCounter, 688 mSDsCounter, 0 mSdLazyCounter, 1025 mSolverCounterSat, 103 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 728 SdHoareTripleChecker+Invalid, 1128 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 103 IncrementalHoareTripleChecker+Valid, 1025 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.6s IncrementalHoareTripleChecker+Time [2022-11-23 02:18:35,350 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 728 Invalid, 1128 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [103 Valid, 1025 Invalid, 0 Unknown, 0 Unchecked, 5.6s Time] [2022-11-23 02:18:35,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-11-23 02:18:35,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-11-23 02:18:35,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 106 states have internal predecessors, (107), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-11-23 02:18:35,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 111 transitions. [2022-11-23 02:18:35,353 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 111 transitions. Word has length 79 [2022-11-23 02:18:35,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-23 02:18:35,354 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 111 transitions. [2022-11-23 02:18:35,354 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 72 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 72 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:18:35,354 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 111 transitions. [2022-11-23 02:18:35,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2022-11-23 02:18:35,355 INFO L187 NwaCegarLoop]: Found error trace [2022-11-23 02:18:35,355 INFO L195 NwaCegarLoop]: trace histogram [46, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-23 02:18:35,375 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-23 02:18:35,567 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:18:35,567 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-11-23 02:18:35,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-23 02:18:35,568 INFO L85 PathProgramCache]: Analyzing trace with hash 51574227, now seen corresponding path program 7 times [2022-11-23 02:18:35,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-23 02:18:35,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273757408] [2022-11-23 02:18:35,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-23 02:18:35,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-23 02:18:35,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:18:39,120 INFO L134 CoverageAnalysis]: Checked inductivity of 1123 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:18:39,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-23 02:18:39,121 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273757408] [2022-11-23 02:18:39,121 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1273757408] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-23 02:18:39,121 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1092447844] [2022-11-23 02:18:39,121 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-11-23 02:18:39,121 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-23 02:18:39,122 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 [2022-11-23 02:18:39,123 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-23 02:18:39,156 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_1aead778-d466-4f89-8eda-c123d5eee58c/bin/uautomizer-QkZJyEgLgS/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-23 02:18:39,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-23 02:18:39,932 INFO L263 TraceCheckSpWp]: Trace formula consists of 594 conjuncts, 97 conjunts are in the unsatisfiable core [2022-11-23 02:18:39,935 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-23 02:18:44,140 INFO L134 CoverageAnalysis]: Checked inductivity of 1123 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:18:44,140 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-23 02:18:50,759 INFO L134 CoverageAnalysis]: Checked inductivity of 1123 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-11-23 02:18:50,759 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1092447844] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-23 02:18:50,759 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-23 02:18:50,760 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50] total 144 [2022-11-23 02:18:50,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633836641] [2022-11-23 02:18:50,760 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-23 02:18:50,761 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 144 states [2022-11-23 02:18:50,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-23 02:18:50,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 144 interpolants. [2022-11-23 02:18:50,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4934, Invalid=15658, Unknown=0, NotChecked=0, Total=20592 [2022-11-23 02:18:50,769 INFO L87 Difference]: Start difference. First operand 108 states and 111 transitions. Second operand has 144 states, 144 states have (on average 1.2361111111111112) internal successors, (178), 144 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-23 02:20:07,726 WARN L233 SmtUtils]: Spent 25.54s on a formula simplification. DAG size of input: 194 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 02:20:09,740 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 43) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 45 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (<= |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (<= 94 |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1|) (< (mod (+ 44 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:11,764 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 43) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 44 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:13,780 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 43) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:15,795 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:17,816 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:19,829 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:21,840 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:23,855 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:20:25,873 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:25:50,795 WARN L233 SmtUtils]: Spent 2.44m on a formula simplification that was a NOOP. DAG size: 151 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-23 02:25:52,802 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:25:54,810 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:25:56,816 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:25:58,822 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:00,843 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:02,749 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.91s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:04,314 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.57s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:06,323 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:08,338 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.02s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:10,347 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:12,374 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:14,383 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-11-23 02:26:16,420 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:26:18,435 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:26:20,449 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:26:22,460 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:26:24,472 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:26:26,482 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-11-23 02:26:28,508 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0))) is different from false