./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 38b53e6a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6ef2b56a2f4ebf2e6f7f4ededf8760f087ff726b08e36644d8dcb52a8d087cd1 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-25 17:51:37,985 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-25 17:51:37,988 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-25 17:51:38,021 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-25 17:51:38,022 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-25 17:51:38,027 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-25 17:51:38,030 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-25 17:51:38,035 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-25 17:51:38,037 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-25 17:51:38,045 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-25 17:51:38,047 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-25 17:51:38,050 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-25 17:51:38,051 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-25 17:51:38,054 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-25 17:51:38,060 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-25 17:51:38,062 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-25 17:51:38,064 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-25 17:51:38,066 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-25 17:51:38,068 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-25 17:51:38,073 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-25 17:51:38,078 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-25 17:51:38,081 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-25 17:51:38,083 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-25 17:51:38,084 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-25 17:51:38,093 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-25 17:51:38,094 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-25 17:51:38,094 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-25 17:51:38,097 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-25 17:51:38,098 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-25 17:51:38,099 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-25 17:51:38,101 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-25 17:51:38,102 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-25 17:51:38,104 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-25 17:51:38,105 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-25 17:51:38,107 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-25 17:51:38,108 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-25 17:51:38,108 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-25 17:51:38,109 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-25 17:51:38,109 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-25 17:51:38,111 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-25 17:51:38,112 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-25 17:51:38,113 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-25 17:51:38,164 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-25 17:51:38,168 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-25 17:51:38,169 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-25 17:51:38,170 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-25 17:51:38,171 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-25 17:51:38,171 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-25 17:51:38,172 INFO L138 SettingsManager]: * Use SBE=true [2022-11-25 17:51:38,172 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-25 17:51:38,172 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-25 17:51:38,173 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-25 17:51:38,174 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-25 17:51:38,174 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-25 17:51:38,174 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-25 17:51:38,175 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-25 17:51:38,175 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-25 17:51:38,175 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-25 17:51:38,175 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-25 17:51:38,175 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-25 17:51:38,176 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-25 17:51:38,176 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-25 17:51:38,176 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-25 17:51:38,176 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-25 17:51:38,177 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-25 17:51:38,177 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-25 17:51:38,177 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-25 17:51:38,177 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-25 17:51:38,178 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-25 17:51:38,178 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-25 17:51:38,179 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-25 17:51:38,179 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-25 17:51:38,179 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-25 17:51:38,181 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-25 17:51:38,181 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6ef2b56a2f4ebf2e6f7f4ededf8760f087ff726b08e36644d8dcb52a8d087cd1 [2022-11-25 17:51:38,491 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-25 17:51:38,522 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-25 17:51:38,525 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-25 17:51:38,527 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-25 17:51:38,528 INFO L275 PluginConnector]: CDTParser initialized [2022-11-25 17:51:38,529 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/../../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c [2022-11-25 17:51:41,937 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-25 17:51:42,168 INFO L351 CDTParser]: Found 1 translation units. [2022-11-25 17:51:42,169 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c [2022-11-25 17:51:42,180 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/data/fdcdcc0f3/c322806c5885462799bf3ff59e80ca0b/FLAGe69ffb929 [2022-11-25 17:51:42,198 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/data/fdcdcc0f3/c322806c5885462799bf3ff59e80ca0b [2022-11-25 17:51:42,201 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-25 17:51:42,208 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-25 17:51:42,210 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-25 17:51:42,210 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-25 17:51:42,215 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-25 17:51:42,216 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,217 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3d05645b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42, skipping insertion in model container [2022-11-25 17:51:42,217 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,226 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-25 17:51:42,251 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-25 17:51:42,492 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 17:51:42,515 INFO L203 MainTranslator]: Completed pre-run [2022-11-25 17:51:42,549 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 17:51:42,567 INFO L208 MainTranslator]: Completed translation [2022-11-25 17:51:42,568 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42 WrapperNode [2022-11-25 17:51:42,568 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-25 17:51:42,570 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-25 17:51:42,570 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-25 17:51:42,571 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-25 17:51:42,580 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,589 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,614 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 69 [2022-11-25 17:51:42,615 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-25 17:51:42,616 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-25 17:51:42,616 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-25 17:51:42,616 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-25 17:51:42,629 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,629 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,631 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,632 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,638 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,644 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,650 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,652 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,654 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-25 17:51:42,655 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-25 17:51:42,655 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-25 17:51:42,656 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-25 17:51:42,657 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (1/1) ... [2022-11-25 17:51:42,671 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:51:42,686 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:51:42,704 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:51:42,735 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-25 17:51:42,764 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-25 17:51:42,765 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-25 17:51:42,765 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-25 17:51:42,766 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-25 17:51:42,766 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-25 17:51:42,766 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-25 17:51:42,872 INFO L235 CfgBuilder]: Building ICFG [2022-11-25 17:51:42,875 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-25 17:51:43,092 INFO L276 CfgBuilder]: Performing block encoding [2022-11-25 17:51:43,113 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-25 17:51:43,114 INFO L300 CfgBuilder]: Removed 3 assume(true) statements. [2022-11-25 17:51:43,129 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 05:51:43 BoogieIcfgContainer [2022-11-25 17:51:43,129 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-25 17:51:43,131 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-25 17:51:43,131 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-25 17:51:43,136 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-25 17:51:43,137 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 17:51:43,137 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 25.11 05:51:42" (1/3) ... [2022-11-25 17:51:43,139 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7b31295 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 05:51:43, skipping insertion in model container [2022-11-25 17:51:43,139 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 17:51:43,139 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:51:42" (2/3) ... [2022-11-25 17:51:43,140 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7b31295 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 05:51:43, skipping insertion in model container [2022-11-25 17:51:43,140 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 17:51:43,140 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 05:51:43" (3/3) ... [2022-11-25 17:51:43,142 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysOfVariableLength6.c [2022-11-25 17:51:43,260 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-25 17:51:43,261 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-25 17:51:43,261 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-25 17:51:43,261 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-25 17:51:43,261 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-25 17:51:43,261 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-25 17:51:43,262 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-25 17:51:43,262 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-25 17:51:43,269 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:43,294 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 17:51:43,294 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:51:43,294 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:51:43,301 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 17:51:43,301 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2022-11-25 17:51:43,302 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-25 17:51:43,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:43,305 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 17:51:43,306 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:51:43,306 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:51:43,306 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 17:51:43,307 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2022-11-25 17:51:43,322 INFO L748 eck$LassoCheckResult]: Stem: 3#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 7#L25-3true [2022-11-25 17:51:43,323 INFO L750 eck$LassoCheckResult]: Loop: 7#L25-3true assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6#L15-3true assume !(foo_~i~0#1 < foo_~size#1); 11#L15-4true foo_#res#1 := foo_~i~0#1; 12#L18true main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 13#L25-2true main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7#L25-3true [2022-11-25 17:51:43,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:43,330 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-25 17:51:43,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:43,343 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509597170] [2022-11-25 17:51:43,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:43,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:43,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:43,500 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:43,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:43,534 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:51:43,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:43,539 INFO L85 PathProgramCache]: Analyzing trace with hash 38364915, now seen corresponding path program 1 times [2022-11-25 17:51:43,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:43,539 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673647264] [2022-11-25 17:51:43,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:43,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:43,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:51:43,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:43,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:51:43,692 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673647264] [2022-11-25 17:51:43,693 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1673647264] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 17:51:43,693 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 17:51:43,693 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-25 17:51:43,694 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1664024995] [2022-11-25 17:51:43,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 17:51:43,700 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:51:43,701 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:51:43,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-25 17:51:43,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-25 17:51:43,746 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:43,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:51:43,774 INFO L93 Difference]: Finished difference Result 19 states and 22 transitions. [2022-11-25 17:51:43,775 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 22 transitions. [2022-11-25 17:51:43,777 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-11-25 17:51:43,781 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 14 states and 16 transitions. [2022-11-25 17:51:43,782 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2022-11-25 17:51:43,783 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2022-11-25 17:51:43,783 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 16 transitions. [2022-11-25 17:51:43,784 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:51:43,784 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2022-11-25 17:51:43,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 16 transitions. [2022-11-25 17:51:43,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 13. [2022-11-25 17:51:43,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 12 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:43,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 15 transitions. [2022-11-25 17:51:43,839 INFO L240 hiAutomatonCegarLoop]: Abstraction has 13 states and 15 transitions. [2022-11-25 17:51:43,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-25 17:51:43,845 INFO L428 stractBuchiCegarLoop]: Abstraction has 13 states and 15 transitions. [2022-11-25 17:51:43,846 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-25 17:51:43,846 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 15 transitions. [2022-11-25 17:51:43,847 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-25 17:51:43,847 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:51:43,847 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:51:43,848 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 17:51:43,848 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:51:43,849 INFO L748 eck$LassoCheckResult]: Stem: 51#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 52#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 48#L25-3 [2022-11-25 17:51:43,849 INFO L750 eck$LassoCheckResult]: Loop: 48#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 54#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 55#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 57#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 45#L15-4 foo_#res#1 := foo_~i~0#1; 46#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 47#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 48#L25-3 [2022-11-25 17:51:43,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:43,850 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2022-11-25 17:51:43,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:43,851 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369986114] [2022-11-25 17:51:43,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:43,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:43,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:43,867 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:43,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:43,879 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:51:43,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:43,880 INFO L85 PathProgramCache]: Analyzing trace with hash -1732759051, now seen corresponding path program 1 times [2022-11-25 17:51:43,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:43,881 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1851883234] [2022-11-25 17:51:43,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:43,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:43,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:51:44,073 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:44,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:51:44,073 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1851883234] [2022-11-25 17:51:44,074 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1851883234] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 17:51:44,074 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [18311118] [2022-11-25 17:51:44,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:44,075 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 17:51:44,075 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:51:44,079 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 17:51:44,091 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-11-25 17:51:44,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:51:44,175 INFO L263 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-25 17:51:44,178 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:51:44,307 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:44,308 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 17:51:44,345 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:44,345 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [18311118] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 17:51:44,346 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 17:51:44,346 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 7 [2022-11-25 17:51:44,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206788462] [2022-11-25 17:51:44,347 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 17:51:44,347 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:51:44,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:51:44,348 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-11-25 17:51:44,348 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=29, Unknown=0, NotChecked=0, Total=56 [2022-11-25 17:51:44,349 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. cyclomatic complexity: 4 Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:44,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:51:44,417 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2022-11-25 17:51:44,417 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 21 transitions. [2022-11-25 17:51:44,418 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2022-11-25 17:51:44,419 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 21 transitions. [2022-11-25 17:51:44,419 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-11-25 17:51:44,419 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-11-25 17:51:44,420 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 21 transitions. [2022-11-25 17:51:44,420 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:51:44,420 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2022-11-25 17:51:44,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 21 transitions. [2022-11-25 17:51:44,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-11-25 17:51:44,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.105263157894737) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:44,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2022-11-25 17:51:44,424 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2022-11-25 17:51:44,427 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-25 17:51:44,428 INFO L428 stractBuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2022-11-25 17:51:44,429 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-25 17:51:44,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2022-11-25 17:51:44,430 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2022-11-25 17:51:44,432 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:51:44,432 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:51:44,433 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 17:51:44,433 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1] [2022-11-25 17:51:44,433 INFO L748 eck$LassoCheckResult]: Stem: 128#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 129#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 127#L25-3 [2022-11-25 17:51:44,434 INFO L750 eck$LassoCheckResult]: Loop: 127#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 133#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 134#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 136#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 142#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 141#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 140#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 139#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 138#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 137#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 124#L15-4 foo_#res#1 := foo_~i~0#1; 125#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 126#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 127#L25-3 [2022-11-25 17:51:44,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:44,436 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2022-11-25 17:51:44,436 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:44,437 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383146957] [2022-11-25 17:51:44,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:44,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:44,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:44,470 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:44,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:44,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:51:44,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:44,489 INFO L85 PathProgramCache]: Analyzing trace with hash -1316700165, now seen corresponding path program 2 times [2022-11-25 17:51:44,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:44,490 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470238643] [2022-11-25 17:51:44,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:44,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:44,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:51:44,910 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:44,919 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:51:44,919 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470238643] [2022-11-25 17:51:44,920 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470238643] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 17:51:44,920 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1540507332] [2022-11-25 17:51:44,920 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-25 17:51:44,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 17:51:44,921 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:51:44,943 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 17:51:44,946 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-25 17:51:45,046 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-25 17:51:45,047 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 17:51:45,048 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 8 conjunts are in the unsatisfiable core [2022-11-25 17:51:45,050 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:51:45,285 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:45,285 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 17:51:45,437 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:45,437 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1540507332] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 17:51:45,438 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 17:51:45,438 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 16 [2022-11-25 17:51:45,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68924133] [2022-11-25 17:51:45,438 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 17:51:45,441 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:51:45,441 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:51:45,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-25 17:51:45,445 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=146, Unknown=0, NotChecked=0, Total=272 [2022-11-25 17:51:45,446 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. cyclomatic complexity: 4 Second operand has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:45,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:51:45,567 INFO L93 Difference]: Finished difference Result 31 states and 33 transitions. [2022-11-25 17:51:45,567 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 33 transitions. [2022-11-25 17:51:45,575 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2022-11-25 17:51:45,576 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 31 states and 33 transitions. [2022-11-25 17:51:45,576 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2022-11-25 17:51:45,577 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2022-11-25 17:51:45,577 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 33 transitions. [2022-11-25 17:51:45,577 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:51:45,577 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 33 transitions. [2022-11-25 17:51:45,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 33 transitions. [2022-11-25 17:51:45,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2022-11-25 17:51:45,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.064516129032258) internal successors, (33), 30 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:45,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2022-11-25 17:51:45,582 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 33 transitions. [2022-11-25 17:51:45,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-25 17:51:45,583 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 33 transitions. [2022-11-25 17:51:45,584 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-25 17:51:45,584 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 33 transitions. [2022-11-25 17:51:45,585 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2022-11-25 17:51:45,585 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:51:45,585 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:51:45,586 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 17:51:45,586 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 1, 1, 1, 1, 1] [2022-11-25 17:51:45,586 INFO L748 eck$LassoCheckResult]: Stem: 270#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 271#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 269#L25-3 [2022-11-25 17:51:45,587 INFO L750 eck$LassoCheckResult]: Loop: 269#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 278#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 279#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 275#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 276#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 296#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 295#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 294#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 293#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 292#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 291#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 290#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 289#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 288#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 287#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 286#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 285#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 284#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 283#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 282#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 281#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 280#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 266#L15-4 foo_#res#1 := foo_~i~0#1; 267#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 268#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 269#L25-3 [2022-11-25 17:51:45,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:45,588 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2022-11-25 17:51:45,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:45,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085240026] [2022-11-25 17:51:45,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:45,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:45,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:45,598 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:45,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:45,604 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:51:45,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:45,606 INFO L85 PathProgramCache]: Analyzing trace with hash 2131617415, now seen corresponding path program 3 times [2022-11-25 17:51:45,606 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:45,606 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287001784] [2022-11-25 17:51:45,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:45,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:45,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:51:46,097 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:46,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:51:46,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287001784] [2022-11-25 17:51:46,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [287001784] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 17:51:46,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [270673540] [2022-11-25 17:51:46,099 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-25 17:51:46,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 17:51:46,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:51:46,107 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 17:51:46,123 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-25 17:51:46,264 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-11-25 17:51:46,264 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 17:51:46,267 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 14 conjunts are in the unsatisfiable core [2022-11-25 17:51:46,269 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:51:46,754 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:46,755 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 17:51:47,308 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:47,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [270673540] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 17:51:47,309 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 17:51:47,309 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 34 [2022-11-25 17:51:47,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1756223339] [2022-11-25 17:51:47,309 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 17:51:47,310 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:51:47,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:51:47,311 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-25 17:51:47,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=540, Invalid=650, Unknown=0, NotChecked=0, Total=1190 [2022-11-25 17:51:47,312 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. cyclomatic complexity: 4 Second operand has 35 states, 35 states have (on average 1.9714285714285715) internal successors, (69), 34 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:47,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:51:47,469 INFO L93 Difference]: Finished difference Result 55 states and 57 transitions. [2022-11-25 17:51:47,469 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 57 transitions. [2022-11-25 17:51:47,471 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 52 [2022-11-25 17:51:47,471 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 55 states and 57 transitions. [2022-11-25 17:51:47,472 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 55 [2022-11-25 17:51:47,472 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 55 [2022-11-25 17:51:47,472 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 57 transitions. [2022-11-25 17:51:47,472 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:51:47,472 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 57 transitions. [2022-11-25 17:51:47,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 57 transitions. [2022-11-25 17:51:47,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2022-11-25 17:51:47,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 54 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:47,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2022-11-25 17:51:47,477 INFO L240 hiAutomatonCegarLoop]: Abstraction has 55 states and 57 transitions. [2022-11-25 17:51:47,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-25 17:51:47,485 INFO L428 stractBuchiCegarLoop]: Abstraction has 55 states and 57 transitions. [2022-11-25 17:51:47,485 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-25 17:51:47,485 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 57 transitions. [2022-11-25 17:51:47,489 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 52 [2022-11-25 17:51:47,491 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:51:47,491 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:51:47,492 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 17:51:47,493 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [22, 22, 1, 1, 1, 1, 1] [2022-11-25 17:51:47,494 INFO L748 eck$LassoCheckResult]: Stem: 538#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 539#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 537#L25-3 [2022-11-25 17:51:47,494 INFO L750 eck$LassoCheckResult]: Loop: 537#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 546#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 547#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 543#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 544#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 588#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 587#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 586#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 585#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 584#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 583#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 582#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 581#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 580#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 579#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 578#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 577#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 576#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 575#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 574#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 573#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 572#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 571#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 570#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 569#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 568#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 567#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 566#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 565#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 564#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 563#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 562#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 561#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 560#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 559#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 558#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 557#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 556#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 555#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 554#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 553#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 552#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 551#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 550#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 549#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 548#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 534#L15-4 foo_#res#1 := foo_~i~0#1; 535#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 536#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 537#L25-3 [2022-11-25 17:51:47,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:47,499 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2022-11-25 17:51:47,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:47,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120760765] [2022-11-25 17:51:47,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:47,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:47,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:47,511 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:47,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:47,522 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:51:47,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:47,523 INFO L85 PathProgramCache]: Analyzing trace with hash -1575559777, now seen corresponding path program 4 times [2022-11-25 17:51:47,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:47,524 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470353322] [2022-11-25 17:51:47,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:47,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:47,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:51:48,832 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:48,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:51:48,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470353322] [2022-11-25 17:51:48,833 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470353322] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 17:51:48,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2122267990] [2022-11-25 17:51:48,833 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-25 17:51:48,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 17:51:48,834 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:51:48,839 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 17:51:48,844 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-25 17:51:48,987 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-25 17:51:48,987 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 17:51:48,990 INFO L263 TraceCheckSpWp]: Trace formula consists of 276 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-25 17:51:48,995 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:51:50,244 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:50,244 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 17:51:51,898 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:51:51,899 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2122267990] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 17:51:51,899 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 17:51:51,900 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 70 [2022-11-25 17:51:51,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531606669] [2022-11-25 17:51:51,900 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 17:51:51,904 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:51:51,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:51:51,906 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2022-11-25 17:51:51,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2050, Invalid=2920, Unknown=0, NotChecked=0, Total=4970 [2022-11-25 17:51:51,912 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. cyclomatic complexity: 4 Second operand has 71 states, 71 states have (on average 1.9859154929577465) internal successors, (141), 70 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:52,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:51:52,148 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2022-11-25 17:51:52,148 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 77 transitions. [2022-11-25 17:51:52,154 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 72 [2022-11-25 17:51:52,158 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 75 states and 77 transitions. [2022-11-25 17:51:52,158 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 75 [2022-11-25 17:51:52,159 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 75 [2022-11-25 17:51:52,160 INFO L73 IsDeterministic]: Start isDeterministic. Operand 75 states and 77 transitions. [2022-11-25 17:51:52,160 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:51:52,160 INFO L218 hiAutomatonCegarLoop]: Abstraction has 75 states and 77 transitions. [2022-11-25 17:51:52,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states and 77 transitions. [2022-11-25 17:51:52,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2022-11-25 17:51:52,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 74 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:51:52,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 77 transitions. [2022-11-25 17:51:52,166 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 77 transitions. [2022-11-25 17:51:52,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-25 17:51:52,168 INFO L428 stractBuchiCegarLoop]: Abstraction has 75 states and 77 transitions. [2022-11-25 17:51:52,168 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-25 17:51:52,168 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 77 transitions. [2022-11-25 17:51:52,169 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 72 [2022-11-25 17:51:52,169 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:51:52,169 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:51:52,170 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 17:51:52,171 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [32, 32, 1, 1, 1, 1, 1] [2022-11-25 17:51:52,171 INFO L748 eck$LassoCheckResult]: Stem: 1030#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1031#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 1028#L25-3 [2022-11-25 17:51:52,171 INFO L750 eck$LassoCheckResult]: Loop: 1028#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1038#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1039#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1035#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1036#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1100#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1099#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1098#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1097#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1096#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1095#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1094#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1093#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1092#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1091#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1090#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1089#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1088#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1087#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1086#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1085#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1084#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1083#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1082#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1081#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1080#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1079#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1078#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1077#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1076#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1075#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1074#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1073#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1072#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1071#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1070#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1069#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1068#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1067#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1066#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1065#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1064#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1063#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1062#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1061#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1060#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1059#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1058#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1057#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1056#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1055#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1054#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1053#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1052#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1051#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1050#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1049#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1048#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1047#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1046#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1045#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1044#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1043#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1042#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1041#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1040#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 1029#L15-4 foo_#res#1 := foo_~i~0#1; 1026#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 1027#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1028#L25-3 [2022-11-25 17:51:52,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:52,172 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2022-11-25 17:51:52,172 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:52,172 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265649775] [2022-11-25 17:51:52,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:52,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:52,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:52,179 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:52,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:52,184 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:51:52,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:52,185 INFO L85 PathProgramCache]: Analyzing trace with hash 776556339, now seen corresponding path program 5 times [2022-11-25 17:51:52,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:52,185 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221843549] [2022-11-25 17:51:52,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:52,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:52,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:52,269 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:52,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:52,345 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:51:52,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:51:52,346 INFO L85 PathProgramCache]: Analyzing trace with hash -378248015, now seen corresponding path program 1 times [2022-11-25 17:51:52,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:51:52,346 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814249143] [2022-11-25 17:51:52,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:51:52,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:51:52,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:52,440 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:51:52,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:51:52,546 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:55:15,057 WARN L233 SmtUtils]: Spent 3.37m on a formula simplification. DAG size of input: 507 DAG size of output: 317 (called from [L 278] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2022-11-25 17:55:15,198 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,199 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,202 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,207 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,209 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,212 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,214 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,215 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,217 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,219 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,220 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,222 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,223 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,225 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,227 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,229 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,232 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,235 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,237 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,238 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,240 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,245 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,247 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,249 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,250 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,253 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,255 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,256 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,259 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,261 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,266 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,269 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,272 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,273 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,275 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,276 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,279 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,281 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,283 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,288 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,289 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,291 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,293 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,294 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,296 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,298 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,299 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,301 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,302 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,304 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,306 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,307 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,309 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,310 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,313 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,315 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,316 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,318 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,319 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,321 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,323 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,324 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,326 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,328 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,330 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,331 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,333 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,335 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,337 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,338 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,340 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,342 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,343 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,345 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,346 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,348 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,352 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,354 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,355 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,357 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,358 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,360 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,365 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,377 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,392 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,395 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,401 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,405 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,407 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,409 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,410 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,412 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,414 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,416 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,417 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,419 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,421 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,422 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,424 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,426 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,429 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,431 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,433 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,437 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,439 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,441 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,443 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,445 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,447 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,456 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,458 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,464 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,466 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,467 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,469 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,473 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,479 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,481 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,484 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:15,486 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-25 17:55:16,513 INFO L217 Elim1Store]: Index analysis took 1318 ms [2022-11-25 17:55:16,571 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 496 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 367 treesize of output 429 [2022-11-25 17:55:17,892 INFO L210 LassoAnalysis]: Preferences: [2022-11-25 17:55:17,893 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-25 17:55:17,893 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-25 17:55:17,893 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-25 17:55:17,893 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-25 17:55:17,894 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:17,894 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-25 17:55:17,894 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-25 17:55:17,894 INFO L133 ssoRankerPreferences]: Filename of dumped script: ArraysOfVariableLength6.c_Iteration6_Lasso [2022-11-25 17:55:17,894 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-25 17:55:17,895 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-25 17:55:17,924 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:17,934 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:17,936 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:17,939 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:17,943 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:21,617 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:21,620 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:21,630 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:21,632 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:21,635 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:21,638 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:22,214 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-25 17:55:22,228 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-25 17:55:22,230 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,231 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,235 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,238 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,250 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-25 17:55:22,254 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,254 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,255 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,255 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,255 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,258 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,258 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,272 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,283 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,284 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,286 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,296 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,311 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-25 17:55:22,312 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,312 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,312 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,312 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,312 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,314 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,314 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,330 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,341 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,342 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,342 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,344 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,358 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,373 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-25 17:55:22,374 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,374 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,374 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,374 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,374 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,375 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,375 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,384 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,395 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,395 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,396 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,397 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,400 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-25 17:55:22,402 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,415 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,415 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,415 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,415 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,430 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 17:55:22,430 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 17:55:22,446 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,452 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2022-11-25 17:55:22,452 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,452 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,457 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,467 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-25 17:55:22,468 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,486 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,486 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,486 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,487 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,487 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,488 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,488 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,503 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,508 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2022-11-25 17:55:22,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,509 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,510 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,515 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-25 17:55:22,516 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,531 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,531 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,532 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,532 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,532 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,532 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,533 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,547 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,553 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,555 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,605 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,621 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-25 17:55:22,621 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,622 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,622 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,622 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,622 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,623 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,623 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,633 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,646 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,646 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,647 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,649 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,667 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,672 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-25 17:55:22,680 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,680 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,680 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,681 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,681 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,681 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,681 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,695 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,705 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,706 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,707 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,721 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,736 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-25 17:55:22,737 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,737 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,737 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,737 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,737 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,738 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,738 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,752 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,762 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,762 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,764 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,775 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,790 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-11-25 17:55:22,790 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,790 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,790 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,791 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,791 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,791 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,791 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,807 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,811 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,812 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,812 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,813 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,816 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-25 17:55:22,817 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,830 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,830 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,830 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,830 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,830 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,831 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,831 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,832 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,836 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,837 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,838 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,848 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,851 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-25 17:55:22,860 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,860 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,860 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,860 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,860 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,861 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,861 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,863 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,876 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,878 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,878 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,880 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,884 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2022-11-25 17:55:22,885 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,897 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,897 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,897 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,897 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,897 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,898 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,898 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,900 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,904 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,904 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,904 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,905 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,906 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2022-11-25 17:55:22,908 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,921 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,921 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,922 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,922 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,922 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,922 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,922 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,924 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,928 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,928 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,929 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,930 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,934 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2022-11-25 17:55:22,935 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,947 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,947 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,948 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,948 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,948 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,948 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,948 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,950 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,956 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,956 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,957 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,959 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2022-11-25 17:55:22,960 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:22,973 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:22,973 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:22,973 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:22,974 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:22,974 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:22,975 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:22,975 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:22,977 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:22,987 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:22,987 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:22,987 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:22,988 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:22,991 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2022-11-25 17:55:22,992 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:23,004 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:23,004 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:23,004 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:23,004 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:23,004 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:23,005 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:23,005 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:23,021 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:23,024 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:23,024 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:23,025 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:23,026 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:23,029 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2022-11-25 17:55:23,029 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:23,042 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:23,042 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:23,042 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:23,043 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:23,060 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 17:55:23,061 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 17:55:23,087 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-25 17:55:23,141 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2022-11-25 17:55:23,141 INFO L444 ModelExtractionUtils]: 3 out of 13 variables were initially zero. Simplification set additionally 6 variables to zero. [2022-11-25 17:55:23,143 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:23,143 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:23,145 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:23,168 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-25 17:55:23,183 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2022-11-25 17:55:23,193 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-25 17:55:23,193 INFO L513 LassoAnalysis]: Proved termination. [2022-11-25 17:55:23,194 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~#b~0#1.offset, v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_1, ULTIMATE.start_main_~i~1#1) = -1*ULTIMATE.start_main_~#b~0#1.offset + 1*v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_1 - 4*ULTIMATE.start_main_~i~1#1 Supporting invariants [] [2022-11-25 17:55:23,205 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:23,249 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2022-11-25 17:55:23,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:23,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:55:23,307 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-25 17:55:23,308 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:55:23,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:55:23,488 INFO L263 TraceCheckSpWp]: Trace formula consists of 386 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-25 17:55:23,491 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:55:24,126 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-25 17:55:24,130 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-25 17:55:24,132 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 75 states and 77 transitions. cyclomatic complexity: 4 Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:24,188 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 75 states and 77 transitions. cyclomatic complexity: 4. Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 145 states and 151 transitions. Complement of second has 7 states. [2022-11-25 17:55:24,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-25 17:55:24,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:24,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 10 transitions. [2022-11-25 17:55:24,193 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 10 transitions. Stem has 2 letters. Loop has 69 letters. [2022-11-25 17:55:24,195 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 17:55:24,195 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 10 transitions. Stem has 71 letters. Loop has 69 letters. [2022-11-25 17:55:24,196 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 17:55:24,197 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 10 transitions. Stem has 2 letters. Loop has 138 letters. [2022-11-25 17:55:24,198 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 17:55:24,199 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 145 states and 151 transitions. [2022-11-25 17:55:24,202 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-25 17:55:24,204 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 145 states to 141 states and 146 transitions. [2022-11-25 17:55:24,204 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 70 [2022-11-25 17:55:24,204 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72 [2022-11-25 17:55:24,205 INFO L73 IsDeterministic]: Start isDeterministic. Operand 141 states and 146 transitions. [2022-11-25 17:55:24,205 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-25 17:55:24,205 INFO L218 hiAutomatonCegarLoop]: Abstraction has 141 states and 146 transitions. [2022-11-25 17:55:24,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states and 146 transitions. [2022-11-25 17:55:24,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 78. [2022-11-25 17:55:24,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.064102564102564) internal successors, (83), 77 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:24,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 83 transitions. [2022-11-25 17:55:24,217 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78 states and 83 transitions. [2022-11-25 17:55:24,218 INFO L428 stractBuchiCegarLoop]: Abstraction has 78 states and 83 transitions. [2022-11-25 17:55:24,218 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-25 17:55:24,218 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 83 transitions. [2022-11-25 17:55:24,219 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-25 17:55:24,220 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:55:24,220 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:55:24,221 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2022-11-25 17:55:24,221 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-25 17:55:24,222 INFO L748 eck$LassoCheckResult]: Stem: 1502#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1503#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 1511#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1507#L15-3 [2022-11-25 17:55:24,222 INFO L750 eck$LassoCheckResult]: Loop: 1507#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 1508#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 1507#L15-3 [2022-11-25 17:55:24,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:24,223 INFO L85 PathProgramCache]: Analyzing trace with hash 29863, now seen corresponding path program 1 times [2022-11-25 17:55:24,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:24,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219862840] [2022-11-25 17:55:24,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:24,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:24,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:24,234 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:55:24,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:24,240 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:55:24,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:24,241 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 1 times [2022-11-25 17:55:24,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:24,241 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060208400] [2022-11-25 17:55:24,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:24,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:24,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:24,247 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:55:24,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:24,251 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:55:24,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:24,252 INFO L85 PathProgramCache]: Analyzing trace with hash 28698921, now seen corresponding path program 1 times [2022-11-25 17:55:24,252 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:24,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747410774] [2022-11-25 17:55:24,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:24,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:24,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:24,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:55:24,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:24,269 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:55:24,690 INFO L210 LassoAnalysis]: Preferences: [2022-11-25 17:55:24,691 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-25 17:55:24,691 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-25 17:55:24,691 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-25 17:55:24,691 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-25 17:55:24,691 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:24,691 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-25 17:55:24,691 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-25 17:55:24,691 INFO L133 ssoRankerPreferences]: Filename of dumped script: ArraysOfVariableLength6.c_Iteration7_Lasso [2022-11-25 17:55:24,691 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-25 17:55:24,691 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-25 17:55:24,694 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:24,698 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:24,779 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:24,980 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:24,983 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:24,988 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:24,991 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:24,994 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:24,998 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:25,002 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:25,006 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:25,009 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:25,012 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:25,015 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:25,018 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:55:25,460 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-25 17:55:25,461 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-25 17:55:25,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:25,461 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:25,465 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:25,472 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:25,487 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2022-11-25 17:55:25,489 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:25,489 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:25,489 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:25,489 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:25,491 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 17:55:25,491 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 17:55:25,503 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:25,516 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:25,517 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:25,517 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:25,518 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:25,528 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:25,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2022-11-25 17:55:25,546 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:25,547 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 17:55:25,547 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:25,547 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:25,547 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:25,548 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 17:55:25,548 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 17:55:25,557 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:25,568 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:25,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:25,569 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:25,570 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:25,578 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:25,591 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2022-11-25 17:55:25,594 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:25,594 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:25,595 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:25,595 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:25,599 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 17:55:25,599 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 17:55:25,615 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:25,627 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:25,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:25,628 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:25,630 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:25,636 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:25,637 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2022-11-25 17:55:25,653 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:25,653 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:25,654 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:25,654 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:25,661 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 17:55:25,661 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 17:55:25,683 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 17:55:25,693 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:25,694 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:25,694 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:25,695 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:25,700 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 17:55:25,715 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2022-11-25 17:55:25,716 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 17:55:25,717 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 17:55:25,717 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 17:55:25,717 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 17:55:25,735 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 17:55:25,735 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 17:55:25,757 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-25 17:55:25,813 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2022-11-25 17:55:25,813 INFO L444 ModelExtractionUtils]: 12 out of 31 variables were initially zero. Simplification set additionally 16 variables to zero. [2022-11-25 17:55:25,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:55:25,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:55:25,815 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:55:25,819 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-25 17:55:25,831 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2022-11-25 17:55:25,861 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-25 17:55:25,861 INFO L513 LassoAnalysis]: Proved termination. [2022-11-25 17:55:25,861 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~size#1, ULTIMATE.start_foo_~i~0#1) = 1*ULTIMATE.start_foo_~size#1 - 1*ULTIMATE.start_foo_~i~0#1 Supporting invariants [] [2022-11-25 17:55:25,872 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2022-11-25 17:55:25,894 INFO L156 tatePredicateManager]: 6 out of 6 supporting invariants were superfluous and have been removed [2022-11-25 17:55:25,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:25,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:55:25,929 INFO L263 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-25 17:55:25,929 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:55:25,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:55:25,941 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-25 17:55:25,942 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 17:55:25,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:55:25,961 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-25 17:55:25,961 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 78 states and 83 transitions. cyclomatic complexity: 8 Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:25,989 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 78 states and 83 transitions. cyclomatic complexity: 8. Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 199 states and 210 transitions. Complement of second has 7 states. [2022-11-25 17:55:25,990 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-25 17:55:25,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:25,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 19 transitions. [2022-11-25 17:55:25,991 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 3 letters. Loop has 2 letters. [2022-11-25 17:55:25,992 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 17:55:25,992 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 5 letters. Loop has 2 letters. [2022-11-25 17:55:25,992 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 17:55:25,992 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 3 letters. Loop has 4 letters. [2022-11-25 17:55:25,993 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 17:55:25,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 199 states and 210 transitions. [2022-11-25 17:55:25,995 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11 [2022-11-25 17:55:25,996 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 199 states to 155 states and 162 transitions. [2022-11-25 17:55:25,997 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2022-11-25 17:55:25,997 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2022-11-25 17:55:25,997 INFO L73 IsDeterministic]: Start isDeterministic. Operand 155 states and 162 transitions. [2022-11-25 17:55:25,998 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-25 17:55:25,998 INFO L218 hiAutomatonCegarLoop]: Abstraction has 155 states and 162 transitions. [2022-11-25 17:55:25,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states and 162 transitions. [2022-11-25 17:55:26,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 78. [2022-11-25 17:55:26,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.0512820512820513) internal successors, (82), 77 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:26,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2022-11-25 17:55:26,003 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78 states and 82 transitions. [2022-11-25 17:55:26,004 INFO L428 stractBuchiCegarLoop]: Abstraction has 78 states and 82 transitions. [2022-11-25 17:55:26,004 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-25 17:55:26,004 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 82 transitions. [2022-11-25 17:55:26,005 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-25 17:55:26,005 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:55:26,005 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:55:26,005 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-25 17:55:26,005 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 17:55:26,006 INFO L748 eck$LassoCheckResult]: Stem: 1844#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1845#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 1850#L25-3 assume !(main_~i~1#1 % 4294967296 < 32); 1851#L25-4 main_~i~1#1 := 0; 1841#L29-3 [2022-11-25 17:55:26,006 INFO L750 eck$LassoCheckResult]: Loop: 1841#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 1842#L30 assume !(32 != main_#t~mem5#1);havoc main_#t~mem5#1; 1843#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1841#L29-3 [2022-11-25 17:55:26,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:26,007 INFO L85 PathProgramCache]: Analyzing trace with hash 925723, now seen corresponding path program 1 times [2022-11-25 17:55:26,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:26,007 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185901954] [2022-11-25 17:55:26,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:26,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:26,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:55:26,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:55:26,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:55:26,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185901954] [2022-11-25 17:55:26,033 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1185901954] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 17:55:26,033 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 17:55:26,033 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-25 17:55:26,033 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2124858295] [2022-11-25 17:55:26,033 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 17:55:26,034 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 17:55:26,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:26,034 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 1 times [2022-11-25 17:55:26,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:26,035 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [421940107] [2022-11-25 17:55:26,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:26,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:26,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,039 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:55:26,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,043 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:55:26,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:55:26,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-25 17:55:26,119 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-25 17:55:26,119 INFO L87 Difference]: Start difference. First operand 78 states and 82 transitions. cyclomatic complexity: 7 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:26,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:55:26,156 INFO L93 Difference]: Finished difference Result 149 states and 153 transitions. [2022-11-25 17:55:26,156 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 149 states and 153 transitions. [2022-11-25 17:55:26,157 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-25 17:55:26,158 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 149 states to 149 states and 153 transitions. [2022-11-25 17:55:26,158 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2022-11-25 17:55:26,159 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2022-11-25 17:55:26,159 INFO L73 IsDeterministic]: Start isDeterministic. Operand 149 states and 153 transitions. [2022-11-25 17:55:26,159 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2022-11-25 17:55:26,159 INFO L218 hiAutomatonCegarLoop]: Abstraction has 149 states and 153 transitions. [2022-11-25 17:55:26,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states and 153 transitions. [2022-11-25 17:55:26,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 78. [2022-11-25 17:55:26,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 77 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:55:26,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 81 transitions. [2022-11-25 17:55:26,167 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78 states and 81 transitions. [2022-11-25 17:55:26,167 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-25 17:55:26,168 INFO L428 stractBuchiCegarLoop]: Abstraction has 78 states and 81 transitions. [2022-11-25 17:55:26,168 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-11-25 17:55:26,168 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 81 transitions. [2022-11-25 17:55:26,169 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2022-11-25 17:55:26,169 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:55:26,169 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:55:26,171 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [32, 32, 2, 1, 1, 1, 1, 1, 1] [2022-11-25 17:55:26,171 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-25 17:55:26,172 INFO L748 eck$LassoCheckResult]: Stem: 2074#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2075#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 2083#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2084#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2086#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2081#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2082#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2147#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2146#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2145#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2144#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2143#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2142#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2141#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2140#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2139#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2138#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2137#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2136#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2135#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2134#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2133#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2132#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2131#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2130#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2129#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2128#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2127#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2126#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2125#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2124#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2123#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2122#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2121#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2120#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2119#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2118#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2117#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2116#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2115#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2114#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2113#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2112#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2111#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2110#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2109#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2108#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2107#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2106#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2105#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2104#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2103#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2102#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2101#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2100#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2099#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2098#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2097#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2096#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2095#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2094#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2093#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2092#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2091#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2090#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2089#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2088#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2087#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 2070#L15-4 foo_#res#1 := foo_~i~0#1; 2071#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 2072#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2073#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2079#L15-3 [2022-11-25 17:55:26,172 INFO L750 eck$LassoCheckResult]: Loop: 2079#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 2080#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 2079#L15-3 [2022-11-25 17:55:26,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:26,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1159213433, now seen corresponding path program 2 times [2022-11-25 17:55:26,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:26,173 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141222834] [2022-11-25 17:55:26,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:26,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:26,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,289 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:55:26,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,357 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:55:26,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:26,358 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 2 times [2022-11-25 17:55:26,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:26,358 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797484808] [2022-11-25 17:55:26,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:26,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:26,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,363 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:55:26,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,367 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:55:26,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:55:26,368 INFO L85 PathProgramCache]: Analyzing trace with hash 1607580027, now seen corresponding path program 3 times [2022-11-25 17:55:26,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:55:26,368 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196735284] [2022-11-25 17:55:26,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:55:26,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:55:26,475 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2022-11-25 17:55:26,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,494 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:55:26,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:55:26,580 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 18:05:42,472 WARN L233 SmtUtils]: Spent 10.26m on a formula simplification. DAG size of input: 557 DAG size of output: 349 (called from [L 278] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2022-11-25 18:05:42,824 INFO L210 LassoAnalysis]: Preferences: [2022-11-25 18:05:42,824 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-25 18:05:42,824 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-25 18:05:42,824 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-25 18:05:42,824 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-25 18:05:42,824 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:42,824 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-25 18:05:42,824 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-25 18:05:42,824 INFO L133 ssoRankerPreferences]: Filename of dumped script: ArraysOfVariableLength6.c_Iteration9_Lasso [2022-11-25 18:05:42,824 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-25 18:05:42,825 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-25 18:05:42,828 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:42,839 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:42,842 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:42,846 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:42,849 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:42,852 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:42,855 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:43,227 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:43,230 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:43,233 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:43,235 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:43,239 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 18:05:43,656 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-25 18:05:43,656 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-25 18:05:43,657 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,657 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,658 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,661 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2022-11-25 18:05:43,662 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 18:05:43,672 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 18:05:43,672 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 18:05:43,673 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 18:05:43,673 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 18:05:43,674 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 18:05:43,674 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 18:05:43,678 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 18:05:43,681 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2022-11-25 18:05:43,682 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,682 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,683 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,685 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2022-11-25 18:05:43,686 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 18:05:43,698 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 18:05:43,698 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 18:05:43,698 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 18:05:43,698 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 18:05:43,698 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 18:05:43,713 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 18:05:43,713 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 18:05:43,714 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 18:05:43,717 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2022-11-25 18:05:43,718 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,718 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,719 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,722 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2022-11-25 18:05:43,723 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 18:05:43,735 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 18:05:43,735 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 18:05:43,735 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 18:05:43,735 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 18:05:43,736 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 18:05:43,736 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 18:05:43,736 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 18:05:43,738 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 18:05:43,740 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2022-11-25 18:05:43,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,741 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,742 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,743 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2022-11-25 18:05:43,745 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 18:05:43,757 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 18:05:43,758 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 18:05:43,758 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 18:05:43,758 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 18:05:43,758 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 18:05:43,758 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 18:05:43,758 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 18:05:43,787 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 18:05:43,790 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2022-11-25 18:05:43,790 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,791 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,792 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2022-11-25 18:05:43,794 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 18:05:43,806 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 18:05:43,806 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 18:05:43,806 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 18:05:43,806 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 18:05:43,806 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 18:05:43,807 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 18:05:43,807 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 18:05:43,814 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 18:05:43,816 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2022-11-25 18:05:43,817 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,817 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,818 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2022-11-25 18:05:43,822 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 18:05:43,834 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 18:05:43,834 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 18:05:43,834 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 18:05:43,834 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 18:05:43,835 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 18:05:43,835 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 18:05:43,835 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 18:05:43,837 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 18:05:43,839 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2022-11-25 18:05:43,840 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,840 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,841 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,842 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2022-11-25 18:05:43,845 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 18:05:43,858 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 18:05:43,858 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 18:05:43,858 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 18:05:43,858 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 18:05:43,870 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 18:05:43,870 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 18:05:43,895 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-25 18:05:43,946 INFO L443 ModelExtractionUtils]: Simplification made 16 calls to the SMT solver. [2022-11-25 18:05:43,946 INFO L444 ModelExtractionUtils]: 7 out of 31 variables were initially zero. Simplification set additionally 18 variables to zero. [2022-11-25 18:05:43,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 18:05:43,947 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:43,955 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 18:05:43,957 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2022-11-25 18:05:43,957 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-25 18:05:43,972 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2022-11-25 18:05:43,972 INFO L513 LassoAnalysis]: Proved termination. [2022-11-25 18:05:43,972 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~i~0#1, ULTIMATE.start_foo_~b#1.offset) = -2*ULTIMATE.start_foo_~i~0#1 - 2*ULTIMATE.start_foo_~b#1.offset + 63 Supporting invariants [-1*v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_3 + 32 >= 0] [2022-11-25 18:05:43,983 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2022-11-25 18:05:44,012 INFO L156 tatePredicateManager]: 5 out of 7 supporting invariants were superfluous and have been removed [2022-11-25 18:05:44,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:44,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:44,156 INFO L263 TraceCheckSpWp]: Trace formula consists of 438 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-25 18:05:44,159 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:44,185 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-25 18:05:44,185 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-25 18:05:44,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:44,556 INFO L263 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-25 18:05:44,557 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:44,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 18:05:44,594 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.2 stem predicates 2 loop predicates [2022-11-25 18:05:44,594 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 78 states and 81 transitions. cyclomatic complexity: 6 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:44,666 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 78 states and 81 transitions. cyclomatic complexity: 6. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 191 states and 199 transitions. Complement of second has 8 states. [2022-11-25 18:05:44,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-25 18:05:44,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:44,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 14 transitions. [2022-11-25 18:05:44,672 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 14 transitions. Stem has 72 letters. Loop has 2 letters. [2022-11-25 18:05:44,672 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 18:05:44,672 INFO L681 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2022-11-25 18:05:44,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:44,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:44,824 INFO L263 TraceCheckSpWp]: Trace formula consists of 438 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-25 18:05:44,827 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:44,852 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-25 18:05:44,852 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-25 18:05:45,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:45,231 INFO L263 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-25 18:05:45,232 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:45,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 18:05:45,262 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.2 stem predicates 2 loop predicates [2022-11-25 18:05:45,263 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 78 states and 81 transitions. cyclomatic complexity: 6 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:45,322 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 78 states and 81 transitions. cyclomatic complexity: 6. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 191 states and 199 transitions. Complement of second has 8 states. [2022-11-25 18:05:45,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-25 18:05:45,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:45,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 14 transitions. [2022-11-25 18:05:45,324 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 14 transitions. Stem has 72 letters. Loop has 2 letters. [2022-11-25 18:05:45,324 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 18:05:45,324 INFO L681 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2022-11-25 18:05:45,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:45,398 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2022-11-25 18:05:45,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:45,514 INFO L263 TraceCheckSpWp]: Trace formula consists of 438 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-25 18:05:45,516 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:45,543 INFO L321 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-11-25 18:05:45,543 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 9 treesize of output 15 [2022-11-25 18:05:45,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:45,866 INFO L263 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 7 conjunts are in the unsatisfiable core [2022-11-25 18:05:45,866 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:45,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 18:05:45,897 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.2 stem predicates 2 loop predicates [2022-11-25 18:05:45,897 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 78 states and 81 transitions. cyclomatic complexity: 6 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:45,954 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 78 states and 81 transitions. cyclomatic complexity: 6. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 120 states and 126 transitions. Complement of second has 7 states. [2022-11-25 18:05:45,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-25 18:05:45,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:45,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 26 transitions. [2022-11-25 18:05:45,955 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 26 transitions. Stem has 72 letters. Loop has 2 letters. [2022-11-25 18:05:45,956 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 18:05:45,956 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 26 transitions. Stem has 74 letters. Loop has 2 letters. [2022-11-25 18:05:45,956 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 18:05:45,956 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 26 transitions. Stem has 72 letters. Loop has 4 letters. [2022-11-25 18:05:45,956 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 18:05:45,956 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 120 states and 126 transitions. [2022-11-25 18:05:45,957 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-25 18:05:45,958 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 120 states to 76 states and 78 transitions. [2022-11-25 18:05:45,958 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-11-25 18:05:45,958 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2022-11-25 18:05:45,958 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 78 transitions. [2022-11-25 18:05:45,958 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 18:05:45,958 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 78 transitions. [2022-11-25 18:05:45,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 78 transitions. [2022-11-25 18:05:45,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2022-11-25 18:05:45,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.0263157894736843) internal successors, (78), 75 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:45,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 78 transitions. [2022-11-25 18:05:45,971 INFO L240 hiAutomatonCegarLoop]: Abstraction has 76 states and 78 transitions. [2022-11-25 18:05:45,971 INFO L428 stractBuchiCegarLoop]: Abstraction has 76 states and 78 transitions. [2022-11-25 18:05:45,971 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-11-25 18:05:45,972 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 76 states and 78 transitions. [2022-11-25 18:05:45,973 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-25 18:05:45,973 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 18:05:45,973 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 18:05:45,976 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 18:05:45,976 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 18:05:45,977 INFO L748 eck$LassoCheckResult]: Stem: 3406#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3407#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 3411#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3412#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3414#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3409#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3410#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3475#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3474#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3473#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3472#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3471#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3470#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3469#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3468#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3467#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3466#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3465#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3464#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3463#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3462#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3461#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3460#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3459#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3458#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3457#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3456#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3455#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3454#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3453#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3452#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3451#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3450#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3449#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3448#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3447#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3446#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3445#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3444#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3443#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3442#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3441#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3440#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3439#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3438#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3437#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3436#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3435#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3434#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3433#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3432#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3431#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3430#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3429#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3428#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3427#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3426#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3425#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3424#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3423#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3422#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3421#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3420#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3419#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3418#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3417#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 3416#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 3415#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 3400#L15-4 foo_#res#1 := foo_~i~0#1; 3401#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 3402#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3403#L25-3 assume !(main_~i~1#1 % 4294967296 < 32); 3413#L25-4 main_~i~1#1 := 0; 3404#L29-3 [2022-11-25 18:05:45,977 INFO L750 eck$LassoCheckResult]: Loop: 3404#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 3405#L30 assume !(32 != main_#t~mem5#1);havoc main_#t~mem5#1; 3408#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 3404#L29-3 [2022-11-25 18:05:45,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:45,980 INFO L85 PathProgramCache]: Analyzing trace with hash 1575878025, now seen corresponding path program 1 times [2022-11-25 18:05:45,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 18:05:45,981 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12397919] [2022-11-25 18:05:45,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 18:05:45,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 18:05:46,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:46,238 INFO L134 CoverageAnalysis]: Checked inductivity of 1025 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2022-11-25 18:05:46,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 18:05:46,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [12397919] [2022-11-25 18:05:46,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [12397919] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 18:05:46,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1384865598] [2022-11-25 18:05:46,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 18:05:46,239 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 18:05:46,240 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:46,241 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 18:05:46,263 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-11-25 18:05:46,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:46,406 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-25 18:05:46,431 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:46,582 INFO L134 CoverageAnalysis]: Checked inductivity of 1025 backedges. 0 proven. 95 refuted. 0 times theorem prover too weak. 930 trivial. 0 not checked. [2022-11-25 18:05:46,583 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 18:05:46,817 INFO L134 CoverageAnalysis]: Checked inductivity of 1025 backedges. 93 proven. 2 refuted. 0 times theorem prover too weak. 930 trivial. 0 not checked. [2022-11-25 18:05:46,817 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1384865598] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 18:05:46,817 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 18:05:46,817 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6, 6] total 11 [2022-11-25 18:05:46,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637200023] [2022-11-25 18:05:46,818 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 18:05:46,818 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 18:05:46,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:46,818 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 2 times [2022-11-25 18:05:46,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 18:05:46,819 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570494953] [2022-11-25 18:05:46,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 18:05:46,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 18:05:46,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 18:05:46,823 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 18:05:46,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 18:05:46,826 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 18:05:46,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 18:05:46,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-11-25 18:05:46,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2022-11-25 18:05:46,876 INFO L87 Difference]: Start difference. First operand 76 states and 78 transitions. cyclomatic complexity: 4 Second operand has 11 states, 11 states have (on average 2.6363636363636362) internal successors, (29), 11 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:47,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 18:05:47,012 INFO L93 Difference]: Finished difference Result 293 states and 298 transitions. [2022-11-25 18:05:47,012 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 293 states and 298 transitions. [2022-11-25 18:05:47,014 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-25 18:05:47,016 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 293 states to 293 states and 298 transitions. [2022-11-25 18:05:47,016 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2022-11-25 18:05:47,016 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2022-11-25 18:05:47,016 INFO L73 IsDeterministic]: Start isDeterministic. Operand 293 states and 298 transitions. [2022-11-25 18:05:47,017 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 18:05:47,017 INFO L218 hiAutomatonCegarLoop]: Abstraction has 293 states and 298 transitions. [2022-11-25 18:05:47,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states and 298 transitions. [2022-11-25 18:05:47,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 283. [2022-11-25 18:05:47,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 283 states, 283 states have (on average 1.017667844522968) internal successors, (288), 282 states have internal predecessors, (288), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:47,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 283 states to 283 states and 288 transitions. [2022-11-25 18:05:47,027 INFO L240 hiAutomatonCegarLoop]: Abstraction has 283 states and 288 transitions. [2022-11-25 18:05:47,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-25 18:05:47,028 INFO L428 stractBuchiCegarLoop]: Abstraction has 283 states and 288 transitions. [2022-11-25 18:05:47,028 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-11-25 18:05:47,028 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 283 states and 288 transitions. [2022-11-25 18:05:47,030 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-25 18:05:47,030 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 18:05:47,030 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 18:05:47,034 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [128, 128, 4, 4, 4, 4, 4, 1, 1, 1, 1] [2022-11-25 18:05:47,034 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 18:05:47,035 INFO L748 eck$LassoCheckResult]: Stem: 4225#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4226#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 4229#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4230#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4499#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4498#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4496#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4494#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4492#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4490#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4488#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4486#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4484#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4482#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4480#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4478#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4476#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4474#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4472#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4470#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4468#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4466#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4464#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4462#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4460#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4458#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4456#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4454#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4452#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4450#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4448#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4446#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4444#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4442#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4440#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4438#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4436#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4434#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4432#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4430#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4428#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4426#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4424#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4422#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4420#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4418#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4416#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4414#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4412#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4410#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4408#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4406#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4404#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4402#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4400#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4398#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4396#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4394#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4392#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4390#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4388#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4386#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4384#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4382#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4380#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4378#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4375#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4374#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 4217#L15-4 foo_#res#1 := foo_~i~0#1; 4218#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4372#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4231#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4227#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4228#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4233#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4497#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4495#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4493#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4491#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4489#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4487#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4485#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4483#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4481#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4479#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4477#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4475#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4473#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4471#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4469#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4467#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4465#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4463#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4461#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4459#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4457#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4455#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4453#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4451#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4449#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4447#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4445#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4443#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4441#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4439#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4437#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4435#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4433#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4431#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4429#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4427#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4425#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4423#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4421#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4419#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4417#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4415#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4413#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4411#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4409#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4407#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4405#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4403#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4401#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4399#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4397#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4395#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4393#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4391#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4389#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4387#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4385#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4383#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4381#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4379#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4377#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4376#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 4373#L15-4 foo_#res#1 := foo_~i~0#1; 4219#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4220#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4221#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4371#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4370#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4369#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4368#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4367#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4366#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4365#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4364#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4363#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4362#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4361#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4360#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4359#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4358#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4357#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4356#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4355#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4354#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4353#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4352#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4351#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4350#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4349#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4348#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4347#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4346#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4345#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4344#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4343#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4342#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4341#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4340#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4339#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4338#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4337#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4336#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4335#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4334#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4333#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4332#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4331#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4330#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4329#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4328#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4327#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4326#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4325#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4324#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4323#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4322#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4321#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4320#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4319#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4318#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4317#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4316#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4315#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4314#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4313#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4312#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4311#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4310#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4309#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4308#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4307#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 4306#L15-4 foo_#res#1 := foo_~i~0#1; 4305#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4304#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4303#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4235#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4302#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4301#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4300#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4299#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4298#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4297#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4296#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4295#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4294#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4293#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4292#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4291#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4290#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4289#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4288#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4287#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4286#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4285#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4284#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4283#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4282#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4281#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4280#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4279#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4278#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4277#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4276#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4275#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4274#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4273#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4272#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4271#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4270#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4269#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4268#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4267#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4266#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4265#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4264#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4263#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4262#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4261#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4260#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4259#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4258#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4257#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4256#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4255#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4254#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4253#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4252#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4251#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4250#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4249#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4248#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4247#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4246#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4245#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4244#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4243#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4242#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4241#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 4240#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 4239#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 4238#L15-4 foo_#res#1 := foo_~i~0#1; 4237#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 4236#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 4234#L25-3 assume !(main_~i~1#1 % 4294967296 < 32); 4232#L25-4 main_~i~1#1 := 0; 4222#L29-3 [2022-11-25 18:05:47,036 INFO L750 eck$LassoCheckResult]: Loop: 4222#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 4223#L30 assume !(32 != main_#t~mem5#1);havoc main_#t~mem5#1; 4224#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4222#L29-3 [2022-11-25 18:05:47,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:47,036 INFO L85 PathProgramCache]: Analyzing trace with hash 951220635, now seen corresponding path program 2 times [2022-11-25 18:05:47,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 18:05:47,037 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794547868] [2022-11-25 18:05:47,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 18:05:47,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 18:05:47,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:48,451 INFO L134 CoverageAnalysis]: Checked inductivity of 16802 backedges. 0 proven. 12706 refuted. 0 times theorem prover too weak. 4096 trivial. 0 not checked. [2022-11-25 18:05:48,452 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 18:05:48,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794547868] [2022-11-25 18:05:48,452 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [794547868] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 18:05:48,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [792130214] [2022-11-25 18:05:48,452 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-25 18:05:48,453 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 18:05:48,453 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:48,454 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 18:05:48,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-11-25 18:05:48,919 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-25 18:05:48,919 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 18:05:48,928 INFO L263 TraceCheckSpWp]: Trace formula consists of 1574 conjuncts, 22 conjunts are in the unsatisfiable core [2022-11-25 18:05:48,933 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 18:05:50,110 INFO L134 CoverageAnalysis]: Checked inductivity of 16802 backedges. 0 proven. 12974 refuted. 0 times theorem prover too weak. 3828 trivial. 0 not checked. [2022-11-25 18:05:50,111 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 18:05:51,224 INFO L134 CoverageAnalysis]: Checked inductivity of 16802 backedges. 252 proven. 12722 refuted. 0 times theorem prover too weak. 3828 trivial. 0 not checked. [2022-11-25 18:05:51,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [792130214] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 18:05:51,224 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 18:05:51,225 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 12, 12] total 23 [2022-11-25 18:05:51,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238291012] [2022-11-25 18:05:51,225 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 18:05:51,226 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 18:05:51,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:51,226 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 3 times [2022-11-25 18:05:51,226 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 18:05:51,226 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718992198] [2022-11-25 18:05:51,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 18:05:51,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 18:05:51,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 18:05:51,234 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 18:05:51,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 18:05:51,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 18:05:51,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 18:05:51,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-11-25 18:05:51,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=333, Unknown=0, NotChecked=0, Total=506 [2022-11-25 18:05:51,294 INFO L87 Difference]: Start difference. First operand 283 states and 288 transitions. cyclomatic complexity: 10 Second operand has 23 states, 23 states have (on average 3.608695652173913) internal successors, (83), 23 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:52,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 18:05:52,304 INFO L93 Difference]: Finished difference Result 725 states and 736 transitions. [2022-11-25 18:05:52,304 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 725 states and 736 transitions. [2022-11-25 18:05:52,314 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-25 18:05:52,319 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 725 states to 725 states and 736 transitions. [2022-11-25 18:05:52,319 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2022-11-25 18:05:52,319 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2022-11-25 18:05:52,319 INFO L73 IsDeterministic]: Start isDeterministic. Operand 725 states and 736 transitions. [2022-11-25 18:05:52,321 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 18:05:52,321 INFO L218 hiAutomatonCegarLoop]: Abstraction has 725 states and 736 transitions. [2022-11-25 18:05:52,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 725 states and 736 transitions. [2022-11-25 18:05:52,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 725 to 697. [2022-11-25 18:05:52,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 697 states have (on average 1.0157819225251077) internal successors, (708), 696 states have internal predecessors, (708), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 18:05:52,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 708 transitions. [2022-11-25 18:05:52,346 INFO L240 hiAutomatonCegarLoop]: Abstraction has 697 states and 708 transitions. [2022-11-25 18:05:52,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-25 18:05:52,347 INFO L428 stractBuchiCegarLoop]: Abstraction has 697 states and 708 transitions. [2022-11-25 18:05:52,347 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-11-25 18:05:52,347 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 697 states and 708 transitions. [2022-11-25 18:05:52,351 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2022-11-25 18:05:52,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 18:05:52,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 18:05:52,367 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [320, 320, 10, 10, 10, 10, 10, 1, 1, 1, 1] [2022-11-25 18:05:52,367 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 18:05:52,368 INFO L748 eck$LassoCheckResult]: Stem: 6939#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6940#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret3#1, main_#t~post2#1, main_#t~mem5#1, main_#t~post4#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 6946#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6944#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6945#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6949#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7627#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7625#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7623#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7621#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7619#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7617#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7615#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7613#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7611#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7609#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7607#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7605#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7603#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7601#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7599#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7597#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7595#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7593#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7591#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7589#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7587#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7585#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7583#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7581#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7579#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7577#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7575#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7573#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7571#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7569#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7567#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7565#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7563#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7561#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7559#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7557#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7555#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7553#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7551#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7549#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7547#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7545#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7543#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7541#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7539#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7537#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7535#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7533#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7531#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7529#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7527#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7525#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7523#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7521#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7519#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7517#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7515#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7513#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7511#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7509#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7507#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7506#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 6933#L15-4 foo_#res#1 := foo_~i~0#1; 6934#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 6937#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6938#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6947#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7629#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7628#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7626#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7624#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7622#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7620#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7618#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7616#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7614#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7612#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7610#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7608#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7606#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7604#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7602#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7600#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7598#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7596#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7594#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7592#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7590#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7588#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7586#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7584#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7582#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7580#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7578#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7576#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7574#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7572#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7570#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7568#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7566#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7564#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7562#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7560#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7558#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7556#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7554#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7552#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7550#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7548#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7546#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7544#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7542#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7540#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7538#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7536#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7534#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7532#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7530#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7528#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7526#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7524#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7522#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7520#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7518#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7516#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7514#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7512#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7510#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7508#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7505#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7504#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7503#L15-4 foo_#res#1 := foo_~i~0#1; 6935#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 6936#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7502#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7501#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7500#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7499#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7498#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7497#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7496#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7495#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7494#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7493#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7492#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7491#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7490#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7489#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7488#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7487#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7486#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7485#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7484#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7483#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7482#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7481#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7480#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7479#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7478#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7477#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7476#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7475#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7474#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7473#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7472#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7471#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7470#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7469#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7468#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7467#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7466#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7465#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7464#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7463#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7462#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7461#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7460#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7459#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7458#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7457#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7456#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7455#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7454#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7453#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7452#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7451#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7450#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7449#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7448#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7447#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7446#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7445#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7444#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7443#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7442#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7441#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7440#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7439#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7438#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7437#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7436#L15-4 foo_#res#1 := foo_~i~0#1; 7435#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7434#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7433#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7432#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7431#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7430#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7429#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7428#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7427#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7426#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7425#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7424#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7423#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7422#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7421#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7420#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7419#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7418#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7417#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7416#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7415#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7414#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7413#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7412#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7411#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7410#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7409#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7408#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7407#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7406#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7405#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7404#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7403#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7402#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7401#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7400#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7399#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7398#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7397#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7396#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7395#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7394#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7393#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7392#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7391#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7390#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7389#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7388#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7387#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7386#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7385#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7384#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7383#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7382#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7381#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7380#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7379#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7378#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7377#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7376#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7375#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7374#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7373#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7372#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7371#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7370#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7369#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7368#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7367#L15-4 foo_#res#1 := foo_~i~0#1; 7366#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7365#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7364#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7363#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7362#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7361#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7360#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7359#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7358#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7357#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7356#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7355#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7354#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7353#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7352#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7351#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7350#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7349#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7348#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7347#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7346#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7345#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7344#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7343#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7342#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7341#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7340#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7339#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7338#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7337#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7336#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7335#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7334#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7333#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7332#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7331#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7330#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7329#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7328#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7327#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7326#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7325#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7324#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7323#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7322#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7321#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7320#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7319#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7318#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7317#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7316#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7315#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7314#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7313#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7312#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7311#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7310#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7309#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7308#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7307#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7306#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7305#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7304#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7303#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7302#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7301#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7300#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7299#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7298#L15-4 foo_#res#1 := foo_~i~0#1; 7297#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7296#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7295#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7294#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7293#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7292#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7291#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7290#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7289#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7288#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7287#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7286#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7285#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7284#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7283#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7282#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7281#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7280#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7279#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7278#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7277#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7276#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7275#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7274#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7273#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7272#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7271#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7270#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7269#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7268#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7267#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7266#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7265#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7264#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7263#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7262#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7261#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7260#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7259#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7258#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7257#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7256#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7255#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7254#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7253#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7252#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7251#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7250#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7249#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7248#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7247#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7246#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7245#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7244#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7243#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7242#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7241#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7240#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7239#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7238#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7237#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7236#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7235#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7234#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7233#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7232#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7231#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7230#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7229#L15-4 foo_#res#1 := foo_~i~0#1; 7228#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7227#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7226#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7225#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7224#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7223#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7222#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7221#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7220#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7219#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7218#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7217#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7216#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7215#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7214#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7213#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7212#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7211#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7210#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7209#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7208#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7207#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7206#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7205#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7204#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7203#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7202#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7201#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7200#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7199#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7198#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7197#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7196#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7195#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7194#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7193#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7192#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7191#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7190#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7189#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7188#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7187#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7186#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7185#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7184#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7183#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7182#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7181#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7180#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7179#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7178#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7177#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7176#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7175#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7174#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7173#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7172#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7171#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7170#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7169#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7168#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7167#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7166#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7165#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7164#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7163#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7162#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7161#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7160#L15-4 foo_#res#1 := foo_~i~0#1; 7159#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7158#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7157#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7156#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7155#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7154#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7153#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7152#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7151#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7150#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7149#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7148#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7147#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7146#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7145#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7144#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7143#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7142#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7141#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7140#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7139#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7138#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7137#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7136#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7135#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7134#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7133#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7132#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7131#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7130#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7129#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7128#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7127#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7126#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7125#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7124#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7123#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7122#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7121#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7120#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7119#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7118#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7117#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7116#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7115#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7114#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7113#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7112#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7111#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7110#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7109#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7108#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7107#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7106#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7105#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7104#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7103#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7102#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7101#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7100#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7099#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7098#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7097#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7096#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7095#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7094#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7093#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7092#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7091#L15-4 foo_#res#1 := foo_~i~0#1; 7090#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7089#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7088#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7087#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7086#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7085#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7084#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7083#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7082#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7081#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7080#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7079#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7078#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7077#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7076#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7075#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7074#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7073#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7072#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7071#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7070#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7069#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7068#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7067#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7066#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7065#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7064#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7063#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7062#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7061#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7060#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7059#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7058#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7057#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7056#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7055#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7054#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7053#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7052#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7051#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7050#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7049#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7048#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7047#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7046#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7045#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7044#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7043#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7042#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7041#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7040#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7039#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7038#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7037#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7036#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7035#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7034#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7033#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7032#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7031#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7030#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7029#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7028#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7027#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7026#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7025#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7024#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7023#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 7022#L15-4 foo_#res#1 := foo_~i~0#1; 7021#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 7020#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 7019#L25-3 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem1#1, foo_#t~post0#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6951#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7018#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7017#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7016#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7015#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7014#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7013#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7012#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7011#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7010#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7009#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7008#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7007#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7006#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7005#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7004#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7003#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7002#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 7001#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 7000#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6999#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6998#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6997#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6996#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6995#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6994#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6993#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6992#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6991#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6990#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6989#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6988#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6987#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6986#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6985#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6984#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6983#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6982#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6981#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6980#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6979#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6978#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6977#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6976#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6975#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6974#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6973#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6972#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6971#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6970#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6969#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6968#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6967#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6966#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6965#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6964#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6963#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6962#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6961#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6960#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6959#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6958#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6957#L15-3 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem1#1 := read~int(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem1#1];havoc foo_#t~mem1#1; 6956#L15-2 foo_#t~post0#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post0#1;havoc foo_#t~post0#1; 6955#L15-3 assume !(foo_~i~0#1 < foo_~size#1); 6954#L15-4 foo_#res#1 := foo_~i~0#1; 6953#L18 main_#t~ret3#1 := foo_#res#1;assume { :end_inline_foo } true;call write~int(main_#t~ret3#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret3#1; 6952#L25-2 main_#t~post2#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 6950#L25-3 assume !(main_~i~1#1 % 4294967296 < 32); 6948#L25-4 main_~i~1#1 := 0; 6941#L29-3 [2022-11-25 18:05:52,370 INFO L750 eck$LassoCheckResult]: Loop: 6941#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem5#1 := read~int(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 6942#L30 assume !(32 != main_#t~mem5#1);havoc main_#t~mem5#1; 6943#L29-2 main_#t~post4#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 6941#L29-3 [2022-11-25 18:05:52,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 18:05:52,371 INFO L85 PathProgramCache]: Analyzing trace with hash -223676453, now seen corresponding path program 3 times [2022-11-25 18:05:52,371 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 18:05:52,371 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198961109] [2022-11-25 18:05:52,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 18:05:52,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 18:05:53,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 18:05:56,974 INFO L134 CoverageAnalysis]: Checked inductivity of 105515 backedges. 0 proven. 95275 refuted. 0 times theorem prover too weak. 10240 trivial. 0 not checked. [2022-11-25 18:05:56,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 18:05:56,975 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198961109] [2022-11-25 18:05:56,976 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198961109] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 18:05:56,976 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1291311489] [2022-11-25 18:05:56,976 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-25 18:05:56,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 18:05:56,978 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 18:05:56,982 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 18:05:57,000 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d5a82ae2-6bbd-49f0-96bc-75297563fbe7/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process