./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 38b53e6a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-25 15:26:01,615 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-25 15:26:01,618 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-25 15:26:01,661 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-25 15:26:01,662 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-25 15:26:01,665 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-25 15:26:01,667 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-25 15:26:01,671 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-25 15:26:01,674 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-25 15:26:01,679 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-25 15:26:01,681 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-25 15:26:01,682 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-25 15:26:01,684 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-25 15:26:01,686 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-25 15:26:01,688 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-25 15:26:01,689 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-25 15:26:01,693 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-25 15:26:01,694 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-25 15:26:01,696 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-25 15:26:01,701 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-25 15:26:01,703 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-25 15:26:01,706 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-25 15:26:01,707 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-25 15:26:01,708 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-25 15:26:01,716 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-25 15:26:01,716 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-25 15:26:01,717 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-25 15:26:01,718 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-25 15:26:01,718 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-25 15:26:01,719 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-25 15:26:01,719 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-25 15:26:01,720 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-25 15:26:01,721 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-25 15:26:01,721 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-25 15:26:01,722 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-25 15:26:01,722 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-25 15:26:01,723 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-25 15:26:01,723 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-25 15:26:01,724 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-25 15:26:01,724 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-25 15:26:01,725 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-25 15:26:01,730 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-25 15:26:01,768 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-25 15:26:01,768 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-25 15:26:01,769 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-25 15:26:01,769 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-25 15:26:01,771 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-25 15:26:01,771 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-25 15:26:01,771 INFO L138 SettingsManager]: * Use SBE=true [2022-11-25 15:26:01,771 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-25 15:26:01,771 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-25 15:26:01,772 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-25 15:26:01,772 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-25 15:26:01,773 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-25 15:26:01,773 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-25 15:26:01,773 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-25 15:26:01,773 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-25 15:26:01,774 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-25 15:26:01,774 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-25 15:26:01,774 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-25 15:26:01,774 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-25 15:26:01,774 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-25 15:26:01,774 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-25 15:26:01,775 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-25 15:26:01,775 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-25 15:26:01,775 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-25 15:26:01,775 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-25 15:26:01,775 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-25 15:26:01,776 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-25 15:26:01,776 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-25 15:26:01,776 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-25 15:26:01,777 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-25 15:26:01,777 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-25 15:26:01,778 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-25 15:26:01,778 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 [2022-11-25 15:26:02,072 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-25 15:26:02,101 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-25 15:26:02,104 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-25 15:26:02,105 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-25 15:26:02,105 INFO L275 PluginConnector]: CDTParser initialized [2022-11-25 15:26:02,107 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2022-11-25 15:26:05,222 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-25 15:26:05,402 INFO L351 CDTParser]: Found 1 translation units. [2022-11-25 15:26:05,403 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2022-11-25 15:26:05,409 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/data/120500e15/bfb3b3b406a443c9b368a3b1e68fd3f2/FLAGeda92b4c6 [2022-11-25 15:26:05,428 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/data/120500e15/bfb3b3b406a443c9b368a3b1e68fd3f2 [2022-11-25 15:26:05,432 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-25 15:26:05,434 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-25 15:26:05,437 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-25 15:26:05,437 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-25 15:26:05,440 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-25 15:26:05,441 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,442 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6b1e5823 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05, skipping insertion in model container [2022-11-25 15:26:05,443 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,450 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-25 15:26:05,472 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-25 15:26:05,612 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/sv-benchmarks/c/array-industry-pattern/array_mul_init.i[807,820] [2022-11-25 15:26:05,627 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 15:26:05,638 INFO L203 MainTranslator]: Completed pre-run [2022-11-25 15:26:05,649 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/sv-benchmarks/c/array-industry-pattern/array_mul_init.i[807,820] [2022-11-25 15:26:05,656 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 15:26:05,670 INFO L208 MainTranslator]: Completed translation [2022-11-25 15:26:05,671 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05 WrapperNode [2022-11-25 15:26:05,671 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-25 15:26:05,672 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-25 15:26:05,673 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-25 15:26:05,673 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-25 15:26:05,680 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,688 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,715 INFO L138 Inliner]: procedures = 16, calls = 20, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 70 [2022-11-25 15:26:05,716 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-25 15:26:05,718 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-25 15:26:05,718 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-25 15:26:05,718 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-25 15:26:05,727 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,728 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,733 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,733 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,753 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,757 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,758 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,759 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,761 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-25 15:26:05,761 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-25 15:26:05,762 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-25 15:26:05,762 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-25 15:26:05,763 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (1/1) ... [2022-11-25 15:26:05,769 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:05,781 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:05,795 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:05,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-25 15:26:05,847 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-25 15:26:05,847 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-25 15:26:05,847 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-25 15:26:05,848 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-25 15:26:05,848 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-25 15:26:05,848 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-25 15:26:05,848 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-25 15:26:05,849 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-25 15:26:05,935 INFO L235 CfgBuilder]: Building ICFG [2022-11-25 15:26:05,937 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-25 15:26:06,152 INFO L276 CfgBuilder]: Performing block encoding [2022-11-25 15:26:06,158 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-25 15:26:06,159 INFO L300 CfgBuilder]: Removed 3 assume(true) statements. [2022-11-25 15:26:06,161 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 03:26:06 BoogieIcfgContainer [2022-11-25 15:26:06,161 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-25 15:26:06,162 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-25 15:26:06,162 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-25 15:26:06,185 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-25 15:26:06,185 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 15:26:06,186 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 25.11 03:26:05" (1/3) ... [2022-11-25 15:26:06,187 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4f1cda1e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 03:26:06, skipping insertion in model container [2022-11-25 15:26:06,187 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 15:26:06,187 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:26:05" (2/3) ... [2022-11-25 15:26:06,188 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4f1cda1e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 03:26:06, skipping insertion in model container [2022-11-25 15:26:06,188 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 15:26:06,188 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 03:26:06" (3/3) ... [2022-11-25 15:26:06,201 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_mul_init.i [2022-11-25 15:26:06,254 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-25 15:26:06,254 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-25 15:26:06,255 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-25 15:26:06,255 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-25 15:26:06,255 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-25 15:26:06,255 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-25 15:26:06,255 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-25 15:26:06,255 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-25 15:26:06,260 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:06,278 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 12 [2022-11-25 15:26:06,278 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:06,278 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:06,283 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 15:26:06,284 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-25 15:26:06,284 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-25 15:26:06,284 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:06,286 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 12 [2022-11-25 15:26:06,287 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:06,287 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:06,287 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-11-25 15:26:06,287 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-11-25 15:26:06,295 INFO L748 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 3#L21-3true [2022-11-25 15:26:06,295 INFO L750 eck$LassoCheckResult]: Loop: 3#L21-3true assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 17#L21-2true main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 3#L21-3true [2022-11-25 15:26:06,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:06,301 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-11-25 15:26:06,310 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:06,311 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182168133] [2022-11-25 15:26:06,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:06,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:06,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:06,453 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:06,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:06,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:06,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:06,508 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-11-25 15:26:06,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:06,510 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1135148557] [2022-11-25 15:26:06,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:06,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:06,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:06,551 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:06,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:06,575 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:06,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:06,578 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-11-25 15:26:06,579 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:06,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [937710179] [2022-11-25 15:26:06,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:06,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:06,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:06,639 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:06,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:06,676 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:07,320 INFO L210 LassoAnalysis]: Preferences: [2022-11-25 15:26:07,320 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-25 15:26:07,321 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-25 15:26:07,321 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-25 15:26:07,321 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-11-25 15:26:07,321 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:07,322 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-25 15:26:07,322 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-25 15:26:07,322 INFO L133 ssoRankerPreferences]: Filename of dumped script: array_mul_init.i_Iteration1_Lasso [2022-11-25 15:26:07,322 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-25 15:26:07,322 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-25 15:26:07,343 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,353 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,355 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,358 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,363 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,365 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,680 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,683 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,686 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,690 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,692 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,695 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,698 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,701 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,703 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:07,706 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:26:08,023 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-11-25 15:26:08,028 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-11-25 15:26:08,030 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,030 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,038 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,040 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-11-25 15:26:08,043 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,058 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,058 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 15:26:08,059 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,059 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,059 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,063 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 15:26:08,063 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 15:26:08,078 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,093 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,094 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,094 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,097 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,107 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,107 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-11-25 15:26:08,121 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,121 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 15:26:08,121 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,121 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,121 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,123 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 15:26:08,123 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 15:26:08,135 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,142 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,148 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,158 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-11-25 15:26:08,159 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,174 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,174 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 15:26:08,174 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,174 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,174 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,175 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 15:26:08,175 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 15:26:08,181 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,186 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2022-11-25 15:26:08,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,187 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,188 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,190 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-11-25 15:26:08,191 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,201 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,201 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,201 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,201 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,204 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,205 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,220 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,226 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2022-11-25 15:26:08,226 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,230 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,236 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,237 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-11-25 15:26:08,246 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,247 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 15:26:08,247 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,247 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,247 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,248 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 15:26:08,248 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 15:26:08,251 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,262 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,263 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,263 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,264 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-11-25 15:26:08,268 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,282 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,283 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,283 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,283 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,299 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,299 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,313 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,324 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,324 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,325 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,326 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,339 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,356 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-11-25 15:26:08,357 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,357 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,357 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,357 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,364 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,364 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,385 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,397 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,398 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,398 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,399 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,406 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,419 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-11-25 15:26:08,419 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,420 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-11-25 15:26:08,420 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,420 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,420 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,421 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-11-25 15:26:08,421 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-11-25 15:26:08,438 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,451 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,451 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,452 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,454 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,462 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-11-25 15:26:08,475 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,475 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,475 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,475 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,478 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,478 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,489 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,494 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,494 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,494 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,495 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,498 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-11-25 15:26:08,499 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,509 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,509 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,510 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,510 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,513 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,513 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,535 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,544 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,545 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,545 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,546 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,554 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,569 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-11-25 15:26:08,571 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,571 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,571 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,571 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,573 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,574 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,601 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,609 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,610 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,611 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,614 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-11-25 15:26:08,615 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,627 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,627 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,627 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,627 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,631 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,631 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,647 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,658 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2022-11-25 15:26:08,658 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,658 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,659 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,663 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,676 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,676 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,676 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,676 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,678 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,679 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,679 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-11-25 15:26:08,690 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,705 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,706 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,707 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,711 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2022-11-25 15:26:08,711 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,721 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,722 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,722 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,722 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,724 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,725 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,749 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,758 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,758 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,759 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2022-11-25 15:26:08,768 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,781 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,781 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,781 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,782 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,787 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,792 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,804 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-11-25 15:26:08,812 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:08,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,814 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:08,826 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2022-11-25 15:26:08,826 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-11-25 15:26:08,839 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-11-25 15:26:08,839 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-11-25 15:26:08,839 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-11-25 15:26:08,839 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-11-25 15:26:08,848 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-11-25 15:26:08,848 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-11-25 15:26:08,863 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-11-25 15:26:08,913 INFO L443 ModelExtractionUtils]: Simplification made 18 calls to the SMT solver. [2022-11-25 15:26:08,913 INFO L444 ModelExtractionUtils]: 1 out of 19 variables were initially zero. Simplification set additionally 15 variables to zero. [2022-11-25 15:26:08,915 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:26:08,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:08,962 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:26:09,018 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2022-11-25 15:26:09,018 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-11-25 15:26:09,035 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-11-25 15:26:09,035 INFO L513 LassoAnalysis]: Proved termination. [2022-11-25 15:26:09,036 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2022-11-25 15:26:09,047 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:09,099 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2022-11-25 15:26:09,114 INFO L156 tatePredicateManager]: 11 out of 11 supporting invariants were superfluous and have been removed [2022-11-25 15:26:09,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:09,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:09,176 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 2 conjunts are in the unsatisfiable core [2022-11-25 15:26:09,177 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 15:26:09,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:09,202 INFO L263 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-25 15:26:09,202 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 15:26:09,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:26:09,282 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-11-25 15:26:09,284 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:09,331 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 39 states and 57 transitions. Complement of second has 8 states. [2022-11-25 15:26:09,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-11-25 15:26:09,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:09,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-11-25 15:26:09,340 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 28 transitions. Stem has 2 letters. Loop has 2 letters. [2022-11-25 15:26:09,340 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 15:26:09,340 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 28 transitions. Stem has 4 letters. Loop has 2 letters. [2022-11-25 15:26:09,341 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 15:26:09,341 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 28 transitions. Stem has 2 letters. Loop has 4 letters. [2022-11-25 15:26:09,341 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-11-25 15:26:09,342 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 57 transitions. [2022-11-25 15:26:09,345 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-25 15:26:09,348 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 17 states and 24 transitions. [2022-11-25 15:26:09,349 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2022-11-25 15:26:09,349 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-11-25 15:26:09,350 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 24 transitions. [2022-11-25 15:26:09,350 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:26:09,350 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17 states and 24 transitions. [2022-11-25 15:26:09,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 24 transitions. [2022-11-25 15:26:09,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-11-25 15:26:09,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.411764705882353) internal successors, (24), 16 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:09,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 24 transitions. [2022-11-25 15:26:09,377 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 24 transitions. [2022-11-25 15:26:09,377 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 24 transitions. [2022-11-25 15:26:09,377 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-25 15:26:09,377 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 24 transitions. [2022-11-25 15:26:09,378 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-11-25 15:26:09,378 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:09,378 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:09,378 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-11-25 15:26:09,378 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 15:26:09,379 INFO L748 eck$LassoCheckResult]: Stem: 148#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 142#L21-3 assume !(main_~i~0#1 < 100000); 143#L21-4 main_~i~0#1 := 0; 157#L26-3 [2022-11-25 15:26:09,379 INFO L750 eck$LassoCheckResult]: Loop: 157#L26-3 assume !!(main_~i~0#1 < 100000); 158#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 156#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 157#L26-3 [2022-11-25 15:26:09,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:09,379 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-11-25 15:26:09,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:09,380 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150597190] [2022-11-25 15:26:09,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:09,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:09,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:09,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:26:09,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:26:09,437 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150597190] [2022-11-25 15:26:09,438 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [150597190] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 15:26:09,438 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 15:26:09,438 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-25 15:26:09,439 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293121771] [2022-11-25 15:26:09,439 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 15:26:09,441 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 15:26:09,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:09,442 INFO L85 PathProgramCache]: Analyzing trace with hash 53723, now seen corresponding path program 1 times [2022-11-25 15:26:09,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:09,442 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1380240729] [2022-11-25 15:26:09,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:09,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:09,449 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-25 15:26:09,449 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1470810047] [2022-11-25 15:26:09,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:09,449 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:09,449 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:09,451 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:09,458 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-25 15:26:09,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:09,496 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:09,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:09,506 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:09,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:26:09,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-25 15:26:09,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-25 15:26:09,643 INFO L87 Difference]: Start difference. First operand 17 states and 24 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:09,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:26:09,693 INFO L93 Difference]: Finished difference Result 28 states and 34 transitions. [2022-11-25 15:26:09,693 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 34 transitions. [2022-11-25 15:26:09,694 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:09,695 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 26 states and 32 transitions. [2022-11-25 15:26:09,695 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2022-11-25 15:26:09,695 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2022-11-25 15:26:09,695 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 32 transitions. [2022-11-25 15:26:09,696 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:26:09,696 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2022-11-25 15:26:09,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 32 transitions. [2022-11-25 15:26:09,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 17. [2022-11-25 15:26:09,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:09,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-11-25 15:26:09,698 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-11-25 15:26:09,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-25 15:26:09,701 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-11-25 15:26:09,702 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-25 15:26:09,702 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2022-11-25 15:26:09,705 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:09,705 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:09,705 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:09,706 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:26:09,706 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 15:26:09,706 INFO L748 eck$LassoCheckResult]: Stem: 199#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 200#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 193#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 194#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 195#L21-3 assume !(main_~i~0#1 < 100000); 196#L21-4 main_~i~0#1 := 0; 209#L26-3 assume !!(main_~i~0#1 < 100000); 208#L28 [2022-11-25 15:26:09,706 INFO L750 eck$LassoCheckResult]: Loop: 208#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 205#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 206#L26-3 assume !!(main_~i~0#1 < 100000); 208#L28 [2022-11-25 15:26:09,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:09,707 INFO L85 PathProgramCache]: Analyzing trace with hash 1809669547, now seen corresponding path program 1 times [2022-11-25 15:26:09,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:09,707 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915266169] [2022-11-25 15:26:09,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:09,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:09,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:09,819 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:26:09,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:26:09,819 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915266169] [2022-11-25 15:26:09,819 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [915266169] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 15:26:09,820 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [596819593] [2022-11-25 15:26:09,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:09,820 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:09,820 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:09,821 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:09,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-25 15:26:09,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:09,894 INFO L263 TraceCheckSpWp]: Trace formula consists of 72 conjuncts, 3 conjunts are in the unsatisfiable core [2022-11-25 15:26:09,895 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 15:26:09,912 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:26:09,912 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 15:26:09,935 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:26:09,935 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [596819593] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 15:26:09,935 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 15:26:09,936 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-11-25 15:26:09,936 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1322433448] [2022-11-25 15:26:09,936 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 15:26:09,937 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 15:26:09,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:09,937 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 2 times [2022-11-25 15:26:09,937 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:09,938 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405352433] [2022-11-25 15:26:09,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:09,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:09,948 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-25 15:26:09,949 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1353185280] [2022-11-25 15:26:09,949 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-25 15:26:09,953 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:09,953 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:09,961 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:09,977 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-11-25 15:26:10,009 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-25 15:26:10,009 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-25 15:26:10,010 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:10,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:10,018 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:10,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:26:10,142 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-25 15:26:10,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-11-25 15:26:10,143 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 2.0) internal successors, (14), 7 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:10,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:26:10,238 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-11-25 15:26:10,238 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-11-25 15:26:10,239 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:10,240 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-11-25 15:26:10,240 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2022-11-25 15:26:10,240 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2022-11-25 15:26:10,241 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-11-25 15:26:10,241 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:26:10,241 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-11-25 15:26:10,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-11-25 15:26:10,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 32. [2022-11-25 15:26:10,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.21875) internal successors, (39), 31 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:10,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2022-11-25 15:26:10,244 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 39 transitions. [2022-11-25 15:26:10,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-25 15:26:10,246 INFO L428 stractBuchiCegarLoop]: Abstraction has 32 states and 39 transitions. [2022-11-25 15:26:10,246 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-25 15:26:10,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 39 transitions. [2022-11-25 15:26:10,247 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:10,247 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:10,248 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:10,248 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1] [2022-11-25 15:26:10,248 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 15:26:10,249 INFO L748 eck$LassoCheckResult]: Stem: 313#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 314#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 307#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 308#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 309#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 310#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 334#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 332#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 330#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 328#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 327#L21-3 assume !(main_~i~0#1 < 100000); 323#L21-4 main_~i~0#1 := 0; 324#L26-3 assume !!(main_~i~0#1 < 100000); 322#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 319#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 320#L26-3 assume !!(main_~i~0#1 < 100000); 338#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 337#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 336#L26-3 assume !!(main_~i~0#1 < 100000); 335#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 333#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 331#L26-3 assume !!(main_~i~0#1 < 100000); 326#L28 [2022-11-25 15:26:10,249 INFO L750 eck$LassoCheckResult]: Loop: 326#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 329#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 325#L26-3 assume !!(main_~i~0#1 < 100000); 326#L28 [2022-11-25 15:26:10,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:10,250 INFO L85 PathProgramCache]: Analyzing trace with hash -1950889807, now seen corresponding path program 1 times [2022-11-25 15:26:10,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:10,250 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938472507] [2022-11-25 15:26:10,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:10,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:10,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:10,430 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-25 15:26:10,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:26:10,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938472507] [2022-11-25 15:26:10,431 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [938472507] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 15:26:10,432 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1491493288] [2022-11-25 15:26:10,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:10,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:10,432 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:10,435 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:10,457 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-25 15:26:10,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:10,514 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-25 15:26:10,515 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 15:26:10,553 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-25 15:26:10,554 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 15:26:10,628 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2022-11-25 15:26:10,629 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1491493288] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 15:26:10,629 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 15:26:10,629 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-11-25 15:26:10,629 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [162303591] [2022-11-25 15:26:10,629 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 15:26:10,630 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 15:26:10,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:10,630 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 3 times [2022-11-25 15:26:10,630 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:10,631 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017396889] [2022-11-25 15:26:10,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:10,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:10,636 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-25 15:26:10,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2100948716] [2022-11-25 15:26:10,637 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-25 15:26:10,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:10,637 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:10,641 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:10,667 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-25 15:26:10,698 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2022-11-25 15:26:10,699 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-25 15:26:10,699 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:10,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:10,708 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:10,829 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:26:10,829 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-11-25 15:26:10,829 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-11-25 15:26:10,830 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. cyclomatic complexity: 10 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:11,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:26:11,058 INFO L93 Difference]: Finished difference Result 117 states and 139 transitions. [2022-11-25 15:26:11,058 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 139 transitions. [2022-11-25 15:26:11,060 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:11,061 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 117 states and 139 transitions. [2022-11-25 15:26:11,061 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2022-11-25 15:26:11,061 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2022-11-25 15:26:11,062 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117 states and 139 transitions. [2022-11-25 15:26:11,062 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:26:11,062 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117 states and 139 transitions. [2022-11-25 15:26:11,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states and 139 transitions. [2022-11-25 15:26:11,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 62. [2022-11-25 15:26:11,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.2096774193548387) internal successors, (75), 61 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:11,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 75 transitions. [2022-11-25 15:26:11,068 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 75 transitions. [2022-11-25 15:26:11,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-11-25 15:26:11,069 INFO L428 stractBuchiCegarLoop]: Abstraction has 62 states and 75 transitions. [2022-11-25 15:26:11,069 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-11-25 15:26:11,069 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 75 transitions. [2022-11-25 15:26:11,070 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:11,070 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:11,070 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:11,072 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 9, 1, 1, 1, 1] [2022-11-25 15:26:11,072 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 15:26:11,072 INFO L748 eck$LassoCheckResult]: Stem: 604#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 605#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 600#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 601#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 602#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 603#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 615#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 650#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 648#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 646#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 644#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 642#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 640#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 638#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 636#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 634#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 632#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 630#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 628#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 626#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 624#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 622#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 621#L21-3 assume !(main_~i~0#1 < 100000); 616#L21-4 main_~i~0#1 := 0; 617#L26-3 assume !!(main_~i~0#1 < 100000); 618#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 610#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 611#L26-3 assume !!(main_~i~0#1 < 100000); 613#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 614#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 659#L26-3 assume !!(main_~i~0#1 < 100000); 658#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 657#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 656#L26-3 assume !!(main_~i~0#1 < 100000); 655#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 654#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 653#L26-3 assume !!(main_~i~0#1 < 100000); 652#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 651#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 649#L26-3 assume !!(main_~i~0#1 < 100000); 647#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 645#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 643#L26-3 assume !!(main_~i~0#1 < 100000); 641#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 639#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 637#L26-3 assume !!(main_~i~0#1 < 100000); 635#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 633#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 631#L26-3 assume !!(main_~i~0#1 < 100000); 629#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 627#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 625#L26-3 assume !!(main_~i~0#1 < 100000); 620#L28 [2022-11-25 15:26:11,072 INFO L750 eck$LassoCheckResult]: Loop: 620#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 623#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 619#L26-3 assume !!(main_~i~0#1 < 100000); 620#L28 [2022-11-25 15:26:11,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:11,073 INFO L85 PathProgramCache]: Analyzing trace with hash 403223997, now seen corresponding path program 2 times [2022-11-25 15:26:11,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:11,073 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936472415] [2022-11-25 15:26:11,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:11,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:11,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:11,457 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2022-11-25 15:26:11,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:26:11,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1936472415] [2022-11-25 15:26:11,458 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1936472415] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 15:26:11,458 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1676129775] [2022-11-25 15:26:11,458 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-25 15:26:11,458 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:11,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:11,469 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:11,501 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-11-25 15:26:11,598 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-25 15:26:11,598 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 15:26:11,600 INFO L263 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 12 conjunts are in the unsatisfiable core [2022-11-25 15:26:11,603 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 15:26:11,653 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2022-11-25 15:26:11,654 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 15:26:11,907 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2022-11-25 15:26:11,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1676129775] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 15:26:11,908 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 15:26:11,908 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2022-11-25 15:26:11,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899693416] [2022-11-25 15:26:11,908 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 15:26:11,909 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 15:26:11,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:11,909 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 4 times [2022-11-25 15:26:11,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:11,910 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426473316] [2022-11-25 15:26:11,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:11,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:11,914 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-25 15:26:11,915 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1146462846] [2022-11-25 15:26:11,915 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-25 15:26:11,915 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:11,915 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:11,918 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:11,933 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-25 15:26:11,977 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-25 15:26:11,977 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-25 15:26:11,977 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:11,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:11,986 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:12,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:26:12,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-11-25 15:26:12,106 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-11-25 15:26:12,106 INFO L87 Difference]: Start difference. First operand 62 states and 75 transitions. cyclomatic complexity: 16 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:12,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:26:12,641 INFO L93 Difference]: Finished difference Result 249 states and 295 transitions. [2022-11-25 15:26:12,641 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 295 transitions. [2022-11-25 15:26:12,644 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:12,646 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 249 states and 295 transitions. [2022-11-25 15:26:12,646 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 205 [2022-11-25 15:26:12,647 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 205 [2022-11-25 15:26:12,647 INFO L73 IsDeterministic]: Start isDeterministic. Operand 249 states and 295 transitions. [2022-11-25 15:26:12,648 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:26:12,648 INFO L218 hiAutomatonCegarLoop]: Abstraction has 249 states and 295 transitions. [2022-11-25 15:26:12,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states and 295 transitions. [2022-11-25 15:26:12,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 122. [2022-11-25 15:26:12,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 122 states have (on average 1.2049180327868851) internal successors, (147), 121 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:12,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 147 transitions. [2022-11-25 15:26:12,660 INFO L240 hiAutomatonCegarLoop]: Abstraction has 122 states and 147 transitions. [2022-11-25 15:26:12,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-25 15:26:12,661 INFO L428 stractBuchiCegarLoop]: Abstraction has 122 states and 147 transitions. [2022-11-25 15:26:12,661 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-11-25 15:26:12,662 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 122 states and 147 transitions. [2022-11-25 15:26:12,663 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:12,663 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:12,663 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:12,666 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 22, 21, 21, 1, 1, 1, 1] [2022-11-25 15:26:12,666 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 15:26:12,666 INFO L748 eck$LassoCheckResult]: Stem: 1249#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 1250#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 1243#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1244#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1245#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1246#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1344#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1342#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1340#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1338#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1336#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1334#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1332#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1330#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1328#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1326#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1324#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1322#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1320#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1318#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1316#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1314#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1312#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1310#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1308#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1306#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1304#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1302#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1300#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1298#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1296#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1294#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1292#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1290#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1288#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1286#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1284#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1282#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1280#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1278#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1276#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1274#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1272#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1270#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1268#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1266#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1265#L21-3 assume !(main_~i~0#1 < 100000); 1260#L21-4 main_~i~0#1 := 0; 1261#L26-3 assume !!(main_~i~0#1 < 100000); 1262#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1255#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1256#L26-3 assume !!(main_~i~0#1 < 100000); 1258#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1259#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1364#L26-3 assume !!(main_~i~0#1 < 100000); 1363#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1362#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1361#L26-3 assume !!(main_~i~0#1 < 100000); 1360#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1359#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1358#L26-3 assume !!(main_~i~0#1 < 100000); 1357#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1356#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1355#L26-3 assume !!(main_~i~0#1 < 100000); 1354#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1353#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1352#L26-3 assume !!(main_~i~0#1 < 100000); 1351#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1350#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1349#L26-3 assume !!(main_~i~0#1 < 100000); 1348#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1347#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1346#L26-3 assume !!(main_~i~0#1 < 100000); 1345#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1343#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1341#L26-3 assume !!(main_~i~0#1 < 100000); 1339#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1337#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1335#L26-3 assume !!(main_~i~0#1 < 100000); 1333#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1331#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1329#L26-3 assume !!(main_~i~0#1 < 100000); 1327#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1325#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1323#L26-3 assume !!(main_~i~0#1 < 100000); 1321#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1319#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1317#L26-3 assume !!(main_~i~0#1 < 100000); 1315#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1313#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1311#L26-3 assume !!(main_~i~0#1 < 100000); 1309#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1307#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1305#L26-3 assume !!(main_~i~0#1 < 100000); 1303#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1301#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1299#L26-3 assume !!(main_~i~0#1 < 100000); 1297#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1295#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1293#L26-3 assume !!(main_~i~0#1 < 100000); 1291#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1289#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1287#L26-3 assume !!(main_~i~0#1 < 100000); 1285#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1283#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1281#L26-3 assume !!(main_~i~0#1 < 100000); 1279#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1277#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1275#L26-3 assume !!(main_~i~0#1 < 100000); 1273#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 1271#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1269#L26-3 assume !!(main_~i~0#1 < 100000); 1264#L28 [2022-11-25 15:26:12,667 INFO L750 eck$LassoCheckResult]: Loop: 1264#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1267#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1263#L26-3 assume !!(main_~i~0#1 < 100000); 1264#L28 [2022-11-25 15:26:12,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:12,667 INFO L85 PathProgramCache]: Analyzing trace with hash 615339989, now seen corresponding path program 3 times [2022-11-25 15:26:12,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:12,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730680751] [2022-11-25 15:26:12,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:12,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:12,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:13,754 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2022-11-25 15:26:13,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:26:13,755 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730680751] [2022-11-25 15:26:13,755 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730680751] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 15:26:13,755 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1745909173] [2022-11-25 15:26:13,755 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-25 15:26:13,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:13,756 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:13,761 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:13,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-11-25 15:26:22,646 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2022-11-25 15:26:22,646 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 15:26:22,654 INFO L263 TraceCheckSpWp]: Trace formula consists of 618 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-25 15:26:22,658 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 15:26:22,765 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2022-11-25 15:26:22,766 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 15:26:23,698 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2022-11-25 15:26:23,698 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1745909173] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 15:26:23,699 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 15:26:23,699 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2022-11-25 15:26:23,699 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926104469] [2022-11-25 15:26:23,699 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 15:26:23,700 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 15:26:23,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:23,701 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 5 times [2022-11-25 15:26:23,701 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:23,701 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422865999] [2022-11-25 15:26:23,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:23,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:23,706 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-25 15:26:23,707 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1052148268] [2022-11-25 15:26:23,707 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-25 15:26:23,707 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:23,707 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:23,713 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:23,738 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-25 15:26:23,789 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-11-25 15:26:23,789 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-25 15:26:23,790 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:23,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:23,798 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:23,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:26:23,910 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-11-25 15:26:23,911 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-11-25 15:26:23,911 INFO L87 Difference]: Start difference. First operand 122 states and 147 transitions. cyclomatic complexity: 28 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:25,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:26:25,113 INFO L93 Difference]: Finished difference Result 513 states and 607 transitions. [2022-11-25 15:26:25,113 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 513 states and 607 transitions. [2022-11-25 15:26:25,117 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:25,120 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 513 states to 513 states and 607 transitions. [2022-11-25 15:26:25,121 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 421 [2022-11-25 15:26:25,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 421 [2022-11-25 15:26:25,122 INFO L73 IsDeterministic]: Start isDeterministic. Operand 513 states and 607 transitions. [2022-11-25 15:26:25,123 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:26:25,124 INFO L218 hiAutomatonCegarLoop]: Abstraction has 513 states and 607 transitions. [2022-11-25 15:26:25,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 513 states and 607 transitions. [2022-11-25 15:26:25,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 242. [2022-11-25 15:26:25,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.2024793388429753) internal successors, (291), 241 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:25,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 291 transitions. [2022-11-25 15:26:25,136 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 291 transitions. [2022-11-25 15:26:25,137 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-25 15:26:25,137 INFO L428 stractBuchiCegarLoop]: Abstraction has 242 states and 291 transitions. [2022-11-25 15:26:25,138 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-11-25 15:26:25,138 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 291 transitions. [2022-11-25 15:26:25,139 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:25,140 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:25,140 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:25,145 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 46, 45, 45, 1, 1, 1, 1] [2022-11-25 15:26:25,145 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 15:26:25,146 INFO L748 eck$LassoCheckResult]: Stem: 2602#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 2603#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 2596#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2597#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2598#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2599#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2793#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2791#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2789#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2787#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2785#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2783#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2781#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2779#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2777#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2775#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2773#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2771#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2769#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2767#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2765#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2763#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2761#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2759#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2757#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2755#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2753#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2751#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2749#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2747#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2745#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2743#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2741#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2739#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2737#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2735#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2733#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2731#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2729#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2727#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2725#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2723#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2721#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2719#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2717#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2715#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2713#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2711#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2709#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2707#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2705#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2703#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2701#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2699#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2697#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2695#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2693#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2691#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2689#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2687#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2685#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2683#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2681#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2679#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2677#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2675#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2673#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2671#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2669#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2667#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2665#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2663#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2661#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2659#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2657#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2655#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2653#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2651#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2649#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2647#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2645#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2643#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2641#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2639#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2637#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2635#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2633#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2631#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2629#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2627#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2625#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2623#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2621#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2619#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2618#L21-3 assume !(main_~i~0#1 < 100000); 2613#L21-4 main_~i~0#1 := 0; 2614#L26-3 assume !!(main_~i~0#1 < 100000); 2615#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2608#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2609#L26-3 assume !!(main_~i~0#1 < 100000); 2611#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2612#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2837#L26-3 assume !!(main_~i~0#1 < 100000); 2836#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2835#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2834#L26-3 assume !!(main_~i~0#1 < 100000); 2833#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2832#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2831#L26-3 assume !!(main_~i~0#1 < 100000); 2830#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2829#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2828#L26-3 assume !!(main_~i~0#1 < 100000); 2827#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2826#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2825#L26-3 assume !!(main_~i~0#1 < 100000); 2824#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2823#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2822#L26-3 assume !!(main_~i~0#1 < 100000); 2821#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2820#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2819#L26-3 assume !!(main_~i~0#1 < 100000); 2818#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2817#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2816#L26-3 assume !!(main_~i~0#1 < 100000); 2815#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2814#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2813#L26-3 assume !!(main_~i~0#1 < 100000); 2812#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2811#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2810#L26-3 assume !!(main_~i~0#1 < 100000); 2809#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2808#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2807#L26-3 assume !!(main_~i~0#1 < 100000); 2806#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2805#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2804#L26-3 assume !!(main_~i~0#1 < 100000); 2803#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2802#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2801#L26-3 assume !!(main_~i~0#1 < 100000); 2800#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2799#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2798#L26-3 assume !!(main_~i~0#1 < 100000); 2797#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2796#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2795#L26-3 assume !!(main_~i~0#1 < 100000); 2794#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2792#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2790#L26-3 assume !!(main_~i~0#1 < 100000); 2788#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2786#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2784#L26-3 assume !!(main_~i~0#1 < 100000); 2782#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2780#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2778#L26-3 assume !!(main_~i~0#1 < 100000); 2776#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2774#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2772#L26-3 assume !!(main_~i~0#1 < 100000); 2770#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2768#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2766#L26-3 assume !!(main_~i~0#1 < 100000); 2764#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2762#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2760#L26-3 assume !!(main_~i~0#1 < 100000); 2758#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2756#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2754#L26-3 assume !!(main_~i~0#1 < 100000); 2752#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2750#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2748#L26-3 assume !!(main_~i~0#1 < 100000); 2746#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2744#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2742#L26-3 assume !!(main_~i~0#1 < 100000); 2740#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2738#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2736#L26-3 assume !!(main_~i~0#1 < 100000); 2734#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2732#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2730#L26-3 assume !!(main_~i~0#1 < 100000); 2728#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2726#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2724#L26-3 assume !!(main_~i~0#1 < 100000); 2722#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2720#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2718#L26-3 assume !!(main_~i~0#1 < 100000); 2716#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2714#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2712#L26-3 assume !!(main_~i~0#1 < 100000); 2710#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2708#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2706#L26-3 assume !!(main_~i~0#1 < 100000); 2704#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2702#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2700#L26-3 assume !!(main_~i~0#1 < 100000); 2698#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2696#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2694#L26-3 assume !!(main_~i~0#1 < 100000); 2692#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2690#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2688#L26-3 assume !!(main_~i~0#1 < 100000); 2686#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2684#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2682#L26-3 assume !!(main_~i~0#1 < 100000); 2680#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2678#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2676#L26-3 assume !!(main_~i~0#1 < 100000); 2674#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2672#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2670#L26-3 assume !!(main_~i~0#1 < 100000); 2668#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2666#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2664#L26-3 assume !!(main_~i~0#1 < 100000); 2662#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2660#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2658#L26-3 assume !!(main_~i~0#1 < 100000); 2656#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2654#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2652#L26-3 assume !!(main_~i~0#1 < 100000); 2650#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2648#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2646#L26-3 assume !!(main_~i~0#1 < 100000); 2644#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2642#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2640#L26-3 assume !!(main_~i~0#1 < 100000); 2638#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2636#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2634#L26-3 assume !!(main_~i~0#1 < 100000); 2632#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2630#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2628#L26-3 assume !!(main_~i~0#1 < 100000); 2626#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 2624#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2622#L26-3 assume !!(main_~i~0#1 < 100000); 2617#L28 [2022-11-25 15:26:25,146 INFO L750 eck$LassoCheckResult]: Loop: 2617#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2620#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2616#L26-3 assume !!(main_~i~0#1 < 100000); 2617#L28 [2022-11-25 15:26:25,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:25,147 INFO L85 PathProgramCache]: Analyzing trace with hash 982432773, now seen corresponding path program 4 times [2022-11-25 15:26:25,147 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:25,147 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352821962] [2022-11-25 15:26:25,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:25,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:25,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:28,480 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2022-11-25 15:26:28,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:26:28,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352821962] [2022-11-25 15:26:28,481 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1352821962] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 15:26:28,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1834297864] [2022-11-25 15:26:28,481 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-11-25 15:26:28,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:28,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:28,486 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:28,498 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-11-25 15:26:28,834 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-11-25 15:26:28,834 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-25 15:26:28,841 INFO L263 TraceCheckSpWp]: Trace formula consists of 1242 conjuncts, 48 conjunts are in the unsatisfiable core [2022-11-25 15:26:28,847 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-25 15:26:29,078 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2022-11-25 15:26:29,078 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-25 15:26:32,309 INFO L134 CoverageAnalysis]: Checked inductivity of 5131 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2022-11-25 15:26:32,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1834297864] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-25 15:26:32,309 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-25 15:26:32,309 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2022-11-25 15:26:32,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886204835] [2022-11-25 15:26:32,309 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-25 15:26:32,310 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 15:26:32,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:32,311 INFO L85 PathProgramCache]: Analyzing trace with hash 56723, now seen corresponding path program 6 times [2022-11-25 15:26:32,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:32,311 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469228553] [2022-11-25 15:26:32,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:32,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:32,325 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-11-25 15:26:32,325 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [630486556] [2022-11-25 15:26:32,326 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-11-25 15:26:32,326 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:32,326 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:32,333 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:32,356 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-11-25 15:26:32,438 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2022-11-25 15:26:32,438 INFO L229 tOrderPrioritization]: Conjunction of SSA is sat [2022-11-25 15:26:32,438 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:26:32,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:26:32,446 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:26:32,555 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:26:32,556 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-11-25 15:26:32,560 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2022-11-25 15:26:32,560 INFO L87 Difference]: Start difference. First operand 242 states and 291 transitions. cyclomatic complexity: 52 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:36,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:26:36,989 INFO L93 Difference]: Finished difference Result 1041 states and 1231 transitions. [2022-11-25 15:26:36,989 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1041 states and 1231 transitions. [2022-11-25 15:26:36,997 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:37,002 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1041 states to 1041 states and 1231 transitions. [2022-11-25 15:26:37,002 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 853 [2022-11-25 15:26:37,003 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 853 [2022-11-25 15:26:37,003 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1041 states and 1231 transitions. [2022-11-25 15:26:37,004 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:26:37,004 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1041 states and 1231 transitions. [2022-11-25 15:26:37,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1041 states and 1231 transitions. [2022-11-25 15:26:37,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1041 to 482. [2022-11-25 15:26:37,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 482 states have (on average 1.2012448132780082) internal successors, (579), 481 states have internal predecessors, (579), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:26:37,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 579 transitions. [2022-11-25 15:26:37,022 INFO L240 hiAutomatonCegarLoop]: Abstraction has 482 states and 579 transitions. [2022-11-25 15:26:37,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-11-25 15:26:37,023 INFO L428 stractBuchiCegarLoop]: Abstraction has 482 states and 579 transitions. [2022-11-25 15:26:37,024 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-11-25 15:26:37,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 482 states and 579 transitions. [2022-11-25 15:26:37,026 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2022-11-25 15:26:37,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:26:37,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:26:37,035 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 94, 93, 93, 1, 1, 1, 1] [2022-11-25 15:26:37,035 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-11-25 15:26:37,036 INFO L748 eck$LassoCheckResult]: Stem: 5371#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 5372#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet3#1, main_#t~nondet4#1, main_#t~post2#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem10#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~short11#1, main_#t~post5#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 5365#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5366#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5367#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5368#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5754#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5752#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5750#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5748#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5746#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5744#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5742#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5740#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5738#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5736#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5734#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5732#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5730#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5728#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5726#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5724#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5722#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5720#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5718#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5716#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5714#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5712#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5710#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5708#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5706#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5704#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5702#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5700#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5698#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5696#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5694#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5692#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5690#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5688#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5686#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5684#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5682#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5680#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5678#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5676#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5674#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5672#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5670#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5668#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5666#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5664#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5662#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5660#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5658#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5656#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5654#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5652#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5650#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5648#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5646#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5644#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5642#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5640#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5638#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5636#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5634#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5632#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5630#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5628#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5626#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5624#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5622#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5620#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5618#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5616#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5614#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5612#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5610#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5608#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5606#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5604#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5602#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5600#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5598#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5596#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5594#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5592#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5590#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5588#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5586#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5584#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5582#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5580#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5578#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5576#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5574#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5572#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5570#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5568#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5566#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5564#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5562#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5560#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5558#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5556#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5554#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5552#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5550#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5548#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5546#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5544#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5542#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5540#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5538#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5536#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5534#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5532#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5530#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5528#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5526#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5524#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5522#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5520#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5518#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5516#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5514#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5512#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5510#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5508#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5506#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5504#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5502#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5500#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5498#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5496#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5494#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5492#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5490#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5488#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5486#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5484#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5482#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5480#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5478#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5476#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5474#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5472#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5470#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5468#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5466#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5464#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5462#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5460#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5458#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5456#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5454#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5452#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5450#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5448#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5446#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5444#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5442#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5440#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5438#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5436#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5434#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5432#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5430#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5428#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5426#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5424#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5422#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5420#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5418#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5416#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5414#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5412#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5410#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5408#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5406#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5404#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5402#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5400#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5398#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5396#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5394#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5392#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5390#L21-3 assume !!(main_~i~0#1 < 100000);call write~int(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5388#L21-2 main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 5387#L21-3 assume !(main_~i~0#1 < 100000); 5382#L21-4 main_~i~0#1 := 0; 5383#L26-3 assume !!(main_~i~0#1 < 100000); 5384#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5377#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5378#L26-3 assume !!(main_~i~0#1 < 100000); 5380#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5381#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5846#L26-3 assume !!(main_~i~0#1 < 100000); 5845#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5844#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5843#L26-3 assume !!(main_~i~0#1 < 100000); 5842#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5841#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5840#L26-3 assume !!(main_~i~0#1 < 100000); 5839#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5838#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5837#L26-3 assume !!(main_~i~0#1 < 100000); 5836#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5835#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5834#L26-3 assume !!(main_~i~0#1 < 100000); 5833#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5832#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5831#L26-3 assume !!(main_~i~0#1 < 100000); 5830#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5829#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5828#L26-3 assume !!(main_~i~0#1 < 100000); 5827#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5826#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5825#L26-3 assume !!(main_~i~0#1 < 100000); 5824#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5823#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5822#L26-3 assume !!(main_~i~0#1 < 100000); 5821#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5820#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5819#L26-3 assume !!(main_~i~0#1 < 100000); 5818#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5817#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5816#L26-3 assume !!(main_~i~0#1 < 100000); 5815#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5814#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5813#L26-3 assume !!(main_~i~0#1 < 100000); 5812#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5811#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5810#L26-3 assume !!(main_~i~0#1 < 100000); 5809#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5808#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5807#L26-3 assume !!(main_~i~0#1 < 100000); 5806#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5805#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5804#L26-3 assume !!(main_~i~0#1 < 100000); 5803#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5802#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5801#L26-3 assume !!(main_~i~0#1 < 100000); 5800#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5799#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5798#L26-3 assume !!(main_~i~0#1 < 100000); 5797#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5796#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5795#L26-3 assume !!(main_~i~0#1 < 100000); 5794#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5793#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5792#L26-3 assume !!(main_~i~0#1 < 100000); 5791#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5790#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5789#L26-3 assume !!(main_~i~0#1 < 100000); 5788#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5787#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5786#L26-3 assume !!(main_~i~0#1 < 100000); 5785#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5784#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5783#L26-3 assume !!(main_~i~0#1 < 100000); 5782#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5781#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5780#L26-3 assume !!(main_~i~0#1 < 100000); 5779#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5778#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5777#L26-3 assume !!(main_~i~0#1 < 100000); 5776#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5775#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5774#L26-3 assume !!(main_~i~0#1 < 100000); 5773#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5772#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5771#L26-3 assume !!(main_~i~0#1 < 100000); 5770#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5769#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5768#L26-3 assume !!(main_~i~0#1 < 100000); 5767#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5766#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5765#L26-3 assume !!(main_~i~0#1 < 100000); 5764#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5763#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5762#L26-3 assume !!(main_~i~0#1 < 100000); 5761#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5760#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5759#L26-3 assume !!(main_~i~0#1 < 100000); 5758#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5757#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5756#L26-3 assume !!(main_~i~0#1 < 100000); 5755#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5753#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5751#L26-3 assume !!(main_~i~0#1 < 100000); 5749#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5747#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5745#L26-3 assume !!(main_~i~0#1 < 100000); 5743#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5741#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5739#L26-3 assume !!(main_~i~0#1 < 100000); 5737#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5735#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5733#L26-3 assume !!(main_~i~0#1 < 100000); 5731#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5729#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5727#L26-3 assume !!(main_~i~0#1 < 100000); 5725#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5723#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5721#L26-3 assume !!(main_~i~0#1 < 100000); 5719#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5717#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5715#L26-3 assume !!(main_~i~0#1 < 100000); 5713#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5711#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5709#L26-3 assume !!(main_~i~0#1 < 100000); 5707#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5705#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5703#L26-3 assume !!(main_~i~0#1 < 100000); 5701#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5699#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5697#L26-3 assume !!(main_~i~0#1 < 100000); 5695#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5693#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5691#L26-3 assume !!(main_~i~0#1 < 100000); 5689#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5687#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5685#L26-3 assume !!(main_~i~0#1 < 100000); 5683#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5681#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5679#L26-3 assume !!(main_~i~0#1 < 100000); 5677#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5675#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5673#L26-3 assume !!(main_~i~0#1 < 100000); 5671#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5669#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5667#L26-3 assume !!(main_~i~0#1 < 100000); 5665#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5663#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5661#L26-3 assume !!(main_~i~0#1 < 100000); 5659#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5657#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5655#L26-3 assume !!(main_~i~0#1 < 100000); 5653#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5651#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5649#L26-3 assume !!(main_~i~0#1 < 100000); 5647#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5645#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5643#L26-3 assume !!(main_~i~0#1 < 100000); 5641#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5639#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5637#L26-3 assume !!(main_~i~0#1 < 100000); 5635#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5633#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5631#L26-3 assume !!(main_~i~0#1 < 100000); 5629#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5627#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5625#L26-3 assume !!(main_~i~0#1 < 100000); 5623#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5621#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5619#L26-3 assume !!(main_~i~0#1 < 100000); 5617#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5615#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5613#L26-3 assume !!(main_~i~0#1 < 100000); 5611#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5609#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5607#L26-3 assume !!(main_~i~0#1 < 100000); 5605#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5603#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5601#L26-3 assume !!(main_~i~0#1 < 100000); 5599#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5597#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5595#L26-3 assume !!(main_~i~0#1 < 100000); 5593#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5591#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5589#L26-3 assume !!(main_~i~0#1 < 100000); 5587#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5585#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5583#L26-3 assume !!(main_~i~0#1 < 100000); 5581#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5579#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5577#L26-3 assume !!(main_~i~0#1 < 100000); 5575#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5573#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5571#L26-3 assume !!(main_~i~0#1 < 100000); 5569#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5567#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5565#L26-3 assume !!(main_~i~0#1 < 100000); 5563#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5561#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5559#L26-3 assume !!(main_~i~0#1 < 100000); 5557#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5555#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5553#L26-3 assume !!(main_~i~0#1 < 100000); 5551#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5549#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5547#L26-3 assume !!(main_~i~0#1 < 100000); 5545#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5543#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5541#L26-3 assume !!(main_~i~0#1 < 100000); 5539#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5537#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5535#L26-3 assume !!(main_~i~0#1 < 100000); 5533#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5531#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5529#L26-3 assume !!(main_~i~0#1 < 100000); 5527#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5525#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5523#L26-3 assume !!(main_~i~0#1 < 100000); 5521#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5519#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5517#L26-3 assume !!(main_~i~0#1 < 100000); 5515#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5513#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5511#L26-3 assume !!(main_~i~0#1 < 100000); 5509#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5507#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5505#L26-3 assume !!(main_~i~0#1 < 100000); 5503#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5501#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5499#L26-3 assume !!(main_~i~0#1 < 100000); 5497#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5495#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5493#L26-3 assume !!(main_~i~0#1 < 100000); 5491#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5489#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5487#L26-3 assume !!(main_~i~0#1 < 100000); 5485#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5483#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5481#L26-3 assume !!(main_~i~0#1 < 100000); 5479#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5477#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5475#L26-3 assume !!(main_~i~0#1 < 100000); 5473#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5471#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5469#L26-3 assume !!(main_~i~0#1 < 100000); 5467#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5465#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5463#L26-3 assume !!(main_~i~0#1 < 100000); 5461#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5459#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5457#L26-3 assume !!(main_~i~0#1 < 100000); 5455#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5453#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5451#L26-3 assume !!(main_~i~0#1 < 100000); 5449#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5447#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5445#L26-3 assume !!(main_~i~0#1 < 100000); 5443#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5441#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5439#L26-3 assume !!(main_~i~0#1 < 100000); 5437#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5435#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5433#L26-3 assume !!(main_~i~0#1 < 100000); 5431#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5429#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5427#L26-3 assume !!(main_~i~0#1 < 100000); 5425#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5423#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5421#L26-3 assume !!(main_~i~0#1 < 100000); 5419#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5417#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5415#L26-3 assume !!(main_~i~0#1 < 100000); 5413#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5411#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5409#L26-3 assume !!(main_~i~0#1 < 100000); 5407#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5405#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5403#L26-3 assume !!(main_~i~0#1 < 100000); 5401#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5399#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5397#L26-3 assume !!(main_~i~0#1 < 100000); 5395#L28 assume !(0 != main_#t~nondet3#1);havoc main_#t~nondet3#1; 5393#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5391#L26-3 assume !!(main_~i~0#1 < 100000); 5386#L28 [2022-11-25 15:26:37,037 INFO L750 eck$LassoCheckResult]: Loop: 5386#L28 assume 0 != main_#t~nondet3#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;call write~int(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 5389#L26-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 5385#L26-3 assume !!(main_~i~0#1 < 100000); 5386#L28 [2022-11-25 15:26:37,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:26:37,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1696203877, now seen corresponding path program 5 times [2022-11-25 15:26:37,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:26:37,038 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374895795] [2022-11-25 15:26:37,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:26:37,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:26:37,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:26:47,578 INFO L134 CoverageAnalysis]: Checked inductivity of 21763 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 12927 trivial. 0 not checked. [2022-11-25 15:26:47,578 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:26:47,578 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374895795] [2022-11-25 15:26:47,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1374895795] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-25 15:26:47,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2088394759] [2022-11-25 15:26:47,579 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-11-25 15:26:47,579 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-25 15:26:47,579 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:26:47,581 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-25 15:26:47,582 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5bf5b85a-0687-432d-879e-debeaca6536d/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process