./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 38b53e6a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 760447de6aa5739f187553f004f72c898b25c540c6dba08996c9520ae7051de1 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-25 15:45:50,444 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-25 15:45:50,447 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-25 15:45:50,493 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-25 15:45:50,495 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-25 15:45:50,499 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-25 15:45:50,500 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-25 15:45:50,504 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-25 15:45:50,507 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-25 15:45:50,513 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-25 15:45:50,514 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-25 15:45:50,516 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-25 15:45:50,517 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-25 15:45:50,519 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-25 15:45:50,521 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-25 15:45:50,524 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-25 15:45:50,526 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-25 15:45:50,527 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-25 15:45:50,529 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-25 15:45:50,537 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-25 15:45:50,540 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-25 15:45:50,542 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-25 15:45:50,544 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-25 15:45:50,545 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-25 15:45:50,556 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-25 15:45:50,557 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-25 15:45:50,558 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-25 15:45:50,560 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-25 15:45:50,561 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-25 15:45:50,562 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-25 15:45:50,562 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-25 15:45:50,563 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-25 15:45:50,565 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-25 15:45:50,567 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-25 15:45:50,569 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-25 15:45:50,570 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-25 15:45:50,571 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-25 15:45:50,571 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-25 15:45:50,571 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-25 15:45:50,574 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-25 15:45:50,575 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-25 15:45:50,576 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-25 15:45:50,623 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-25 15:45:50,623 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-25 15:45:50,624 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-25 15:45:50,624 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-25 15:45:50,626 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-25 15:45:50,626 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-25 15:45:50,626 INFO L138 SettingsManager]: * Use SBE=true [2022-11-25 15:45:50,627 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-25 15:45:50,627 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-25 15:45:50,627 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-25 15:45:50,628 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-25 15:45:50,629 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-25 15:45:50,629 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-25 15:45:50,629 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-25 15:45:50,629 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-25 15:45:50,630 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-25 15:45:50,630 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-25 15:45:50,630 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-25 15:45:50,630 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-25 15:45:50,631 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-25 15:45:50,631 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-25 15:45:50,631 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-25 15:45:50,631 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-25 15:45:50,632 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-25 15:45:50,632 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-25 15:45:50,632 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-25 15:45:50,633 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-25 15:45:50,633 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-25 15:45:50,634 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-25 15:45:50,634 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-25 15:45:50,634 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-25 15:45:50,636 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-25 15:45:50,637 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 760447de6aa5739f187553f004f72c898b25c540c6dba08996c9520ae7051de1 [2022-11-25 15:45:50,956 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-25 15:45:50,982 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-25 15:45:50,985 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-25 15:45:50,986 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-25 15:45:50,987 INFO L275 PluginConnector]: CDTParser initialized [2022-11-25 15:45:50,988 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-11-25 15:45:54,077 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-25 15:45:54,453 INFO L351 CDTParser]: Found 1 translation units. [2022-11-25 15:45:54,455 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-11-25 15:45:54,473 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/data/8402fb915/0b25a6599b134e05a5577991d3f520d0/FLAG5c15c6000 [2022-11-25 15:45:54,495 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/data/8402fb915/0b25a6599b134e05a5577991d3f520d0 [2022-11-25 15:45:54,499 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-25 15:45:54,501 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-25 15:45:54,505 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-25 15:45:54,505 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-25 15:45:54,510 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-25 15:45:54,511 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 03:45:54" (1/1) ... [2022-11-25 15:45:54,512 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6222b74a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:54, skipping insertion in model container [2022-11-25 15:45:54,513 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 03:45:54" (1/1) ... [2022-11-25 15:45:54,523 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-25 15:45:54,590 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-25 15:45:54,949 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c[20047,20060] [2022-11-25 15:45:54,950 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 15:45:54,978 INFO L203 MainTranslator]: Completed pre-run [2022-11-25 15:45:55,078 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c[20047,20060] [2022-11-25 15:45:55,079 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 15:45:55,109 INFO L208 MainTranslator]: Completed translation [2022-11-25 15:45:55,109 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55 WrapperNode [2022-11-25 15:45:55,110 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-25 15:45:55,111 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-25 15:45:55,111 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-25 15:45:55,111 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-25 15:45:55,119 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,150 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,188 INFO L138 Inliner]: procedures = 27, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 400 [2022-11-25 15:45:55,188 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-25 15:45:55,189 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-25 15:45:55,189 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-25 15:45:55,189 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-25 15:45:55,197 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,198 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,201 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,201 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,209 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,216 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,219 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,221 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,224 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-25 15:45:55,225 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-25 15:45:55,225 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-25 15:45:55,226 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-25 15:45:55,227 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (1/1) ... [2022-11-25 15:45:55,233 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:45:55,267 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 15:45:55,289 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 15:45:55,300 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b6b90fb5-be88-4453-a657-d30f047b1196/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-25 15:45:55,336 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-25 15:45:55,336 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-25 15:45:55,337 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-25 15:45:55,337 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-25 15:45:55,508 INFO L235 CfgBuilder]: Building ICFG [2022-11-25 15:45:55,511 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-25 15:45:56,047 INFO L276 CfgBuilder]: Performing block encoding [2022-11-25 15:45:56,055 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-25 15:45:56,056 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-25 15:45:56,058 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 03:45:56 BoogieIcfgContainer [2022-11-25 15:45:56,059 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-25 15:45:56,060 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-25 15:45:56,060 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-25 15:45:56,064 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-25 15:45:56,065 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 15:45:56,066 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 25.11 03:45:54" (1/3) ... [2022-11-25 15:45:56,067 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6a3ea18a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 03:45:56, skipping insertion in model container [2022-11-25 15:45:56,067 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 15:45:56,067 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 03:45:55" (2/3) ... [2022-11-25 15:45:56,068 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6a3ea18a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 03:45:56, skipping insertion in model container [2022-11-25 15:45:56,068 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 15:45:56,068 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 03:45:56" (3/3) ... [2022-11-25 15:45:56,070 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-11-25 15:45:56,122 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-25 15:45:56,122 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-25 15:45:56,123 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-25 15:45:56,123 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-25 15:45:56,123 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-25 15:45:56,123 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-25 15:45:56,123 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-25 15:45:56,123 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-25 15:45:56,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:56,160 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2022-11-25 15:45:56,160 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:45:56,161 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:45:56,171 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:56,172 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:56,172 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-25 15:45:56,174 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:56,192 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2022-11-25 15:45:56,194 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:45:56,194 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:45:56,197 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:56,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:56,207 INFO L748 eck$LassoCheckResult]: Stem: 103#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 35#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 107#L263true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 113#L263-1true init_#res#1 := init_~tmp~0#1; 93#L464true main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 38#L22true assume !(0 == assume_abort_if_not_~cond#1); 87#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 11#L548-2true [2022-11-25 15:45:56,215 INFO L750 eck$LassoCheckResult]: Loop: 11#L548-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 33#L85true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 6#L85-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 48#L114true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 36#L114-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 26#L139true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 16#L139-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 73#L164true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 51#L164-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 76#L189true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 45#L189-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 106#L214true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 13#L214-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 23#L239true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 43#L239-2true assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 30#L472true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 88#L472-1true check_#res#1 := check_~tmp~1#1; 101#L492true main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 84#L583true assume !(0 == assert_~arg#1 % 256); 42#L578true assume { :end_inline_assert } true; 11#L548-2true [2022-11-25 15:45:56,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:56,227 INFO L85 PathProgramCache]: Analyzing trace with hash 2087378158, now seen corresponding path program 1 times [2022-11-25 15:45:56,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:56,237 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991069321] [2022-11-25 15:45:56,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:56,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:56,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:45:56,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:45:56,659 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:45:56,659 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991069321] [2022-11-25 15:45:56,660 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [991069321] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 15:45:56,660 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 15:45:56,661 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-25 15:45:56,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685292662] [2022-11-25 15:45:56,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 15:45:56,667 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 15:45:56,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:56,668 INFO L85 PathProgramCache]: Analyzing trace with hash 873411785, now seen corresponding path program 1 times [2022-11-25 15:45:56,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:56,669 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039158657] [2022-11-25 15:45:56,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:56,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:56,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:45:57,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:45:57,286 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:45:57,287 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039158657] [2022-11-25 15:45:57,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2039158657] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 15:45:57,287 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 15:45:57,287 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-25 15:45:57,287 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793312023] [2022-11-25 15:45:57,288 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 15:45:57,289 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 15:45:57,290 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:45:57,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-25 15:45:57,335 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-25 15:45:57,339 INFO L87 Difference]: Start difference. First operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:57,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:45:57,524 INFO L93 Difference]: Finished difference Result 114 states and 197 transitions. [2022-11-25 15:45:57,526 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 197 transitions. [2022-11-25 15:45:57,531 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-11-25 15:45:57,535 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 110 states and 144 transitions. [2022-11-25 15:45:57,536 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2022-11-25 15:45:57,536 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2022-11-25 15:45:57,537 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 144 transitions. [2022-11-25 15:45:57,538 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:45:57,538 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-11-25 15:45:57,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 144 transitions. [2022-11-25 15:45:57,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-11-25 15:45:57,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.309090909090909) internal successors, (144), 109 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:57,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 144 transitions. [2022-11-25 15:45:57,579 INFO L240 hiAutomatonCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-11-25 15:45:57,580 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-25 15:45:57,586 INFO L428 stractBuchiCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-11-25 15:45:57,587 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-25 15:45:57,587 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 144 transitions. [2022-11-25 15:45:57,594 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-11-25 15:45:57,594 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:45:57,595 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:45:57,597 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:57,600 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:57,600 INFO L748 eck$LassoCheckResult]: Stem: 354#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 303#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 304#L263 assume 0 == ~r1~0 % 256; 325#L264 assume ~id1~0 >= 0; 326#L265 assume 0 == ~st1~0; 271#L266 assume ~send1~0 == ~id1~0; 272#L267 assume 0 == ~mode1~0 % 256; 277#L268 assume ~id2~0 >= 0; 278#L269 assume 0 == ~st2~0; 263#L270 assume ~send2~0 == ~id2~0; 264#L271 assume 0 == ~mode2~0 % 256; 294#L272 assume ~id3~0 >= 0; 310#L273 assume 0 == ~st3~0; 324#L274 assume ~send3~0 == ~id3~0; 345#L275 assume 0 == ~mode3~0 % 256; 249#L276 assume ~id4~0 >= 0; 250#L277 assume 0 == ~st4~0; 355#L278 assume ~send4~0 == ~id4~0; 317#L279 assume 0 == ~mode4~0 % 256; 318#L280 assume ~id5~0 >= 0; 273#L281 assume 0 == ~st5~0; 251#L282 assume ~send5~0 == ~id5~0; 252#L283 assume 0 == ~mode5~0 % 256; 327#L284 assume ~id6~0 >= 0; 328#L285 assume 0 == ~st6~0; 342#L286 assume ~send6~0 == ~id6~0; 332#L287 assume 0 == ~mode6~0 % 256; 285#L288 assume ~id7~0 >= 0; 286#L289 assume 0 == ~st7~0; 296#L290 assume ~send7~0 == ~id7~0; 338#L291 assume 0 == ~mode7~0 % 256; 339#L292 assume ~id1~0 != ~id2~0; 346#L293 assume ~id1~0 != ~id3~0; 353#L294 assume ~id1~0 != ~id4~0; 258#L295 assume ~id1~0 != ~id5~0; 259#L296 assume ~id1~0 != ~id6~0; 295#L297 assume ~id1~0 != ~id7~0; 292#L298 assume ~id2~0 != ~id3~0; 293#L299 assume ~id2~0 != ~id4~0; 302#L300 assume ~id2~0 != ~id5~0; 333#L301 assume ~id2~0 != ~id6~0; 340#L302 assume ~id2~0 != ~id7~0; 341#L303 assume ~id3~0 != ~id4~0; 348#L304 assume ~id3~0 != ~id5~0; 329#L305 assume ~id3~0 != ~id6~0; 330#L306 assume ~id3~0 != ~id7~0; 336#L307 assume ~id4~0 != ~id5~0; 267#L308 assume ~id4~0 != ~id6~0; 268#L309 assume ~id4~0 != ~id7~0; 334#L310 assume ~id5~0 != ~id6~0; 315#L311 assume ~id5~0 != ~id7~0; 316#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 356#L263-1 init_#res#1 := init_~tmp~0#1; 351#L464 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 307#L22 assume !(0 == assume_abort_if_not_~cond#1); 308#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 265#L548-2 [2022-11-25 15:45:57,601 INFO L750 eck$LassoCheckResult]: Loop: 265#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 266#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 253#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 254#L114 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 305#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 290#L139 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 274#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 275#L164 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 322#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 323#L189 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 313#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 314#L214 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 269#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 270#L239 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 288#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 297#L472 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 283#L472-1 check_#res#1 := check_~tmp~1#1; 349#L492 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 347#L583 assume !(0 == assert_~arg#1 % 256); 311#L578 assume { :end_inline_assert } true; 265#L548-2 [2022-11-25 15:45:57,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:57,601 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 1 times [2022-11-25 15:45:57,602 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:57,602 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896848908] [2022-11-25 15:45:57,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:57,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:57,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:57,642 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:45:57,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:57,723 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:45:57,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:57,726 INFO L85 PathProgramCache]: Analyzing trace with hash 873411785, now seen corresponding path program 2 times [2022-11-25 15:45:57,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:57,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [368582612] [2022-11-25 15:45:57,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:57,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:57,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:45:58,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:45:58,082 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:45:58,082 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [368582612] [2022-11-25 15:45:58,082 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [368582612] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 15:45:58,082 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 15:45:58,082 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-25 15:45:58,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206807316] [2022-11-25 15:45:58,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 15:45:58,083 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 15:45:58,083 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:45:58,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-25 15:45:58,084 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-25 15:45:58,084 INFO L87 Difference]: Start difference. First operand 110 states and 144 transitions. cyclomatic complexity: 35 Second operand has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:58,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:45:58,136 INFO L93 Difference]: Finished difference Result 113 states and 146 transitions. [2022-11-25 15:45:58,137 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 113 states and 146 transitions. [2022-11-25 15:45:58,140 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-11-25 15:45:58,144 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 113 states to 110 states and 141 transitions. [2022-11-25 15:45:58,144 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2022-11-25 15:45:58,145 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2022-11-25 15:45:58,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 141 transitions. [2022-11-25 15:45:58,147 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:45:58,147 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-11-25 15:45:58,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 141 transitions. [2022-11-25 15:45:58,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-11-25 15:45:58,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.2818181818181817) internal successors, (141), 109 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:58,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 141 transitions. [2022-11-25 15:45:58,162 INFO L240 hiAutomatonCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-11-25 15:45:58,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-25 15:45:58,164 INFO L428 stractBuchiCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-11-25 15:45:58,164 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-25 15:45:58,164 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 141 transitions. [2022-11-25 15:45:58,165 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-11-25 15:45:58,165 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:45:58,165 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:45:58,167 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:58,167 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:58,167 INFO L748 eck$LassoCheckResult]: Stem: 589#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 538#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 539#L263 assume 0 == ~r1~0 % 256; 560#L264 assume ~id1~0 >= 0; 561#L265 assume 0 == ~st1~0; 506#L266 assume ~send1~0 == ~id1~0; 507#L267 assume 0 == ~mode1~0 % 256; 512#L268 assume ~id2~0 >= 0; 513#L269 assume 0 == ~st2~0; 498#L270 assume ~send2~0 == ~id2~0; 499#L271 assume 0 == ~mode2~0 % 256; 529#L272 assume ~id3~0 >= 0; 545#L273 assume 0 == ~st3~0; 559#L274 assume ~send3~0 == ~id3~0; 580#L275 assume 0 == ~mode3~0 % 256; 484#L276 assume ~id4~0 >= 0; 485#L277 assume 0 == ~st4~0; 590#L278 assume ~send4~0 == ~id4~0; 552#L279 assume 0 == ~mode4~0 % 256; 553#L280 assume ~id5~0 >= 0; 508#L281 assume 0 == ~st5~0; 486#L282 assume ~send5~0 == ~id5~0; 487#L283 assume 0 == ~mode5~0 % 256; 562#L284 assume ~id6~0 >= 0; 563#L285 assume 0 == ~st6~0; 577#L286 assume ~send6~0 == ~id6~0; 567#L287 assume 0 == ~mode6~0 % 256; 520#L288 assume ~id7~0 >= 0; 521#L289 assume 0 == ~st7~0; 531#L290 assume ~send7~0 == ~id7~0; 573#L291 assume 0 == ~mode7~0 % 256; 574#L292 assume ~id1~0 != ~id2~0; 581#L293 assume ~id1~0 != ~id3~0; 588#L294 assume ~id1~0 != ~id4~0; 493#L295 assume ~id1~0 != ~id5~0; 494#L296 assume ~id1~0 != ~id6~0; 530#L297 assume ~id1~0 != ~id7~0; 527#L298 assume ~id2~0 != ~id3~0; 528#L299 assume ~id2~0 != ~id4~0; 537#L300 assume ~id2~0 != ~id5~0; 568#L301 assume ~id2~0 != ~id6~0; 575#L302 assume ~id2~0 != ~id7~0; 576#L303 assume ~id3~0 != ~id4~0; 583#L304 assume ~id3~0 != ~id5~0; 564#L305 assume ~id3~0 != ~id6~0; 565#L306 assume ~id3~0 != ~id7~0; 571#L307 assume ~id4~0 != ~id5~0; 502#L308 assume ~id4~0 != ~id6~0; 503#L309 assume ~id4~0 != ~id7~0; 569#L310 assume ~id5~0 != ~id6~0; 550#L311 assume ~id5~0 != ~id7~0; 551#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 591#L263-1 init_#res#1 := init_~tmp~0#1; 586#L464 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 542#L22 assume !(0 == assume_abort_if_not_~cond#1); 543#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 500#L548-2 [2022-11-25 15:45:58,168 INFO L750 eck$LassoCheckResult]: Loop: 500#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 501#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 488#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 489#L114 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 540#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 525#L139 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 509#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 510#L164 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 557#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 558#L189 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 548#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 549#L214 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 504#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 505#L239 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 523#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 532#L472 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 533#L473 assume ~r1~0 % 256 >= 7; 524#L477 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 518#L472-1 check_#res#1 := check_~tmp~1#1; 584#L492 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 582#L583 assume !(0 == assert_~arg#1 % 256); 546#L578 assume { :end_inline_assert } true; 500#L548-2 [2022-11-25 15:45:58,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:58,168 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 2 times [2022-11-25 15:45:58,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:58,169 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267530352] [2022-11-25 15:45:58,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:58,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:58,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,199 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:45:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,256 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:45:58,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:58,257 INFO L85 PathProgramCache]: Analyzing trace with hash 414288441, now seen corresponding path program 1 times [2022-11-25 15:45:58,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:58,258 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384095995] [2022-11-25 15:45:58,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:58,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:58,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 15:45:58,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 15:45:58,304 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 15:45:58,304 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384095995] [2022-11-25 15:45:58,304 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1384095995] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 15:45:58,304 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 15:45:58,304 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-25 15:45:58,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [832892434] [2022-11-25 15:45:58,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 15:45:58,305 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 15:45:58,305 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 15:45:58,306 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-25 15:45:58,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-25 15:45:58,307 INFO L87 Difference]: Start difference. First operand 110 states and 141 transitions. cyclomatic complexity: 32 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:58,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 15:45:58,359 INFO L93 Difference]: Finished difference Result 158 states and 215 transitions. [2022-11-25 15:45:58,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 158 states and 215 transitions. [2022-11-25 15:45:58,363 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 102 [2022-11-25 15:45:58,365 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 158 states to 158 states and 215 transitions. [2022-11-25 15:45:58,366 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 158 [2022-11-25 15:45:58,367 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 158 [2022-11-25 15:45:58,368 INFO L73 IsDeterministic]: Start isDeterministic. Operand 158 states and 215 transitions. [2022-11-25 15:45:58,373 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 15:45:58,373 INFO L218 hiAutomatonCegarLoop]: Abstraction has 158 states and 215 transitions. [2022-11-25 15:45:58,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states and 215 transitions. [2022-11-25 15:45:58,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 156. [2022-11-25 15:45:58,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 156 states have (on average 1.358974358974359) internal successors, (212), 155 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 15:45:58,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 212 transitions. [2022-11-25 15:45:58,385 INFO L240 hiAutomatonCegarLoop]: Abstraction has 156 states and 212 transitions. [2022-11-25 15:45:58,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-25 15:45:58,389 INFO L428 stractBuchiCegarLoop]: Abstraction has 156 states and 212 transitions. [2022-11-25 15:45:58,390 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-25 15:45:58,390 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 156 states and 212 transitions. [2022-11-25 15:45:58,391 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 100 [2022-11-25 15:45:58,391 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 15:45:58,391 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 15:45:58,393 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:58,393 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 15:45:58,393 INFO L748 eck$LassoCheckResult]: Stem: 870#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 812#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 813#L263 assume 0 == ~r1~0 % 256; 837#L264 assume ~id1~0 >= 0; 838#L265 assume 0 == ~st1~0; 780#L266 assume ~send1~0 == ~id1~0; 781#L267 assume 0 == ~mode1~0 % 256; 786#L268 assume ~id2~0 >= 0; 787#L269 assume 0 == ~st2~0; 772#L270 assume ~send2~0 == ~id2~0; 773#L271 assume 0 == ~mode2~0 % 256; 803#L272 assume ~id3~0 >= 0; 821#L273 assume 0 == ~st3~0; 836#L274 assume ~send3~0 == ~id3~0; 857#L275 assume 0 == ~mode3~0 % 256; 758#L276 assume ~id4~0 >= 0; 759#L277 assume 0 == ~st4~0; 873#L278 assume ~send4~0 == ~id4~0; 829#L279 assume 0 == ~mode4~0 % 256; 830#L280 assume ~id5~0 >= 0; 782#L281 assume 0 == ~st5~0; 760#L282 assume ~send5~0 == ~id5~0; 761#L283 assume 0 == ~mode5~0 % 256; 839#L284 assume ~id6~0 >= 0; 840#L285 assume 0 == ~st6~0; 854#L286 assume ~send6~0 == ~id6~0; 844#L287 assume 0 == ~mode6~0 % 256; 794#L288 assume ~id7~0 >= 0; 795#L289 assume 0 == ~st7~0; 805#L290 assume ~send7~0 == ~id7~0; 850#L291 assume 0 == ~mode7~0 % 256; 851#L292 assume ~id1~0 != ~id2~0; 858#L293 assume ~id1~0 != ~id3~0; 869#L294 assume ~id1~0 != ~id4~0; 767#L295 assume ~id1~0 != ~id5~0; 768#L296 assume ~id1~0 != ~id6~0; 804#L297 assume ~id1~0 != ~id7~0; 801#L298 assume ~id2~0 != ~id3~0; 802#L299 assume ~id2~0 != ~id4~0; 811#L300 assume ~id2~0 != ~id5~0; 845#L301 assume ~id2~0 != ~id6~0; 852#L302 assume ~id2~0 != ~id7~0; 853#L303 assume ~id3~0 != ~id4~0; 863#L304 assume ~id3~0 != ~id5~0; 841#L305 assume ~id3~0 != ~id6~0; 842#L306 assume ~id3~0 != ~id7~0; 848#L307 assume ~id4~0 != ~id5~0; 776#L308 assume ~id4~0 != ~id6~0; 777#L309 assume ~id4~0 != ~id7~0; 846#L310 assume ~id5~0 != ~id6~0; 826#L311 assume ~id5~0 != ~id7~0; 827#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 874#L263-1 init_#res#1 := init_~tmp~0#1; 867#L464 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 817#L22 assume !(0 == assume_abort_if_not_~cond#1); 818#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 774#L548-2 [2022-11-25 15:45:58,394 INFO L750 eck$LassoCheckResult]: Loop: 774#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 775#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 762#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 763#L114 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 814#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 815#L139 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 895#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 893#L164 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 891#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 887#L189 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 883#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 882#L214 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 778#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 779#L239 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 797#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 806#L472 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 807#L473 assume !(~r1~0 % 256 >= 7); 819#L476 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0; 820#L477 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 864#L472-1 check_#res#1 := check_~tmp~1#1; 865#L492 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 861#L583 assume !(0 == assert_~arg#1 % 256); 822#L578 assume { :end_inline_assert } true; 774#L548-2 [2022-11-25 15:45:58,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:58,394 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 3 times [2022-11-25 15:45:58,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:58,395 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075489688] [2022-11-25 15:45:58,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:58,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:58,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,414 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:45:58,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,442 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:45:58,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:58,443 INFO L85 PathProgramCache]: Analyzing trace with hash 1604611906, now seen corresponding path program 1 times [2022-11-25 15:45:58,443 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:58,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106734127] [2022-11-25 15:45:58,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:58,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:58,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,476 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:45:58,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,529 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:45:58,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 15:45:58,530 INFO L85 PathProgramCache]: Analyzing trace with hash 1081887249, now seen corresponding path program 1 times [2022-11-25 15:45:58,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 15:45:58,531 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841142018] [2022-11-25 15:45:58,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 15:45:58,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 15:45:58,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,598 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 15:45:58,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 15:45:58,677 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 15:46:07,932 INFO L210 LassoAnalysis]: Preferences: [2022-11-25 15:46:07,933 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-25 15:46:07,933 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-25 15:46:07,933 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-25 15:46:07,933 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-25 15:46:07,934 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 15:46:07,934 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-25 15:46:07,934 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-25 15:46:07,934 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.7.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-11-25 15:46:07,934 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-25 15:46:07,935 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-25 15:46:08,001 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:08,016 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:08,024 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:08,029 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:08,038 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:08,045 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:11,963 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:11,973 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:11,977 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:11,984 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:11,992 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:11,999 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:12,001 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 15:46:16,260 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 41