./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 38b53e6a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-38b53e6 [2022-11-25 17:03:40,763 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-25 17:03:40,766 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-25 17:03:40,819 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-25 17:03:40,820 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-25 17:03:40,821 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-25 17:03:40,823 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-25 17:03:40,826 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-25 17:03:40,833 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-25 17:03:40,840 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-25 17:03:40,843 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-25 17:03:40,847 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-25 17:03:40,847 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-25 17:03:40,851 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-25 17:03:40,855 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-25 17:03:40,858 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-25 17:03:40,860 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-25 17:03:40,862 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-25 17:03:40,864 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-25 17:03:40,872 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-25 17:03:40,874 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-25 17:03:40,877 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-25 17:03:40,879 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-25 17:03:40,880 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-25 17:03:40,892 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-25 17:03:40,893 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-25 17:03:40,893 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-25 17:03:40,894 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-25 17:03:40,895 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-25 17:03:40,898 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-25 17:03:40,898 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-25 17:03:40,899 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-25 17:03:40,902 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-25 17:03:40,903 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-25 17:03:40,906 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-25 17:03:40,906 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-25 17:03:40,907 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-25 17:03:40,908 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-25 17:03:40,908 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-25 17:03:40,910 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-25 17:03:40,911 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-25 17:03:40,912 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-11-25 17:03:40,957 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-25 17:03:40,958 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-25 17:03:40,959 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-25 17:03:40,959 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-25 17:03:40,961 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-25 17:03:40,961 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-25 17:03:40,961 INFO L138 SettingsManager]: * Use SBE=true [2022-11-25 17:03:40,962 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-11-25 17:03:40,962 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-11-25 17:03:40,962 INFO L138 SettingsManager]: * Use old map elimination=false [2022-11-25 17:03:40,964 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-11-25 17:03:40,964 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-11-25 17:03:40,964 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-11-25 17:03:40,965 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-25 17:03:40,965 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-25 17:03:40,965 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-25 17:03:40,965 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-25 17:03:40,966 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-25 17:03:40,966 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-25 17:03:40,966 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-11-25 17:03:40,967 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-11-25 17:03:40,967 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-11-25 17:03:40,967 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-25 17:03:40,967 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-25 17:03:40,968 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-11-25 17:03:40,968 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-25 17:03:40,969 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-11-25 17:03:40,969 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-25 17:03:40,970 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-25 17:03:40,970 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-25 17:03:40,970 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-25 17:03:40,973 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-11-25 17:03:40,973 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 [2022-11-25 17:03:41,271 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-25 17:03:41,320 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-25 17:03:41,323 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-25 17:03:41,324 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-25 17:03:41,325 INFO L275 PluginConnector]: CDTParser initialized [2022-11-25 17:03:41,326 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2022-11-25 17:03:44,841 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-11-25 17:03:45,124 INFO L351 CDTParser]: Found 1 translation units. [2022-11-25 17:03:45,125 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2022-11-25 17:03:45,136 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/data/f5b910f25/43873b766cae4582b0d11e40a14323d4/FLAG689f36685 [2022-11-25 17:03:45,152 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/data/f5b910f25/43873b766cae4582b0d11e40a14323d4 [2022-11-25 17:03:45,155 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-25 17:03:45,157 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-25 17:03:45,159 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-25 17:03:45,159 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-25 17:03:45,164 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-25 17:03:45,165 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,166 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@262720aa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45, skipping insertion in model container [2022-11-25 17:03:45,166 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,175 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-25 17:03:45,210 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-25 17:03:45,531 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c[26481,26494] [2022-11-25 17:03:45,533 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 17:03:45,551 INFO L203 MainTranslator]: Completed pre-run [2022-11-25 17:03:45,632 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c[26481,26494] [2022-11-25 17:03:45,633 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-25 17:03:45,655 INFO L208 MainTranslator]: Completed translation [2022-11-25 17:03:45,656 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45 WrapperNode [2022-11-25 17:03:45,656 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-25 17:03:45,658 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-25 17:03:45,658 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-25 17:03:45,658 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-25 17:03:45,668 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,701 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,778 INFO L138 Inliner]: procedures = 28, calls = 19, calls flagged for inlining = 14, calls inlined = 14, statements flattened = 464 [2022-11-25 17:03:45,782 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-25 17:03:45,783 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-25 17:03:45,784 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-25 17:03:45,785 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-25 17:03:45,797 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,797 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,801 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,802 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,813 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,822 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,825 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,828 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,833 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-25 17:03:45,834 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-25 17:03:45,835 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-25 17:03:45,835 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-25 17:03:45,836 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (1/1) ... [2022-11-25 17:03:45,855 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:03:45,890 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/z3 [2022-11-25 17:03:45,915 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-11-25 17:03:45,938 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0ee20b7d-8cb5-40db-8e54-d9b6baa24408/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-11-25 17:03:45,973 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-25 17:03:45,973 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-25 17:03:45,973 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-25 17:03:45,975 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-25 17:03:46,203 INFO L235 CfgBuilder]: Building ICFG [2022-11-25 17:03:46,205 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-25 17:03:46,853 INFO L276 CfgBuilder]: Performing block encoding [2022-11-25 17:03:46,863 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-25 17:03:46,879 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-25 17:03:46,881 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 05:03:46 BoogieIcfgContainer [2022-11-25 17:03:46,881 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-25 17:03:46,882 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-11-25 17:03:46,883 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-11-25 17:03:46,886 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-11-25 17:03:46,887 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 17:03:46,887 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 25.11 05:03:45" (1/3) ... [2022-11-25 17:03:46,888 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@207ac82 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 05:03:46, skipping insertion in model container [2022-11-25 17:03:46,888 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 17:03:46,889 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:03:45" (2/3) ... [2022-11-25 17:03:46,889 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@207ac82 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 05:03:46, skipping insertion in model container [2022-11-25 17:03:46,889 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-11-25 17:03:46,889 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 05:03:46" (3/3) ... [2022-11-25 17:03:46,890 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8.ufo.UNBOUNDED.pals.c [2022-11-25 17:03:46,991 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-11-25 17:03:46,991 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-11-25 17:03:46,991 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-11-25 17:03:46,991 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-11-25 17:03:46,991 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-11-25 17:03:46,992 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-11-25 17:03:46,992 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-11-25 17:03:46,992 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-11-25 17:03:46,996 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:47,018 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-11-25 17:03:47,018 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:03:47,018 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:03:47,027 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:47,027 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:47,027 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-11-25 17:03:47,028 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:47,037 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-11-25 17:03:47,037 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:03:47,037 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:03:47,038 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:47,039 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:47,047 INFO L748 eck$LassoCheckResult]: Stem: 117#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 40#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 27#L298true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 45#L298-1true init_#res#1 := init_~tmp~0#1; 47#L543true main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 42#L22true assume !(0 == assume_abort_if_not_~cond#1); 97#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 85#L633-2true [2022-11-25 17:03:47,048 INFO L750 eck$LassoCheckResult]: Loop: 85#L633-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 110#L92true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 58#L92-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 21#L121true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 7#L121-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 86#L146true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 112#L146-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 108#L171true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 75#L171-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 60#L196true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 123#L196-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 80#L221true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 56#L221-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 61#L246true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 13#L246-2true assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 30#L271true assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 76#L271-2true assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 29#L551true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 18#L551-1true check_#res#1 := check_~tmp~1#1; 119#L571true main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 115#L671true assume !(0 == assert_~arg#1 % 256); 12#L666true assume { :end_inline_assert } true; 85#L633-2true [2022-11-25 17:03:47,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:47,055 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2022-11-25 17:03:47,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:47,064 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955139898] [2022-11-25 17:03:47,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:47,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:47,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:03:47,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:03:47,520 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:03:47,521 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955139898] [2022-11-25 17:03:47,522 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1955139898] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 17:03:47,522 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 17:03:47,522 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-25 17:03:47,524 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870148362] [2022-11-25 17:03:47,525 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 17:03:47,530 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-11-25 17:03:47,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:47,531 INFO L85 PathProgramCache]: Analyzing trace with hash 37408160, now seen corresponding path program 1 times [2022-11-25 17:03:47,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:47,532 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61934176] [2022-11-25 17:03:47,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:47,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:47,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:03:48,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:03:48,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:03:48,174 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61934176] [2022-11-25 17:03:48,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [61934176] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 17:03:48,175 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 17:03:48,175 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-25 17:03:48,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1223481928] [2022-11-25 17:03:48,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 17:03:48,179 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:03:48,180 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:03:48,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-25 17:03:48,233 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-25 17:03:48,238 INFO L87 Difference]: Start difference. First operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:48,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:03:48,482 INFO L93 Difference]: Finished difference Result 131 states and 229 transitions. [2022-11-25 17:03:48,484 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 229 transitions. [2022-11-25 17:03:48,488 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-25 17:03:48,493 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 127 states and 165 transitions. [2022-11-25 17:03:48,495 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2022-11-25 17:03:48,498 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2022-11-25 17:03:48,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 165 transitions. [2022-11-25 17:03:48,500 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:03:48,500 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-11-25 17:03:48,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 165 transitions. [2022-11-25 17:03:48,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-25 17:03:48,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2992125984251968) internal successors, (165), 126 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:48,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 165 transitions. [2022-11-25 17:03:48,532 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-11-25 17:03:48,538 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-25 17:03:48,542 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-11-25 17:03:48,544 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-11-25 17:03:48,545 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 165 transitions. [2022-11-25 17:03:48,546 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-25 17:03:48,556 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:03:48,556 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:03:48,558 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:48,559 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:48,559 INFO L748 eck$LassoCheckResult]: Stem: 406#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 343#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 321#L298 assume 0 == ~r1~0 % 256; 322#L299 assume ~id1~0 >= 0; 338#L300 assume 0 == ~st1~0; 374#L301 assume ~send1~0 == ~id1~0; 385#L302 assume 0 == ~mode1~0 % 256; 386#L303 assume ~id2~0 >= 0; 398#L304 assume 0 == ~st2~0; 368#L305 assume ~send2~0 == ~id2~0; 369#L306 assume 0 == ~mode2~0 % 256; 379#L307 assume ~id3~0 >= 0; 297#L308 assume 0 == ~st3~0; 298#L309 assume ~send3~0 == ~id3~0; 377#L310 assume 0 == ~mode3~0 % 256; 355#L311 assume ~id4~0 >= 0; 356#L312 assume 0 == ~st4~0; 313#L313 assume ~send4~0 == ~id4~0; 314#L314 assume 0 == ~mode4~0 % 256; 348#L315 assume ~id5~0 >= 0; 349#L316 assume 0 == ~st5~0; 286#L317 assume ~send5~0 == ~id5~0; 287#L318 assume 0 == ~mode5~0 % 256; 407#L319 assume ~id6~0 >= 0; 384#L320 assume 0 == ~st6~0; 372#L321 assume ~send6~0 == ~id6~0; 373#L322 assume 0 == ~mode6~0 % 256; 281#L323 assume ~id7~0 >= 0; 282#L324 assume 0 == ~st7~0; 305#L325 assume ~send7~0 == ~id7~0; 320#L326 assume 0 == ~mode7~0 % 256; 306#L327 assume ~id8~0 >= 0; 307#L328 assume 0 == ~st8~0; 330#L329 assume ~send8~0 == ~id8~0; 331#L330 assume 0 == ~mode8~0 % 256; 295#L331 assume ~id1~0 != ~id2~0; 296#L332 assume ~id1~0 != ~id3~0; 317#L333 assume ~id1~0 != ~id4~0; 329#L334 assume ~id1~0 != ~id5~0; 311#L335 assume ~id1~0 != ~id6~0; 312#L336 assume ~id1~0 != ~id7~0; 378#L337 assume ~id1~0 != ~id8~0; 359#L338 assume ~id2~0 != ~id3~0; 360#L339 assume ~id2~0 != ~id4~0; 400#L340 assume ~id2~0 != ~id5~0; 395#L341 assume ~id2~0 != ~id6~0; 332#L342 assume ~id2~0 != ~id7~0; 333#L343 assume ~id2~0 != ~id8~0; 323#L344 assume ~id3~0 != ~id4~0; 324#L345 assume ~id3~0 != ~id5~0; 350#L346 assume ~id3~0 != ~id6~0; 351#L347 assume ~id3~0 != ~id7~0; 404#L348 assume ~id3~0 != ~id8~0; 389#L349 assume ~id4~0 != ~id5~0; 390#L350 assume ~id4~0 != ~id6~0; 375#L351 assume ~id4~0 != ~id7~0; 376#L352 assume ~id4~0 != ~id8~0; 397#L353 assume ~id5~0 != ~id6~0; 365#L354 assume ~id5~0 != ~id7~0; 334#L355 assume ~id5~0 != ~id8~0; 335#L356 assume ~id6~0 != ~id7~0; 362#L357 assume ~id6~0 != ~id8~0; 299#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 300#L298-1 init_#res#1 := init_~tmp~0#1; 352#L543 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 346#L22 assume !(0 == assume_abort_if_not_~cond#1); 347#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 302#L633-2 [2022-11-25 17:03:48,560 INFO L750 eck$LassoCheckResult]: Loop: 302#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 391#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 354#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 315#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 291#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 292#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 393#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 402#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 383#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 370#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 371#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 388#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 366#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 367#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 303#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 304#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 328#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 325#L551 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 309#L551-1 check_#res#1 := check_~tmp~1#1; 310#L571 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 405#L671 assume !(0 == assert_~arg#1 % 256); 301#L666 assume { :end_inline_assert } true; 302#L633-2 [2022-11-25 17:03:48,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:48,561 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2022-11-25 17:03:48,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:48,562 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114457346] [2022-11-25 17:03:48,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:48,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:48,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:48,641 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:03:48,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:48,753 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:03:48,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:48,754 INFO L85 PathProgramCache]: Analyzing trace with hash 37408160, now seen corresponding path program 2 times [2022-11-25 17:03:48,755 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:48,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284326376] [2022-11-25 17:03:48,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:48,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:48,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:03:48,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:03:48,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:03:48,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284326376] [2022-11-25 17:03:48,962 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1284326376] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 17:03:48,962 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 17:03:48,962 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-25 17:03:48,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115951278] [2022-11-25 17:03:48,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 17:03:48,963 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:03:48,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:03:48,964 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-25 17:03:48,964 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-11-25 17:03:48,964 INFO L87 Difference]: Start difference. First operand 127 states and 165 transitions. cyclomatic complexity: 39 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:49,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:03:49,017 INFO L93 Difference]: Finished difference Result 130 states and 167 transitions. [2022-11-25 17:03:49,017 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 130 states and 167 transitions. [2022-11-25 17:03:49,023 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-25 17:03:49,026 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 130 states to 127 states and 162 transitions. [2022-11-25 17:03:49,027 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2022-11-25 17:03:49,028 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2022-11-25 17:03:49,028 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 162 transitions. [2022-11-25 17:03:49,030 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:03:49,030 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-11-25 17:03:49,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 162 transitions. [2022-11-25 17:03:49,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-11-25 17:03:49,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2755905511811023) internal successors, (162), 126 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:49,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 162 transitions. [2022-11-25 17:03:49,040 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-11-25 17:03:49,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-25 17:03:49,048 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-11-25 17:03:49,048 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-11-25 17:03:49,049 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 162 transitions. [2022-11-25 17:03:49,050 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-11-25 17:03:49,052 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:03:49,052 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:03:49,054 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:49,056 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:49,056 INFO L748 eck$LassoCheckResult]: Stem: 675#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 612#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 590#L298 assume 0 == ~r1~0 % 256; 591#L299 assume ~id1~0 >= 0; 607#L300 assume 0 == ~st1~0; 643#L301 assume ~send1~0 == ~id1~0; 654#L302 assume 0 == ~mode1~0 % 256; 655#L303 assume ~id2~0 >= 0; 667#L304 assume 0 == ~st2~0; 637#L305 assume ~send2~0 == ~id2~0; 638#L306 assume 0 == ~mode2~0 % 256; 648#L307 assume ~id3~0 >= 0; 566#L308 assume 0 == ~st3~0; 567#L309 assume ~send3~0 == ~id3~0; 646#L310 assume 0 == ~mode3~0 % 256; 624#L311 assume ~id4~0 >= 0; 625#L312 assume 0 == ~st4~0; 582#L313 assume ~send4~0 == ~id4~0; 583#L314 assume 0 == ~mode4~0 % 256; 617#L315 assume ~id5~0 >= 0; 618#L316 assume 0 == ~st5~0; 555#L317 assume ~send5~0 == ~id5~0; 556#L318 assume 0 == ~mode5~0 % 256; 676#L319 assume ~id6~0 >= 0; 653#L320 assume 0 == ~st6~0; 641#L321 assume ~send6~0 == ~id6~0; 642#L322 assume 0 == ~mode6~0 % 256; 550#L323 assume ~id7~0 >= 0; 551#L324 assume 0 == ~st7~0; 574#L325 assume ~send7~0 == ~id7~0; 589#L326 assume 0 == ~mode7~0 % 256; 575#L327 assume ~id8~0 >= 0; 576#L328 assume 0 == ~st8~0; 599#L329 assume ~send8~0 == ~id8~0; 600#L330 assume 0 == ~mode8~0 % 256; 564#L331 assume ~id1~0 != ~id2~0; 565#L332 assume ~id1~0 != ~id3~0; 588#L333 assume ~id1~0 != ~id4~0; 598#L334 assume ~id1~0 != ~id5~0; 580#L335 assume ~id1~0 != ~id6~0; 581#L336 assume ~id1~0 != ~id7~0; 647#L337 assume ~id1~0 != ~id8~0; 628#L338 assume ~id2~0 != ~id3~0; 629#L339 assume ~id2~0 != ~id4~0; 669#L340 assume ~id2~0 != ~id5~0; 664#L341 assume ~id2~0 != ~id6~0; 601#L342 assume ~id2~0 != ~id7~0; 602#L343 assume ~id2~0 != ~id8~0; 592#L344 assume ~id3~0 != ~id4~0; 593#L345 assume ~id3~0 != ~id5~0; 619#L346 assume ~id3~0 != ~id6~0; 620#L347 assume ~id3~0 != ~id7~0; 673#L348 assume ~id3~0 != ~id8~0; 658#L349 assume ~id4~0 != ~id5~0; 659#L350 assume ~id4~0 != ~id6~0; 644#L351 assume ~id4~0 != ~id7~0; 645#L352 assume ~id4~0 != ~id8~0; 666#L353 assume ~id5~0 != ~id6~0; 634#L354 assume ~id5~0 != ~id7~0; 603#L355 assume ~id5~0 != ~id8~0; 604#L356 assume ~id6~0 != ~id7~0; 631#L357 assume ~id6~0 != ~id8~0; 568#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 569#L298-1 init_#res#1 := init_~tmp~0#1; 621#L543 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 615#L22 assume !(0 == assume_abort_if_not_~cond#1); 616#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 571#L633-2 [2022-11-25 17:03:49,057 INFO L750 eck$LassoCheckResult]: Loop: 571#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 660#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 623#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 584#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 560#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 561#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 662#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 671#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 652#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 639#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 640#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 656#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 635#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 636#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 572#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 573#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 597#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 594#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 595#L552 assume ~r1~0 % 256 >= 8; 613#L556 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 578#L551-1 check_#res#1 := check_~tmp~1#1; 579#L571 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 674#L671 assume !(0 == assert_~arg#1 % 256); 570#L666 assume { :end_inline_assert } true; 571#L633-2 [2022-11-25 17:03:49,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:49,058 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2022-11-25 17:03:49,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:49,059 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335916985] [2022-11-25 17:03:49,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:49,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:49,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,121 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:03:49,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,164 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:03:49,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:49,166 INFO L85 PathProgramCache]: Analyzing trace with hash 173692112, now seen corresponding path program 1 times [2022-11-25 17:03:49,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:49,167 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509649358] [2022-11-25 17:03:49,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:49,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:49,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-25 17:03:49,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-25 17:03:49,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-25 17:03:49,280 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1509649358] [2022-11-25 17:03:49,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1509649358] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-25 17:03:49,281 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-25 17:03:49,281 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-25 17:03:49,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394549831] [2022-11-25 17:03:49,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-25 17:03:49,282 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-11-25 17:03:49,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-25 17:03:49,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-25 17:03:49,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-25 17:03:49,284 INFO L87 Difference]: Start difference. First operand 127 states and 162 transitions. cyclomatic complexity: 36 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:49,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-25 17:03:49,327 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2022-11-25 17:03:49,327 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 181 states and 246 transitions. [2022-11-25 17:03:49,330 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 114 [2022-11-25 17:03:49,332 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 181 states to 181 states and 246 transitions. [2022-11-25 17:03:49,333 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 181 [2022-11-25 17:03:49,334 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 181 [2022-11-25 17:03:49,334 INFO L73 IsDeterministic]: Start isDeterministic. Operand 181 states and 246 transitions. [2022-11-25 17:03:49,340 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-11-25 17:03:49,341 INFO L218 hiAutomatonCegarLoop]: Abstraction has 181 states and 246 transitions. [2022-11-25 17:03:49,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states and 246 transitions. [2022-11-25 17:03:49,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 179. [2022-11-25 17:03:49,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 179 states have (on average 1.3575418994413408) internal successors, (243), 178 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-25 17:03:49,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 243 transitions. [2022-11-25 17:03:49,363 INFO L240 hiAutomatonCegarLoop]: Abstraction has 179 states and 243 transitions. [2022-11-25 17:03:49,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-25 17:03:49,366 INFO L428 stractBuchiCegarLoop]: Abstraction has 179 states and 243 transitions. [2022-11-25 17:03:49,366 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-11-25 17:03:49,366 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 243 transitions. [2022-11-25 17:03:49,368 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 112 [2022-11-25 17:03:49,370 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-11-25 17:03:49,370 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-11-25 17:03:49,375 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:49,377 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-25 17:03:49,378 INFO L748 eck$LassoCheckResult]: Stem: 997#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 927#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 904#L298 assume 0 == ~r1~0 % 256; 905#L299 assume ~id1~0 >= 0; 922#L300 assume 0 == ~st1~0; 962#L301 assume ~send1~0 == ~id1~0; 974#L302 assume 0 == ~mode1~0 % 256; 975#L303 assume ~id2~0 >= 0; 989#L304 assume 0 == ~st2~0; 953#L305 assume ~send2~0 == ~id2~0; 954#L306 assume 0 == ~mode2~0 % 256; 967#L307 assume ~id3~0 >= 0; 880#L308 assume 0 == ~st3~0; 881#L309 assume ~send3~0 == ~id3~0; 965#L310 assume 0 == ~mode3~0 % 256; 938#L311 assume ~id4~0 >= 0; 939#L312 assume 0 == ~st4~0; 896#L313 assume ~send4~0 == ~id4~0; 897#L314 assume 0 == ~mode4~0 % 256; 931#L315 assume ~id5~0 >= 0; 932#L316 assume 0 == ~st5~0; 869#L317 assume ~send5~0 == ~id5~0; 870#L318 assume 0 == ~mode5~0 % 256; 998#L319 assume ~id6~0 >= 0; 973#L320 assume 0 == ~st6~0; 960#L321 assume ~send6~0 == ~id6~0; 961#L322 assume 0 == ~mode6~0 % 256; 867#L323 assume ~id7~0 >= 0; 868#L324 assume 0 == ~st7~0; 888#L325 assume ~send7~0 == ~id7~0; 903#L326 assume 0 == ~mode7~0 % 256; 889#L327 assume ~id8~0 >= 0; 890#L328 assume 0 == ~st8~0; 914#L329 assume ~send8~0 == ~id8~0; 915#L330 assume 0 == ~mode8~0 % 256; 878#L331 assume ~id1~0 != ~id2~0; 879#L332 assume ~id1~0 != ~id3~0; 902#L333 assume ~id1~0 != ~id4~0; 913#L334 assume ~id1~0 != ~id5~0; 894#L335 assume ~id1~0 != ~id6~0; 895#L336 assume ~id1~0 != ~id7~0; 966#L337 assume ~id1~0 != ~id8~0; 942#L338 assume ~id2~0 != ~id3~0; 943#L339 assume ~id2~0 != ~id4~0; 990#L340 assume ~id2~0 != ~id5~0; 984#L341 assume ~id2~0 != ~id6~0; 916#L342 assume ~id2~0 != ~id7~0; 917#L343 assume ~id2~0 != ~id8~0; 906#L344 assume ~id3~0 != ~id4~0; 907#L345 assume ~id3~0 != ~id5~0; 933#L346 assume ~id3~0 != ~id6~0; 934#L347 assume ~id3~0 != ~id7~0; 994#L348 assume ~id3~0 != ~id8~0; 978#L349 assume ~id4~0 != ~id5~0; 979#L350 assume ~id4~0 != ~id6~0; 963#L351 assume ~id4~0 != ~id7~0; 964#L352 assume ~id4~0 != ~id8~0; 986#L353 assume ~id5~0 != ~id6~0; 948#L354 assume ~id5~0 != ~id7~0; 920#L355 assume ~id5~0 != ~id8~0; 921#L356 assume ~id6~0 != ~id7~0; 945#L357 assume ~id6~0 != ~id8~0; 882#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 883#L298-1 init_#res#1 := init_~tmp~0#1; 935#L543 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 929#L22 assume !(0 == assume_abort_if_not_~cond#1); 930#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 987#L633-2 [2022-11-25 17:03:49,379 INFO L750 eck$LassoCheckResult]: Loop: 987#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 1034#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 937#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 898#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 876#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 877#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 982#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 995#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 1016#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 1015#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 1014#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 1012#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 1010#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 958#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 959#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 910#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 912#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 971#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 1002#L552 assume !(~r1~0 % 256 >= 8); 999#L555 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0; 1000#L556 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 1040#L551-1 check_#res#1 := check_~tmp~1#1; 1037#L571 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1036#L671 assume !(0 == assert_~arg#1 % 256); 1035#L666 assume { :end_inline_assert } true; 987#L633-2 [2022-11-25 17:03:49,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:49,381 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2022-11-25 17:03:49,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:49,382 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146076209] [2022-11-25 17:03:49,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:49,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:49,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,447 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:03:49,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,525 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:03:49,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:49,525 INFO L85 PathProgramCache]: Analyzing trace with hash -1558906905, now seen corresponding path program 1 times [2022-11-25 17:03:49,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:49,527 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312297648] [2022-11-25 17:03:49,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:49,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:49,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,624 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:03:49,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,675 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:03:49,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-25 17:03:49,676 INFO L85 PathProgramCache]: Analyzing trace with hash -612396504, now seen corresponding path program 1 times [2022-11-25 17:03:49,677 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-25 17:03:49,677 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317976389] [2022-11-25 17:03:49,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-25 17:03:49,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-25 17:03:49,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,746 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-25 17:03:49,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-25 17:03:49,831 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-25 17:03:59,516 INFO L210 LassoAnalysis]: Preferences: [2022-11-25 17:03:59,517 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-11-25 17:03:59,517 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-11-25 17:03:59,518 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-11-25 17:03:59,518 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-11-25 17:03:59,518 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-11-25 17:03:59,518 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-11-25 17:03:59,518 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-11-25 17:03:59,519 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-11-25 17:03:59,519 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-11-25 17:03:59,519 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-11-25 17:03:59,582 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,598 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,601 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,605 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,611 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,613 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,619 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,622 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,625 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,627 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,632 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,635 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,638 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,642 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,647 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,652 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,656 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,658 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,662 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,665 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,668 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,671 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,678 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,683 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:03:59,685 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:04:04,681 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:04:04,687 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:04:04,695 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:04:04,698 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:04:04,704 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-11-25 17:04:10,919 WARN L233 SmtUtils]: Spent 5.81s on a formula simplification. DAG size of input: 489 DAG size of output: 436 (called from [L 68] de.uni_freiburg.informatik.ultimate.icfgtransformer.transformulatransformers.SimplifyPreprocessor.process) [2022-11-25 17:04:10,978 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 45