./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i --full-output --architecture 32bit


--------------------------------------------------------------------------------


Checking for termination
Using default analysis
Version 38b53e6a
Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f4a8b24485e53fece96b44fdc12e6f161e1bbffda2cd597a930f4925e148dc01
--- Real Ultimate output ---
[0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset.
This is Ultimate 0.2.2-dev-38b53e6
[2022-11-25 17:04:53,684 INFO  L177        SettingsManager]: Resetting all preferences to default values...
[2022-11-25 17:04:53,687 INFO  L181        SettingsManager]: Resetting UltimateCore preferences to default values
[2022-11-25 17:04:53,737 INFO  L184        SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2022-11-25 17:04:53,738 INFO  L181        SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2022-11-25 17:04:53,749 INFO  L181        SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2022-11-25 17:04:53,750 INFO  L181        SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2022-11-25 17:04:53,752 INFO  L181        SettingsManager]: Resetting LassoRanker preferences to default values
[2022-11-25 17:04:53,754 INFO  L181        SettingsManager]: Resetting Reaching Definitions preferences to default values
[2022-11-25 17:04:53,755 INFO  L181        SettingsManager]: Resetting SyntaxChecker preferences to default values
[2022-11-25 17:04:53,756 INFO  L181        SettingsManager]: Resetting Sifa preferences to default values
[2022-11-25 17:04:53,757 INFO  L184        SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2022-11-25 17:04:53,757 INFO  L181        SettingsManager]: Resetting LTL2Aut preferences to default values
[2022-11-25 17:04:53,758 INFO  L181        SettingsManager]: Resetting PEA to Boogie preferences to default values
[2022-11-25 17:04:53,760 INFO  L181        SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2022-11-25 17:04:53,761 INFO  L181        SettingsManager]: Resetting ChcToBoogie preferences to default values
[2022-11-25 17:04:53,762 INFO  L181        SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2022-11-25 17:04:53,763 INFO  L181        SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2022-11-25 17:04:53,764 INFO  L181        SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2022-11-25 17:04:53,766 INFO  L181        SettingsManager]: Resetting CodeCheck preferences to default values
[2022-11-25 17:04:53,768 INFO  L181        SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2022-11-25 17:04:53,793 INFO  L181        SettingsManager]: Resetting RCFGBuilder preferences to default values
[2022-11-25 17:04:53,795 INFO  L181        SettingsManager]: Resetting Referee preferences to default values
[2022-11-25 17:04:53,796 INFO  L181        SettingsManager]: Resetting TraceAbstraction preferences to default values
[2022-11-25 17:04:53,799 INFO  L184        SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2022-11-25 17:04:53,799 INFO  L184        SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2022-11-25 17:04:53,800 INFO  L181        SettingsManager]: Resetting TreeAutomizer preferences to default values
[2022-11-25 17:04:53,801 INFO  L181        SettingsManager]: Resetting IcfgToChc preferences to default values
[2022-11-25 17:04:53,801 INFO  L181        SettingsManager]: Resetting IcfgTransformer preferences to default values
[2022-11-25 17:04:53,802 INFO  L184        SettingsManager]: ReqToTest provides no preferences, ignoring...
[2022-11-25 17:04:53,802 INFO  L181        SettingsManager]: Resetting Boogie Printer preferences to default values
[2022-11-25 17:04:53,806 INFO  L181        SettingsManager]: Resetting ChcSmtPrinter preferences to default values
[2022-11-25 17:04:53,807 INFO  L181        SettingsManager]: Resetting ReqPrinter preferences to default values
[2022-11-25 17:04:53,808 INFO  L181        SettingsManager]: Resetting Witness Printer preferences to default values
[2022-11-25 17:04:53,809 INFO  L184        SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2022-11-25 17:04:53,809 INFO  L181        SettingsManager]: Resetting CDTParser preferences to default values
[2022-11-25 17:04:53,810 INFO  L184        SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2022-11-25 17:04:53,810 INFO  L184        SettingsManager]: ReqParser provides no preferences, ignoring...
[2022-11-25 17:04:53,810 INFO  L181        SettingsManager]: Resetting SmtParser preferences to default values
[2022-11-25 17:04:53,811 INFO  L181        SettingsManager]: Resetting Witness Parser preferences to default values
[2022-11-25 17:04:53,812 INFO  L188        SettingsManager]: Finished resetting all preferences to default values...
[2022-11-25 17:04:53,816 INFO  L101        SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/config/svcomp-Termination-32bit-Automizer_Default.epf
[2022-11-25 17:04:53,846 INFO  L113        SettingsManager]: Loading preferences was successful
[2022-11-25 17:04:53,851 INFO  L115        SettingsManager]: Preferences different from defaults after loading the file:
[2022-11-25 17:04:53,852 INFO  L136        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2022-11-25 17:04:53,852 INFO  L138        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2022-11-25 17:04:53,853 INFO  L136        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2022-11-25 17:04:53,853 INFO  L138        SettingsManager]:  * Create parallel compositions if possible=false
[2022-11-25 17:04:53,853 INFO  L138        SettingsManager]:  * Use SBE=true
[2022-11-25 17:04:53,853 INFO  L136        SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2022-11-25 17:04:53,854 INFO  L138        SettingsManager]:  * NCSB implementation=INTSET_LAZY3
[2022-11-25 17:04:53,854 INFO  L138        SettingsManager]:  * Use old map elimination=false
[2022-11-25 17:04:53,855 INFO  L138        SettingsManager]:  * Use external solver (rank synthesis)=false
[2022-11-25 17:04:53,855 INFO  L138        SettingsManager]:  * Use only trivial implications for array writes=true
[2022-11-25 17:04:53,856 INFO  L138        SettingsManager]:  * Rank analysis=LINEAR_WITH_GUESSES
[2022-11-25 17:04:53,856 INFO  L136        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2022-11-25 17:04:53,857 INFO  L138        SettingsManager]:  * sizeof long=4
[2022-11-25 17:04:53,857 INFO  L138        SettingsManager]:  * Check unreachability of error function in SV-COMP mode=false
[2022-11-25 17:04:53,858 INFO  L138        SettingsManager]:  * Overapproximate operations on floating types=true
[2022-11-25 17:04:53,858 INFO  L138        SettingsManager]:  * sizeof POINTER=4
[2022-11-25 17:04:53,858 INFO  L138        SettingsManager]:  * Check division by zero=IGNORE
[2022-11-25 17:04:53,858 INFO  L138        SettingsManager]:  * Pointer to allocated memory at dereference=ASSUME
[2022-11-25 17:04:53,859 INFO  L138        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=ASSUME
[2022-11-25 17:04:53,859 INFO  L138        SettingsManager]:  * Check array bounds for arrays that are off heap=ASSUME
[2022-11-25 17:04:53,859 INFO  L138        SettingsManager]:  * sizeof long double=12
[2022-11-25 17:04:53,859 INFO  L138        SettingsManager]:  * Check if freed pointer was valid=false
[2022-11-25 17:04:53,860 INFO  L138        SettingsManager]:  * Assume nondeterminstic values are in range=false
[2022-11-25 17:04:53,860 INFO  L138        SettingsManager]:  * Use constant arrays=true
[2022-11-25 17:04:53,861 INFO  L138        SettingsManager]:  * Pointer base address is valid at dereference=ASSUME
[2022-11-25 17:04:53,861 INFO  L136        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2022-11-25 17:04:53,861 INFO  L138        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2022-11-25 17:04:53,861 INFO  L136        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2022-11-25 17:04:53,862 INFO  L138        SettingsManager]:  * Trace refinement strategy=CAMEL
[2022-11-25 17:04:53,863 INFO  L136        SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2022-11-25 17:04:53,864 INFO  L138        SettingsManager]:  * TransformationType=MODULO_NEIGHBOR
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f4a8b24485e53fece96b44fdc12e6f161e1bbffda2cd597a930f4925e148dc01
[2022-11-25 17:04:54,155 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2022-11-25 17:04:54,205 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2022-11-25 17:04:54,207 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2022-11-25 17:04:54,209 INFO  L271        PluginConnector]: Initializing CDTParser...
[2022-11-25 17:04:54,209 INFO  L275        PluginConnector]: CDTParser initialized
[2022-11-25 17:04:54,211 INFO  L432   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i
[2022-11-25 17:04:57,390 INFO  L500              CDTParser]: Created temporary CDT project at NULL
[2022-11-25 17:04:57,826 INFO  L351              CDTParser]: Found 1 translation units.
[2022-11-25 17:04:57,827 INFO  L172              CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i
[2022-11-25 17:04:57,847 INFO  L394              CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/data/8761f3875/778f4e674f7d4072870aac6a6c603376/FLAG08f53e468
[2022-11-25 17:04:57,864 INFO  L402              CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/data/8761f3875/778f4e674f7d4072870aac6a6c603376
[2022-11-25 17:04:57,867 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2022-11-25 17:04:57,872 INFO  L131        ToolchainWalker]: Walking toolchain with 6 elements.
[2022-11-25 17:04:57,874 INFO  L113        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2022-11-25 17:04:57,874 INFO  L271        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2022-11-25 17:04:57,879 INFO  L275        PluginConnector]: CACSL2BoogieTranslator initialized
[2022-11-25 17:04:57,880 INFO  L185        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 05:04:57" (1/1) ...
[2022-11-25 17:04:57,881 INFO  L205        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@72cfd5d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:57, skipping insertion in model container
[2022-11-25 17:04:57,882 INFO  L185        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.11 05:04:57" (1/1) ...
[2022-11-25 17:04:57,891 INFO  L145         MainTranslator]: Starting translation in SV-COMP mode 
[2022-11-25 17:04:57,983 INFO  L178         MainTranslator]: Built tables and reachable declarations
[2022-11-25 17:04:58,514 WARN  L237   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i[33021,33034]
[2022-11-25 17:04:58,857 WARN  L623        FunctionHandler]: Unknown extern function memcmp
[2022-11-25 17:04:58,861 WARN  L237   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i[84583,84596]
[2022-11-25 17:04:58,871 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2022-11-25 17:04:58,887 INFO  L203         MainTranslator]: Completed pre-run
[2022-11-25 17:04:58,940 WARN  L237   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i[33021,33034]
[2022-11-25 17:04:59,131 WARN  L623        FunctionHandler]: Unknown extern function memcmp
[2022-11-25 17:04:59,133 WARN  L237   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test9-1.i[84583,84596]
[2022-11-25 17:04:59,135 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2022-11-25 17:04:59,168 INFO  L208         MainTranslator]: Completed translation
[2022-11-25 17:04:59,168 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59 WrapperNode
[2022-11-25 17:04:59,169 INFO  L132        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2022-11-25 17:04:59,170 INFO  L113        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2022-11-25 17:04:59,170 INFO  L271        PluginConnector]: Initializing Boogie Procedure Inliner...
[2022-11-25 17:04:59,170 INFO  L275        PluginConnector]: Boogie Procedure Inliner initialized
[2022-11-25 17:04:59,177 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,248 INFO  L185        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,418 INFO  L138                Inliner]: procedures = 177, calls = 730, calls flagged for inlining = 503, calls inlined = 503, statements flattened = 4360
[2022-11-25 17:04:59,418 INFO  L132        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2022-11-25 17:04:59,419 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2022-11-25 17:04:59,419 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2022-11-25 17:04:59,419 INFO  L275        PluginConnector]: Boogie Preprocessor initialized
[2022-11-25 17:04:59,429 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,430 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,445 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,445 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,535 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,582 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,596 INFO  L185        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,611 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,643 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2022-11-25 17:04:59,645 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2022-11-25 17:04:59,645 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2022-11-25 17:04:59,647 INFO  L275        PluginConnector]: RCFGBuilder initialized
[2022-11-25 17:04:59,648 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (1/1) ...
[2022-11-25 17:04:59,655 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2022-11-25 17:04:59,667 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3
[2022-11-25 17:04:59,683 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2022-11-25 17:04:59,710 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2022-11-25 17:04:59,728 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int
[2022-11-25 17:04:59,728 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int
[2022-11-25 17:04:59,729 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset
[2022-11-25 17:04:59,729 INFO  L138     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset
[2022-11-25 17:04:59,729 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap
[2022-11-25 17:04:59,729 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2022-11-25 17:04:59,729 INFO  L130     BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2022-11-25 17:04:59,729 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2022-11-25 17:04:59,729 INFO  L130     BoogieDeclarations]: Found specification of procedure memcmp
[2022-11-25 17:04:59,729 INFO  L130     BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2022-11-25 17:04:59,730 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2022-11-25 17:04:59,730 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int
[2022-11-25 17:04:59,730 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2022-11-25 17:04:59,730 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2022-11-25 17:05:00,129 INFO  L235             CfgBuilder]: Building ICFG
[2022-11-25 17:05:00,132 INFO  L261             CfgBuilder]: Building CFG for each procedure with an implementation
[2022-11-25 17:05:00,136 WARN  L816   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2022-11-25 17:05:03,721 INFO  L276             CfgBuilder]: Performing block encoding
[2022-11-25 17:05:03,738 INFO  L295             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2022-11-25 17:05:03,738 INFO  L300             CfgBuilder]: Removed 54 assume(true) statements.
[2022-11-25 17:05:03,742 INFO  L202        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 05:05:03 BoogieIcfgContainer
[2022-11-25 17:05:03,742 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2022-11-25 17:05:03,744 INFO  L113        PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2022-11-25 17:05:03,744 INFO  L271        PluginConnector]: Initializing BuchiAutomizer...
[2022-11-25 17:05:03,748 INFO  L275        PluginConnector]: BuchiAutomizer initialized
[2022-11-25 17:05:03,749 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2022-11-25 17:05:03,749 INFO  L185        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 25.11 05:04:57" (1/3) ...
[2022-11-25 17:05:03,750 INFO  L205        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a8cd6bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 05:05:03, skipping insertion in model container
[2022-11-25 17:05:03,751 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2022-11-25 17:05:03,751 INFO  L185        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.11 05:04:59" (2/3) ...
[2022-11-25 17:05:03,751 INFO  L205        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a8cd6bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 25.11 05:05:03, skipping insertion in model container
[2022-11-25 17:05:03,751 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2022-11-25 17:05:03,751 INFO  L185        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.11 05:05:03" (3/3) ...
[2022-11-25 17:05:03,753 INFO  L332   chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test9-1.i
[2022-11-25 17:05:03,855 INFO  L303   stractBuchiCegarLoop]: Interprodecural is true
[2022-11-25 17:05:03,855 INFO  L304   stractBuchiCegarLoop]: Hoare is false
[2022-11-25 17:05:03,855 INFO  L305   stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2022-11-25 17:05:03,856 INFO  L306   stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2022-11-25 17:05:03,856 INFO  L307   stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2022-11-25 17:05:03,856 INFO  L308   stractBuchiCegarLoop]: Difference is false
[2022-11-25 17:05:03,856 INFO  L309   stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2022-11-25 17:05:03,857 INFO  L313   stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2022-11-25 17:05:03,870 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 1658 states, 1653 states have (on average 1.6678765880217785) internal successors, (2757), 1653 states have internal predecessors, (2757), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2022-11-25 17:05:03,974 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 1647
[2022-11-25 17:05:03,974 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-25 17:05:03,974 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2022-11-25 17:05:03,982 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-25 17:05:03,982 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1]
[2022-11-25 17:05:03,983 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 1 ============
[2022-11-25 17:05:03,987 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 1658 states, 1653 states have (on average 1.6678765880217785) internal successors, (2757), 1653 states have internal predecessors, (2757), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2022-11-25 17:05:04,013 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 1647
[2022-11-25 17:05:04,014 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-25 17:05:04,014 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2022-11-25 17:05:04,014 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-25 17:05:04,015 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1]
[2022-11-25 17:05:04,023 INFO  L748   eck$LassoCheckResult]: Stem: 414#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 1572#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1592#L2220-4true 
[2022-11-25 17:05:04,023 INFO  L750   eck$LassoCheckResult]: Loop: 1592#L2220-4true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 916#L2220-1true assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 609#L2222true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 357#L2222-2true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 691#L2227-121true assume !true; 1475#L2220-3true call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 1592#L2220-4true 
[2022-11-25 17:05:04,030 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:04,030 INFO  L85        PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times
[2022-11-25 17:05:04,040 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:04,041 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365670062]
[2022-11-25 17:05:04,041 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:04,042 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:04,161 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:04,162 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-25 17:05:04,178 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:04,207 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-25 17:05:04,212 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:04,212 INFO  L85        PathProgramCache]: Analyzing trace with hash 1336134348, now seen corresponding path program 1 times
[2022-11-25 17:05:04,212 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:04,213 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773490931]
[2022-11-25 17:05:04,213 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:04,213 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:04,254 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-25 17:05:04,298 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-25 17:05:04,299 INFO  L333   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1773490931]
[2022-11-25 17:05:04,300 WARN  L310   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unsupported non-linear arithmetic
[2022-11-25 17:05:04,300 INFO  L333   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1308254357]
[2022-11-25 17:05:04,300 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:04,300 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-25 17:05:04,301 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3
[2022-11-25 17:05:04,307 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-25 17:05:04,331 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2022-11-25 17:05:04,446 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-25 17:05:04,448 INFO  L263         TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 1 conjunts are in the unsatisfiable core
[2022-11-25 17:05:04,451 INFO  L286         TraceCheckSpWp]: Computing forward predicates...
[2022-11-25 17:05:04,473 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-25 17:05:04,473 INFO  L324         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-25 17:05:04,475 INFO  L157   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1308254357] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-25 17:05:04,476 INFO  L184   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-25 17:05:04,476 INFO  L197   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2022-11-25 17:05:04,477 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2131434720]
[2022-11-25 17:05:04,478 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-25 17:05:04,482 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2022-11-25 17:05:04,483 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-25 17:05:04,530 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2022-11-25 17:05:04,532 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2022-11-25 17:05:04,538 INFO  L87              Difference]: Start difference. First operand  has 1658 states, 1653 states have (on average 1.6678765880217785) internal successors, (2757), 1653 states have internal predecessors, (2757), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand  has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-25 17:05:04,648 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-25 17:05:04,648 INFO  L93              Difference]: Finished difference Result 1658 states and 2204 transitions.
[2022-11-25 17:05:04,650 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 1658 states and 2204 transitions.
[2022-11-25 17:05:04,671 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 1647
[2022-11-25 17:05:04,699 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 1658 states to 1654 states and 2200 transitions.
[2022-11-25 17:05:04,700 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 1654
[2022-11-25 17:05:04,704 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 1654
[2022-11-25 17:05:04,705 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 1654 states and 2200 transitions.
[2022-11-25 17:05:04,718 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-25 17:05:04,718 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 1654 states and 2200 transitions.
[2022-11-25 17:05:04,748 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1654 states and 2200 transitions.
[2022-11-25 17:05:04,813 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1654 to 1654.
[2022-11-25 17:05:04,817 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1654 states, 1650 states have (on average 1.3296969696969696) internal successors, (2194), 1649 states have internal predecessors, (2194), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2022-11-25 17:05:04,826 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1654 states to 1654 states and 2200 transitions.
[2022-11-25 17:05:04,828 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 1654 states and 2200 transitions.
[2022-11-25 17:05:04,832 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2022-11-25 17:05:04,838 INFO  L428   stractBuchiCegarLoop]: Abstraction has 1654 states and 2200 transitions.
[2022-11-25 17:05:04,839 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 2 ============
[2022-11-25 17:05:04,839 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 1654 states and 2200 transitions.
[2022-11-25 17:05:04,849 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 1647
[2022-11-25 17:05:04,849 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-25 17:05:04,850 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2022-11-25 17:05:04,851 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-25 17:05:04,851 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-25 17:05:04,851 INFO  L748   eck$LassoCheckResult]: Stem: 4085#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 4086#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4976#L2220-4 
[2022-11-25 17:05:04,852 INFO  L750   eck$LassoCheckResult]: Loop: 4976#L2220-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4681#L2220-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 4352#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3995#L2222-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 3996#L2227-121 havoc main_~_ha_hashv~0#1; 4458#L2227-49 goto; 4047#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4048#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3987#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 3755#L2227-10 assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 3756#L2227-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 4041#L2227-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 4078#L2227-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 3496#L2227-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 3497#L2227-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 4971#L2227-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 4981#L2227-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 4413#L2227-22 assume !main_#t~switch24#1; 4414#L2227-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 4906#L2227-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 4074#L2227-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 4075#L2227-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 4278#L2227-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 3521#L2227-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 3522#L2227-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 3791#L2227-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 4057#L2227-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 4058#L2227-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 4152#L2227-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 3357#L2227-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 3358#L2227-42 havoc main_#t~switch24#1; 4732#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 4146#L2227-44 goto; 4147#L2227-46 goto; 3867#L2227-48 goto; 3868#L2227-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3493#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 3494#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 4089#L2227-66 goto; 3642#L2227-117 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 3643#L2227-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem65#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1)));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 4126#L2227-70 goto; 4127#L2227-115 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4116#L2227-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 4117#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 3713#L2227-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 3714#L2227-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 4399#L2227-114 goto; 3883#L2227-116 goto; 3884#L2227-118 goto; 4139#L2227-120 goto; 4140#L2220-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 4976#L2220-4 
[2022-11-25 17:05:04,853 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:04,853 INFO  L85        PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times
[2022-11-25 17:05:04,853 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:04,854 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538485213]
[2022-11-25 17:05:04,854 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:04,854 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:04,881 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:04,882 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-25 17:05:04,895 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:04,916 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-25 17:05:04,917 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:04,917 INFO  L85        PathProgramCache]: Analyzing trace with hash -1777661299, now seen corresponding path program 1 times
[2022-11-25 17:05:04,917 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:04,917 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [208386893]
[2022-11-25 17:05:04,918 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:04,918 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:05,099 ERROR L245   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-25 17:05:05,100 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [495172226]
[2022-11-25 17:05:05,100 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:05,100 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-25 17:05:05,100 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3
[2022-11-25 17:05:05,104 INFO  L229       MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-25 17:05:05,119 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2022-11-25 17:05:05,879 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-25 17:05:05,890 INFO  L263         TraceCheckSpWp]: Trace formula consists of 1850 conjuncts, 3 conjunts are in the unsatisfiable core
[2022-11-25 17:05:05,893 INFO  L286         TraceCheckSpWp]: Computing forward predicates...
[2022-11-25 17:05:05,940 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-25 17:05:05,940 INFO  L324         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-25 17:05:05,940 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-25 17:05:05,941 INFO  L333   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [208386893]
[2022-11-25 17:05:05,941 WARN  L310   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2022-11-25 17:05:05,941 INFO  L333   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [495172226]
[2022-11-25 17:05:05,941 INFO  L157   FreeRefinementEngine]: IpTcStrategyModuleZ3 [495172226] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-25 17:05:05,942 INFO  L184   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-25 17:05:05,942 INFO  L197   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2022-11-25 17:05:05,942 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [367679796]
[2022-11-25 17:05:05,942 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-25 17:05:05,943 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2022-11-25 17:05:05,943 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-25 17:05:05,944 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2022-11-25 17:05:05,944 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2022-11-25 17:05:05,944 INFO  L87              Difference]: Start difference. First operand 1654 states and 2200 transitions. cyclomatic complexity: 549 Second operand  has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-25 17:05:06,103 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-25 17:05:06,104 INFO  L93              Difference]: Finished difference Result 1675 states and 2221 transitions.
[2022-11-25 17:05:06,104 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 1675 states and 2221 transitions.
[2022-11-25 17:05:06,117 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 1668
[2022-11-25 17:05:06,130 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 1675 states to 1675 states and 2221 transitions.
[2022-11-25 17:05:06,131 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 1675
[2022-11-25 17:05:06,133 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 1675
[2022-11-25 17:05:06,133 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 1675 states and 2221 transitions.
[2022-11-25 17:05:06,136 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-25 17:05:06,136 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 1675 states and 2221 transitions.
[2022-11-25 17:05:06,139 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1675 states and 2221 transitions.
[2022-11-25 17:05:06,164 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1675 to 1674.
[2022-11-25 17:05:06,168 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1674 states, 1670 states have (on average 1.325748502994012) internal successors, (2214), 1669 states have internal predecessors, (2214), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2022-11-25 17:05:06,175 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1674 states to 1674 states and 2220 transitions.
[2022-11-25 17:05:06,175 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 1674 states and 2220 transitions.
[2022-11-25 17:05:06,175 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2022-11-25 17:05:06,176 INFO  L428   stractBuchiCegarLoop]: Abstraction has 1674 states and 2220 transitions.
[2022-11-25 17:05:06,176 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 3 ============
[2022-11-25 17:05:06,176 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 1674 states and 2220 transitions.
[2022-11-25 17:05:06,184 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 1667
[2022-11-25 17:05:06,185 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-25 17:05:06,185 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2022-11-25 17:05:06,188 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-25 17:05:06,188 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-25 17:05:06,188 INFO  L748   eck$LassoCheckResult]: Stem: 7575#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 7576#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8470#L2220-4 
[2022-11-25 17:05:06,189 INFO  L750   eck$LassoCheckResult]: Loop: 8470#L2220-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8173#L2220-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 7843#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7484#L2222-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 7485#L2227-121 havoc main_~_ha_hashv~0#1; 7950#L2227-49 goto; 7536#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7537#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7476#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 7243#L2227-10 assume main_#t~switch24#1;call main_#t~mem25#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem25#1 % 256);havoc main_#t~mem25#1; 7244#L2227-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 7530#L2227-13 assume main_#t~switch24#1;call main_#t~mem26#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem26#1 % 256);havoc main_#t~mem26#1; 7863#L2227-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 6984#L2227-16 assume main_#t~switch24#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 6985#L2227-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 8465#L2227-19 assume main_#t~switch24#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 8475#L2227-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 7905#L2227-22 assume main_#t~switch24#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 7906#L2227-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 8400#L2227-25 assume main_#t~switch24#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 7563#L2227-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 7564#L2227-28 assume main_#t~switch24#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem31#1 % 256;havoc main_#t~mem31#1; 7769#L2227-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 7009#L2227-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 7010#L2227-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 7280#L2227-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 8478#L2227-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 8278#L2227-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 8279#L2227-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 6845#L2227-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 6846#L2227-42 havoc main_#t~switch24#1; 8224#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 7636#L2227-44 goto; 7637#L2227-46 goto; 7356#L2227-48 goto; 7357#L2227-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6981#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 6982#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 7579#L2227-66 goto; 7130#L2227-117 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 7131#L2227-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem65#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1)));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 7616#L2227-70 goto; 7617#L2227-115 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7606#L2227-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 7607#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 7201#L2227-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 7202#L2227-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 7891#L2227-114 goto; 7372#L2227-116 goto; 7373#L2227-118 goto; 7629#L2227-120 goto; 7630#L2220-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 8470#L2220-4 
[2022-11-25 17:05:06,192 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:06,193 INFO  L85        PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times
[2022-11-25 17:05:06,193 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:06,193 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629440570]
[2022-11-25 17:05:06,194 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:06,194 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:06,225 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:06,230 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-25 17:05:06,249 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:06,259 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-25 17:05:06,260 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:06,260 INFO  L85        PathProgramCache]: Analyzing trace with hash -933655797, now seen corresponding path program 1 times
[2022-11-25 17:05:06,260 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:06,260 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016565175]
[2022-11-25 17:05:06,260 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:06,261 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:06,391 ERROR L245   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-25 17:05:06,392 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2104480965]
[2022-11-25 17:05:06,392 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:06,392 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-25 17:05:06,392 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3
[2022-11-25 17:05:06,396 INFO  L229       MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-25 17:05:06,419 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2022-11-25 17:05:07,315 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-11-25 17:05:07,328 INFO  L263         TraceCheckSpWp]: Trace formula consists of 1856 conjuncts, 3 conjunts are in the unsatisfiable core
[2022-11-25 17:05:07,331 INFO  L286         TraceCheckSpWp]: Computing forward predicates...
[2022-11-25 17:05:07,365 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-11-25 17:05:07,365 INFO  L324         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2022-11-25 17:05:07,366 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-11-25 17:05:07,366 INFO  L333   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1016565175]
[2022-11-25 17:05:07,366 WARN  L310   FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT
[2022-11-25 17:05:07,367 INFO  L333   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2104480965]
[2022-11-25 17:05:07,367 INFO  L157   FreeRefinementEngine]: IpTcStrategyModuleZ3 [2104480965] provided 1 perfect and 0 imperfect interpolant sequences
[2022-11-25 17:05:07,367 INFO  L184   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-11-25 17:05:07,367 INFO  L197   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2022-11-25 17:05:07,368 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1651696275]
[2022-11-25 17:05:07,368 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-11-25 17:05:07,368 INFO  L765   eck$LassoCheckResult]: loop already infeasible
[2022-11-25 17:05:07,368 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-11-25 17:05:07,369 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2022-11-25 17:05:07,369 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2022-11-25 17:05:07,369 INFO  L87              Difference]: Start difference. First operand 1674 states and 2220 transitions. cyclomatic complexity: 549 Second operand  has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-11-25 17:05:07,576 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2022-11-25 17:05:07,576 INFO  L93              Difference]: Finished difference Result 3229 states and 4288 transitions.
[2022-11-25 17:05:07,576 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 3229 states and 4288 transitions.
[2022-11-25 17:05:07,599 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 3214
[2022-11-25 17:05:07,619 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 3229 states to 3229 states and 4288 transitions.
[2022-11-25 17:05:07,620 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 3229
[2022-11-25 17:05:07,628 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 3229
[2022-11-25 17:05:07,628 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 3229 states and 4288 transitions.
[2022-11-25 17:05:07,634 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2022-11-25 17:05:07,634 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 3229 states and 4288 transitions.
[2022-11-25 17:05:07,640 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3229 states and 4288 transitions.
[2022-11-25 17:05:07,670 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3229 to 1660.
[2022-11-25 17:05:07,674 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1660 states, 1656 states have (on average 1.3242753623188406) internal successors, (2193), 1655 states have internal predecessors, (2193), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2022-11-25 17:05:07,681 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1660 states to 1660 states and 2199 transitions.
[2022-11-25 17:05:07,681 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 1660 states and 2199 transitions.
[2022-11-25 17:05:07,681 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2022-11-25 17:05:07,689 INFO  L428   stractBuchiCegarLoop]: Abstraction has 1660 states and 2199 transitions.
[2022-11-25 17:05:07,689 INFO  L335   stractBuchiCegarLoop]: ======== Iteration 4 ============
[2022-11-25 17:05:07,689 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 1660 states and 2199 transitions.
[2022-11-25 17:05:07,697 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 1653
[2022-11-25 17:05:07,697 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2022-11-25 17:05:07,698 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2022-11-25 17:05:07,699 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2022-11-25 17:05:07,700 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2022-11-25 17:05:07,700 INFO  L748   eck$LassoCheckResult]: Stem: 12639#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(21, 2);~count_int_int~0 := 0; 12640#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem20#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~switch24#1, main_#t~mem25#1, main_#t~mem26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc36#1.base, main_#t~malloc36#1.offset, main_#t~mem37#1.base, main_#t~mem37#1.offset, main_#t~mem38#1.base, main_#t~mem38#1.offset, main_#t~memset~res39#1.base, main_#t~memset~res39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~mem41#1.base, main_#t~mem41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~malloc45#1.base, main_#t~malloc45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~mem47#1.base, main_#t~mem47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1, main_#t~post63#1, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1, main_#t~post69#1, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem74#1, main_#t~mem73#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~short77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~malloc80#1.base, main_#t~malloc80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1, main_#t~memset~res85#1.base, main_#t~memset~res85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem90#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem94#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem105#1, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~pre108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~post113#1, main_#t~mem117#1, main_#t~mem115#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem116#1, main_#t~mem118#1, main_#t~post119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~post96#1, main_#t~mem97#1.base, main_#t~mem97#1.offset, main_#t~mem98#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1, main_#t~post129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem136#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1, main_#t~ite139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem5#1, main_#t~post6#1, main_#t~mem7#1, main_#t~mem146#1, main_#t~mem145#1, main_#t~mem147#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem149#1, main_#t~mem151#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem153#1, main_#t~mem155#1, main_#t~mem156#1, main_#t~switch157#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~mem160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1, main_#t~mem180#1, main_#t~short181#1, main_#t~mem182#1.base, main_#t~mem182#1.offset, main_#t~ret183#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~mem186#1.base, main_#t~mem186#1.offset, main_#t~mem187#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem143#1, main_#t~mem144#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13531#L2220-4 
[2022-11-25 17:05:07,700 INFO  L750   eck$LassoCheckResult]: Loop: 13531#L2220-4 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13235#L2220-1 assume !!(main_#t~mem7#1 < 1000);havoc main_#t~mem7#1;call main_#t~malloc8#1.base, main_#t~malloc8#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc8#1.base, main_#t~malloc8#1.offset;havoc main_#t~malloc8#1.base, main_#t~malloc8#1.offset; 12906#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 12549#L2222-2 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem9#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem10#1 * main_#t~mem11#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem10#1;havoc main_#t~mem11#1; 12550#L2227-121 havoc main_~_ha_hashv~0#1; 13012#L2227-49 goto; 12601#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 12602#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12541#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch24#1 := 11 == main_~_hj_k~0#1; 12309#L2227-10 assume !main_#t~switch24#1; 12310#L2227-12 main_#t~switch24#1 := main_#t~switch24#1 || 10 == main_~_hj_k~0#1; 12595#L2227-13 assume !main_#t~switch24#1; 12632#L2227-15 main_#t~switch24#1 := main_#t~switch24#1 || 9 == main_~_hj_k~0#1; 12049#L2227-16 assume !main_#t~switch24#1; 12050#L2227-18 main_#t~switch24#1 := main_#t~switch24#1 || 8 == main_~_hj_k~0#1; 13526#L2227-19 assume !main_#t~switch24#1; 13536#L2227-21 main_#t~switch24#1 := main_#t~switch24#1 || 7 == main_~_hj_k~0#1; 12967#L2227-22 assume !main_#t~switch24#1; 12968#L2227-24 main_#t~switch24#1 := main_#t~switch24#1 || 6 == main_~_hj_k~0#1; 13461#L2227-25 assume !main_#t~switch24#1; 12628#L2227-27 main_#t~switch24#1 := main_#t~switch24#1 || 5 == main_~_hj_k~0#1; 12629#L2227-28 assume !main_#t~switch24#1; 12832#L2227-30 main_#t~switch24#1 := main_#t~switch24#1 || 4 == main_~_hj_k~0#1; 12074#L2227-31 assume main_#t~switch24#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 12075#L2227-33 main_#t~switch24#1 := main_#t~switch24#1 || 3 == main_~_hj_k~0#1; 13539#L2227-34 assume main_#t~switch24#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem33#1 % 256);havoc main_#t~mem33#1; 13540#L2227-36 main_#t~switch24#1 := main_#t~switch24#1 || 2 == main_~_hj_k~0#1; 13340#L2227-37 assume main_#t~switch24#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 12706#L2227-39 main_#t~switch24#1 := main_#t~switch24#1 || 1 == main_~_hj_k~0#1; 11910#L2227-40 assume main_#t~switch24#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem35#1 % 256;havoc main_#t~mem35#1; 11911#L2227-42 havoc main_#t~switch24#1; 13286#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8192 else (if 0 == main_~_ha_hashv~0#1 / 8192 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8192 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 256 * main_~_hj_i~0#1 else (if 0 == 256 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 256 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 8192 else (if 0 == main_~_hj_j~0#1 / 8192 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 8192 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 4096 else (if 0 == main_~_ha_hashv~0#1 / 4096 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 4096 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 65536 * main_~_hj_i~0#1 else (if 0 == 65536 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 65536 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32 else (if 0 == main_~_hj_j~0#1 / 32 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32))));main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := (if 0 == main_~_hj_i~0#1 then main_~_ha_hashv~0#1 / 8 else (if 0 == main_~_ha_hashv~0#1 / 8 then main_~_hj_i~0#1 else (if main_~_hj_i~0#1 == main_~_ha_hashv~0#1 / 8 then 0 else ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8))));main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := (if 0 == main_~_hj_j~0#1 then 1024 * main_~_hj_i~0#1 else (if 0 == 1024 * main_~_hj_i~0#1 then main_~_hj_j~0#1 else (if main_~_hj_j~0#1 == 1024 * main_~_hj_i~0#1 then 0 else ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1))));main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := (if 0 == main_~_ha_hashv~0#1 then main_~_hj_j~0#1 / 32768 else (if 0 == main_~_hj_j~0#1 / 32768 then main_~_ha_hashv~0#1 else (if main_~_ha_hashv~0#1 == main_~_hj_j~0#1 / 32768 then 0 else ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768)))); 12700#L2227-44 goto; 12701#L2227-46 goto; 12421#L2227-48 goto; 12422#L2227-119 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12046#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem53#1.base, main_#t~mem53#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem53#1.base, main_#t~mem53#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem53#1.base, main_#t~mem53#1.offset; 12047#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem54#1.base, main_#t~mem54#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_#t~mem54#1.base, 16 + main_#t~mem54#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1 := read~int(main_#t~mem56#1.base, 20 + main_#t~mem56#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset - main_#t~mem57#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem54#1.base, main_#t~mem54#1.offset;havoc main_#t~mem55#1.base, main_#t~mem55#1.offset;havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1;call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1.base, main_#t~mem59#1.offset := read~$Pointer$(main_#t~mem58#1.base, 16 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem59#1.base, 8 + main_#t~mem59#1.offset, 4);havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1.base, main_#t~mem59#1.offset;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset; 12643#L2227-66 goto; 12196#L2227-117 havoc main_~_ha_bkt~0#1;call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem62#1 := read~int(main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);main_#t~post63#1 := main_#t~mem62#1;call write~int(1 + main_#t~post63#1, main_#t~mem61#1.base, 12 + main_#t~mem61#1.offset, 4);havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;havoc main_#t~mem62#1;havoc main_#t~post63#1; 12197#L2227-71 call main_#t~mem64#1.base, main_#t~mem64#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem65#1 := read~int(main_#t~mem64#1.base, 4 + main_#t~mem64#1.offset, 4);main_~_ha_bkt~0#1 := (if 0 == main_~_ha_hashv~0#1 || 0 == main_#t~mem65#1 - 1 then 0 else (if main_~_ha_hashv~0#1 == main_#t~mem65#1 - 1 then main_~_ha_hashv~0#1 else ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem65#1 - 1)));havoc main_#t~mem64#1.base, main_#t~mem64#1.offset;havoc main_#t~mem65#1; 12680#L2227-70 goto; 12681#L2227-115 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$(main_#t~mem66#1.base, main_#t~mem66#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem67#1.base, main_#t~mem67#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;call main_#t~mem68#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post69#1 := main_#t~mem68#1;call write~int(1 + main_#t~post69#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem68#1;havoc main_#t~post69#1;call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem70#1.base, main_#t~mem70#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 12670#L2227-73 assume main_#t~mem71#1.base != 0 || main_#t~mem71#1.offset != 0;havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem72#1.base, 12 + main_#t~mem72#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset; 12671#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem74#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem73#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short77#1 := main_#t~mem74#1 % 4294967296 >= 10 * (1 + main_#t~mem73#1) % 4294967296; 12267#L2227-76 assume main_#t~short77#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_#t~mem75#1.base, 36 + main_#t~mem75#1.offset, 4);main_#t~short77#1 := 0 == main_#t~mem76#1 % 4294967296; 12268#L2227-78 assume !main_#t~short77#1;havoc main_#t~mem74#1;havoc main_#t~mem73#1;havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~short77#1; 12953#L2227-114 goto; 12437#L2227-116 goto; 12438#L2227-118 goto; 12693#L2227-120 goto; 12694#L2220-3 call main_#t~mem5#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post6#1 := main_#t~mem5#1;call write~int(1 + main_#t~post6#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem5#1;havoc main_#t~post6#1; 13531#L2220-4 
[2022-11-25 17:05:07,701 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:07,701 INFO  L85        PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times
[2022-11-25 17:05:07,701 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:07,702 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493594453]
[2022-11-25 17:05:07,703 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:07,703 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:07,737 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:07,745 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-11-25 17:05:07,753 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-11-25 17:05:07,772 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-11-25 17:05:07,773 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-11-25 17:05:07,774 INFO  L85        PathProgramCache]: Analyzing trace with hash 1486937113, now seen corresponding path program 1 times
[2022-11-25 17:05:07,774 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-11-25 17:05:07,775 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93312437]
[2022-11-25 17:05:07,775 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:07,776 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-11-25 17:05:07,917 ERROR L245   FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic
[2022-11-25 17:05:07,917 INFO  L333   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1977251457]
[2022-11-25 17:05:07,917 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-11-25 17:05:07,918 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2022-11-25 17:05:07,918 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3
[2022-11-25 17:05:07,921 INFO  L229       MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2022-11-25 17:05:07,939 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4d9a081b-72c0-4b92-808a-e44959572326/bin/uautomizer-ZsLfNo2U6R/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process