./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loops/eureka_05.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loops/eureka_05.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 22:07:37,009 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 22:07:37,011 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 22:07:37,030 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 22:07:37,030 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 22:07:37,031 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 22:07:37,032 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 22:07:37,034 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 22:07:37,036 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 22:07:37,036 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 22:07:37,037 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 22:07:37,038 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 22:07:37,039 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 22:07:37,039 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 22:07:37,040 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 22:07:37,042 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 22:07:37,042 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 22:07:37,043 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 22:07:37,045 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 22:07:37,047 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 22:07:37,048 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 22:07:37,049 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 22:07:37,050 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 22:07:37,051 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 22:07:37,055 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 22:07:37,055 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 22:07:37,055 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 22:07:37,056 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 22:07:37,057 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 22:07:37,057 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 22:07:37,058 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 22:07:37,058 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 22:07:37,059 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 22:07:37,060 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 22:07:37,061 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 22:07:37,061 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 22:07:37,062 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 22:07:37,062 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 22:07:37,062 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 22:07:37,062 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 22:07:37,063 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 22:07:37,064 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-12-13 22:07:37,085 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 22:07:37,085 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 22:07:37,085 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 22:07:37,085 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 22:07:37,086 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 22:07:37,087 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 22:07:37,087 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 22:07:37,087 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 22:07:37,087 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 22:07:37,092 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 22:07:37,092 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 22:07:37,092 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 22:07:37,093 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 22:07:37,093 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 22:07:37,093 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 22:07:37,093 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 22:07:37,094 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 22:07:37,095 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 22:07:37,095 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 22:07:37,095 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 22:07:37,095 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 22:07:37,095 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 22:07:37,095 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 22:07:37,096 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 22:07:37,096 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 22:07:37,097 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3f12ca1e314a03dfb1c8beadd0c1a180c2d2339dd5f3109d5999df06d52395ab [2022-12-13 22:07:37,287 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 22:07:37,307 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 22:07:37,309 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 22:07:37,310 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 22:07:37,310 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 22:07:37,311 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/loops/eureka_05.i [2022-12-13 22:07:39,965 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 22:07:40,088 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 22:07:40,088 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/sv-benchmarks/c/loops/eureka_05.i [2022-12-13 22:07:40,092 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/data/348b65f67/99709eb76ac04013a2e54db7603e16cd/FLAG069a05b43 [2022-12-13 22:07:40,102 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/data/348b65f67/99709eb76ac04013a2e54db7603e16cd [2022-12-13 22:07:40,103 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 22:07:40,104 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 22:07:40,105 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 22:07:40,105 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 22:07:40,108 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 22:07:40,108 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,109 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@13bb23d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40, skipping insertion in model container [2022-12-13 22:07:40,109 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,114 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 22:07:40,125 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 22:07:40,228 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-12-13 22:07:40,238 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 22:07:40,247 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 22:07:40,256 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/sv-benchmarks/c/loops/eureka_05.i[810,823] [2022-12-13 22:07:40,260 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 22:07:40,271 INFO L208 MainTranslator]: Completed translation [2022-12-13 22:07:40,272 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40 WrapperNode [2022-12-13 22:07:40,272 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 22:07:40,273 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 22:07:40,273 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 22:07:40,273 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 22:07:40,278 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,285 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,299 INFO L138 Inliner]: procedures = 16, calls = 24, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 84 [2022-12-13 22:07:40,300 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 22:07:40,300 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 22:07:40,300 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 22:07:40,300 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 22:07:40,307 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,307 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,309 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,309 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,313 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,315 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,316 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,317 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,318 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 22:07:40,319 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 22:07:40,319 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 22:07:40,319 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 22:07:40,320 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (1/1) ... [2022-12-13 22:07:40,324 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:40,332 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:40,341 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:40,343 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 22:07:40,377 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 22:07:40,378 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 22:07:40,378 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-12-13 22:07:40,378 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-12-13 22:07:40,378 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 22:07:40,378 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 22:07:40,378 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-12-13 22:07:40,378 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-12-13 22:07:40,440 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 22:07:40,442 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 22:07:40,565 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 22:07:40,570 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 22:07:40,571 INFO L300 CfgBuilder]: Removed 4 assume(true) statements. [2022-12-13 22:07:40,572 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 10:07:40 BoogieIcfgContainer [2022-12-13 22:07:40,573 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 22:07:40,574 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 22:07:40,574 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 22:07:40,577 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 22:07:40,578 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:07:40,578 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 10:07:40" (1/3) ... [2022-12-13 22:07:40,579 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@509c3782 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 10:07:40, skipping insertion in model container [2022-12-13 22:07:40,579 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:07:40,579 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:07:40" (2/3) ... [2022-12-13 22:07:40,580 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@509c3782 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 10:07:40, skipping insertion in model container [2022-12-13 22:07:40,580 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:07:40,580 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 10:07:40" (3/3) ... [2022-12-13 22:07:40,581 INFO L332 chiAutomizerObserver]: Analyzing ICFG eureka_05.i [2022-12-13 22:07:40,623 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 22:07:40,623 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 22:07:40,624 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 22:07:40,624 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 22:07:40,624 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 22:07:40,624 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 22:07:40,624 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 22:07:40,624 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 22:07:40,627 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:40,641 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-12-13 22:07:40,641 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:40,641 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:40,646 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-12-13 22:07:40,646 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 22:07:40,646 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 22:07:40,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:40,648 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-12-13 22:07:40,648 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:40,648 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:40,648 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-12-13 22:07:40,648 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 22:07:40,654 INFO L748 eck$LassoCheckResult]: Stem: 17#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 12#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 5#L44-3true [2022-12-13 22:07:40,654 INFO L750 eck$LassoCheckResult]: Loop: 5#L44-3true assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 18#L44-2true main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5#L44-3true [2022-12-13 22:07:40,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:40,658 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-12-13 22:07:40,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:40,665 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188291976] [2022-12-13 22:07:40,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:40,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:40,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:40,736 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:40,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:40,757 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:40,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:40,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-12-13 22:07:40,759 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:40,759 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474089431] [2022-12-13 22:07:40,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:40,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:40,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:40,766 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:40,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:40,771 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:40,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:40,773 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-12-13 22:07:40,773 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:40,773 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528423344] [2022-12-13 22:07:40,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:40,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:40,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:40,789 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:40,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:40,801 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:41,177 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 22:07:41,177 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 22:07:41,178 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 22:07:41,178 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 22:07:41,178 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-12-13 22:07:41,178 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,178 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 22:07:41,178 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 22:07:41,178 INFO L133 ssoRankerPreferences]: Filename of dumped script: eureka_05.i_Iteration1_Lasso [2022-12-13 22:07:41,179 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 22:07:41,179 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 22:07:41,197 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,206 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,210 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,213 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,215 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,542 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,544 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,545 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:07:41,774 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-12-13 22:07:41,779 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-12-13 22:07:41,780 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,780 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,781 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,783 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-12-13 22:07:41,784 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,794 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,794 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 22:07:41,795 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,795 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,795 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,797 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 22:07:41,797 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 22:07:41,799 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,803 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-12-13 22:07:41,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,803 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,804 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,805 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-12-13 22:07:41,806 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,816 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,816 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,816 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,816 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,820 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,820 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,824 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,826 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2022-12-13 22:07:41,827 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,827 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,828 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,828 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-12-13 22:07:41,830 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,839 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,839 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,839 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,840 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,842 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,842 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,846 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,849 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2022-12-13 22:07:41,849 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,850 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,850 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,851 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-12-13 22:07:41,852 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,862 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,863 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 22:07:41,863 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,863 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,863 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,863 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 22:07:41,864 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 22:07:41,865 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,867 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2022-12-13 22:07:41,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,868 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,869 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,870 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-12-13 22:07:41,871 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,883 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,883 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,883 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,883 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,886 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,886 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,891 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,894 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2022-12-13 22:07:41,894 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,895 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,896 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,896 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-12-13 22:07:41,898 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,908 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,908 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,908 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,908 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,910 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,910 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,913 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,916 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2022-12-13 22:07:41,917 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,917 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,918 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,919 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-12-13 22:07:41,920 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,930 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,930 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,930 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,930 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,932 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,932 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,936 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,938 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2022-12-13 22:07:41,939 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,939 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,940 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-12-13 22:07:41,942 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,951 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,952 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,952 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,952 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,954 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,954 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,957 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,960 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2022-12-13 22:07:41,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,960 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,961 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,962 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-12-13 22:07:41,963 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,973 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,973 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,973 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,973 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,975 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,975 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,978 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:41,980 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2022-12-13 22:07:41,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:41,981 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:41,982 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:41,983 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-12-13 22:07:41,984 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:41,994 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:41,994 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:41,994 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:41,994 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:41,996 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:41,996 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:41,999 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:42,001 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2022-12-13 22:07:42,002 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:42,002 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:42,003 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:42,004 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2022-12-13 22:07:42,005 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:42,015 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:42,015 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:42,015 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:42,015 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:42,017 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:42,017 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:42,021 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:07:42,023 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2022-12-13 22:07:42,024 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:42,024 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:42,025 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:42,025 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2022-12-13 22:07:42,027 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:07:42,037 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:07:42,037 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:07:42,037 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:07:42,037 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:07:42,042 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:07:42,042 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:07:42,050 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-12-13 22:07:42,075 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2022-12-13 22:07:42,075 INFO L444 ModelExtractionUtils]: 1 out of 16 variables were initially zero. Simplification set additionally 12 variables to zero. [2022-12-13 22:07:42,077 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:07:42,077 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:42,097 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:07:42,098 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2022-12-13 22:07:42,098 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-12-13 22:07:42,110 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-12-13 22:07:42,110 INFO L513 LassoAnalysis]: Proved termination. [2022-12-13 22:07:42,110 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1, v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1) = 8*ULTIMATE.start_main_~i~1#1 + 1*v_rep(select #length ULTIMATE.start_main_~#array~1#1.base)_1 Supporting invariants [] [2022-12-13 22:07:42,113 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2022-12-13 22:07:42,160 INFO L156 tatePredicateManager]: 17 out of 17 supporting invariants were superfluous and have been removed [2022-12-13 22:07:42,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:42,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:42,197 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 2 conjunts are in the unsatisfiable core [2022-12-13 22:07:42,197 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:42,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:42,209 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-12-13 22:07:42,209 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:42,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,261 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-12-13 22:07:42,263 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:42,308 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 21 states, 20 states have (on average 1.5) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 48 states and 71 transitions. Complement of second has 8 states. [2022-12-13 22:07:42,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-12-13 22:07:42,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:42,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 42 transitions. [2022-12-13 22:07:42,315 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 2 letters. [2022-12-13 22:07:42,315 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 22:07:42,315 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 4 letters. Loop has 2 letters. [2022-12-13 22:07:42,315 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 22:07:42,315 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 42 transitions. Stem has 2 letters. Loop has 4 letters. [2022-12-13 22:07:42,316 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 22:07:42,316 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48 states and 71 transitions. [2022-12-13 22:07:42,318 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-12-13 22:07:42,321 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48 states to 18 states and 24 transitions. [2022-12-13 22:07:42,322 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-12-13 22:07:42,322 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2022-12-13 22:07:42,323 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 24 transitions. [2022-12-13 22:07:42,323 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:42,323 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-12-13 22:07:42,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 24 transitions. [2022-12-13 22:07:42,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-12-13 22:07:42,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:42,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2022-12-13 22:07:42,342 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-12-13 22:07:42,342 INFO L428 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2022-12-13 22:07:42,342 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 22:07:42,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2022-12-13 22:07:42,343 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2022-12-13 22:07:42,343 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:42,343 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:42,343 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-12-13 22:07:42,343 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:07:42,343 INFO L748 eck$LassoCheckResult]: Stem: 193#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 190#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 180#L44-3 assume !(main_~i~1#1 >= 0); 181#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 179#L30-3 [2022-12-13 22:07:42,343 INFO L750 eck$LassoCheckResult]: Loop: 179#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 191#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 192#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 178#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 179#L30-3 [2022-12-13 22:07:42,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:42,344 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-12-13 22:07:42,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:42,344 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708766239] [2022-12-13 22:07:42,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:42,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:42,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:42,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:42,389 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1708766239] [2022-12-13 22:07:42,389 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1708766239] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:07:42,389 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:07:42,389 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 22:07:42,390 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238648355] [2022-12-13 22:07:42,390 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:07:42,392 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:07:42,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:42,393 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 1 times [2022-12-13 22:07:42,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:42,393 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1919643300] [2022-12-13 22:07:42,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:42,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:42,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:42,405 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:42,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:42,414 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:42,483 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:42,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 22:07:42,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 22:07:42,486 INFO L87 Difference]: Start difference. First operand 18 states and 24 transitions. cyclomatic complexity: 9 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:42,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:42,498 INFO L93 Difference]: Finished difference Result 19 states and 23 transitions. [2022-12-13 22:07:42,499 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 23 transitions. [2022-12-13 22:07:42,499 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:42,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 22 transitions. [2022-12-13 22:07:42,500 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2022-12-13 22:07:42,500 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2022-12-13 22:07:42,500 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2022-12-13 22:07:42,500 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:42,500 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18 states and 22 transitions. [2022-12-13 22:07:42,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2022-12-13 22:07:42,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2022-12-13 22:07:42,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:42,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-12-13 22:07:42,502 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-12-13 22:07:42,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 22:07:42,503 INFO L428 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-12-13 22:07:42,504 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 22:07:42,504 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2022-12-13 22:07:42,504 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:42,504 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:42,504 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:42,505 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-12-13 22:07:42,505 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:07:42,505 INFO L748 eck$LassoCheckResult]: Stem: 235#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 232#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 221#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 222#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 223#L44-3 assume !(main_~i~1#1 >= 0); 224#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 220#L30-3 [2022-12-13 22:07:42,505 INFO L750 eck$LassoCheckResult]: Loop: 220#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 233#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 234#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 219#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 220#L30-3 [2022-12-13 22:07:42,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:42,505 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-12-13 22:07:42,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:42,506 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041544377] [2022-12-13 22:07:42,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:42,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:42,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:42,553 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:42,554 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041544377] [2022-12-13 22:07:42,554 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1041544377] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:07:42,554 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1890022789] [2022-12-13 22:07:42,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:42,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:07:42,554 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:42,555 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:07:42,556 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-12-13 22:07:42,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:42,596 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 3 conjunts are in the unsatisfiable core [2022-12-13 22:07:42,597 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:42,604 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,607 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:07:42,610 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2022-12-13 22:07:42,621 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,622 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1890022789] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:07:42,622 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:07:42,622 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 6 [2022-12-13 22:07:42,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2053936821] [2022-12-13 22:07:42,622 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:07:42,622 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:07:42,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:42,622 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 2 times [2022-12-13 22:07:42,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:42,623 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013640728] [2022-12-13 22:07:42,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:42,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:42,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:42,628 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:42,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:42,633 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:42,699 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:42,699 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-12-13 22:07:42,699 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-12-13 22:07:42,699 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 7 Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:42,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:42,727 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-12-13 22:07:42,727 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 31 transitions. [2022-12-13 22:07:42,728 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:42,729 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 31 transitions. [2022-12-13 22:07:42,729 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2022-12-13 22:07:42,729 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2022-12-13 22:07:42,729 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 31 transitions. [2022-12-13 22:07:42,729 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:42,729 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-12-13 22:07:42,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 31 transitions. [2022-12-13 22:07:42,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 23. [2022-12-13 22:07:42,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.173913043478261) internal successors, (27), 22 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:42,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2022-12-13 22:07:42,732 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-12-13 22:07:42,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-12-13 22:07:42,732 INFO L428 stractBuchiCegarLoop]: Abstraction has 23 states and 27 transitions. [2022-12-13 22:07:42,733 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 22:07:42,733 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 27 transitions. [2022-12-13 22:07:42,733 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:42,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:42,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:42,733 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-12-13 22:07:42,733 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:07:42,734 INFO L748 eck$LassoCheckResult]: Stem: 319#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 316#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 304#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 305#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 306#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 307#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 324#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 323#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 322#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 321#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 320#L44-3 assume !(main_~i~1#1 >= 0); 308#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 303#L30-3 [2022-12-13 22:07:42,734 INFO L750 eck$LassoCheckResult]: Loop: 303#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 317#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 318#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 302#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 303#L30-3 [2022-12-13 22:07:42,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:42,734 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-12-13 22:07:42,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:42,734 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1567558654] [2022-12-13 22:07:42,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:42,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:42,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:42,802 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,802 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:42,802 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1567558654] [2022-12-13 22:07:42,802 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1567558654] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:07:42,802 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1705802729] [2022-12-13 22:07:42,802 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 22:07:42,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:07:42,803 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:42,804 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:07:42,804 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-12-13 22:07:42,850 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-12-13 22:07:42,850 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:07:42,851 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 6 conjunts are in the unsatisfiable core [2022-12-13 22:07:42,852 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:42,868 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,869 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:07:42,893 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:42,893 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1705802729] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:07:42,893 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:07:42,893 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 7 [2022-12-13 22:07:42,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430839101] [2022-12-13 22:07:42,894 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:07:42,894 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:07:42,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:42,894 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 3 times [2022-12-13 22:07:42,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:42,895 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701424705] [2022-12-13 22:07:42,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:42,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:42,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:42,901 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:42,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:42,907 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:42,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:42,984 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-12-13 22:07:42,984 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-12-13 22:07:42,984 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.7142857142857142) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:43,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:43,025 INFO L93 Difference]: Finished difference Result 41 states and 45 transitions. [2022-12-13 22:07:43,025 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 45 transitions. [2022-12-13 22:07:43,026 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:43,027 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 41 states and 45 transitions. [2022-12-13 22:07:43,027 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 31 [2022-12-13 22:07:43,027 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 31 [2022-12-13 22:07:43,027 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 45 transitions. [2022-12-13 22:07:43,028 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:43,028 INFO L218 hiAutomatonCegarLoop]: Abstraction has 41 states and 45 transitions. [2022-12-13 22:07:43,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 45 transitions. [2022-12-13 22:07:43,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 25. [2022-12-13 22:07:43,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.16) internal successors, (29), 24 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:43,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2022-12-13 22:07:43,030 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-12-13 22:07:43,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-12-13 22:07:43,031 INFO L428 stractBuchiCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-12-13 22:07:43,031 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-12-13 22:07:43,031 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 29 transitions. [2022-12-13 22:07:43,031 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:43,032 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:43,032 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:43,032 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1] [2022-12-13 22:07:43,032 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:07:43,032 INFO L748 eck$LassoCheckResult]: Stem: 459#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 456#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 444#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 445#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 446#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 447#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 466#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 465#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 464#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 463#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 462#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 461#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 460#L44-3 assume !(main_~i~1#1 >= 0); 448#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 443#L30-3 [2022-12-13 22:07:43,032 INFO L750 eck$LassoCheckResult]: Loop: 443#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 457#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 458#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 442#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 443#L30-3 [2022-12-13 22:07:43,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:43,033 INFO L85 PathProgramCache]: Analyzing trace with hash -1745699051, now seen corresponding path program 3 times [2022-12-13 22:07:43,033 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:43,033 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [133454171] [2022-12-13 22:07:43,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:43,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:43,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,050 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:43,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,067 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:43,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:43,068 INFO L85 PathProgramCache]: Analyzing trace with hash 1668713, now seen corresponding path program 4 times [2022-12-13 22:07:43,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:43,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508869646] [2022-12-13 22:07:43,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:43,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:43,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,075 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:43,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,080 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:43,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:43,081 INFO L85 PathProgramCache]: Analyzing trace with hash -743535747, now seen corresponding path program 1 times [2022-12-13 22:07:43,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:43,081 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2109436084] [2022-12-13 22:07:43,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:43,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:43,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:43,172 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-13 22:07:43,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:43,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2109436084] [2022-12-13 22:07:43,173 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2109436084] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:07:43,173 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:07:43,173 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-12-13 22:07:43,173 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672312764] [2022-12-13 22:07:43,173 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:07:43,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:43,241 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 22:07:43,241 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-12-13 22:07:43,241 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. cyclomatic complexity: 7 Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:43,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:43,270 INFO L93 Difference]: Finished difference Result 34 states and 41 transitions. [2022-12-13 22:07:43,270 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 41 transitions. [2022-12-13 22:07:43,271 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-12-13 22:07:43,271 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 41 transitions. [2022-12-13 22:07:43,271 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2022-12-13 22:07:43,272 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2022-12-13 22:07:43,272 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 41 transitions. [2022-12-13 22:07:43,272 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:43,272 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 41 transitions. [2022-12-13 22:07:43,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 41 transitions. [2022-12-13 22:07:43,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2022-12-13 22:07:43,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.1481481481481481) internal successors, (31), 26 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:43,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 31 transitions. [2022-12-13 22:07:43,274 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-12-13 22:07:43,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 22:07:43,275 INFO L428 stractBuchiCegarLoop]: Abstraction has 27 states and 31 transitions. [2022-12-13 22:07:43,275 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-12-13 22:07:43,275 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 31 transitions. [2022-12-13 22:07:43,276 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:43,276 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:43,276 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:43,276 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1] [2022-12-13 22:07:43,276 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-12-13 22:07:43,277 INFO L748 eck$LassoCheckResult]: Stem: 531#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 528#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 515#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 516#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 517#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 518#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 539#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 538#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 537#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 536#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 535#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 534#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 533#L44-3 assume !(main_~i~1#1 >= 0); 519#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 520#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 530#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 525#L33 [2022-12-13 22:07:43,277 INFO L750 eck$LassoCheckResult]: Loop: 525#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 526#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 529#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 525#L33 [2022-12-13 22:07:43,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:43,277 INFO L85 PathProgramCache]: Analyzing trace with hash 1715425501, now seen corresponding path program 1 times [2022-12-13 22:07:43,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:43,278 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092264276] [2022-12-13 22:07:43,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:43,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:43,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,294 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:43,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,316 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:43,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:43,317 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 1 times [2022-12-13 22:07:43,317 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:43,317 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [200737023] [2022-12-13 22:07:43,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:43,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:43,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,321 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:43,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:43,325 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:43,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:43,326 INFO L85 PathProgramCache]: Analyzing trace with hash -1574719937, now seen corresponding path program 1 times [2022-12-13 22:07:43,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:43,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392847181] [2022-12-13 22:07:43,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:43,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:43,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:44,027 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:07:44,027 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:44,027 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392847181] [2022-12-13 22:07:44,027 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [392847181] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:07:44,027 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1502793079] [2022-12-13 22:07:44,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:44,027 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:07:44,028 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:44,029 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:07:44,029 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-12-13 22:07:44,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:44,077 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 34 conjunts are in the unsatisfiable core [2022-12-13 22:07:44,079 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:44,128 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-12-13 22:07:44,129 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-12-13 22:07:44,171 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:44,222 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:44,267 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:44,323 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:44,347 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:44,442 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-12-13 22:07:44,465 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 24 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 22:07:44,465 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:07:44,647 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_122 (Array Int Int)) (|v_ULTIMATE.start_main_~#array~1#1.base_54| Int)) (or (not (= (select |c_#valid| |v_ULTIMATE.start_main_~#array~1#1.base_54|) 0)) (let ((.cse0 (select (store |c_#memory_int| |v_ULTIMATE.start_main_~#array~1#1.base_54| v_ArrVal_122) |c_~#array~0.base|))) (< (select .cse0 |c_~#array~0.offset|) (+ (select .cse0 (+ |c_~#array~0.offset| 4)) 1))))) is different from false [2022-12-13 22:07:44,648 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-12-13 22:07:44,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1502793079] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:07:44,649 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:07:44,649 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 7] total 26 [2022-12-13 22:07:44,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696329875] [2022-12-13 22:07:44,649 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:07:44,699 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:44,699 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-12-13 22:07:44,699 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=542, Unknown=4, NotChecked=48, Total=702 [2022-12-13 22:07:44,700 INFO L87 Difference]: Start difference. First operand 27 states and 31 transitions. cyclomatic complexity: 7 Second operand has 27 states, 27 states have (on average 1.7407407407407407) internal successors, (47), 26 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:45,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:45,159 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2022-12-13 22:07:45,159 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 41 transitions. [2022-12-13 22:07:45,159 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 15 [2022-12-13 22:07:45,160 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 41 transitions. [2022-12-13 22:07:45,160 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2022-12-13 22:07:45,160 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2022-12-13 22:07:45,160 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 41 transitions. [2022-12-13 22:07:45,160 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:45,160 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 41 transitions. [2022-12-13 22:07:45,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 41 transitions. [2022-12-13 22:07:45,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 28. [2022-12-13 22:07:45,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:45,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2022-12-13 22:07:45,162 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-12-13 22:07:45,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-12-13 22:07:45,163 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2022-12-13 22:07:45,163 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-12-13 22:07:45,163 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2022-12-13 22:07:45,164 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:45,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:45,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:45,164 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:07:45,164 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-12-13 22:07:45,164 INFO L748 eck$LassoCheckResult]: Stem: 752#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 749#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 736#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 737#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 738#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 739#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 753#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 760#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 759#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 758#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 757#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 756#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 755#L44-3 assume !(main_~i~1#1 >= 0); 740#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 741#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 751#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 746#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 747#L32-2 [2022-12-13 22:07:45,165 INFO L750 eck$LassoCheckResult]: Loop: 747#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 750#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 761#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 747#L32-2 [2022-12-13 22:07:45,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:45,165 INFO L85 PathProgramCache]: Analyzing trace with hash 1638583016, now seen corresponding path program 1 times [2022-12-13 22:07:45,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:45,165 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398489972] [2022-12-13 22:07:45,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:45,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:45,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:45,180 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:45,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:45,188 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:45,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:45,189 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 2 times [2022-12-13 22:07:45,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:45,189 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2116969241] [2022-12-13 22:07:45,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:45,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:45,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:45,192 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:45,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:45,196 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:45,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:45,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1571618174, now seen corresponding path program 1 times [2022-12-13 22:07:45,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:45,196 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013288440] [2022-12-13 22:07:45,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:45,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:45,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:45,480 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-12-13 22:07:45,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:45,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013288440] [2022-12-13 22:07:45,481 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1013288440] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:07:45,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1149682656] [2022-12-13 22:07:45,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:45,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:07:45,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:45,482 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:07:45,483 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-12-13 22:07:45,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:45,529 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 34 conjunts are in the unsatisfiable core [2022-12-13 22:07:45,531 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:45,571 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-12-13 22:07:45,571 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-12-13 22:07:45,602 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:45,648 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:45,692 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:45,710 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:45,734 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:45,887 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-12-13 22:07:45,906 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-12-13 22:07:45,906 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:07:46,095 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-12-13 22:07:46,095 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1149682656] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:07:46,095 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:07:46,095 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 7] total 25 [2022-12-13 22:07:46,095 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529457129] [2022-12-13 22:07:46,095 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:07:46,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:46,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-12-13 22:07:46,133 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=610, Unknown=8, NotChecked=0, Total=702 [2022-12-13 22:07:46,133 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 27 states, 26 states have (on average 1.7692307692307692) internal successors, (46), 26 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:46,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:46,719 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-12-13 22:07:46,719 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-12-13 22:07:46,720 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 23 [2022-12-13 22:07:46,720 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-12-13 22:07:46,720 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-12-13 22:07:46,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-12-13 22:07:46,720 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-12-13 22:07:46,720 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:46,720 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-12-13 22:07:46,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-12-13 22:07:46,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 31. [2022-12-13 22:07:46,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.1612903225806452) internal successors, (36), 30 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:46,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 36 transitions. [2022-12-13 22:07:46,722 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-12-13 22:07:46,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-12-13 22:07:46,723 INFO L428 stractBuchiCegarLoop]: Abstraction has 31 states and 36 transitions. [2022-12-13 22:07:46,723 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-12-13 22:07:46,723 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 36 transitions. [2022-12-13 22:07:46,723 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:46,723 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:46,723 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:46,723 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:07:46,724 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:07:46,724 INFO L748 eck$LassoCheckResult]: Stem: 1002#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 998#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 985#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 986#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 987#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 988#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1010#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1009#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1008#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1007#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1006#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1005#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1004#L44-3 assume !(main_~i~1#1 >= 0); 989#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 990#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1000#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1001#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1013#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1012#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1003#L32-4 [2022-12-13 22:07:46,724 INFO L750 eck$LassoCheckResult]: Loop: 1003#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 983#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 984#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 999#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1003#L32-4 [2022-12-13 22:07:46,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:46,724 INFO L85 PathProgramCache]: Analyzing trace with hash -1574718017, now seen corresponding path program 1 times [2022-12-13 22:07:46,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:46,724 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100997456] [2022-12-13 22:07:46,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:46,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:46,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:46,764 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-13 22:07:46,764 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:46,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100997456] [2022-12-13 22:07:46,765 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [100997456] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:07:46,765 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [137867397] [2022-12-13 22:07:46,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:46,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:07:46,765 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:46,766 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:07:46,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-12-13 22:07:46,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:46,815 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 5 conjunts are in the unsatisfiable core [2022-12-13 22:07:46,816 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:46,851 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-13 22:07:46,852 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:07:46,883 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-13 22:07:46,884 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [137867397] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:07:46,884 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:07:46,884 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 11 [2022-12-13 22:07:46,884 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1162955878] [2022-12-13 22:07:46,884 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:07:46,884 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:07:46,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:46,885 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 5 times [2022-12-13 22:07:46,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:46,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14750573] [2022-12-13 22:07:46,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:46,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:46,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:46,889 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:46,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:46,891 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:46,952 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:46,952 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-12-13 22:07:46,952 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=107, Unknown=0, NotChecked=0, Total=156 [2022-12-13 22:07:46,952 INFO L87 Difference]: Start difference. First operand 31 states and 36 transitions. cyclomatic complexity: 8 Second operand has 13 states, 12 states have (on average 2.3333333333333335) internal successors, (28), 12 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:47,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:47,036 INFO L93 Difference]: Finished difference Result 51 states and 61 transitions. [2022-12-13 22:07:47,036 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 61 transitions. [2022-12-13 22:07:47,036 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 16 [2022-12-13 22:07:47,037 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 61 transitions. [2022-12-13 22:07:47,037 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 41 [2022-12-13 22:07:47,037 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 41 [2022-12-13 22:07:47,037 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 61 transitions. [2022-12-13 22:07:47,037 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:47,037 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 61 transitions. [2022-12-13 22:07:47,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 61 transitions. [2022-12-13 22:07:47,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2022-12-13 22:07:47,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:47,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2022-12-13 22:07:47,040 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-12-13 22:07:47,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-12-13 22:07:47,041 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2022-12-13 22:07:47,041 INFO L335 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2022-12-13 22:07:47,041 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2022-12-13 22:07:47,042 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-12-13 22:07:47,042 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:47,042 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:47,043 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 1, 1, 1, 1, 1] [2022-12-13 22:07:47,043 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-12-13 22:07:47,043 INFO L748 eck$LassoCheckResult]: Stem: 1223#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1220#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1207#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1208#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1209#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1210#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1235#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1234#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1233#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1232#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1231#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1228#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1227#L44-3 assume !(main_~i~1#1 >= 0); 1211#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1212#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1249#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1248#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1247#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1246#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1245#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1244#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1243#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1242#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1241#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1240#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1238#L33 [2022-12-13 22:07:47,043 INFO L750 eck$LassoCheckResult]: Loop: 1238#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1239#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1237#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1238#L33 [2022-12-13 22:07:47,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:47,043 INFO L85 PathProgramCache]: Analyzing trace with hash 649240641, now seen corresponding path program 1 times [2022-12-13 22:07:47,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:47,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568648930] [2022-12-13 22:07:47,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:47,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:47,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,058 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:47,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,072 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:47,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:47,073 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 3 times [2022-12-13 22:07:47,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:47,073 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437987301] [2022-12-13 22:07:47,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:47,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:47,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,076 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:47,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,079 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:47,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:47,079 INFO L85 PathProgramCache]: Analyzing trace with hash 1290237019, now seen corresponding path program 2 times [2022-12-13 22:07:47,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:47,080 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277791023] [2022-12-13 22:07:47,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:47,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:47,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:47,181 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-13 22:07:47,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:47,182 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277791023] [2022-12-13 22:07:47,182 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [277791023] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:07:47,182 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:07:47,182 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-12-13 22:07:47,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866270118] [2022-12-13 22:07:47,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:07:47,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:07:47,234 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-12-13 22:07:47,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-12-13 22:07:47,234 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 12 Second operand has 9 states, 8 states have (on average 2.5) internal successors, (20), 8 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:47,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:07:47,285 INFO L93 Difference]: Finished difference Result 46 states and 53 transitions. [2022-12-13 22:07:47,285 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 53 transitions. [2022-12-13 22:07:47,285 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:47,286 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 53 transitions. [2022-12-13 22:07:47,286 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2022-12-13 22:07:47,286 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2022-12-13 22:07:47,286 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 53 transitions. [2022-12-13 22:07:47,286 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:07:47,286 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-12-13 22:07:47,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 53 transitions. [2022-12-13 22:07:47,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-12-13 22:07:47,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.1521739130434783) internal successors, (53), 45 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:07:47,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2022-12-13 22:07:47,289 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-12-13 22:07:47,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-12-13 22:07:47,290 INFO L428 stractBuchiCegarLoop]: Abstraction has 46 states and 53 transitions. [2022-12-13 22:07:47,290 INFO L335 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2022-12-13 22:07:47,290 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 53 transitions. [2022-12-13 22:07:47,290 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 10 [2022-12-13 22:07:47,290 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:07:47,290 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:07:47,291 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:07:47,291 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-12-13 22:07:47,291 INFO L748 eck$LassoCheckResult]: Stem: 1341#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1338#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1325#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1326#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1327#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1328#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1355#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1354#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1352#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1350#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1348#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1344#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1343#L44-3 assume !(main_~i~1#1 >= 0); 1329#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1330#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1340#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1335#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1336#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1339#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1368#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1367#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1366#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1365#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1364#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1363#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1362#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1361#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1360#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1342#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1323#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1324#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1359#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1358#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1357#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1356#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1351#L33 [2022-12-13 22:07:47,291 INFO L750 eck$LassoCheckResult]: Loop: 1351#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1353#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1346#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1351#L33 [2022-12-13 22:07:47,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:47,292 INFO L85 PathProgramCache]: Analyzing trace with hash -264183975, now seen corresponding path program 1 times [2022-12-13 22:07:47,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:47,292 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519919138] [2022-12-13 22:07:47,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:47,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:47,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,308 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:47,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,324 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:47,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:47,325 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 4 times [2022-12-13 22:07:47,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:47,325 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291179209] [2022-12-13 22:07:47,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:47,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:47,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,328 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:07:47,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:07:47,330 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:07:47,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:07:47,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1924678077, now seen corresponding path program 1 times [2022-12-13 22:07:47,330 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:07:47,330 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366627010] [2022-12-13 22:07:47,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:47,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:07:47,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:47,907 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 34 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-12-13 22:07:47,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:07:47,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [366627010] [2022-12-13 22:07:47,907 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [366627010] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:07:47,908 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1361980344] [2022-12-13 22:07:47,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:07:47,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:07:47,908 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:07:47,909 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:07:47,910 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-12-13 22:07:47,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:07:47,978 INFO L263 TraceCheckSpWp]: Trace formula consists of 237 conjuncts, 50 conjunts are in the unsatisfiable core [2022-12-13 22:07:47,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:07:48,010 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-12-13 22:07:48,011 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-12-13 22:07:48,042 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:48,094 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:48,138 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:48,154 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:48,176 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:07:48,504 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:07:48,505 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-13 22:07:48,506 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:07:48,506 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:07:48,507 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-12-13 22:07:48,771 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-13 22:07:48,771 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-12-13 22:07:48,824 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 12 proven. 66 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-12-13 22:07:48,824 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:08:13,865 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_265 Int) (|v_ULTIMATE.start_SelectionSort_~rh~0#1_29| Int) (v_ArrVal_264 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_264) |c_~#array~0.base|))) (let ((.cse1 (select (store .cse0 |c_~#array~0.offset| v_ArrVal_265) (+ |c_~#array~0.offset| (* |v_ULTIMATE.start_SelectionSort_~rh~0#1_29| 4)))) (.cse2 (select .cse0 (+ |c_~#array~0.offset| 12)))) (or (< (select .cse0 (+ |c_~#array~0.offset| 8)) .cse1) (< .cse2 (select .cse0 |c_~#array~0.offset|)) (< .cse1 (+ .cse2 1)))))) is different from false [2022-12-13 22:08:14,040 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 25 proven. 32 refuted. 0 times theorem prover too weak. 18 trivial. 9 not checked. [2022-12-13 22:08:14,040 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1361980344] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:08:14,040 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:08:14,040 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 19, 17] total 46 [2022-12-13 22:08:14,040 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994139797] [2022-12-13 22:08:14,040 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:08:14,095 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:08:14,096 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-12-13 22:08:14,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=1876, Unknown=3, NotChecked=88, Total=2162 [2022-12-13 22:08:14,097 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. cyclomatic complexity: 10 Second operand has 47 states, 47 states have (on average 1.8085106382978724) internal successors, (85), 46 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:08:22,560 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.53s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-12-13 22:08:34,693 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-12-13 22:09:02,693 WARN L233 SmtUtils]: Spent 12.04s on a formula simplification that was a NOOP. DAG size: 40 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:09:07,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:09:07,182 INFO L93 Difference]: Finished difference Result 100 states and 121 transitions. [2022-12-13 22:09:07,182 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 121 transitions. [2022-12-13 22:09:07,182 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 30 [2022-12-13 22:09:07,183 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 121 transitions. [2022-12-13 22:09:07,183 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 90 [2022-12-13 22:09:07,184 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 90 [2022-12-13 22:09:07,184 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 121 transitions. [2022-12-13 22:09:07,184 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:09:07,184 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 121 transitions. [2022-12-13 22:09:07,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 121 transitions. [2022-12-13 22:09:07,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 71. [2022-12-13 22:09:07,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 71 states have (on average 1.1971830985915493) internal successors, (85), 70 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:07,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 85 transitions. [2022-12-13 22:09:07,187 INFO L240 hiAutomatonCegarLoop]: Abstraction has 71 states and 85 transitions. [2022-12-13 22:09:07,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-12-13 22:09:07,189 INFO L428 stractBuchiCegarLoop]: Abstraction has 71 states and 85 transitions. [2022-12-13 22:09:07,189 INFO L335 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2022-12-13 22:09:07,189 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71 states and 85 transitions. [2022-12-13 22:09:07,189 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-12-13 22:09:07,189 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:09:07,189 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:09:07,190 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:09:07,190 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-12-13 22:09:07,190 INFO L748 eck$LassoCheckResult]: Stem: 1833#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 1829#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 1816#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1817#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1818#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1819#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1844#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1843#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1842#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1841#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1840#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 1839#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 1838#L44-3 assume !(main_~i~1#1 >= 0); 1820#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 1821#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1865#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1864#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1863#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1862#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1861#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1860#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1859#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1858#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1857#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1856#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1854#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1855#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1850#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 1851#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1814#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 1815#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 1870#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1871#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 1874#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1831#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1832#L33 [2022-12-13 22:09:07,190 INFO L750 eck$LassoCheckResult]: Loop: 1832#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 1827#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 1830#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 1832#L33 [2022-12-13 22:09:07,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:07,190 INFO L85 PathProgramCache]: Analyzing trace with hash 128843035, now seen corresponding path program 2 times [2022-12-13 22:09:07,190 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:07,190 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388705031] [2022-12-13 22:09:07,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:07,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:07,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:09:07,803 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-12-13 22:09:07,803 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:09:07,803 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388705031] [2022-12-13 22:09:07,803 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1388705031] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:09:07,803 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [948197493] [2022-12-13 22:09:07,803 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 22:09:07,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:09:07,803 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:09:07,804 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:09:07,805 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-12-13 22:09:07,854 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-12-13 22:09:07,854 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:09:07,855 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 31 conjunts are in the unsatisfiable core [2022-12-13 22:09:07,857 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:09:07,893 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-12-13 22:09:07,893 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-12-13 22:09:07,929 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:07,947 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:07,972 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:07,989 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:08,007 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:08,426 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-13 22:09:08,427 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 36 [2022-12-13 22:09:08,469 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-12-13 22:09:08,469 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:09:21,236 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 23 proven. 24 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2022-12-13 22:09:21,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [948197493] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:09:21,236 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:09:21,236 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 35 [2022-12-13 22:09:21,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138169408] [2022-12-13 22:09:21,236 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:09:21,237 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:09:21,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:21,237 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 5 times [2022-12-13 22:09:21,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:21,237 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660978752] [2022-12-13 22:09:21,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:21,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:21,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:21,240 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:21,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:21,242 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:21,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:09:21,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-12-13 22:09:21,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=1135, Unknown=4, NotChecked=0, Total=1260 [2022-12-13 22:09:21,316 INFO L87 Difference]: Start difference. First operand 71 states and 85 transitions. cyclomatic complexity: 18 Second operand has 36 states, 36 states have (on average 1.8611111111111112) internal successors, (67), 35 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:22,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:09:22,600 INFO L93 Difference]: Finished difference Result 64 states and 76 transitions. [2022-12-13 22:09:22,600 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 64 states and 76 transitions. [2022-12-13 22:09:22,601 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 14 [2022-12-13 22:09:22,601 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 64 states to 64 states and 76 transitions. [2022-12-13 22:09:22,601 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54 [2022-12-13 22:09:22,601 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54 [2022-12-13 22:09:22,601 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 76 transitions. [2022-12-13 22:09:22,602 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:09:22,602 INFO L218 hiAutomatonCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-12-13 22:09:22,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 76 transitions. [2022-12-13 22:09:22,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2022-12-13 22:09:22,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.1935483870967742) internal successors, (74), 61 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:22,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 74 transitions. [2022-12-13 22:09:22,604 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 74 transitions. [2022-12-13 22:09:22,604 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-12-13 22:09:22,605 INFO L428 stractBuchiCegarLoop]: Abstraction has 62 states and 74 transitions. [2022-12-13 22:09:22,605 INFO L335 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2022-12-13 22:09:22,605 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 74 transitions. [2022-12-13 22:09:22,605 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-12-13 22:09:22,605 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:09:22,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:09:22,605 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:09:22,605 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-12-13 22:09:22,606 INFO L748 eck$LassoCheckResult]: Stem: 2236#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2231#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2218#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2219#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2220#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2221#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2249#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2248#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2247#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2246#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2245#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2242#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2241#L44-3 assume !(main_~i~1#1 >= 0); 2222#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2223#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2264#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2263#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2262#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2261#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2260#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2259#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2258#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2257#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2256#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2255#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2254#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2253#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2252#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2251#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2250#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2239#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2240#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2268#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2269#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2277#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2228#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2229#L32-2 [2022-12-13 22:09:22,606 INFO L750 eck$LassoCheckResult]: Loop: 2229#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2244#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2270#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2229#L32-2 [2022-12-13 22:09:22,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:22,606 INFO L85 PathProgramCache]: Analyzing trace with hash 400231404, now seen corresponding path program 2 times [2022-12-13 22:09:22,606 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:22,606 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424747366] [2022-12-13 22:09:22,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:22,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:22,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:22,617 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:22,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:22,627 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:22,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:22,628 INFO L85 PathProgramCache]: Analyzing trace with hash 68297, now seen corresponding path program 6 times [2022-12-13 22:09:22,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:22,628 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322682400] [2022-12-13 22:09:22,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:22,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:22,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:22,630 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:22,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:22,632 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:22,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:22,633 INFO L85 PathProgramCache]: Analyzing trace with hash 464581374, now seen corresponding path program 3 times [2022-12-13 22:09:22,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:22,633 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649172422] [2022-12-13 22:09:22,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:22,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:22,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:09:23,441 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-12-13 22:09:23,441 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:09:23,441 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649172422] [2022-12-13 22:09:23,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1649172422] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:09:23,441 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1264002415] [2022-12-13 22:09:23,441 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-13 22:09:23,441 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:09:23,441 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:09:23,442 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:09:23,443 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-12-13 22:09:23,515 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-12-13 22:09:23,515 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:09:23,517 INFO L263 TraceCheckSpWp]: Trace formula consists of 238 conjuncts, 37 conjunts are in the unsatisfiable core [2022-12-13 22:09:23,519 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:09:23,561 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-12-13 22:09:23,561 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-12-13 22:09:23,606 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:23,622 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:23,646 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:23,666 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:23,688 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:09:23,961 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:23,962 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:23,963 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:23,964 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:23,976 INFO L321 Elim1Store]: treesize reduction 21, result has 47.5 percent of original size [2022-12-13 22:09:23,977 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 55 [2022-12-13 22:09:24,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:24,201 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-13 22:09:24,202 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 13 [2022-12-13 22:09:24,231 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-12-13 22:09:24,231 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:09:24,664 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_352 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_352) |c_~#array~0.base|))) (< (select .cse0 (+ |c_~#array~0.offset| 4)) (+ (select .cse0 (+ 16 |c_~#array~0.offset|)) 1)))) is different from false [2022-12-13 22:09:24,753 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 38 trivial. 9 not checked. [2022-12-13 22:09:24,753 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1264002415] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:09:24,754 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:09:24,754 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10, 10] total 33 [2022-12-13 22:09:24,754 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860849589] [2022-12-13 22:09:24,754 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:09:24,817 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:09:24,817 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-12-13 22:09:24,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=1014, Unknown=1, NotChecked=64, Total=1190 [2022-12-13 22:09:24,818 INFO L87 Difference]: Start difference. First operand 62 states and 74 transitions. cyclomatic complexity: 16 Second operand has 35 states, 34 states have (on average 2.1176470588235294) internal successors, (72), 34 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:26,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:09:26,903 INFO L93 Difference]: Finished difference Result 114 states and 138 transitions. [2022-12-13 22:09:26,903 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 138 transitions. [2022-12-13 22:09:26,903 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 42 [2022-12-13 22:09:26,904 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 114 states and 138 transitions. [2022-12-13 22:09:26,904 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 104 [2022-12-13 22:09:26,904 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 104 [2022-12-13 22:09:26,904 INFO L73 IsDeterministic]: Start isDeterministic. Operand 114 states and 138 transitions. [2022-12-13 22:09:26,905 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:09:26,905 INFO L218 hiAutomatonCegarLoop]: Abstraction has 114 states and 138 transitions. [2022-12-13 22:09:26,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states and 138 transitions. [2022-12-13 22:09:26,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 64. [2022-12-13 22:09:26,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.1875) internal successors, (76), 63 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:26,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 76 transitions. [2022-12-13 22:09:26,909 INFO L240 hiAutomatonCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-12-13 22:09:26,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-12-13 22:09:26,910 INFO L428 stractBuchiCegarLoop]: Abstraction has 64 states and 76 transitions. [2022-12-13 22:09:26,910 INFO L335 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2022-12-13 22:09:26,910 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 76 transitions. [2022-12-13 22:09:26,910 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 13 [2022-12-13 22:09:26,910 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:09:26,911 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:09:26,911 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:09:26,911 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:09:26,911 INFO L748 eck$LassoCheckResult]: Stem: 2734#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 2730#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 2717#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2718#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2719#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2720#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2744#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2743#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2742#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2741#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2740#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 2739#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 2738#L44-3 assume !(main_~i~1#1 >= 0); 2721#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 2722#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2759#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2758#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2757#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2756#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2755#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2754#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2753#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2752#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2751#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2750#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2749#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2748#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2747#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2746#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2745#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2736#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2737#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2763#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 2764#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2732#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2733#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 2778#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 2777#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2735#L32-4 [2022-12-13 22:09:26,911 INFO L750 eck$LassoCheckResult]: Loop: 2735#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 2715#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 2716#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 2731#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 2735#L32-4 [2022-12-13 22:09:26,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:26,912 INFO L85 PathProgramCache]: Analyzing trace with hash -1981934459, now seen corresponding path program 4 times [2022-12-13 22:09:26,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:26,912 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704954249] [2022-12-13 22:09:26,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:26,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:26,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:09:27,016 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-12-13 22:09:27,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:09:27,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [704954249] [2022-12-13 22:09:27,017 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [704954249] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:09:27,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1963979365] [2022-12-13 22:09:27,017 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-13 22:09:27,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:09:27,017 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:09:27,018 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:09:27,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-12-13 22:09:27,084 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-13 22:09:27,084 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:09:27,085 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 10 conjunts are in the unsatisfiable core [2022-12-13 22:09:27,086 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:09:27,190 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 13 proven. 46 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-13 22:09:27,190 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:09:27,302 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 13 proven. 46 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2022-12-13 22:09:27,302 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1963979365] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:09:27,302 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:09:27,302 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 10, 10] total 12 [2022-12-13 22:09:27,302 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397300220] [2022-12-13 22:09:27,302 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:09:27,303 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:09:27,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:27,303 INFO L85 PathProgramCache]: Analyzing trace with hash 2248553, now seen corresponding path program 6 times [2022-12-13 22:09:27,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:27,303 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347668845] [2022-12-13 22:09:27,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:27,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:27,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:27,307 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:27,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:27,309 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:27,429 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:09:27,429 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-12-13 22:09:27,429 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2022-12-13 22:09:27,429 INFO L87 Difference]: Start difference. First operand 64 states and 76 transitions. cyclomatic complexity: 16 Second operand has 13 states, 12 states have (on average 3.5833333333333335) internal successors, (43), 13 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:27,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:09:27,862 INFO L93 Difference]: Finished difference Result 121 states and 146 transitions. [2022-12-13 22:09:27,862 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 146 transitions. [2022-12-13 22:09:27,863 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 54 [2022-12-13 22:09:27,864 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 121 states and 146 transitions. [2022-12-13 22:09:27,864 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2022-12-13 22:09:27,864 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2022-12-13 22:09:27,864 INFO L73 IsDeterministic]: Start isDeterministic. Operand 121 states and 146 transitions. [2022-12-13 22:09:27,865 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:09:27,865 INFO L218 hiAutomatonCegarLoop]: Abstraction has 121 states and 146 transitions. [2022-12-13 22:09:27,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states and 146 transitions. [2022-12-13 22:09:27,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 97. [2022-12-13 22:09:27,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.2268041237113403) internal successors, (119), 96 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:27,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 119 transitions. [2022-12-13 22:09:27,869 INFO L240 hiAutomatonCegarLoop]: Abstraction has 97 states and 119 transitions. [2022-12-13 22:09:27,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-12-13 22:09:27,870 INFO L428 stractBuchiCegarLoop]: Abstraction has 97 states and 119 transitions. [2022-12-13 22:09:27,870 INFO L335 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2022-12-13 22:09:27,870 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 119 transitions. [2022-12-13 22:09:27,871 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 33 [2022-12-13 22:09:27,871 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:09:27,871 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:09:27,872 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:09:27,872 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 1, 1, 1, 1] [2022-12-13 22:09:27,872 INFO L748 eck$LassoCheckResult]: Stem: 3191#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3188#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3174#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3175#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3176#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3177#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3200#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3199#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3198#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3197#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3196#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3195#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3194#L44-3 assume !(main_~i~1#1 >= 0); 3178#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3179#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3221#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3220#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3219#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3218#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3217#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3216#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3215#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3214#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3213#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3212#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3210#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3211#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3205#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3204#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3203#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3193#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3190#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3184#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3186#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3257#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3256#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3255#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3254#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3253#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3227#L32-2 [2022-12-13 22:09:27,872 INFO L750 eck$LassoCheckResult]: Loop: 3227#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3252#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3192#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3172#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3173#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3244#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3260#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3267#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3263#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3264#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3266#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3265#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3226#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3227#L32-2 [2022-12-13 22:09:27,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:27,872 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 3 times [2022-12-13 22:09:27,872 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:27,872 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [847871849] [2022-12-13 22:09:27,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:27,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:27,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:27,887 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:27,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:27,903 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:27,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:27,903 INFO L85 PathProgramCache]: Analyzing trace with hash 1952620257, now seen corresponding path program 1 times [2022-12-13 22:09:27,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:27,904 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930062003] [2022-12-13 22:09:27,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:27,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:27,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:27,910 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:27,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:27,916 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:27,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:27,917 INFO L85 PathProgramCache]: Analyzing trace with hash 2067186242, now seen corresponding path program 5 times [2022-12-13 22:09:27,917 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:27,917 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913345757] [2022-12-13 22:09:27,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:27,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:27,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:09:28,067 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 15 proven. 103 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-12-13 22:09:28,067 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:09:28,067 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913345757] [2022-12-13 22:09:28,067 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913345757] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:09:28,067 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2115070401] [2022-12-13 22:09:28,067 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-12-13 22:09:28,067 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:09:28,067 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:09:28,068 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:09:28,069 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-12-13 22:09:28,247 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-12-13 22:09:28,247 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:09:28,249 INFO L263 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 10 conjunts are in the unsatisfiable core [2022-12-13 22:09:28,250 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:09:28,527 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 37 proven. 95 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-12-13 22:09:28,527 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:09:28,675 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 75 proven. 57 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-12-13 22:09:28,675 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2115070401] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:09:28,676 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:09:28,676 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9, 9] total 19 [2022-12-13 22:09:28,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437612946] [2022-12-13 22:09:28,676 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:09:29,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:09:29,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-12-13 22:09:29,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=297, Unknown=0, NotChecked=0, Total=380 [2022-12-13 22:09:29,182 INFO L87 Difference]: Start difference. First operand 97 states and 119 transitions. cyclomatic complexity: 26 Second operand has 20 states, 20 states have (on average 3.9) internal successors, (78), 19 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:29,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:09:29,560 INFO L93 Difference]: Finished difference Result 163 states and 192 transitions. [2022-12-13 22:09:29,560 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 163 states and 192 transitions. [2022-12-13 22:09:29,560 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 64 [2022-12-13 22:09:29,561 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 163 states to 134 states and 158 transitions. [2022-12-13 22:09:29,561 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 124 [2022-12-13 22:09:29,561 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 124 [2022-12-13 22:09:29,561 INFO L73 IsDeterministic]: Start isDeterministic. Operand 134 states and 158 transitions. [2022-12-13 22:09:29,561 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:09:29,561 INFO L218 hiAutomatonCegarLoop]: Abstraction has 134 states and 158 transitions. [2022-12-13 22:09:29,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states and 158 transitions. [2022-12-13 22:09:29,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 75. [2022-12-13 22:09:29,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.1866666666666668) internal successors, (89), 74 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:29,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 89 transitions. [2022-12-13 22:09:29,563 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 89 transitions. [2022-12-13 22:09:29,564 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-12-13 22:09:29,564 INFO L428 stractBuchiCegarLoop]: Abstraction has 75 states and 89 transitions. [2022-12-13 22:09:29,564 INFO L335 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2022-12-13 22:09:29,564 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 89 transitions. [2022-12-13 22:09:29,564 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 17 [2022-12-13 22:09:29,564 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:09:29,564 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:09:29,565 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:09:29,565 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-12-13 22:09:29,565 INFO L748 eck$LassoCheckResult]: Stem: 3819#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 3814#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 3801#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3802#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3803#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3804#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3820#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3829#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3828#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3827#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3826#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 3825#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 3824#L44-3 assume !(main_~i~1#1 >= 0); 3805#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 3806#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3845#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3844#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3843#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3842#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3841#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3840#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3839#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3838#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3837#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3836#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3835#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3834#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3833#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 3832#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3799#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 3800#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 3823#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3857#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3856#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3853#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3850#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3851#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3817#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3818#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 3854#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3855#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3849#L33 [2022-12-13 22:09:29,565 INFO L750 eck$LassoCheckResult]: Loop: 3849#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 3815#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 3816#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 3849#L33 [2022-12-13 22:09:29,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:29,565 INFO L85 PathProgramCache]: Analyzing trace with hash -893953577, now seen corresponding path program 6 times [2022-12-13 22:09:29,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:29,565 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892929043] [2022-12-13 22:09:29,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:29,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:29,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:09:29,673 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 12 proven. 45 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-12-13 22:09:29,673 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:09:29,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892929043] [2022-12-13 22:09:29,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [892929043] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:09:29,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [435841687] [2022-12-13 22:09:29,674 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-12-13 22:09:29,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:09:29,674 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:09:29,675 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:09:29,676 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-12-13 22:09:29,752 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-12-13 22:09:29,752 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:09:29,753 INFO L263 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 8 conjunts are in the unsatisfiable core [2022-12-13 22:09:29,754 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:09:29,928 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 13 proven. 44 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-12-13 22:09:29,928 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:09:30,017 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 13 proven. 44 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-12-13 22:09:30,018 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [435841687] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:09:30,018 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:09:30,018 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 14 [2022-12-13 22:09:30,018 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799943278] [2022-12-13 22:09:30,018 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:09:30,018 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:09:30,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:30,018 INFO L85 PathProgramCache]: Analyzing trace with hash 64667, now seen corresponding path program 7 times [2022-12-13 22:09:30,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:30,018 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179545834] [2022-12-13 22:09:30,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:30,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:30,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:30,021 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:30,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:30,022 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:30,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:09:30,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-12-13 22:09:30,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=175, Unknown=0, NotChecked=0, Total=240 [2022-12-13 22:09:30,091 INFO L87 Difference]: Start difference. First operand 75 states and 89 transitions. cyclomatic complexity: 18 Second operand has 16 states, 15 states have (on average 3.4) internal successors, (51), 15 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:30,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:09:30,237 INFO L93 Difference]: Finished difference Result 96 states and 110 transitions. [2022-12-13 22:09:30,237 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 110 transitions. [2022-12-13 22:09:30,238 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 32 [2022-12-13 22:09:30,238 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 96 states and 110 transitions. [2022-12-13 22:09:30,238 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 86 [2022-12-13 22:09:30,238 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 86 [2022-12-13 22:09:30,238 INFO L73 IsDeterministic]: Start isDeterministic. Operand 96 states and 110 transitions. [2022-12-13 22:09:30,239 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:09:30,239 INFO L218 hiAutomatonCegarLoop]: Abstraction has 96 states and 110 transitions. [2022-12-13 22:09:30,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states and 110 transitions. [2022-12-13 22:09:30,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 69. [2022-12-13 22:09:30,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.1594202898550725) internal successors, (80), 68 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:30,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 80 transitions. [2022-12-13 22:09:30,240 INFO L240 hiAutomatonCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-12-13 22:09:30,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-12-13 22:09:30,241 INFO L428 stractBuchiCegarLoop]: Abstraction has 69 states and 80 transitions. [2022-12-13 22:09:30,241 INFO L335 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2022-12-13 22:09:30,241 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 80 transitions. [2022-12-13 22:09:30,241 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-12-13 22:09:30,241 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:09:30,241 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:09:30,241 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:09:30,241 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 1, 1, 1, 1] [2022-12-13 22:09:30,242 INFO L748 eck$LassoCheckResult]: Stem: 4265#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4262#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4249#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4250#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4251#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4252#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4275#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4274#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4273#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4272#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4271#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4270#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4269#L44-3 assume !(main_~i~1#1 >= 0); 4253#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4254#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4292#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4291#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4290#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4289#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4288#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4287#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4286#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4285#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4284#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4283#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4282#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4281#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4280#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4279#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4278#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4267#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4268#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4295#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4310#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4311#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4312#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4313#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4264#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4259#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 4260#L32-2 [2022-12-13 22:09:30,242 INFO L750 eck$LassoCheckResult]: Loop: 4260#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4263#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 4266#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4247#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4248#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 4299#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4298#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4296#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 4297#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4293#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 4260#L32-2 [2022-12-13 22:09:30,242 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:30,242 INFO L85 PathProgramCache]: Analyzing trace with hash 464581376, now seen corresponding path program 4 times [2022-12-13 22:09:30,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:30,242 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [785773078] [2022-12-13 22:09:30,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:30,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:30,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:30,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:30,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:30,262 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:30,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:30,262 INFO L85 PathProgramCache]: Analyzing trace with hash 372024041, now seen corresponding path program 2 times [2022-12-13 22:09:30,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:30,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499577919] [2022-12-13 22:09:30,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:30,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:30,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:30,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:09:30,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:09:30,269 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:09:30,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:09:30,270 INFO L85 PathProgramCache]: Analyzing trace with hash -693820632, now seen corresponding path program 7 times [2022-12-13 22:09:30,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:09:30,270 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486362694] [2022-12-13 22:09:30,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:09:30,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:09:30,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:09:31,756 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-12-13 22:09:31,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:09:31,756 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486362694] [2022-12-13 22:09:31,757 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486362694] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:09:31,757 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1171940834] [2022-12-13 22:09:31,757 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-12-13 22:09:31,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:09:31,757 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:09:31,758 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:09:31,759 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-12-13 22:09:31,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:09:31,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 73 conjunts are in the unsatisfiable core [2022-12-13 22:09:31,828 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:09:31,888 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-12-13 22:09:31,889 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-12-13 22:09:31,939 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:09:31,999 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:09:32,070 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:09:32,130 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:09:32,158 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-12-13 22:09:32,869 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-13 22:09:32,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:32,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:32,872 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:32,873 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2022-12-13 22:09:33,458 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:33,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:33,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:09:33,460 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-13 22:09:33,461 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 42 [2022-12-13 22:09:33,933 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 18 [2022-12-13 22:09:33,991 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-13 22:09:33,991 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:09:36,456 WARN L837 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_531 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_531) |c_~#array~0.base|))) (let ((.cse2 (select .cse0 (+ |c_~#array~0.offset| 4))) (.cse1 (select .cse0 (+ |c_~#array~0.offset| 12))) (.cse3 (select .cse0 (+ 16 |c_~#array~0.offset|)))) (or (< (select .cse0 (+ |c_~#array~0.offset| 8)) (+ 1 .cse1)) (< .cse2 (select .cse0 |c_~#array~0.offset|)) (< .cse3 .cse2) (< .cse1 (+ .cse3 1)))))) is different from false [2022-12-13 22:09:36,577 WARN L837 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~#array~1#1.base_62| Int) (v_ArrVal_531 (Array Int Int))) (let ((.cse2 (select (store |c_#memory_int| |v_ULTIMATE.start_main_~#array~1#1.base_62| v_ArrVal_531) |c_~#array~0.base|))) (let ((.cse1 (select .cse2 (+ |c_~#array~0.offset| 4))) (.cse0 (select .cse2 (+ 16 |c_~#array~0.offset|))) (.cse3 (select .cse2 (+ |c_~#array~0.offset| 12)))) (or (< .cse0 .cse1) (< .cse1 (select .cse2 |c_~#array~0.offset|)) (< .cse3 (+ .cse0 1)) (not (= (select |c_#valid| |v_ULTIMATE.start_main_~#array~1#1.base_62|) 0)) (< (select .cse2 (+ |c_~#array~0.offset| 8)) (+ .cse3 1)))))) is different from false [2022-12-13 22:09:36,580 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 14 proven. 95 refuted. 0 times theorem prover too weak. 31 trivial. 9 not checked. [2022-12-13 22:09:36,580 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1171940834] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:09:36,580 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:09:36,580 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 27, 21] total 67 [2022-12-13 22:09:36,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911140153] [2022-12-13 22:09:36,580 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:09:36,976 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:09:36,976 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 69 interpolants. [2022-12-13 22:09:36,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=473, Invalid=3955, Unknown=2, NotChecked=262, Total=4692 [2022-12-13 22:09:36,979 INFO L87 Difference]: Start difference. First operand 69 states and 80 transitions. cyclomatic complexity: 14 Second operand has 69 states, 68 states have (on average 1.7352941176470589) internal successors, (118), 68 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:09:55,452 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-12-13 22:10:29,207 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-12-13 22:10:29,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:10:29,349 INFO L93 Difference]: Finished difference Result 182 states and 215 transitions. [2022-12-13 22:10:29,349 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 182 states and 215 transitions. [2022-12-13 22:10:29,349 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 40 [2022-12-13 22:10:29,350 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 182 states to 182 states and 215 transitions. [2022-12-13 22:10:29,350 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 172 [2022-12-13 22:10:29,350 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 172 [2022-12-13 22:10:29,350 INFO L73 IsDeterministic]: Start isDeterministic. Operand 182 states and 215 transitions. [2022-12-13 22:10:29,350 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:10:29,350 INFO L218 hiAutomatonCegarLoop]: Abstraction has 182 states and 215 transitions. [2022-12-13 22:10:29,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states and 215 transitions. [2022-12-13 22:10:29,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 87. [2022-12-13 22:10:29,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 87 states have (on average 1.1954022988505748) internal successors, (104), 86 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:10:29,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 104 transitions. [2022-12-13 22:10:29,352 INFO L240 hiAutomatonCegarLoop]: Abstraction has 87 states and 104 transitions. [2022-12-13 22:10:29,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-12-13 22:10:29,354 INFO L428 stractBuchiCegarLoop]: Abstraction has 87 states and 104 transitions. [2022-12-13 22:10:29,355 INFO L335 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2022-12-13 22:10:29,355 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 87 states and 104 transitions. [2022-12-13 22:10:29,355 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-12-13 22:10:29,355 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:10:29,355 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:10:29,355 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:10:29,355 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:10:29,356 INFO L748 eck$LassoCheckResult]: Stem: 4996#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 4992#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 4979#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4980#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4981#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 4982#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 4997#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5007#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5006#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5005#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5004#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5003#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5002#L44-3 assume !(main_~i~1#1 >= 0); 4983#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 4984#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5024#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5023#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5022#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5021#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5020#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5019#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5018#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5017#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5016#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5015#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5014#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5013#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5012#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5011#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5010#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5000#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5001#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5056#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 5057#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5052#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5053#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5048#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5049#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5044#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5045#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5040#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5041#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 4977#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 4978#L30-3 assume !(SelectionSort_~lh~0#1 < ~n~0); 4991#L26 assume { :end_inline_SelectionSort } true;main_~i~1#1 := 0; 4988#L49-3 [2022-12-13 22:10:29,356 INFO L750 eck$LassoCheckResult]: Loop: 4988#L49-3 assume !!(main_~i~1#1 < 5);call main_#t~mem9#1 := read~int(main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4);assume { :begin_inline___VERIFIER_assert } true;__VERIFIER_assert_#in~cond#1 := (if main_#t~mem9#1 == main_~i~1#1 then 1 else 0);havoc __VERIFIER_assert_~cond#1;__VERIFIER_assert_~cond#1 := __VERIFIER_assert_#in~cond#1; 4985#L15 assume !(0 == __VERIFIER_assert_~cond#1); 4986#L15-2 assume { :end_inline___VERIFIER_assert } true;havoc main_#t~mem9#1; 4987#L49-2 main_#t~post8#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post8#1;havoc main_#t~post8#1; 4988#L49-3 [2022-12-13 22:10:29,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:10:29,356 INFO L85 PathProgramCache]: Analyzing trace with hash -1993302254, now seen corresponding path program 1 times [2022-12-13 22:10:29,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:10:29,356 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062772268] [2022-12-13 22:10:29,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:10:29,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:10:29,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:10:29,409 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-12-13 22:10:29,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:10:29,409 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062772268] [2022-12-13 22:10:29,409 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1062772268] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:10:29,409 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [217095139] [2022-12-13 22:10:29,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:10:29,409 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:10:29,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:10:29,410 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:10:29,411 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-12-13 22:10:29,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:10:29,475 INFO L263 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 5 conjunts are in the unsatisfiable core [2022-12-13 22:10:29,475 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:10:29,582 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-12-13 22:10:29,583 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:10:29,656 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2022-12-13 22:10:29,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [217095139] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:10:29,657 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:10:29,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2022-12-13 22:10:29,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072861414] [2022-12-13 22:10:29,657 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:10:29,657 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:10:29,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:10:29,657 INFO L85 PathProgramCache]: Analyzing trace with hash 2685258, now seen corresponding path program 1 times [2022-12-13 22:10:29,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:10:29,657 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634385224] [2022-12-13 22:10:29,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:10:29,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:10:29,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:10:29,661 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:10:29,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:10:29,662 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:10:29,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:10:29,715 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-12-13 22:10:29,716 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2022-12-13 22:10:29,716 INFO L87 Difference]: Start difference. First operand 87 states and 104 transitions. cyclomatic complexity: 20 Second operand has 12 states, 12 states have (on average 5.166666666666667) internal successors, (62), 11 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:10:29,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:10:29,784 INFO L93 Difference]: Finished difference Result 105 states and 124 transitions. [2022-12-13 22:10:29,784 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 124 transitions. [2022-12-13 22:10:29,784 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-12-13 22:10:29,785 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 105 states and 124 transitions. [2022-12-13 22:10:29,785 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2022-12-13 22:10:29,785 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2022-12-13 22:10:29,785 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 124 transitions. [2022-12-13 22:10:29,785 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:10:29,785 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-12-13 22:10:29,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 124 transitions. [2022-12-13 22:10:29,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2022-12-13 22:10:29,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 105 states have (on average 1.180952380952381) internal successors, (124), 104 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:10:29,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 124 transitions. [2022-12-13 22:10:29,787 INFO L240 hiAutomatonCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-12-13 22:10:29,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-12-13 22:10:29,787 INFO L428 stractBuchiCegarLoop]: Abstraction has 105 states and 124 transitions. [2022-12-13 22:10:29,787 INFO L335 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2022-12-13 22:10:29,787 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 124 transitions. [2022-12-13 22:10:29,787 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-12-13 22:10:29,788 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:10:29,788 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:10:29,788 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 5, 5, 4, 4, 4, 1, 1, 1, 1, 1] [2022-12-13 22:10:29,788 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:10:29,788 INFO L748 eck$LassoCheckResult]: Stem: 5471#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 5467#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 5454#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5455#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5456#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5457#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5485#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5484#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5483#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5481#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5479#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 5475#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 5474#L44-3 assume !(main_~i~1#1 >= 0); 5458#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 5459#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5469#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5470#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5553#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5552#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5551#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5549#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5547#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5545#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5543#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5541#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5539#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5538#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5537#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5536#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5535#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5534#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5533#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5531#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 5530#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5529#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5528#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5527#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5526#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5525#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 5524#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 5523#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5522#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5521#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5520#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5519#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5505#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5500#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5501#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5512#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5490#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5489#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5488#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5477#L32-3 [2022-12-13 22:10:29,788 INFO L750 eck$LassoCheckResult]: Loop: 5477#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 5480#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 5478#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 5476#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 5477#L32-3 [2022-12-13 22:10:29,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:10:29,789 INFO L85 PathProgramCache]: Analyzing trace with hash -1926449103, now seen corresponding path program 8 times [2022-12-13 22:10:29,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:10:29,789 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241558644] [2022-12-13 22:10:29,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:10:29,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:10:29,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:10:29,871 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-12-13 22:10:29,871 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:10:29,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241558644] [2022-12-13 22:10:29,871 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [241558644] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:10:29,872 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1519113663] [2022-12-13 22:10:29,872 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 22:10:29,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:10:29,872 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:10:29,873 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:10:29,873 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-12-13 22:10:29,944 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-12-13 22:10:29,944 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:10:29,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 306 conjuncts, 6 conjunts are in the unsatisfiable core [2022-12-13 22:10:29,946 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:10:30,095 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-12-13 22:10:30,096 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:10:30,180 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 24 proven. 58 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2022-12-13 22:10:30,181 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1519113663] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:10:30,181 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:10:30,181 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2022-12-13 22:10:30,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700831766] [2022-12-13 22:10:30,181 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:10:30,181 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:10:30,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:10:30,181 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 7 times [2022-12-13 22:10:30,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:10:30,181 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150286248] [2022-12-13 22:10:30,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:10:30,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:10:30,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:10:30,184 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:10:30,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:10:30,186 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:10:30,282 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:10:30,282 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-12-13 22:10:30,282 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2022-12-13 22:10:30,282 INFO L87 Difference]: Start difference. First operand 105 states and 124 transitions. cyclomatic complexity: 22 Second operand has 14 states, 14 states have (on average 4.357142857142857) internal successors, (61), 13 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:10:30,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:10:30,429 INFO L93 Difference]: Finished difference Result 105 states and 118 transitions. [2022-12-13 22:10:30,429 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 118 transitions. [2022-12-13 22:10:30,430 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-12-13 22:10:30,430 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 105 states and 118 transitions. [2022-12-13 22:10:30,430 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2022-12-13 22:10:30,430 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2022-12-13 22:10:30,430 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 118 transitions. [2022-12-13 22:10:30,431 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:10:30,431 INFO L218 hiAutomatonCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-12-13 22:10:30,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 118 transitions. [2022-12-13 22:10:30,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2022-12-13 22:10:30,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 105 states have (on average 1.1238095238095238) internal successors, (118), 104 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:10:30,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 118 transitions. [2022-12-13 22:10:30,432 INFO L240 hiAutomatonCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-12-13 22:10:30,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-12-13 22:10:30,433 INFO L428 stractBuchiCegarLoop]: Abstraction has 105 states and 118 transitions. [2022-12-13 22:10:30,433 INFO L335 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2022-12-13 22:10:30,433 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 118 transitions. [2022-12-13 22:10:30,433 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2022-12-13 22:10:30,433 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:10:30,433 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:10:30,434 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 8, 5, 5, 5, 4, 4, 4, 2, 1, 1, 1, 1] [2022-12-13 22:10:30,434 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:10:30,434 INFO L748 eck$LassoCheckResult]: Stem: 6021#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);~#array~0.base, ~#array~0.offset := 3, 0;call #Ultimate.allocInit(20, 3);call write~init~int(0, ~#array~0.base, ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 4 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 8 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 12 + ~#array~0.offset, 4);call write~init~int(0, ~#array~0.base, 16 + ~#array~0.offset, 4);~n~0 := 5; 6018#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post7#1, main_#t~mem9#1, main_#t~post8#1, main_~#array~1#1.base, main_~#array~1#1.offset, main_~i~1#1;call main_~#array~1#1.base, main_~#array~1#1.offset := #Ultimate.allocOnStack(20);havoc main_~i~1#1;main_~i~1#1 := 4; 6005#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6006#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6007#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6008#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6034#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6033#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6032#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6030#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6028#L44-3 assume !!(main_~i~1#1 >= 0);call write~int(main_~i~1#1, main_~#array~1#1.base, main_~#array~1#1.offset + 4 * main_~i~1#1, 4); 6024#L44-2 main_#t~post7#1 := main_~i~1#1;main_~i~1#1 := main_#t~post7#1 - 1;havoc main_#t~post7#1; 6023#L44-3 assume !(main_~i~1#1 >= 0); 6009#L44-4 assume { :begin_inline_SelectionSort } true;havoc SelectionSort_#t~mem3#1, SelectionSort_#t~mem4#1, SelectionSort_#t~post2#1, SelectionSort_#t~mem5#1, SelectionSort_#t~mem6#1, SelectionSort_#t~post1#1, SelectionSort_~lh~0#1, SelectionSort_~rh~0#1, SelectionSort_~i~0#1, SelectionSort_~temp~0#1;havoc SelectionSort_~lh~0#1;havoc SelectionSort_~rh~0#1;havoc SelectionSort_~i~0#1;havoc SelectionSort_~temp~0#1;SelectionSort_~lh~0#1 := 0; 6010#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6020#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6015#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6016#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6019#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6107#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6106#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6105#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6104#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6103#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6102#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6101#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6100#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6099#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6022#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6003#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6004#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6098#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6097#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 6095#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6093#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6091#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6089#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6087#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6085#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6083#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6081#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6079#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6077#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6075#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6062#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6063#L33 assume SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1;havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1;SelectionSort_~rh~0#1 := SelectionSort_~i~0#1; 6073#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6072#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6071#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6070#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6069#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6068#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6067#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6066#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6064#L32-3 assume !!(SelectionSort_~i~0#1 < ~n~0);call SelectionSort_#t~mem3#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~i~0#1, 4);call SelectionSort_#t~mem4#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6046#L33 assume !(SelectionSort_#t~mem3#1 < SelectionSort_#t~mem4#1);havoc SelectionSort_#t~mem3#1;havoc SelectionSort_#t~mem4#1; 6044#L32-2 SelectionSort_#t~post2#1 := SelectionSort_~i~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_#t~post2#1;havoc SelectionSort_#t~post2#1; 6045#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6039#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6038#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6037#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6026#L32-3 [2022-12-13 22:10:30,434 INFO L750 eck$LassoCheckResult]: Loop: 6026#L32-3 assume !(SelectionSort_~i~0#1 < ~n~0); 6029#L32-4 call SelectionSort_#t~mem5#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);SelectionSort_~temp~0#1 := SelectionSort_#t~mem5#1;havoc SelectionSort_#t~mem5#1;call SelectionSort_#t~mem6#1 := read~int(~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4);call write~int(SelectionSort_#t~mem6#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~lh~0#1, 4);havoc SelectionSort_#t~mem6#1;call write~int(SelectionSort_~temp~0#1, ~#array~0.base, ~#array~0.offset + 4 * SelectionSort_~rh~0#1, 4); 6027#L30-2 SelectionSort_#t~post1#1 := SelectionSort_~lh~0#1;SelectionSort_~lh~0#1 := 1 + SelectionSort_#t~post1#1;havoc SelectionSort_#t~post1#1; 6025#L30-3 assume !!(SelectionSort_~lh~0#1 < ~n~0);SelectionSort_~rh~0#1 := SelectionSort_~lh~0#1;SelectionSort_~i~0#1 := 1 + SelectionSort_~lh~0#1; 6026#L32-3 [2022-12-13 22:10:30,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:10:30,434 INFO L85 PathProgramCache]: Analyzing trace with hash 308108643, now seen corresponding path program 9 times [2022-12-13 22:10:30,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:10:30,434 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808595965] [2022-12-13 22:10:30,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:10:30,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:10:30,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:10:31,796 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 91 proven. 85 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2022-12-13 22:10:31,796 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:10:31,796 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808595965] [2022-12-13 22:10:31,796 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1808595965] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:10:31,796 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [250076233] [2022-12-13 22:10:31,796 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-13 22:10:31,796 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:10:31,796 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:10:31,797 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:10:31,798 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_55983a80-757a-4cbb-acdd-f2ee091bf442/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-12-13 22:10:32,013 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2022-12-13 22:10:32,013 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:10:32,016 INFO L263 TraceCheckSpWp]: Trace formula consists of 350 conjuncts, 80 conjunts are in the unsatisfiable core [2022-12-13 22:10:32,019 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:10:32,068 INFO L321 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-12-13 22:10:32,068 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-12-13 22:10:32,108 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:10:32,136 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:10:32,154 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:10:32,186 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:10:32,209 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-12-13 22:10:32,584 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:10:32,585 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:10:32,586 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-12-13 22:10:33,178 INFO L173 IndexEqualityManager]: detected equality via solver [2022-12-13 22:10:33,180 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:10:33,240 INFO L321 Elim1Store]: treesize reduction 59, result has 61.2 percent of original size [2022-12-13 22:10:33,241 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 8 case distinctions, treesize of input 69 treesize of output 113 [2022-12-13 22:10:35,509 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 22:10:35,608 INFO L321 Elim1Store]: treesize reduction 178, result has 40.7 percent of original size [2022-12-13 22:10:35,608 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 5 select indices, 5 select index equivalence classes, 1 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 14 case distinctions, treesize of input 132 treesize of output 194 [2022-12-13 22:10:36,544 INFO L321 Elim1Store]: treesize reduction 10, result has 71.4 percent of original size [2022-12-13 22:10:36,544 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 66 treesize of output 72 [2022-12-13 22:10:36,910 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 5 proven. 195 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-12-13 22:10:36,910 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:12:26,938 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 16 proven. 174 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2022-12-13 22:12:26,938 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [250076233] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:12:26,938 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:12:26,938 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 30, 29] total 77 [2022-12-13 22:12:26,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289910626] [2022-12-13 22:12:26,938 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:12:26,939 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:12:26,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:12:26,939 INFO L85 PathProgramCache]: Analyzing trace with hash 1859993, now seen corresponding path program 8 times [2022-12-13 22:12:26,939 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:12:26,939 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [343983638] [2022-12-13 22:12:26,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:12:26,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:12:26,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:12:26,941 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:12:26,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:12:26,943 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:12:27,049 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:12:27,049 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2022-12-13 22:12:27,050 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=757, Invalid=5236, Unknown=13, NotChecked=0, Total=6006 [2022-12-13 22:12:27,050 INFO L87 Difference]: Start difference. First operand 105 states and 118 transitions. cyclomatic complexity: 16 Second operand has 78 states, 78 states have (on average 1.705128205128205) internal successors, (133), 77 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:12:59,980 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:13:13,824 WARN L233 SmtUtils]: Spent 13.00s on a formula simplification. DAG size of input: 171 DAG size of output: 95 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:13:26,906 WARN L233 SmtUtils]: Spent 12.28s on a formula simplification. DAG size of input: 166 DAG size of output: 89 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:13:41,819 WARN L233 SmtUtils]: Spent 12.51s on a formula simplification. DAG size of input: 164 DAG size of output: 94 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:13:53,826 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:14:05,855 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:14:17,888 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.03s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:14:51,691 WARN L233 SmtUtils]: Spent 33.60s on a formula simplification. DAG size of input: 160 DAG size of output: 98 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:14:53,029 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.17s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:14:58,345 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.66s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:15:10,381 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:15:22,633 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:15:24,518 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.82s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:15:36,545 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:15:43,472 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 6.50s for a HTC check with result VALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:15:55,488 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:17:47,580 WARN L233 SmtUtils]: Spent 1.45m on a formula simplification that was a NOOP. DAG size: 149 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:18:14,434 WARN L233 SmtUtils]: Spent 16.99s on a formula simplification. DAG size of input: 156 DAG size of output: 98 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:18:39,064 WARN L233 SmtUtils]: Spent 12.38s on a formula simplification. DAG size of input: 168 DAG size of output: 90 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:18:51,249 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:19:17,580 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-12-13 22:19:30,343 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [1] [2022-12-13 22:19:48,466 WARN L233 SmtUtils]: Spent 16.59s on a formula simplification that was a NOOP. DAG size: 133 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:19:50,797 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.19s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:20:05,419 WARN L233 SmtUtils]: Spent 14.40s on a formula simplification. DAG size of input: 154 DAG size of output: 100 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:20:17,428 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:20:29,453 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:21:30,216 WARN L233 SmtUtils]: Spent 36.41s on a formula simplification. DAG size of input: 166 DAG size of output: 85 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 22:21:42,223 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:21:54,273 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:22:06,341 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:22:11,628 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 5.29s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2022-12-13 22:22:12,731 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse17 (* |c_ULTIMATE.start_SelectionSort_~lh~0#1| 4))) (let ((.cse13 (+ 2 |c_ULTIMATE.start_SelectionSort_~lh~0#1|)) (.cse2 (select |c_#memory_int| |c_~#array~0.base|)) (.cse18 (+ .cse17 |c_~#array~0.offset|)) (.cse39 (+ 3 |c_ULTIMATE.start_SelectionSort_~lh~0#1|))) (let ((.cse0 (< c_~n~0 .cse39)) (.cse3 (< .cse39 c_~n~0)) (.cse4 (+ (* |c_ULTIMATE.start_SelectionSort_~rh~0#1| 4) |c_~#array~0.offset|)) (.cse1 (select .cse2 .cse18)) (.cse12 (< c_~n~0 .cse13)) (.cse14 (< (+ |c_ULTIMATE.start_SelectionSort_~i~0#1| 1) c_~n~0))) (and (or .cse0 (forall ((|ULTIMATE.start_SelectionSort_~i~0#1| Int)) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 1) c_~n~0)) (< .cse1 (+ (select .cse2 (+ (* |ULTIMATE.start_SelectionSort_~i~0#1| 4) |c_~#array~0.offset|)) 1)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0))) .cse3) (or .cse0 (forall ((|ULTIMATE.start_SelectionSort_~i~0#1| Int)) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 1) c_~n~0)) (< (select .cse2 .cse4) (+ (select .cse2 (+ (* |ULTIMATE.start_SelectionSort_~i~0#1| 4) |c_~#array~0.offset|)) 1)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0))) .cse3) (forall ((v_ArrVal_677 (Array Int Int)) (|v_ULTIMATE.start_SelectionSort_~lh~0#1_74| Int) (v_ArrVal_682 Int) (|v_ULTIMATE.start_SelectionSort_~i~0#1_183| Int) (|ULTIMATE.start_SelectionSort_~i~0#1| Int) (v_ArrVal_678 Int)) (let ((.cse11 (* |ULTIMATE.start_SelectionSort_~i~0#1| 4))) (let ((.cse8 (store (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#array~1#1.base| v_ArrVal_677) |c_~#array~0.base|) |c_~#array~0.offset| v_ArrVal_678)) (.cse10 (+ .cse11 |c_~#array~0.offset|)) (.cse5 (+ |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 3) c_~n~0) (< c_~n~0 .cse5) (let ((.cse7 (* |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (let ((.cse6 (let ((.cse9 (+ |c_~#array~0.offset| .cse7))) (store (store .cse8 .cse9 v_ArrVal_682) .cse10 (select .cse8 .cse9))))) (< (select .cse6 (+ |c_~#array~0.offset| .cse7 4)) (+ 1 (select .cse6 (+ (* |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 4) |c_~#array~0.offset|)))))) (not (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 1) c_~n~0)) (< (select .cse8 (+ .cse11 |c_~#array~0.offset| 4)) (select .cse8 .cse10)) (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 2) c_~n~0) (< .cse5 c_~n~0))))) (or .cse12 (< .cse13 c_~n~0)) (let ((.cse15 (+ |c_ULTIMATE.start_SelectionSort_~lh~0#1| 4))) (or (not .cse14) (< (+ 2 |c_ULTIMATE.start_SelectionSort_~i~0#1|) c_~n~0) (< .cse15 c_~n~0) (forall ((v_ArrVal_682 Int) (|v_ULTIMATE.start_SelectionSort_~i~0#1_183| Int)) (or (let ((.cse16 (store (store .cse2 .cse18 v_ArrVal_682) .cse4 .cse1))) (< (select .cse16 (+ .cse17 |c_~#array~0.offset| 4)) (+ (select .cse16 (+ (* |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 4) |c_~#array~0.offset|)) 1))) (not (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 1) c_~n~0)) (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 2) c_~n~0))) (< c_~n~0 .cse15))) (forall ((|v_ULTIMATE.start_SelectionSort_~lh~0#1_74| Int) (v_ArrVal_682 Int) (|v_ULTIMATE.start_SelectionSort_~i~0#1_183| Int) (|ULTIMATE.start_SelectionSort_~i~0#1| Int) (v_ArrVal_678 Int)) (let ((.cse24 (* |ULTIMATE.start_SelectionSort_~i~0#1| 4))) (let ((.cse21 (store .cse2 |c_~#array~0.offset| v_ArrVal_678)) (.cse23 (+ .cse24 |c_~#array~0.offset|)) (.cse25 (+ |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 3) c_~n~0) (let ((.cse20 (* |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (let ((.cse19 (let ((.cse22 (+ |c_~#array~0.offset| .cse20))) (store (store .cse21 .cse22 v_ArrVal_682) .cse23 (select .cse21 .cse22))))) (< (select .cse19 (+ |c_~#array~0.offset| .cse20 4)) (+ (select .cse19 (+ (* |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 4) |c_~#array~0.offset|)) 1)))) (< (select .cse21 (+ .cse24 |c_~#array~0.offset| 4)) (select .cse21 .cse23)) (< c_~n~0 .cse25) (not (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 1) c_~n~0)) (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 2) c_~n~0) (< .cse25 c_~n~0))))) (forall ((|v_ULTIMATE.start_main_~#array~1#1.base_66| Int)) (or (not (= (select |c_#valid| |v_ULTIMATE.start_main_~#array~1#1.base_66|) 0)) (forall ((v_ArrVal_677 (Array Int Int)) (|v_ULTIMATE.start_SelectionSort_~lh~0#1_74| Int) (v_ArrVal_682 Int) (|v_ULTIMATE.start_SelectionSort_~i~0#1_183| Int) (|ULTIMATE.start_SelectionSort_~i~0#1| Int) (v_ArrVal_678 Int)) (let ((.cse32 (* |ULTIMATE.start_SelectionSort_~i~0#1| 4))) (let ((.cse28 (store (select (store |c_#memory_int| |v_ULTIMATE.start_main_~#array~1#1.base_66| v_ArrVal_677) |c_~#array~0.base|) |c_~#array~0.offset| v_ArrVal_678)) (.cse30 (+ .cse32 |c_~#array~0.offset|)) (.cse31 (+ |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0)) (let ((.cse27 (* |v_ULTIMATE.start_SelectionSort_~lh~0#1_74| 4))) (let ((.cse26 (let ((.cse29 (+ |c_~#array~0.offset| .cse27))) (store (store .cse28 .cse29 v_ArrVal_682) .cse30 (select .cse28 .cse29))))) (< (select .cse26 (+ |c_~#array~0.offset| .cse27 4)) (+ (select .cse26 (+ (* |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 4) |c_~#array~0.offset|)) 1)))) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 3) c_~n~0) (< c_~n~0 .cse31) (not (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 1) c_~n~0)) (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 2) c_~n~0) (< (select .cse28 (+ .cse32 |c_~#array~0.offset| 4)) (select .cse28 .cse30)) (< .cse31 c_~n~0))))))) (forall ((|ULTIMATE.start_SelectionSort_~lh~0#1| Int)) (let ((.cse38 (+ |ULTIMATE.start_SelectionSort_~lh~0#1| 4))) (or (forall ((v_ArrVal_682 Int) (|v_ULTIMATE.start_SelectionSort_~i~0#1_183| Int) (|ULTIMATE.start_SelectionSort_~i~0#1| Int)) (let ((.cse37 (* |ULTIMATE.start_SelectionSort_~i~0#1| 4))) (let ((.cse36 (+ .cse37 |c_~#array~0.offset|))) (or (not (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 2) c_~n~0)) (< (+ |ULTIMATE.start_SelectionSort_~i~0#1| 3) c_~n~0) (not (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 1) c_~n~0)) (let ((.cse34 (* |ULTIMATE.start_SelectionSort_~lh~0#1| 4))) (let ((.cse33 (let ((.cse35 (+ |c_~#array~0.offset| .cse34))) (store (store .cse2 .cse35 v_ArrVal_682) .cse36 (select .cse2 .cse35))))) (< (select .cse33 (+ |c_~#array~0.offset| .cse34 4)) (+ (select .cse33 (+ (* |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 4) |c_~#array~0.offset|)) 1)))) (< (+ |v_ULTIMATE.start_SelectionSort_~i~0#1_183| 2) c_~n~0) (< (select .cse2 (+ .cse37 |c_~#array~0.offset| 4)) (select .cse2 .cse36)))))) (< c_~n~0 .cse38) (< .cse38 c_~n~0)))) (or .cse12 .cse14))))) is different from false