./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d52f31574095462f7bebf0d97516364dd650b64428a7b12e3aa21d1b47f96325 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 22:14:54,778 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 22:14:54,779 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 22:14:54,801 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 22:14:54,801 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 22:14:54,803 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 22:14:54,804 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 22:14:54,806 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 22:14:54,807 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 22:14:54,807 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 22:14:54,808 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 22:14:54,809 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 22:14:54,809 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 22:14:54,810 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 22:14:54,810 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 22:14:54,811 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 22:14:54,812 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 22:14:54,812 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 22:14:54,813 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 22:14:54,814 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 22:14:54,815 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 22:14:54,817 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 22:14:54,819 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 22:14:54,820 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 22:14:54,826 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 22:14:54,827 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 22:14:54,828 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 22:14:54,829 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 22:14:54,829 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 22:14:54,830 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 22:14:54,830 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 22:14:54,830 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 22:14:54,831 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 22:14:54,831 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 22:14:54,832 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 22:14:54,832 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 22:14:54,833 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 22:14:54,833 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 22:14:54,833 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 22:14:54,833 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 22:14:54,834 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 22:14:54,835 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-12-13 22:14:54,858 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 22:14:54,858 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 22:14:54,858 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 22:14:54,858 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 22:14:54,859 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 22:14:54,859 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 22:14:54,859 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 22:14:54,859 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 22:14:54,859 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 22:14:54,860 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 22:14:54,860 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 22:14:54,860 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 22:14:54,860 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 22:14:54,860 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 22:14:54,860 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 22:14:54,860 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 22:14:54,860 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 22:14:54,861 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 22:14:54,861 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 22:14:54,861 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 22:14:54,861 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 22:14:54,861 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 22:14:54,861 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 22:14:54,861 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 22:14:54,862 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 22:14:54,862 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 22:14:54,862 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 22:14:54,862 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 22:14:54,862 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 22:14:54,862 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 22:14:54,863 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 22:14:54,863 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 22:14:54,863 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d52f31574095462f7bebf0d97516364dd650b64428a7b12e3aa21d1b47f96325 [2022-12-13 22:14:55,078 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 22:14:55,094 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 22:14:55,096 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 22:14:55,098 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 22:14:55,098 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 22:14:55,099 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.1.ufo.UNBOUNDED.pals.c [2022-12-13 22:14:57,784 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 22:14:57,942 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 22:14:57,943 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.1.ufo.UNBOUNDED.pals.c [2022-12-13 22:14:57,949 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/data/a9b32714f/f9264a863d9d4124a9d574010f40c1a6/FLAG2d5c41bfa [2022-12-13 22:14:57,960 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/data/a9b32714f/f9264a863d9d4124a9d574010f40c1a6 [2022-12-13 22:14:57,962 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 22:14:57,963 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 22:14:57,964 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 22:14:57,964 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 22:14:57,967 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 22:14:57,968 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 10:14:57" (1/1) ... [2022-12-13 22:14:57,969 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@13d93d35 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:57, skipping insertion in model container [2022-12-13 22:14:57,969 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 10:14:57" (1/1) ... [2022-12-13 22:14:57,975 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 22:14:57,997 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 22:14:58,169 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.1.ufo.UNBOUNDED.pals.c[20084,20097] [2022-12-13 22:14:58,169 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 22:14:58,179 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 22:14:58,215 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.1.ufo.UNBOUNDED.pals.c[20084,20097] [2022-12-13 22:14:58,216 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 22:14:58,232 INFO L208 MainTranslator]: Completed translation [2022-12-13 22:14:58,233 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58 WrapperNode [2022-12-13 22:14:58,233 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 22:14:58,234 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 22:14:58,234 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 22:14:58,234 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 22:14:58,241 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,252 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,282 INFO L138 Inliner]: procedures = 27, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 401 [2022-12-13 22:14:58,283 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 22:14:58,283 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 22:14:58,283 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 22:14:58,283 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 22:14:58,292 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,292 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,296 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,296 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,306 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,313 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,316 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,319 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,324 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 22:14:58,325 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 22:14:58,326 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 22:14:58,326 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 22:14:58,326 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (1/1) ... [2022-12-13 22:14:58,332 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:14:58,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:14:58,357 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:14:58,359 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_97d37f62-887d-40a3-8acc-86b772d3a6bc/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 22:14:58,386 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 22:14:58,387 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 22:14:58,387 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 22:14:58,387 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 22:14:58,461 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 22:14:58,462 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 22:14:58,820 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 22:14:58,827 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 22:14:58,827 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-12-13 22:14:58,829 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 10:14:58 BoogieIcfgContainer [2022-12-13 22:14:58,830 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 22:14:58,831 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 22:14:58,831 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 22:14:58,834 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 22:14:58,835 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:14:58,835 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 10:14:57" (1/3) ... [2022-12-13 22:14:58,836 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4295aa38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 10:14:58, skipping insertion in model container [2022-12-13 22:14:58,836 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:14:58,836 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:14:58" (2/3) ... [2022-12-13 22:14:58,836 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4295aa38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 10:14:58, skipping insertion in model container [2022-12-13 22:14:58,836 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:14:58,836 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 10:14:58" (3/3) ... [2022-12-13 22:14:58,838 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.7.1.ufo.UNBOUNDED.pals.c [2022-12-13 22:14:58,879 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 22:14:58,879 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 22:14:58,879 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 22:14:58,879 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 22:14:58,879 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 22:14:58,879 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 22:14:58,879 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 22:14:58,879 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 22:14:58,882 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:14:58,899 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2022-12-13 22:14:58,899 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:14:58,899 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:14:58,904 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:58,905 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:58,905 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 22:14:58,905 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:14:58,909 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2022-12-13 22:14:58,909 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:14:58,909 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:14:58,910 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:58,910 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:58,916 INFO L748 eck$LassoCheckResult]: Stem: 31#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 40#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 66#L265true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 103#L265-1true init_#res#1 := init_~tmp~0#1; 83#init_returnLabel#1true main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 41#L22true assume !(0 == assume_abort_if_not_~cond#1); 89#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 17#L550-2true [2022-12-13 22:14:58,917 INFO L750 eck$LassoCheckResult]: Loop: 17#L550-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 38#L85true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 7#L85-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 28#L116true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 100#L116-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 43#L141true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 102#L141-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 84#L166true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 79#L166-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 74#L191true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 68#L191-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 93#L216true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 23#L216-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 29#L241true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 52#L241-2true assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 49#L474true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 15#L474-1true check_#res#1 := check_~tmp~1#1; 18#check_returnLabel#1true main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 71#L585true assume !(0 == assert_~arg#1 % 256); 3#L580true assume { :end_inline_assert } true; 17#L550-2true [2022-12-13 22:14:58,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:14:58,921 INFO L85 PathProgramCache]: Analyzing trace with hash 2087378158, now seen corresponding path program 1 times [2022-12-13 22:14:58,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:14:58,929 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767110834] [2022-12-13 22:14:58,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:14:58,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:14:59,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:14:59,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:14:59,142 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:14:59,142 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767110834] [2022-12-13 22:14:59,143 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1767110834] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:14:59,143 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:14:59,143 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 22:14:59,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [838586619] [2022-12-13 22:14:59,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:14:59,148 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:14:59,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:14:59,149 INFO L85 PathProgramCache]: Analyzing trace with hash 873411785, now seen corresponding path program 1 times [2022-12-13 22:14:59,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:14:59,150 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979271823] [2022-12-13 22:14:59,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:14:59,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:14:59,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:14:59,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:14:59,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:14:59,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979271823] [2022-12-13 22:14:59,443 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1979271823] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:14:59,444 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:14:59,444 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 22:14:59,444 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317242438] [2022-12-13 22:14:59,444 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:14:59,445 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 22:14:59,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:14:59,477 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 22:14:59,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 22:14:59,480 INFO L87 Difference]: Start difference. First operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:14:59,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:14:59,579 INFO L93 Difference]: Finished difference Result 114 states and 197 transitions. [2022-12-13 22:14:59,580 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 197 transitions. [2022-12-13 22:14:59,582 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 22:14:59,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 110 states and 144 transitions. [2022-12-13 22:14:59,588 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2022-12-13 22:14:59,588 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2022-12-13 22:14:59,589 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 144 transitions. [2022-12-13 22:14:59,589 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:14:59,590 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-12-13 22:14:59,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 144 transitions. [2022-12-13 22:14:59,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-12-13 22:14:59,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.309090909090909) internal successors, (144), 109 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:14:59,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 144 transitions. [2022-12-13 22:14:59,611 INFO L240 hiAutomatonCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-12-13 22:14:59,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 22:14:59,615 INFO L428 stractBuchiCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-12-13 22:14:59,616 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 22:14:59,616 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 144 transitions. [2022-12-13 22:14:59,617 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 22:14:59,617 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:14:59,618 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:14:59,619 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:59,619 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:59,620 INFO L748 eck$LassoCheckResult]: Stem: 293#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 294#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 305#L265 assume 0 == ~r1~0 % 256; 271#L266 assume ~id1~0 >= 0; 272#L267 assume 0 == ~st1~0; 278#L268 assume ~send1~0 == ~id1~0; 279#L269 assume 0 == ~mode1~0 % 256; 267#L270 assume ~id2~0 >= 0; 268#L271 assume 0 == ~st2~0; 297#L272 assume ~send2~0 == ~id2~0; 308#L273 assume 0 == ~mode2~0 % 256; 322#L274 assume ~id3~0 >= 0; 345#L275 assume 0 == ~st3~0; 251#L276 assume ~send3~0 == ~id3~0; 252#L277 assume 0 == ~mode3~0 % 256; 356#L278 assume ~id4~0 >= 0; 315#L279 assume 0 == ~st4~0; 316#L280 assume ~send4~0 == ~id4~0; 275#L281 assume 0 == ~mode4~0 % 256; 253#L282 assume ~id5~0 >= 0; 254#L283 assume 0 == ~st5~0; 323#L284 assume ~send5~0 == ~id5~0; 324#L285 assume 0 == ~mode5~0 % 256; 344#L286 assume ~id6~0 >= 0; 330#L287 assume 0 == ~st6~0; 286#L288 assume ~send6~0 == ~id6~0; 287#L289 assume 0 == ~mode6~0 % 256; 299#L290 assume ~id7~0 >= 0; 338#L291 assume 0 == ~st7~0; 339#L292 assume ~send7~0 == ~id7~0; 346#L293 assume 0 == ~mode7~0 % 256; 355#L294 assume ~id1~0 != ~id2~0; 257#L295 assume ~id1~0 != ~id3~0; 258#L296 assume ~id1~0 != ~id4~0; 298#L297 assume ~id1~0 != ~id5~0; 295#L298 assume ~id1~0 != ~id6~0; 296#L299 assume ~id1~0 != ~id7~0; 304#L300 assume ~id2~0 != ~id3~0; 331#L301 assume ~id2~0 != ~id4~0; 342#L302 assume ~id2~0 != ~id5~0; 343#L303 assume ~id2~0 != ~id6~0; 351#L304 assume ~id2~0 != ~id7~0; 325#L305 assume ~id3~0 != ~id4~0; 326#L306 assume ~id3~0 != ~id5~0; 337#L307 assume ~id3~0 != ~id6~0; 269#L308 assume ~id3~0 != ~id7~0; 270#L309 assume ~id4~0 != ~id5~0; 336#L310 assume ~id4~0 != ~id6~0; 311#L311 assume ~id4~0 != ~id7~0; 312#L312 assume ~id5~0 != ~id6~0; 282#L313 assume ~id5~0 != ~id7~0; 283#L314 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 353#L265-1 init_#res#1 := init_~tmp~0#1; 347#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 306#L22 assume !(0 == assume_abort_if_not_~cond#1); 307#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 248#L550-2 [2022-12-13 22:14:59,620 INFO L750 eck$LassoCheckResult]: Loop: 248#L550-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 276#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 255#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 256#L116 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 289#L116-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 309#L141 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 303#L141-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 348#L166 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 314#L166-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 340#L191 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 260#L191-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 333#L216 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 284#L216-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 285#L241 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 288#L241-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 317#L474 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 273#L474-1 check_#res#1 := check_~tmp~1#1; 274#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 277#L585 assume !(0 == assert_~arg#1 % 256); 247#L580 assume { :end_inline_assert } true; 248#L550-2 [2022-12-13 22:14:59,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:14:59,621 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 1 times [2022-12-13 22:14:59,621 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:14:59,621 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053665671] [2022-12-13 22:14:59,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:14:59,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:14:59,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:14:59,651 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:14:59,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:14:59,699 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:14:59,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:14:59,700 INFO L85 PathProgramCache]: Analyzing trace with hash 873411785, now seen corresponding path program 2 times [2022-12-13 22:14:59,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:14:59,700 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458613803] [2022-12-13 22:14:59,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:14:59,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:14:59,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:14:59,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:14:59,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:14:59,857 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458613803] [2022-12-13 22:14:59,857 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1458613803] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:14:59,857 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:14:59,857 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 22:14:59,858 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962189832] [2022-12-13 22:14:59,858 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:14:59,858 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 22:14:59,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:14:59,859 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 22:14:59,859 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 22:14:59,859 INFO L87 Difference]: Start difference. First operand 110 states and 144 transitions. cyclomatic complexity: 35 Second operand has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:14:59,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:14:59,899 INFO L93 Difference]: Finished difference Result 113 states and 146 transitions. [2022-12-13 22:14:59,899 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 113 states and 146 transitions. [2022-12-13 22:14:59,901 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 22:14:59,902 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 113 states to 110 states and 141 transitions. [2022-12-13 22:14:59,902 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2022-12-13 22:14:59,902 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2022-12-13 22:14:59,902 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 141 transitions. [2022-12-13 22:14:59,903 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:14:59,903 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-12-13 22:14:59,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 141 transitions. [2022-12-13 22:14:59,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-12-13 22:14:59,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.2818181818181817) internal successors, (141), 109 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:14:59,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 141 transitions. [2022-12-13 22:14:59,909 INFO L240 hiAutomatonCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-12-13 22:14:59,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 22:14:59,910 INFO L428 stractBuchiCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-12-13 22:14:59,910 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 22:14:59,910 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 141 transitions. [2022-12-13 22:14:59,911 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 22:14:59,912 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:14:59,912 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:14:59,913 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:59,913 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:14:59,913 INFO L748 eck$LassoCheckResult]: Stem: 528#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 529#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 540#L265 assume 0 == ~r1~0 % 256; 506#L266 assume ~id1~0 >= 0; 507#L267 assume 0 == ~st1~0; 513#L268 assume ~send1~0 == ~id1~0; 514#L269 assume 0 == ~mode1~0 % 256; 502#L270 assume ~id2~0 >= 0; 503#L271 assume 0 == ~st2~0; 532#L272 assume ~send2~0 == ~id2~0; 543#L273 assume 0 == ~mode2~0 % 256; 557#L274 assume ~id3~0 >= 0; 580#L275 assume 0 == ~st3~0; 486#L276 assume ~send3~0 == ~id3~0; 487#L277 assume 0 == ~mode3~0 % 256; 591#L278 assume ~id4~0 >= 0; 550#L279 assume 0 == ~st4~0; 551#L280 assume ~send4~0 == ~id4~0; 510#L281 assume 0 == ~mode4~0 % 256; 488#L282 assume ~id5~0 >= 0; 489#L283 assume 0 == ~st5~0; 558#L284 assume ~send5~0 == ~id5~0; 559#L285 assume 0 == ~mode5~0 % 256; 579#L286 assume ~id6~0 >= 0; 565#L287 assume 0 == ~st6~0; 521#L288 assume ~send6~0 == ~id6~0; 522#L289 assume 0 == ~mode6~0 % 256; 534#L290 assume ~id7~0 >= 0; 573#L291 assume 0 == ~st7~0; 574#L292 assume ~send7~0 == ~id7~0; 581#L293 assume 0 == ~mode7~0 % 256; 590#L294 assume ~id1~0 != ~id2~0; 492#L295 assume ~id1~0 != ~id3~0; 493#L296 assume ~id1~0 != ~id4~0; 533#L297 assume ~id1~0 != ~id5~0; 530#L298 assume ~id1~0 != ~id6~0; 531#L299 assume ~id1~0 != ~id7~0; 539#L300 assume ~id2~0 != ~id3~0; 566#L301 assume ~id2~0 != ~id4~0; 577#L302 assume ~id2~0 != ~id5~0; 578#L303 assume ~id2~0 != ~id6~0; 586#L304 assume ~id2~0 != ~id7~0; 560#L305 assume ~id3~0 != ~id4~0; 561#L306 assume ~id3~0 != ~id5~0; 572#L307 assume ~id3~0 != ~id6~0; 504#L308 assume ~id3~0 != ~id7~0; 505#L309 assume ~id4~0 != ~id5~0; 571#L310 assume ~id4~0 != ~id6~0; 546#L311 assume ~id4~0 != ~id7~0; 547#L312 assume ~id5~0 != ~id6~0; 517#L313 assume ~id5~0 != ~id7~0; 518#L314 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 588#L265-1 init_#res#1 := init_~tmp~0#1; 582#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 541#L22 assume !(0 == assume_abort_if_not_~cond#1); 542#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 483#L550-2 [2022-12-13 22:14:59,914 INFO L750 eck$LassoCheckResult]: Loop: 483#L550-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 511#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 490#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 491#L116 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 524#L116-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 544#L141 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 538#L141-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 583#L166 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 549#L166-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 575#L191 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 495#L191-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 568#L216 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 519#L216-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 520#L241 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 523#L241-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 552#L474 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 553#L475 assume ~r1~0 % 256 >= 7; 569#$Ultimate##253 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 508#L474-1 check_#res#1 := check_~tmp~1#1; 509#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 512#L585 assume !(0 == assert_~arg#1 % 256); 482#L580 assume { :end_inline_assert } true; 483#L550-2 [2022-12-13 22:14:59,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:14:59,914 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 2 times [2022-12-13 22:14:59,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:14:59,915 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697625282] [2022-12-13 22:14:59,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:14:59,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:14:59,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:14:59,933 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:14:59,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:14:59,968 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:14:59,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:14:59,969 INFO L85 PathProgramCache]: Analyzing trace with hash 414288441, now seen corresponding path program 1 times [2022-12-13 22:14:59,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:14:59,969 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [512467928] [2022-12-13 22:14:59,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:14:59,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:14:59,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:15:00,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:15:00,001 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:15:00,002 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [512467928] [2022-12-13 22:15:00,002 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [512467928] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:15:00,002 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:15:00,002 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 22:15:00,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396811622] [2022-12-13 22:15:00,002 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:15:00,002 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 22:15:00,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:15:00,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 22:15:00,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 22:15:00,003 INFO L87 Difference]: Start difference. First operand 110 states and 141 transitions. cyclomatic complexity: 32 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:15:00,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:15:00,031 INFO L93 Difference]: Finished difference Result 158 states and 215 transitions. [2022-12-13 22:15:00,031 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 158 states and 215 transitions. [2022-12-13 22:15:00,033 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 102 [2022-12-13 22:15:00,034 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 158 states to 158 states and 215 transitions. [2022-12-13 22:15:00,034 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 158 [2022-12-13 22:15:00,035 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 158 [2022-12-13 22:15:00,035 INFO L73 IsDeterministic]: Start isDeterministic. Operand 158 states and 215 transitions. [2022-12-13 22:15:00,036 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:15:00,036 INFO L218 hiAutomatonCegarLoop]: Abstraction has 158 states and 215 transitions. [2022-12-13 22:15:00,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states and 215 transitions. [2022-12-13 22:15:00,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 156. [2022-12-13 22:15:00,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 156 states have (on average 1.358974358974359) internal successors, (212), 155 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:15:00,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 212 transitions. [2022-12-13 22:15:00,043 INFO L240 hiAutomatonCegarLoop]: Abstraction has 156 states and 212 transitions. [2022-12-13 22:15:00,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 22:15:00,044 INFO L428 stractBuchiCegarLoop]: Abstraction has 156 states and 212 transitions. [2022-12-13 22:15:00,045 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 22:15:00,045 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 156 states and 212 transitions. [2022-12-13 22:15:00,046 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 100 [2022-12-13 22:15:00,046 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:15:00,046 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:15:00,047 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:15:00,047 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 22:15:00,048 INFO L748 eck$LassoCheckResult]: Stem: 802#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 803#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 814#L265 assume 0 == ~r1~0 % 256; 780#L266 assume ~id1~0 >= 0; 781#L267 assume 0 == ~st1~0; 787#L268 assume ~send1~0 == ~id1~0; 788#L269 assume 0 == ~mode1~0 % 256; 776#L270 assume ~id2~0 >= 0; 777#L271 assume 0 == ~st2~0; 806#L272 assume ~send2~0 == ~id2~0; 817#L273 assume 0 == ~mode2~0 % 256; 831#L274 assume ~id3~0 >= 0; 855#L275 assume 0 == ~st3~0; 760#L276 assume ~send3~0 == ~id3~0; 761#L277 assume 0 == ~mode3~0 % 256; 869#L278 assume ~id4~0 >= 0; 824#L279 assume 0 == ~st4~0; 825#L280 assume ~send4~0 == ~id4~0; 784#L281 assume 0 == ~mode4~0 % 256; 762#L282 assume ~id5~0 >= 0; 763#L283 assume 0 == ~st5~0; 832#L284 assume ~send5~0 == ~id5~0; 833#L285 assume 0 == ~mode5~0 % 256; 853#L286 assume ~id6~0 >= 0; 839#L287 assume 0 == ~st6~0; 795#L288 assume ~send6~0 == ~id6~0; 796#L289 assume 0 == ~mode6~0 % 256; 808#L290 assume ~id7~0 >= 0; 846#L291 assume 0 == ~st7~0; 847#L292 assume ~send7~0 == ~id7~0; 856#L293 assume 0 == ~mode7~0 % 256; 868#L294 assume ~id1~0 != ~id2~0; 766#L295 assume ~id1~0 != ~id3~0; 767#L296 assume ~id1~0 != ~id4~0; 807#L297 assume ~id1~0 != ~id5~0; 804#L298 assume ~id1~0 != ~id6~0; 805#L299 assume ~id1~0 != ~id7~0; 813#L300 assume ~id2~0 != ~id3~0; 840#L301 assume ~id2~0 != ~id4~0; 851#L302 assume ~id2~0 != ~id5~0; 852#L303 assume ~id2~0 != ~id6~0; 862#L304 assume ~id2~0 != ~id7~0; 834#L305 assume ~id3~0 != ~id4~0; 835#L306 assume ~id3~0 != ~id5~0; 845#L307 assume ~id3~0 != ~id6~0; 778#L308 assume ~id3~0 != ~id7~0; 779#L309 assume ~id4~0 != ~id5~0; 844#L310 assume ~id4~0 != ~id6~0; 820#L311 assume ~id4~0 != ~id7~0; 821#L312 assume ~id5~0 != ~id6~0; 791#L313 assume ~id5~0 != ~id7~0; 792#L314 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 866#L265-1 init_#res#1 := init_~tmp~0#1; 857#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 815#L22 assume !(0 == assume_abort_if_not_~cond#1); 816#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 861#L550-2 [2022-12-13 22:15:00,048 INFO L750 eck$LassoCheckResult]: Loop: 861#L550-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 907#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 863#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 903#L116 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 901#L116-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 897#L141 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 891#L141-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 889#L166 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 887#L166-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 848#L191 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 769#L191-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 842#L216 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 881#L216-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 877#L241 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 875#L241-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 874#L474 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 873#L475 assume !(~r1~0 % 256 >= 7); 871#L478 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0; 872#$Ultimate##253 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 911#L474-1 check_#res#1 := check_~tmp~1#1; 910#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 909#L585 assume !(0 == assert_~arg#1 % 256); 908#L580 assume { :end_inline_assert } true; 861#L550-2 [2022-12-13 22:15:00,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:15:00,048 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 3 times [2022-12-13 22:15:00,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:15:00,049 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816811014] [2022-12-13 22:15:00,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:15:00,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:15:00,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:15:00,065 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:15:00,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:15:00,087 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:15:00,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:15:00,088 INFO L85 PathProgramCache]: Analyzing trace with hash 1604611906, now seen corresponding path program 1 times [2022-12-13 22:15:00,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:15:00,088 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [954796448] [2022-12-13 22:15:00,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:15:00,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:15:00,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:15:00,119 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:15:00,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:15:00,168 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:15:00,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:15:00,169 INFO L85 PathProgramCache]: Analyzing trace with hash 1081887249, now seen corresponding path program 1 times [2022-12-13 22:15:00,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:15:00,169 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173735870] [2022-12-13 22:15:00,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:15:00,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:15:00,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:15:00,208 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:15:00,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:15:00,265 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:15:05,530 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 22:15:05,530 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 22:15:05,531 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 22:15:05,531 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 22:15:05,531 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-12-13 22:15:05,531 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:15:05,531 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 22:15:05,531 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 22:15:05,531 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.7.1.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-12-13 22:15:05,531 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 22:15:05,531 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 22:15:05,563 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:05,572 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:05,575 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:05,577 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:05,580 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:05,583 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:08,236 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:08,241 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:08,243 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:08,247 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:08,250 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:08,254 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:08,255 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:15:11,340 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 41