./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 760447de6aa5739f187553f004f72c898b25c540c6dba08996c9520ae7051de1 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 13:42:34,232 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 13:42:34,233 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 13:42:34,252 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 13:42:34,252 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 13:42:34,253 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 13:42:34,254 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 13:42:34,256 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 13:42:34,257 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 13:42:34,258 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 13:42:34,259 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 13:42:34,260 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 13:42:34,260 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 13:42:34,261 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 13:42:34,262 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 13:42:34,263 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 13:42:34,264 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 13:42:34,265 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 13:42:34,266 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 13:42:34,268 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 13:42:34,269 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 13:42:34,270 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 13:42:34,271 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 13:42:34,272 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 13:42:34,275 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 13:42:34,276 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 13:42:34,276 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 13:42:34,277 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 13:42:34,277 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 13:42:34,278 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 13:42:34,278 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 13:42:34,279 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 13:42:34,280 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 13:42:34,280 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 13:42:34,281 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 13:42:34,281 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 13:42:34,282 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 13:42:34,282 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 13:42:34,282 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 13:42:34,283 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 13:42:34,283 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 13:42:34,284 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-12-13 13:42:34,305 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 13:42:34,305 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 13:42:34,305 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 13:42:34,306 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 13:42:34,307 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 13:42:34,307 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 13:42:34,307 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 13:42:34,307 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 13:42:34,307 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 13:42:34,308 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 13:42:34,308 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 13:42:34,308 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 13:42:34,308 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 13:42:34,308 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 13:42:34,308 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 13:42:34,309 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 13:42:34,309 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 13:42:34,309 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 13:42:34,309 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 13:42:34,309 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 13:42:34,310 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 13:42:34,310 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 13:42:34,310 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 13:42:34,310 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 13:42:34,310 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 13:42:34,311 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 13:42:34,311 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 13:42:34,311 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 13:42:34,311 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 13:42:34,311 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 13:42:34,312 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 13:42:34,313 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 13:42:34,313 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 760447de6aa5739f187553f004f72c898b25c540c6dba08996c9520ae7051de1 [2022-12-13 13:42:34,513 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 13:42:34,529 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 13:42:34,532 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 13:42:34,532 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 13:42:34,533 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 13:42:34,534 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-12-13 13:42:37,086 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 13:42:37,297 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 13:42:37,298 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-12-13 13:42:37,304 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/data/b113a706f/462ebaa62cf1481a95ff2e54bcdcba23/FLAG2bc9f69db [2022-12-13 13:42:37,681 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/data/b113a706f/462ebaa62cf1481a95ff2e54bcdcba23 [2022-12-13 13:42:37,683 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 13:42:37,684 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 13:42:37,685 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 13:42:37,685 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 13:42:37,688 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 13:42:37,688 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,689 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@371905bb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37, skipping insertion in model container [2022-12-13 13:42:37,689 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,694 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 13:42:37,714 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 13:42:37,856 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c[20047,20060] [2022-12-13 13:42:37,856 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 13:42:37,865 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 13:42:37,904 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/sv-benchmarks/c/seq-mthreaded/pals_lcr.7.ufo.UNBOUNDED.pals.c[20047,20060] [2022-12-13 13:42:37,904 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 13:42:37,915 INFO L208 MainTranslator]: Completed translation [2022-12-13 13:42:37,916 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37 WrapperNode [2022-12-13 13:42:37,916 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 13:42:37,916 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 13:42:37,916 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 13:42:37,917 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 13:42:37,922 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,929 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,948 INFO L138 Inliner]: procedures = 27, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 400 [2022-12-13 13:42:37,949 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 13:42:37,949 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 13:42:37,949 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 13:42:37,949 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 13:42:37,956 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,956 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,958 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,958 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,963 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,967 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,968 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,970 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,972 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 13:42:37,972 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 13:42:37,972 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 13:42:37,972 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 13:42:37,973 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (1/1) ... [2022-12-13 13:42:37,977 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 13:42:37,986 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 13:42:37,995 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 13:42:37,997 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b84c8976-dab1-4941-8076-e58e33e9c915/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 13:42:38,025 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 13:42:38,025 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 13:42:38,025 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 13:42:38,025 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 13:42:38,101 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 13:42:38,103 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 13:42:38,435 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 13:42:38,443 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 13:42:38,443 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-12-13 13:42:38,446 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 01:42:38 BoogieIcfgContainer [2022-12-13 13:42:38,446 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 13:42:38,447 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 13:42:38,447 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 13:42:38,451 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 13:42:38,451 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:42:38,452 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 01:42:37" (1/3) ... [2022-12-13 13:42:38,452 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@198fc4e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 01:42:38, skipping insertion in model container [2022-12-13 13:42:38,453 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:42:38,453 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:42:37" (2/3) ... [2022-12-13 13:42:38,453 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@198fc4e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 01:42:38, skipping insertion in model container [2022-12-13 13:42:38,453 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:42:38,453 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 01:42:38" (3/3) ... [2022-12-13 13:42:38,455 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.7.ufo.UNBOUNDED.pals.c [2022-12-13 13:42:38,505 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 13:42:38,505 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 13:42:38,505 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 13:42:38,505 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 13:42:38,505 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 13:42:38,505 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 13:42:38,506 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 13:42:38,506 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 13:42:38,510 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:38,534 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2022-12-13 13:42:38,534 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:42:38,535 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:42:38,541 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:38,542 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:38,542 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 13:42:38,543 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:38,548 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2022-12-13 13:42:38,549 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:42:38,549 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:42:38,550 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:38,550 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:38,558 INFO L748 eck$LassoCheckResult]: Stem: 27#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 36#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 107#L263true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 113#L263-1true init_#res#1 := init_~tmp~0#1; 82#init_returnLabel#1true main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 39#L22true assume !(0 == assume_abort_if_not_~cond#1); 90#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 11#L548-2true [2022-12-13 13:42:38,559 INFO L750 eck$LassoCheckResult]: Loop: 11#L548-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 34#L85true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 6#L85-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 49#L114true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 37#L114-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 26#L139true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 16#L139-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 75#L164true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 52#L164-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 77#L189true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 46#L189-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 106#L214true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 13#L214-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 24#L239true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 44#L239-2true assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 31#L472true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 91#L472-1true check_#res#1 := check_~tmp~1#1; 17#check_returnLabel#1true main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 87#L583true assume !(0 == assert_~arg#1 % 256); 43#L578true assume { :end_inline_assert } true; 11#L548-2true [2022-12-13 13:42:38,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:38,565 INFO L85 PathProgramCache]: Analyzing trace with hash 2087378158, now seen corresponding path program 1 times [2022-12-13 13:42:38,573 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:38,574 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [427464603] [2022-12-13 13:42:38,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:38,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:38,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:42:38,780 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:42:38,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:42:38,781 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [427464603] [2022-12-13 13:42:38,781 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [427464603] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:42:38,782 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:42:38,782 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:42:38,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1594685227] [2022-12-13 13:42:38,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:42:38,787 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 13:42:38,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:38,788 INFO L85 PathProgramCache]: Analyzing trace with hash 873411785, now seen corresponding path program 1 times [2022-12-13 13:42:38,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:38,788 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159098034] [2022-12-13 13:42:38,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:38,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:38,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:42:39,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:42:39,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:42:39,049 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159098034] [2022-12-13 13:42:39,049 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159098034] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:42:39,050 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:42:39,050 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:42:39,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [43822059] [2022-12-13 13:42:39,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:42:39,051 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:42:39,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:42:39,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 13:42:39,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 13:42:39,085 INFO L87 Difference]: Start difference. First operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:39,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:42:39,192 INFO L93 Difference]: Finished difference Result 114 states and 197 transitions. [2022-12-13 13:42:39,193 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 197 transitions. [2022-12-13 13:42:39,196 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 13:42:39,200 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 110 states and 144 transitions. [2022-12-13 13:42:39,201 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2022-12-13 13:42:39,202 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2022-12-13 13:42:39,202 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 144 transitions. [2022-12-13 13:42:39,203 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:42:39,203 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-12-13 13:42:39,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 144 transitions. [2022-12-13 13:42:39,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-12-13 13:42:39,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.309090909090909) internal successors, (144), 109 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:39,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 144 transitions. [2022-12-13 13:42:39,231 INFO L240 hiAutomatonCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-12-13 13:42:39,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 13:42:39,234 INFO L428 stractBuchiCegarLoop]: Abstraction has 110 states and 144 transitions. [2022-12-13 13:42:39,234 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 13:42:39,234 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 144 transitions. [2022-12-13 13:42:39,235 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 13:42:39,235 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:42:39,235 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:42:39,236 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:39,236 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:39,237 INFO L748 eck$LassoCheckResult]: Stem: 293#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 294#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 306#L263 assume 0 == ~r1~0 % 256; 328#L264 assume ~id1~0 >= 0; 329#L265 assume 0 == ~st1~0; 271#L266 assume ~send1~0 == ~id1~0; 272#L267 assume 0 == ~mode1~0 % 256; 279#L268 assume ~id2~0 >= 0; 280#L269 assume 0 == ~st2~0; 263#L270 assume ~send2~0 == ~id2~0; 264#L271 assume 0 == ~mode2~0 % 256; 297#L272 assume ~id3~0 >= 0; 313#L273 assume 0 == ~st3~0; 327#L274 assume ~send3~0 == ~id3~0; 348#L275 assume 0 == ~mode3~0 % 256; 249#L276 assume ~id4~0 >= 0; 250#L277 assume 0 == ~st4~0; 355#L278 assume ~send4~0 == ~id4~0; 320#L279 assume 0 == ~mode4~0 % 256; 321#L280 assume ~id5~0 >= 0; 273#L281 assume 0 == ~st5~0; 251#L282 assume ~send5~0 == ~id5~0; 252#L283 assume 0 == ~mode5~0 % 256; 330#L284 assume ~id6~0 >= 0; 331#L285 assume 0 == ~st6~0; 345#L286 assume ~send6~0 == ~id6~0; 335#L287 assume 0 == ~mode6~0 % 256; 287#L288 assume ~id7~0 >= 0; 288#L289 assume 0 == ~st7~0; 299#L290 assume ~send7~0 == ~id7~0; 341#L291 assume 0 == ~mode7~0 % 256; 342#L292 assume ~id1~0 != ~id2~0; 349#L293 assume ~id1~0 != ~id3~0; 354#L294 assume ~id1~0 != ~id4~0; 258#L295 assume ~id1~0 != ~id5~0; 259#L296 assume ~id1~0 != ~id6~0; 298#L297 assume ~id1~0 != ~id7~0; 295#L298 assume ~id2~0 != ~id3~0; 296#L299 assume ~id2~0 != ~id4~0; 305#L300 assume ~id2~0 != ~id5~0; 336#L301 assume ~id2~0 != ~id6~0; 343#L302 assume ~id2~0 != ~id7~0; 344#L303 assume ~id3~0 != ~id4~0; 351#L304 assume ~id3~0 != ~id5~0; 332#L305 assume ~id3~0 != ~id6~0; 333#L306 assume ~id3~0 != ~id7~0; 339#L307 assume ~id4~0 != ~id5~0; 267#L308 assume ~id4~0 != ~id6~0; 268#L309 assume ~id4~0 != ~id7~0; 337#L310 assume ~id5~0 != ~id6~0; 318#L311 assume ~id5~0 != ~id7~0; 319#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 356#L263-1 init_#res#1 := init_~tmp~0#1; 350#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 309#L22 assume !(0 == assume_abort_if_not_~cond#1); 310#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 265#L548-2 [2022-12-13 13:42:39,237 INFO L750 eck$LassoCheckResult]: Loop: 265#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 266#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 253#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 254#L114 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 307#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 291#L139 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 274#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 275#L164 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 325#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 326#L189 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 316#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 317#L214 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 269#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 270#L239 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 290#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 300#L472 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 285#L472-1 check_#res#1 := check_~tmp~1#1; 276#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 277#L583 assume !(0 == assert_~arg#1 % 256); 314#L578 assume { :end_inline_assert } true; 265#L548-2 [2022-12-13 13:42:39,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:39,237 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 1 times [2022-12-13 13:42:39,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:39,238 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37764546] [2022-12-13 13:42:39,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:39,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:39,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,252 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:42:39,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,288 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:42:39,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:39,288 INFO L85 PathProgramCache]: Analyzing trace with hash 873411785, now seen corresponding path program 2 times [2022-12-13 13:42:39,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:39,289 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495962471] [2022-12-13 13:42:39,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:39,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:39,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:42:39,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:42:39,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:42:39,428 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495962471] [2022-12-13 13:42:39,428 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495962471] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:42:39,429 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:42:39,429 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:42:39,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1373747103] [2022-12-13 13:42:39,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:42:39,429 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:42:39,429 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:42:39,429 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 13:42:39,430 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 13:42:39,430 INFO L87 Difference]: Start difference. First operand 110 states and 144 transitions. cyclomatic complexity: 35 Second operand has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:39,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:42:39,462 INFO L93 Difference]: Finished difference Result 113 states and 146 transitions. [2022-12-13 13:42:39,462 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 113 states and 146 transitions. [2022-12-13 13:42:39,463 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 13:42:39,464 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 113 states to 110 states and 141 transitions. [2022-12-13 13:42:39,464 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 110 [2022-12-13 13:42:39,464 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 110 [2022-12-13 13:42:39,465 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 141 transitions. [2022-12-13 13:42:39,465 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:42:39,465 INFO L218 hiAutomatonCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-12-13 13:42:39,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 141 transitions. [2022-12-13 13:42:39,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-12-13 13:42:39,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.2818181818181817) internal successors, (141), 109 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:39,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 141 transitions. [2022-12-13 13:42:39,468 INFO L240 hiAutomatonCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-12-13 13:42:39,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 13:42:39,469 INFO L428 stractBuchiCegarLoop]: Abstraction has 110 states and 141 transitions. [2022-12-13 13:42:39,469 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 13:42:39,469 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 141 transitions. [2022-12-13 13:42:39,470 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 54 [2022-12-13 13:42:39,470 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:42:39,470 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:42:39,471 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:39,471 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:39,471 INFO L748 eck$LassoCheckResult]: Stem: 528#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 529#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 541#L263 assume 0 == ~r1~0 % 256; 563#L264 assume ~id1~0 >= 0; 564#L265 assume 0 == ~st1~0; 506#L266 assume ~send1~0 == ~id1~0; 507#L267 assume 0 == ~mode1~0 % 256; 514#L268 assume ~id2~0 >= 0; 515#L269 assume 0 == ~st2~0; 498#L270 assume ~send2~0 == ~id2~0; 499#L271 assume 0 == ~mode2~0 % 256; 532#L272 assume ~id3~0 >= 0; 548#L273 assume 0 == ~st3~0; 562#L274 assume ~send3~0 == ~id3~0; 583#L275 assume 0 == ~mode3~0 % 256; 484#L276 assume ~id4~0 >= 0; 485#L277 assume 0 == ~st4~0; 590#L278 assume ~send4~0 == ~id4~0; 555#L279 assume 0 == ~mode4~0 % 256; 556#L280 assume ~id5~0 >= 0; 508#L281 assume 0 == ~st5~0; 486#L282 assume ~send5~0 == ~id5~0; 487#L283 assume 0 == ~mode5~0 % 256; 565#L284 assume ~id6~0 >= 0; 566#L285 assume 0 == ~st6~0; 580#L286 assume ~send6~0 == ~id6~0; 570#L287 assume 0 == ~mode6~0 % 256; 522#L288 assume ~id7~0 >= 0; 523#L289 assume 0 == ~st7~0; 534#L290 assume ~send7~0 == ~id7~0; 576#L291 assume 0 == ~mode7~0 % 256; 577#L292 assume ~id1~0 != ~id2~0; 584#L293 assume ~id1~0 != ~id3~0; 589#L294 assume ~id1~0 != ~id4~0; 493#L295 assume ~id1~0 != ~id5~0; 494#L296 assume ~id1~0 != ~id6~0; 533#L297 assume ~id1~0 != ~id7~0; 530#L298 assume ~id2~0 != ~id3~0; 531#L299 assume ~id2~0 != ~id4~0; 540#L300 assume ~id2~0 != ~id5~0; 571#L301 assume ~id2~0 != ~id6~0; 578#L302 assume ~id2~0 != ~id7~0; 579#L303 assume ~id3~0 != ~id4~0; 586#L304 assume ~id3~0 != ~id5~0; 567#L305 assume ~id3~0 != ~id6~0; 568#L306 assume ~id3~0 != ~id7~0; 574#L307 assume ~id4~0 != ~id5~0; 502#L308 assume ~id4~0 != ~id6~0; 503#L309 assume ~id4~0 != ~id7~0; 572#L310 assume ~id5~0 != ~id6~0; 553#L311 assume ~id5~0 != ~id7~0; 554#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 591#L263-1 init_#res#1 := init_~tmp~0#1; 585#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 544#L22 assume !(0 == assume_abort_if_not_~cond#1); 545#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 500#L548-2 [2022-12-13 13:42:39,471 INFO L750 eck$LassoCheckResult]: Loop: 500#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 501#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 488#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 489#L114 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 542#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 526#L139 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 509#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 510#L164 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 560#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 561#L189 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 551#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 552#L214 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 504#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 505#L239 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 525#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 535#L472 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 536#L473 assume ~r1~0 % 256 >= 7; 547#$Ultimate##253 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 520#L472-1 check_#res#1 := check_~tmp~1#1; 511#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 512#L583 assume !(0 == assert_~arg#1 % 256); 549#L578 assume { :end_inline_assert } true; 500#L548-2 [2022-12-13 13:42:39,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:39,472 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 2 times [2022-12-13 13:42:39,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:39,472 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225836880] [2022-12-13 13:42:39,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:39,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:39,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,484 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:42:39,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,501 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:42:39,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:39,501 INFO L85 PathProgramCache]: Analyzing trace with hash 414288441, now seen corresponding path program 1 times [2022-12-13 13:42:39,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:39,502 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584430269] [2022-12-13 13:42:39,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:39,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:39,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:42:39,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:42:39,525 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:42:39,525 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1584430269] [2022-12-13 13:42:39,525 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1584430269] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:42:39,525 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:42:39,525 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 13:42:39,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414418846] [2022-12-13 13:42:39,526 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:42:39,526 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:42:39,526 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:42:39,526 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 13:42:39,526 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 13:42:39,526 INFO L87 Difference]: Start difference. First operand 110 states and 141 transitions. cyclomatic complexity: 32 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:39,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:42:39,549 INFO L93 Difference]: Finished difference Result 158 states and 215 transitions. [2022-12-13 13:42:39,550 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 158 states and 215 transitions. [2022-12-13 13:42:39,551 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 102 [2022-12-13 13:42:39,551 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 158 states to 158 states and 215 transitions. [2022-12-13 13:42:39,551 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 158 [2022-12-13 13:42:39,552 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 158 [2022-12-13 13:42:39,552 INFO L73 IsDeterministic]: Start isDeterministic. Operand 158 states and 215 transitions. [2022-12-13 13:42:39,552 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:42:39,552 INFO L218 hiAutomatonCegarLoop]: Abstraction has 158 states and 215 transitions. [2022-12-13 13:42:39,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states and 215 transitions. [2022-12-13 13:42:39,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 156. [2022-12-13 13:42:39,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 156 states, 156 states have (on average 1.358974358974359) internal successors, (212), 155 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:42:39,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 212 transitions. [2022-12-13 13:42:39,557 INFO L240 hiAutomatonCegarLoop]: Abstraction has 156 states and 212 transitions. [2022-12-13 13:42:39,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 13:42:39,558 INFO L428 stractBuchiCegarLoop]: Abstraction has 156 states and 212 transitions. [2022-12-13 13:42:39,558 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 13:42:39,558 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 156 states and 212 transitions. [2022-12-13 13:42:39,559 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 100 [2022-12-13 13:42:39,559 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:42:39,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:42:39,561 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:39,561 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:42:39,561 INFO L748 eck$LassoCheckResult]: Stem: 802#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 803#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 815#L263 assume 0 == ~r1~0 % 256; 837#L264 assume ~id1~0 >= 0; 838#L265 assume 0 == ~st1~0; 780#L266 assume ~send1~0 == ~id1~0; 781#L267 assume 0 == ~mode1~0 % 256; 788#L268 assume ~id2~0 >= 0; 789#L269 assume 0 == ~st2~0; 772#L270 assume ~send2~0 == ~id2~0; 773#L271 assume 0 == ~mode2~0 % 256; 806#L272 assume ~id3~0 >= 0; 822#L273 assume 0 == ~st3~0; 836#L274 assume ~send3~0 == ~id3~0; 860#L275 assume 0 == ~mode3~0 % 256; 758#L276 assume ~id4~0 >= 0; 759#L277 assume 0 == ~st4~0; 873#L278 assume ~send4~0 == ~id4~0; 829#L279 assume 0 == ~mode4~0 % 256; 830#L280 assume ~id5~0 >= 0; 782#L281 assume 0 == ~st5~0; 760#L282 assume ~send5~0 == ~id5~0; 761#L283 assume 0 == ~mode5~0 % 256; 839#L284 assume ~id6~0 >= 0; 840#L285 assume 0 == ~st6~0; 854#L286 assume ~send6~0 == ~id6~0; 844#L287 assume 0 == ~mode6~0 % 256; 796#L288 assume ~id7~0 >= 0; 797#L289 assume 0 == ~st7~0; 808#L290 assume ~send7~0 == ~id7~0; 850#L291 assume 0 == ~mode7~0 % 256; 851#L292 assume ~id1~0 != ~id2~0; 861#L293 assume ~id1~0 != ~id3~0; 870#L294 assume ~id1~0 != ~id4~0; 767#L295 assume ~id1~0 != ~id5~0; 768#L296 assume ~id1~0 != ~id6~0; 807#L297 assume ~id1~0 != ~id7~0; 804#L298 assume ~id2~0 != ~id3~0; 805#L299 assume ~id2~0 != ~id4~0; 814#L300 assume ~id2~0 != ~id5~0; 845#L301 assume ~id2~0 != ~id6~0; 852#L302 assume ~id2~0 != ~id7~0; 853#L303 assume ~id3~0 != ~id4~0; 866#L304 assume ~id3~0 != ~id5~0; 841#L305 assume ~id3~0 != ~id6~0; 842#L306 assume ~id3~0 != ~id7~0; 848#L307 assume ~id4~0 != ~id5~0; 776#L308 assume ~id4~0 != ~id6~0; 777#L309 assume ~id4~0 != ~id7~0; 846#L310 assume ~id5~0 != ~id6~0; 827#L311 assume ~id5~0 != ~id7~0; 828#L312 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 874#L263-1 init_#res#1 := init_~tmp~0#1; 864#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 818#L22 assume !(0 == assume_abort_if_not_~cond#1); 819#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 774#L548-2 [2022-12-13 13:42:39,561 INFO L750 eck$LassoCheckResult]: Loop: 774#L548-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 775#L85 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 762#L85-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 763#L114 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 816#L114-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 800#L139 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 783#L139-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 784#L164 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 887#L164-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 857#L189 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 859#L189-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 882#L214 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 778#L214-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 779#L239 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 799#L239-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 809#L472 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 810#L473 assume !(~r1~0 % 256 >= 7); 820#L476 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0; 821#$Ultimate##253 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 867#L472-1 check_#res#1 := check_~tmp~1#1; 785#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 786#L583 assume !(0 == assert_~arg#1 % 256); 823#L578 assume { :end_inline_assert } true; 774#L548-2 [2022-12-13 13:42:39,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:39,562 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 3 times [2022-12-13 13:42:39,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:39,562 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016193736] [2022-12-13 13:42:39,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:39,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:39,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,580 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:42:39,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,602 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:42:39,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:39,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1604611906, now seen corresponding path program 1 times [2022-12-13 13:42:39,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:39,603 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672073458] [2022-12-13 13:42:39,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:39,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:39,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,635 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:42:39,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,682 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:42:39,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:42:39,683 INFO L85 PathProgramCache]: Analyzing trace with hash 1081887249, now seen corresponding path program 1 times [2022-12-13 13:42:39,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:42:39,683 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024907462] [2022-12-13 13:42:39,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:42:39,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:42:39,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,731 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:42:39,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:42:39,777 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:42:45,414 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 13:42:45,415 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 13:42:45,415 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 13:42:45,415 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 13:42:45,415 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-12-13 13:42:45,415 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 13:42:45,415 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 13:42:45,415 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 13:42:45,415 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.7.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-12-13 13:42:45,415 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 13:42:45,416 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 13:42:45,454 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:45,465 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:45,468 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:45,470 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:45,472 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:45,475 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:48,137 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:48,141 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:48,144 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:48,147 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:48,151 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:48,154 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:48,155 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:42:50,781 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 41