./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 55ec916898aa0c4eb40269e81429fc0273ca07ec4caf7be0cd441cce0028ad79 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 16:02:27,584 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 16:02:27,586 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 16:02:27,618 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 16:02:27,618 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 16:02:27,619 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 16:02:27,620 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 16:02:27,622 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 16:02:27,623 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 16:02:27,624 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 16:02:27,625 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 16:02:27,626 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 16:02:27,626 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 16:02:27,627 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 16:02:27,639 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 16:02:27,640 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 16:02:27,641 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 16:02:27,642 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 16:02:27,644 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 16:02:27,645 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 16:02:27,647 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 16:02:27,648 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 16:02:27,649 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 16:02:27,650 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 16:02:27,653 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 16:02:27,653 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 16:02:27,654 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 16:02:27,654 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 16:02:27,655 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 16:02:27,656 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 16:02:27,656 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 16:02:27,657 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 16:02:27,657 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 16:02:27,658 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 16:02:27,659 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 16:02:27,660 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 16:02:27,660 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 16:02:27,660 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 16:02:27,660 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 16:02:27,661 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 16:02:27,661 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 16:02:27,662 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-12-13 16:02:27,683 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 16:02:27,684 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 16:02:27,684 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 16:02:27,684 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 16:02:27,685 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 16:02:27,685 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 16:02:27,685 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 16:02:27,685 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 16:02:27,686 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 16:02:27,686 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 16:02:27,686 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 16:02:27,686 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 16:02:27,686 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 16:02:27,686 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 16:02:27,686 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 16:02:27,687 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 16:02:27,688 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 16:02:27,688 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 16:02:27,688 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 16:02:27,688 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 16:02:27,688 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 16:02:27,688 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 16:02:27,689 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 16:02:27,689 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 16:02:27,690 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 55ec916898aa0c4eb40269e81429fc0273ca07ec4caf7be0cd441cce0028ad79 [2022-12-13 16:02:27,846 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 16:02:27,864 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 16:02:27,866 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 16:02:27,868 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 16:02:27,868 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 16:02:27,869 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c [2022-12-13 16:02:30,468 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 16:02:30,663 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 16:02:30,663 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/sv-benchmarks/c/seq-mthreaded/pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c [2022-12-13 16:02:30,673 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/data/32b8a5356/786fe66ac56140b0a53e3a5b1a5dac38/FLAG67ec46a89 [2022-12-13 16:02:30,685 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/data/32b8a5356/786fe66ac56140b0a53e3a5b1a5dac38 [2022-12-13 16:02:30,687 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 16:02:30,688 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 16:02:30,688 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 16:02:30,689 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 16:02:30,691 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 16:02:30,692 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:30,692 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3dd1562e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30, skipping insertion in model container [2022-12-13 16:02:30,693 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:30,698 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 16:02:30,727 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 16:02:30,917 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/sv-benchmarks/c/seq-mthreaded/pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c[26555,26568] [2022-12-13 16:02:30,918 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 16:02:30,931 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 16:02:30,980 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/sv-benchmarks/c/seq-mthreaded/pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c[26555,26568] [2022-12-13 16:02:30,980 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 16:02:30,996 INFO L208 MainTranslator]: Completed translation [2022-12-13 16:02:30,997 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30 WrapperNode [2022-12-13 16:02:30,997 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 16:02:30,998 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 16:02:30,998 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 16:02:30,998 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 16:02:31,005 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,015 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,042 INFO L138 Inliner]: procedures = 28, calls = 19, calls flagged for inlining = 14, calls inlined = 14, statements flattened = 462 [2022-12-13 16:02:31,042 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 16:02:31,043 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 16:02:31,043 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 16:02:31,043 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 16:02:31,052 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,052 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,056 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,056 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,065 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,072 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,074 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,076 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,080 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 16:02:31,081 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 16:02:31,081 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 16:02:31,082 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 16:02:31,083 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (1/1) ... [2022-12-13 16:02:31,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 16:02:31,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 16:02:31,111 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 16:02:31,113 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6969e688-387d-4e55-98e0-10e27be065cd/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 16:02:31,142 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 16:02:31,143 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 16:02:31,143 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 16:02:31,143 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 16:02:31,249 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 16:02:31,251 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 16:02:31,670 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 16:02:31,677 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 16:02:31,677 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-12-13 16:02:31,679 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 04:02:31 BoogieIcfgContainer [2022-12-13 16:02:31,680 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 16:02:31,680 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 16:02:31,681 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 16:02:31,684 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 16:02:31,684 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 16:02:31,684 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 04:02:30" (1/3) ... [2022-12-13 16:02:31,685 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@586c239e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 04:02:31, skipping insertion in model container [2022-12-13 16:02:31,685 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 16:02:31,685 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 04:02:30" (2/3) ... [2022-12-13 16:02:31,686 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@586c239e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 04:02:31, skipping insertion in model container [2022-12-13 16:02:31,686 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 16:02:31,686 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 04:02:31" (3/3) ... [2022-12-13 16:02:31,687 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c [2022-12-13 16:02:31,735 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 16:02:31,735 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 16:02:31,735 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 16:02:31,735 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 16:02:31,735 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 16:02:31,735 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 16:02:31,735 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 16:02:31,736 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 16:02:31,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 130 states, 129 states have (on average 1.7906976744186047) internal successors, (231), 129 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:31,763 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2022-12-13 16:02:31,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 16:02:31,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 16:02:31,770 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:31,770 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:31,770 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 16:02:31,771 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 130 states, 129 states have (on average 1.7906976744186047) internal successors, (231), 129 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:31,775 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2022-12-13 16:02:31,775 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 16:02:31,775 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 16:02:31,777 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:31,777 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:31,784 INFO L748 eck$LassoCheckResult]: Stem: 22#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 36#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 29#L297true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 28#L297-1true init_#res#1 := init_~tmp~0#1; 92#init_returnLabel#1true main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 43#L24true assume !(0 == assume_abort_if_not_~cond#1); 10#L23true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 117#L632-2true [2022-12-13 16:02:31,785 INFO L750 eck$LassoCheckResult]: Loop: 117#L632-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 118#L94true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 106#L94-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 41#L120true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 24#L120-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 57#L145true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 52#L145-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 69#L170true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 45#L170-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 108#L195true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 74#L195-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 63#L220true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 47#L220-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 19#L245true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 75#L245-2true assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 7#L270true assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 64#L270-2true assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 129#L550true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 42#L550-1true check_#res#1 := check_~tmp~1#1; 13#check_returnLabel#1true main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 44#L670true assume !(0 == assert_~arg#1 % 256); 93#L665true assume { :end_inline_assert } true; 117#L632-2true [2022-12-13 16:02:31,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:31,789 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2022-12-13 16:02:31,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:31,795 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513364451] [2022-12-13 16:02:31,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:31,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:31,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 16:02:32,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 16:02:32,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 16:02:32,086 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513364451] [2022-12-13 16:02:32,087 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1513364451] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 16:02:32,087 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 16:02:32,088 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 16:02:32,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219850027] [2022-12-13 16:02:32,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 16:02:32,094 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 16:02:32,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:32,095 INFO L85 PathProgramCache]: Analyzing trace with hash 1944610393, now seen corresponding path program 1 times [2022-12-13 16:02:32,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:32,095 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294733121] [2022-12-13 16:02:32,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:32,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:32,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 16:02:32,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 16:02:32,386 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 16:02:32,386 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294733121] [2022-12-13 16:02:32,386 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [294733121] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 16:02:32,386 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 16:02:32,387 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 16:02:32,387 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [22195951] [2022-12-13 16:02:32,387 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 16:02:32,388 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 16:02:32,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 16:02:32,420 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 16:02:32,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 16:02:32,422 INFO L87 Difference]: Start difference. First operand has 130 states, 129 states have (on average 1.7906976744186047) internal successors, (231), 129 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:32,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 16:02:32,525 INFO L93 Difference]: Finished difference Result 129 states and 226 transitions. [2022-12-13 16:02:32,526 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 129 states and 226 transitions. [2022-12-13 16:02:32,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-12-13 16:02:32,533 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 129 states to 125 states and 162 transitions. [2022-12-13 16:02:32,534 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 125 [2022-12-13 16:02:32,535 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 125 [2022-12-13 16:02:32,536 INFO L73 IsDeterministic]: Start isDeterministic. Operand 125 states and 162 transitions. [2022-12-13 16:02:32,536 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 16:02:32,537 INFO L218 hiAutomatonCegarLoop]: Abstraction has 125 states and 162 transitions. [2022-12-13 16:02:32,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states and 162 transitions. [2022-12-13 16:02:32,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2022-12-13 16:02:32,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 125 states have (on average 1.296) internal successors, (162), 124 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:32,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 162 transitions. [2022-12-13 16:02:32,564 INFO L240 hiAutomatonCegarLoop]: Abstraction has 125 states and 162 transitions. [2022-12-13 16:02:32,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 16:02:32,568 INFO L428 stractBuchiCegarLoop]: Abstraction has 125 states and 162 transitions. [2022-12-13 16:02:32,569 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 16:02:32,569 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 125 states and 162 transitions. [2022-12-13 16:02:32,571 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-12-13 16:02:32,571 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 16:02:32,571 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 16:02:32,573 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:32,573 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:32,574 INFO L748 eck$LassoCheckResult]: Stem: 317#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 318#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 331#L297 assume 0 == ~r1~0 % 256; 319#L298 assume ~id1~0 >= 0; 320#L299 assume 0 == ~st1~0; 339#L300 assume ~send1~0 == ~id1~0; 377#L301 assume 0 == ~mode1~0 % 256; 388#L302 assume ~id2~0 >= 0; 389#L303 assume 0 == ~st2~0; 395#L304 assume ~send2~0 == ~id2~0; 369#L305 assume 0 == ~mode2~0 % 256; 370#L306 assume ~id3~0 >= 0; 384#L307 assume 0 == ~st3~0; 291#L308 assume ~send3~0 == ~id3~0; 292#L309 assume 0 == ~mode3~0 % 256; 381#L310 assume ~id4~0 >= 0; 350#L311 assume 0 == ~st4~0; 351#L312 assume ~send4~0 == ~id4~0; 307#L313 assume 0 == ~mode4~0 % 256; 308#L314 assume ~id5~0 >= 0; 342#L315 assume 0 == ~st5~0; 343#L316 assume ~send5~0 == ~id5~0; 279#L317 assume 0 == ~mode5~0 % 256; 280#L318 assume ~id6~0 >= 0; 401#L319 assume 0 == ~st6~0; 387#L320 assume ~send6~0 == ~id6~0; 374#L321 assume 0 == ~mode6~0 % 256; 375#L322 assume ~id7~0 >= 0; 277#L323 assume 0 == ~st7~0; 278#L324 assume ~send7~0 == ~id7~0; 295#L325 assume 0 == ~mode7~0 % 256; 310#L326 assume ~id8~0 >= 0; 300#L327 assume 0 == ~st8~0; 301#L328 assume ~send8~0 == ~id8~0; 333#L329 assume 0 == ~mode8~0 % 256; 334#L330 assume ~id1~0 != ~id2~0; 289#L331 assume ~id1~0 != ~id3~0; 290#L332 assume ~id1~0 != ~id4~0; 309#L333 assume ~id1~0 != ~id5~0; 332#L334 assume ~id1~0 != ~id6~0; 305#L335 assume ~id1~0 != ~id7~0; 306#L336 assume ~id1~0 != ~id8~0; 383#L337 assume ~id2~0 != ~id3~0; 357#L338 assume ~id2~0 != ~id4~0; 358#L339 assume ~id2~0 != ~id5~0; 398#L340 assume ~id2~0 != ~id6~0; 393#L341 assume ~id2~0 != ~id7~0; 335#L342 assume ~id2~0 != ~id8~0; 336#L343 assume ~id3~0 != ~id4~0; 321#L344 assume ~id3~0 != ~id5~0; 322#L345 assume ~id3~0 != ~id6~0; 344#L346 assume ~id3~0 != ~id7~0; 345#L347 assume ~id3~0 != ~id8~0; 399#L348 assume ~id4~0 != ~id5~0; 390#L349 assume ~id4~0 != ~id6~0; 391#L350 assume ~id4~0 != ~id7~0; 378#L351 assume ~id4~0 != ~id8~0; 379#L352 assume ~id5~0 != ~id6~0; 394#L353 assume ~id5~0 != ~id7~0; 366#L354 assume ~id5~0 != ~id8~0; 337#L355 assume ~id6~0 != ~id7~0; 338#L356 assume ~id6~0 != ~id8~0; 363#L357 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 329#L297-1 init_#res#1 := init_~tmp~0#1; 330#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 349#L24 assume !(0 == assume_abort_if_not_~cond#1); 293#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 294#L632-2 [2022-12-13 16:02:32,574 INFO L750 eck$LassoCheckResult]: Loop: 294#L632-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 400#L94 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 297#L94-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 347#L120 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 323#L120-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 324#L145 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 359#L145-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 360#L170 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 352#L170-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 353#L195 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 382#L195-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 371#L220 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 282#L220-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 311#L245 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 313#L245-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 286#L270 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 287#L270-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 373#L550 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 341#L550-1 check_#res#1 := check_~tmp~1#1; 298#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 299#L670 assume !(0 == assert_~arg#1 % 256); 348#L665 assume { :end_inline_assert } true; 294#L632-2 [2022-12-13 16:02:32,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:32,574 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2022-12-13 16:02:32,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:32,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966083905] [2022-12-13 16:02:32,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:32,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:32,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:32,612 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 16:02:32,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:32,667 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 16:02:32,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:32,668 INFO L85 PathProgramCache]: Analyzing trace with hash 1944610393, now seen corresponding path program 2 times [2022-12-13 16:02:32,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:32,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105354331] [2022-12-13 16:02:32,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:32,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:32,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 16:02:32,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 16:02:32,830 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 16:02:32,830 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105354331] [2022-12-13 16:02:32,830 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [105354331] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 16:02:32,830 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 16:02:32,830 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 16:02:32,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956725830] [2022-12-13 16:02:32,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 16:02:32,831 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 16:02:32,831 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 16:02:32,832 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 16:02:32,832 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 16:02:32,832 INFO L87 Difference]: Start difference. First operand 125 states and 162 transitions. cyclomatic complexity: 38 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:32,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 16:02:32,875 INFO L93 Difference]: Finished difference Result 128 states and 164 transitions. [2022-12-13 16:02:32,875 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 128 states and 164 transitions. [2022-12-13 16:02:32,878 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-12-13 16:02:32,879 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 128 states to 125 states and 159 transitions. [2022-12-13 16:02:32,880 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 125 [2022-12-13 16:02:32,880 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 125 [2022-12-13 16:02:32,880 INFO L73 IsDeterministic]: Start isDeterministic. Operand 125 states and 159 transitions. [2022-12-13 16:02:32,881 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 16:02:32,881 INFO L218 hiAutomatonCegarLoop]: Abstraction has 125 states and 159 transitions. [2022-12-13 16:02:32,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states and 159 transitions. [2022-12-13 16:02:32,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2022-12-13 16:02:32,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 125 states have (on average 1.272) internal successors, (159), 124 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:32,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 159 transitions. [2022-12-13 16:02:32,888 INFO L240 hiAutomatonCegarLoop]: Abstraction has 125 states and 159 transitions. [2022-12-13 16:02:32,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 16:02:32,890 INFO L428 stractBuchiCegarLoop]: Abstraction has 125 states and 159 transitions. [2022-12-13 16:02:32,890 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 16:02:32,890 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 125 states and 159 transitions. [2022-12-13 16:02:32,891 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 58 [2022-12-13 16:02:32,892 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 16:02:32,892 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 16:02:32,895 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:32,895 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:32,896 INFO L748 eck$LassoCheckResult]: Stem: 582#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 583#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 596#L297 assume 0 == ~r1~0 % 256; 584#L298 assume ~id1~0 >= 0; 585#L299 assume 0 == ~st1~0; 604#L300 assume ~send1~0 == ~id1~0; 642#L301 assume 0 == ~mode1~0 % 256; 653#L302 assume ~id2~0 >= 0; 654#L303 assume 0 == ~st2~0; 660#L304 assume ~send2~0 == ~id2~0; 634#L305 assume 0 == ~mode2~0 % 256; 635#L306 assume ~id3~0 >= 0; 649#L307 assume 0 == ~st3~0; 556#L308 assume ~send3~0 == ~id3~0; 557#L309 assume 0 == ~mode3~0 % 256; 646#L310 assume ~id4~0 >= 0; 615#L311 assume 0 == ~st4~0; 616#L312 assume ~send4~0 == ~id4~0; 572#L313 assume 0 == ~mode4~0 % 256; 573#L314 assume ~id5~0 >= 0; 607#L315 assume 0 == ~st5~0; 608#L316 assume ~send5~0 == ~id5~0; 544#L317 assume 0 == ~mode5~0 % 256; 545#L318 assume ~id6~0 >= 0; 666#L319 assume 0 == ~st6~0; 652#L320 assume ~send6~0 == ~id6~0; 639#L321 assume 0 == ~mode6~0 % 256; 640#L322 assume ~id7~0 >= 0; 542#L323 assume 0 == ~st7~0; 543#L324 assume ~send7~0 == ~id7~0; 560#L325 assume 0 == ~mode7~0 % 256; 578#L326 assume ~id8~0 >= 0; 565#L327 assume 0 == ~st8~0; 566#L328 assume ~send8~0 == ~id8~0; 598#L329 assume 0 == ~mode8~0 % 256; 599#L330 assume ~id1~0 != ~id2~0; 554#L331 assume ~id1~0 != ~id3~0; 555#L332 assume ~id1~0 != ~id4~0; 574#L333 assume ~id1~0 != ~id5~0; 597#L334 assume ~id1~0 != ~id6~0; 570#L335 assume ~id1~0 != ~id7~0; 571#L336 assume ~id1~0 != ~id8~0; 648#L337 assume ~id2~0 != ~id3~0; 622#L338 assume ~id2~0 != ~id4~0; 623#L339 assume ~id2~0 != ~id5~0; 663#L340 assume ~id2~0 != ~id6~0; 658#L341 assume ~id2~0 != ~id7~0; 600#L342 assume ~id2~0 != ~id8~0; 601#L343 assume ~id3~0 != ~id4~0; 586#L344 assume ~id3~0 != ~id5~0; 587#L345 assume ~id3~0 != ~id6~0; 609#L346 assume ~id3~0 != ~id7~0; 610#L347 assume ~id3~0 != ~id8~0; 664#L348 assume ~id4~0 != ~id5~0; 655#L349 assume ~id4~0 != ~id6~0; 656#L350 assume ~id4~0 != ~id7~0; 643#L351 assume ~id4~0 != ~id8~0; 644#L352 assume ~id5~0 != ~id6~0; 659#L353 assume ~id5~0 != ~id7~0; 631#L354 assume ~id5~0 != ~id8~0; 602#L355 assume ~id6~0 != ~id7~0; 603#L356 assume ~id6~0 != ~id8~0; 628#L357 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 594#L297-1 init_#res#1 := init_~tmp~0#1; 595#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 614#L24 assume !(0 == assume_abort_if_not_~cond#1); 558#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 559#L632-2 [2022-12-13 16:02:32,896 INFO L750 eck$LassoCheckResult]: Loop: 559#L632-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 665#L94 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 562#L94-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 612#L120 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 588#L120-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 589#L145 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 624#L145-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 625#L170 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 617#L170-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 618#L195 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 647#L195-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 636#L220 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 547#L220-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 575#L245 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 577#L245-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 551#L270 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 552#L270-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 638#L550 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 590#L551 assume ~r1~0 % 256 >= 8; 591#$Ultimate##295 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 606#L550-1 check_#res#1 := check_~tmp~1#1; 563#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 564#L670 assume !(0 == assert_~arg#1 % 256); 613#L665 assume { :end_inline_assert } true; 559#L632-2 [2022-12-13 16:02:32,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:32,897 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2022-12-13 16:02:32,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:32,897 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892947375] [2022-12-13 16:02:32,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:32,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:32,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:32,934 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 16:02:32,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:32,986 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 16:02:32,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:32,986 INFO L85 PathProgramCache]: Analyzing trace with hash -955997591, now seen corresponding path program 1 times [2022-12-13 16:02:32,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:32,987 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012844466] [2022-12-13 16:02:32,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:32,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:33,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 16:02:33,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 16:02:33,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 16:02:33,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012844466] [2022-12-13 16:02:33,032 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2012844466] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 16:02:33,032 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 16:02:33,032 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 16:02:33,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1392968699] [2022-12-13 16:02:33,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 16:02:33,033 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 16:02:33,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 16:02:33,033 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 16:02:33,033 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 16:02:33,033 INFO L87 Difference]: Start difference. First operand 125 states and 159 transitions. cyclomatic complexity: 35 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:33,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 16:02:33,059 INFO L93 Difference]: Finished difference Result 177 states and 240 transitions. [2022-12-13 16:02:33,059 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 177 states and 240 transitions. [2022-12-13 16:02:33,061 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 110 [2022-12-13 16:02:33,062 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 177 states to 177 states and 240 transitions. [2022-12-13 16:02:33,062 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 177 [2022-12-13 16:02:33,063 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 177 [2022-12-13 16:02:33,063 INFO L73 IsDeterministic]: Start isDeterministic. Operand 177 states and 240 transitions. [2022-12-13 16:02:33,064 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 16:02:33,064 INFO L218 hiAutomatonCegarLoop]: Abstraction has 177 states and 240 transitions. [2022-12-13 16:02:33,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states and 240 transitions. [2022-12-13 16:02:33,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2022-12-13 16:02:33,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 177 states have (on average 1.3559322033898304) internal successors, (240), 176 states have internal predecessors, (240), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 16:02:33,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 240 transitions. [2022-12-13 16:02:33,072 INFO L240 hiAutomatonCegarLoop]: Abstraction has 177 states and 240 transitions. [2022-12-13 16:02:33,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 16:02:33,073 INFO L428 stractBuchiCegarLoop]: Abstraction has 177 states and 240 transitions. [2022-12-13 16:02:33,073 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 16:02:33,073 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 240 transitions. [2022-12-13 16:02:33,074 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 110 [2022-12-13 16:02:33,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 16:02:33,075 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 16:02:33,076 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:33,076 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 16:02:33,076 INFO L748 eck$LassoCheckResult]: Stem: 892#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 893#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 903#L297 assume 0 == ~r1~0 % 256; 894#L298 assume ~id1~0 >= 0; 895#L299 assume 0 == ~st1~0; 911#L300 assume ~send1~0 == ~id1~0; 950#L301 assume 0 == ~mode1~0 % 256; 961#L302 assume ~id2~0 >= 0; 962#L303 assume 0 == ~st2~0; 968#L304 assume ~send2~0 == ~id2~0; 942#L305 assume 0 == ~mode2~0 % 256; 943#L306 assume ~id3~0 >= 0; 957#L307 assume 0 == ~st3~0; 864#L308 assume ~send3~0 == ~id3~0; 865#L309 assume 0 == ~mode3~0 % 256; 954#L310 assume ~id4~0 >= 0; 925#L311 assume 0 == ~st4~0; 926#L312 assume ~send4~0 == ~id4~0; 880#L313 assume 0 == ~mode4~0 % 256; 881#L314 assume ~id5~0 >= 0; 914#L315 assume 0 == ~st5~0; 915#L316 assume ~send5~0 == ~id5~0; 854#L317 assume 0 == ~mode5~0 % 256; 855#L318 assume ~id6~0 >= 0; 974#L319 assume 0 == ~st6~0; 960#L320 assume ~send6~0 == ~id6~0; 947#L321 assume 0 == ~mode6~0 % 256; 948#L322 assume ~id7~0 >= 0; 850#L323 assume 0 == ~st7~0; 851#L324 assume ~send7~0 == ~id7~0; 868#L325 assume 0 == ~mode7~0 % 256; 886#L326 assume ~id8~0 >= 0; 873#L327 assume 0 == ~st8~0; 874#L328 assume ~send8~0 == ~id8~0; 905#L329 assume 0 == ~mode8~0 % 256; 906#L330 assume ~id1~0 != ~id2~0; 862#L331 assume ~id1~0 != ~id3~0; 863#L332 assume ~id1~0 != ~id4~0; 882#L333 assume ~id1~0 != ~id5~0; 904#L334 assume ~id1~0 != ~id6~0; 878#L335 assume ~id1~0 != ~id7~0; 879#L336 assume ~id1~0 != ~id8~0; 956#L337 assume ~id2~0 != ~id3~0; 930#L338 assume ~id2~0 != ~id4~0; 931#L339 assume ~id2~0 != ~id5~0; 971#L340 assume ~id2~0 != ~id6~0; 966#L341 assume ~id2~0 != ~id7~0; 907#L342 assume ~id2~0 != ~id8~0; 908#L343 assume ~id3~0 != ~id4~0; 896#L344 assume ~id3~0 != ~id5~0; 897#L345 assume ~id3~0 != ~id6~0; 916#L346 assume ~id3~0 != ~id7~0; 917#L347 assume ~id3~0 != ~id8~0; 972#L348 assume ~id4~0 != ~id5~0; 963#L349 assume ~id4~0 != ~id6~0; 964#L350 assume ~id4~0 != ~id7~0; 951#L351 assume ~id4~0 != ~id8~0; 952#L352 assume ~id5~0 != ~id6~0; 967#L353 assume ~id5~0 != ~id7~0; 939#L354 assume ~id5~0 != ~id8~0; 909#L355 assume ~id6~0 != ~id7~0; 910#L356 assume ~id6~0 != ~id8~0; 938#L357 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 901#L297-1 init_#res#1 := init_~tmp~0#1; 902#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 922#L24 assume !(0 == assume_abort_if_not_~cond#1); 866#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 867#L632-2 [2022-12-13 16:02:33,076 INFO L750 eck$LassoCheckResult]: Loop: 867#L632-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 973#L94 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 870#L94-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 919#L120 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 890#L120-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 891#L145 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 932#L145-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 933#L170 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 923#L170-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 924#L195 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 955#L195-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 944#L220 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 853#L220-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 883#L245 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 885#L245-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 859#L270 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 860#L270-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 946#L550 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 975#L551 assume !(~r1~0 % 256 >= 8); 976#L554 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0; 977#$Ultimate##295 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 920#L550-1 check_#res#1 := check_~tmp~1#1; 871#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 872#L670 assume !(0 == assert_~arg#1 % 256); 921#L665 assume { :end_inline_assert } true; 867#L632-2 [2022-12-13 16:02:33,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:33,077 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2022-12-13 16:02:33,077 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:33,077 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [937027562] [2022-12-13 16:02:33,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:33,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:33,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:33,103 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 16:02:33,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:33,135 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 16:02:33,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:33,135 INFO L85 PathProgramCache]: Analyzing trace with hash 2075417959, now seen corresponding path program 1 times [2022-12-13 16:02:33,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:33,136 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931583664] [2022-12-13 16:02:33,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:33,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:33,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:33,163 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 16:02:33,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:33,214 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 16:02:33,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 16:02:33,215 INFO L85 PathProgramCache]: Analyzing trace with hash -1273038936, now seen corresponding path program 1 times [2022-12-13 16:02:33,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 16:02:33,215 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [640133541] [2022-12-13 16:02:33,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 16:02:33,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 16:02:33,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:33,260 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 16:02:33,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 16:02:33,298 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 16:02:39,637 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 16:02:39,638 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 16:02:39,638 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 16:02:39,638 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 16:02:39,638 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-12-13 16:02:39,638 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 16:02:39,638 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 16:02:39,638 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 16:02:39,639 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8_overflow.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-12-13 16:02:39,639 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 16:02:39,639 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 16:02:39,673 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,683 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,685 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,686 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,689 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,690 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,693 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,694 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,696 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,697 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,700 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,701 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,702 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,704 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,707 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,710 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,711 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,712 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,713 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,715 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,716 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,718 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,720 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,723 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:39,724 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:42,853 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:42,858 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:42,862 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:42,864 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:42,866 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 16:02:46,820 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 45