./Ultimate.py --spec ../../sv-benchmarks/c/properties/valid-memsafety.prp --file ../../sv-benchmarks/c/memsafety/20051113-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for memory safety (deref-memtrack) Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/config/AutomizerMemDerefMemtrack.xml -i ../../sv-benchmarks/c/memsafety/20051113-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2a43a02844acf962bfa6f77d0e1512c06ac1cc2fb3c3905e584a292a069b5426 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 20:08:30,472 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 20:08:30,473 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 20:08:30,492 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 20:08:30,492 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 20:08:30,493 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 20:08:30,495 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 20:08:30,496 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 20:08:30,498 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 20:08:30,498 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 20:08:30,499 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 20:08:30,500 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 20:08:30,501 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 20:08:30,502 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 20:08:30,503 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 20:08:30,504 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 20:08:30,504 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 20:08:30,505 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 20:08:30,507 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 20:08:30,508 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 20:08:30,510 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 20:08:30,511 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 20:08:30,512 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 20:08:30,513 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 20:08:30,517 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 20:08:30,517 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 20:08:30,517 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 20:08:30,518 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 20:08:30,518 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 20:08:30,519 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 20:08:30,520 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 20:08:30,520 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 20:08:30,521 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 20:08:30,522 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 20:08:30,523 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 20:08:30,523 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 20:08:30,523 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 20:08:30,524 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 20:08:30,524 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 20:08:30,525 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 20:08:30,525 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 20:08:30,526 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/config/svcomp-DerefFreeMemtrack-32bit-Automizer_Default.epf [2022-12-13 20:08:30,546 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 20:08:30,546 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 20:08:30,547 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 20:08:30,547 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 20:08:30,547 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-12-13 20:08:30,548 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-12-13 20:08:30,548 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 20:08:30,548 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 20:08:30,549 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 20:08:30,549 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 20:08:30,549 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 20:08:30,549 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 20:08:30,549 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 20:08:30,549 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 20:08:30,550 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 20:08:30,550 INFO L138 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2022-12-13 20:08:30,550 INFO L138 SettingsManager]: * Bitprecise bitfields=true [2022-12-13 20:08:30,550 INFO L138 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2022-12-13 20:08:30,550 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-12-13 20:08:30,551 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-12-13 20:08:30,551 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 20:08:30,551 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 20:08:30,551 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 20:08:30,551 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 20:08:30,552 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-12-13 20:08:30,552 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-13 20:08:30,552 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 20:08:30,552 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-12-13 20:08:30,552 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 20:08:30,552 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-12-13 20:08:30,553 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-12-13 20:08:30,553 INFO L138 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2022-12-13 20:08:30,553 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-12-13 20:08:30,553 INFO L138 SettingsManager]: * Independence relation used for large block encoding in concurrent analysis=SYNTACTIC [2022-12-13 20:08:30,553 INFO L138 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G valid-free) ) CHECK( init(main()), LTL(G valid-deref) ) CHECK( init(main()), LTL(G valid-memtrack) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a43a02844acf962bfa6f77d0e1512c06ac1cc2fb3c3905e584a292a069b5426 [2022-12-13 20:08:30,728 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 20:08:30,743 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 20:08:30,745 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 20:08:30,746 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 20:08:30,747 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 20:08:30,748 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/memsafety/20051113-1.i [2022-12-13 20:08:33,360 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 20:08:33,543 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 20:08:33,544 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/sv-benchmarks/c/memsafety/20051113-1.i [2022-12-13 20:08:33,552 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/data/14cdcdd1e/250c9a636c38412b9230aa5d63e1e978/FLAG7f95f26fe [2022-12-13 20:08:33,563 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/data/14cdcdd1e/250c9a636c38412b9230aa5d63e1e978 [2022-12-13 20:08:33,565 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 20:08:33,566 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 20:08:33,567 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 20:08:33,567 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 20:08:33,570 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 20:08:33,570 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,571 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c838876 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33, skipping insertion in model container [2022-12-13 20:08:33,572 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,577 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 20:08:33,599 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 20:08:33,789 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 20:08:33,798 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 20:08:33,826 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 20:08:33,842 INFO L208 MainTranslator]: Completed translation [2022-12-13 20:08:33,842 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33 WrapperNode [2022-12-13 20:08:33,842 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 20:08:33,843 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 20:08:33,843 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 20:08:33,843 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 20:08:33,848 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,857 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,871 INFO L138 Inliner]: procedures = 125, calls = 23, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 77 [2022-12-13 20:08:33,871 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 20:08:33,871 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 20:08:33,871 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 20:08:33,872 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 20:08:33,878 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,878 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,880 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,880 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,884 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,886 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,887 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,888 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,889 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 20:08:33,890 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 20:08:33,890 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 20:08:33,890 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 20:08:33,891 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (1/1) ... [2022-12-13 20:08:33,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-12-13 20:08:33,903 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:33,914 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-12-13 20:08:33,916 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-12-13 20:08:33,948 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-12-13 20:08:33,948 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-12-13 20:08:33,948 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-12-13 20:08:33,949 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 20:08:33,949 INFO L130 BoogieDeclarations]: Found specification of procedure dummy_abort [2022-12-13 20:08:33,949 INFO L138 BoogieDeclarations]: Found implementation of procedure dummy_abort [2022-12-13 20:08:33,949 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 20:08:33,949 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 20:08:33,949 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 20:08:34,023 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 20:08:34,025 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 20:08:34,227 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 20:08:34,233 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 20:08:34,233 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-12-13 20:08:34,235 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 08:08:34 BoogieIcfgContainer [2022-12-13 20:08:34,236 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 20:08:34,238 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-12-13 20:08:34,239 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-12-13 20:08:34,242 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-12-13 20:08:34,242 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.12 08:08:33" (1/3) ... [2022-12-13 20:08:34,243 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17e518be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.12 08:08:34, skipping insertion in model container [2022-12-13 20:08:34,243 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 08:08:33" (2/3) ... [2022-12-13 20:08:34,243 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@17e518be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.12 08:08:34, skipping insertion in model container [2022-12-13 20:08:34,243 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 08:08:34" (3/3) ... [2022-12-13 20:08:34,245 INFO L112 eAbstractionObserver]: Analyzing ICFG 20051113-1.i [2022-12-13 20:08:34,261 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-12-13 20:08:34,261 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 25 error locations. [2022-12-13 20:08:34,295 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-12-13 20:08:34,299 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2b82557a, mLbeIndependenceSettings=[IndependenceType=SYNTACTIC, AbstractionType=NONE, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-12-13 20:08:34,300 INFO L358 AbstractCegarLoop]: Starting to check reachability of 25 error locations. [2022-12-13 20:08:34,303 INFO L276 IsEmpty]: Start isEmpty. Operand has 64 states, 35 states have (on average 1.9142857142857144) internal successors, (67), 62 states have internal predecessors, (67), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:34,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2022-12-13 20:08:34,314 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:34,314 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1] [2022-12-13 20:08:34,315 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:34,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:34,319 INFO L85 PathProgramCache]: Analyzing trace with hash 30849, now seen corresponding path program 1 times [2022-12-13 20:08:34,327 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:34,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741125422] [2022-12-13 20:08:34,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:34,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:34,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:34,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:34,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:34,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741125422] [2022-12-13 20:08:34,524 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [741125422] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:34,524 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:34,524 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-12-13 20:08:34,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930166683] [2022-12-13 20:08:34,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:34,531 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-12-13 20:08:34,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:34,560 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 20:08:34,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 20:08:34,562 INFO L87 Difference]: Start difference. First operand has 64 states, 35 states have (on average 1.9142857142857144) internal successors, (67), 62 states have internal predecessors, (67), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:34,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:34,626 INFO L93 Difference]: Finished difference Result 63 states and 68 transitions. [2022-12-13 20:08:34,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 20:08:34,628 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 3 [2022-12-13 20:08:34,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:34,633 INFO L225 Difference]: With dead ends: 63 [2022-12-13 20:08:34,633 INFO L226 Difference]: Without dead ends: 61 [2022-12-13 20:08:34,634 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 20:08:34,637 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 61 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 40 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:34,637 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 40 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:34,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2022-12-13 20:08:34,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2022-12-13 20:08:34,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 34 states have (on average 1.8235294117647058) internal successors, (62), 59 states have internal predecessors, (62), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:34,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2022-12-13 20:08:34,665 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 3 [2022-12-13 20:08:34,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:34,665 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2022-12-13 20:08:34,666 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:34,666 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2022-12-13 20:08:34,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-12-13 20:08:34,666 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:34,666 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-12-13 20:08:34,666 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-12-13 20:08:34,667 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:34,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:34,667 INFO L85 PathProgramCache]: Analyzing trace with hash 956356, now seen corresponding path program 1 times [2022-12-13 20:08:34,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:34,668 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592553464] [2022-12-13 20:08:34,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:34,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:34,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:34,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:34,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:34,755 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592553464] [2022-12-13 20:08:34,755 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1592553464] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:34,755 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:34,755 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-12-13 20:08:34,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1773249797] [2022-12-13 20:08:34,756 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:34,757 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-12-13 20:08:34,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:34,757 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 20:08:34,757 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 20:08:34,757 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:34,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:34,808 INFO L93 Difference]: Finished difference Result 60 states and 65 transitions. [2022-12-13 20:08:34,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 20:08:34,808 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-12-13 20:08:34,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:34,809 INFO L225 Difference]: With dead ends: 60 [2022-12-13 20:08:34,809 INFO L226 Difference]: Without dead ends: 60 [2022-12-13 20:08:34,809 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 20:08:34,810 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 57 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:34,810 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 39 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:34,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-12-13 20:08:34,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2022-12-13 20:08:34,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 34 states have (on average 1.7941176470588236) internal successors, (61), 58 states have internal predecessors, (61), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:34,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 65 transitions. [2022-12-13 20:08:34,815 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 65 transitions. Word has length 4 [2022-12-13 20:08:34,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:34,815 INFO L495 AbstractCegarLoop]: Abstraction has 60 states and 65 transitions. [2022-12-13 20:08:34,815 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:34,816 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 65 transitions. [2022-12-13 20:08:34,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-12-13 20:08:34,816 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:34,816 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:34,816 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-12-13 20:08:34,816 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:34,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:34,817 INFO L85 PathProgramCache]: Analyzing trace with hash -1573926710, now seen corresponding path program 1 times [2022-12-13 20:08:34,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:34,817 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2113898868] [2022-12-13 20:08:34,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:34,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:34,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:34,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:34,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:34,889 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2113898868] [2022-12-13 20:08:34,889 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2113898868] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:34,890 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:34,890 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-12-13 20:08:34,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964922071] [2022-12-13 20:08:34,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:34,890 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-13 20:08:34,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:34,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 20:08:34,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:34,891 INFO L87 Difference]: Start difference. First operand 60 states and 65 transitions. Second operand has 5 states, 4 states have (on average 1.75) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:34,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:34,952 INFO L93 Difference]: Finished difference Result 53 states and 58 transitions. [2022-12-13 20:08:34,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 20:08:34,952 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 1.75) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-12-13 20:08:34,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:34,953 INFO L225 Difference]: With dead ends: 53 [2022-12-13 20:08:34,953 INFO L226 Difference]: Without dead ends: 53 [2022-12-13 20:08:34,954 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:34,955 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 92 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:34,956 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [94 Valid, 32 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:34,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-12-13 20:08:34,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2022-12-13 20:08:34,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 34 states have (on average 1.588235294117647) internal successors, (54), 51 states have internal predecessors, (54), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:34,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2022-12-13 20:08:34,959 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 7 [2022-12-13 20:08:34,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:34,959 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2022-12-13 20:08:34,959 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 1.75) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:34,959 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2022-12-13 20:08:34,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-12-13 20:08:34,960 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:34,960 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:34,960 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-12-13 20:08:34,960 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr3REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:34,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:34,960 INFO L85 PathProgramCache]: Analyzing trace with hash -1573926709, now seen corresponding path program 1 times [2022-12-13 20:08:34,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:34,961 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701289596] [2022-12-13 20:08:34,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:34,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:34,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:35,016 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:35,017 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701289596] [2022-12-13 20:08:35,017 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1701289596] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:35,017 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:35,017 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-12-13 20:08:35,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273328631] [2022-12-13 20:08:35,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:35,017 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-12-13 20:08:35,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:35,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 20:08:35,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 20:08:35,018 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:35,055 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2022-12-13 20:08:35,055 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 20:08:35,056 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-12-13 20:08:35,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:35,056 INFO L225 Difference]: With dead ends: 46 [2022-12-13 20:08:35,056 INFO L226 Difference]: Without dead ends: 46 [2022-12-13 20:08:35,056 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 20:08:35,057 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 38 mSDsluCounter, 2 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:35,057 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 35 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:35,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2022-12-13 20:08:35,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2022-12-13 20:08:35,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 44 states have internal predecessors, (47), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:35,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2022-12-13 20:08:35,060 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 7 [2022-12-13 20:08:35,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:35,060 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2022-12-13 20:08:35,060 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,061 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2022-12-13 20:08:35,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-12-13 20:08:35,061 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:35,061 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:35,061 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-12-13 20:08:35,061 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr16REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:35,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:35,061 INFO L85 PathProgramCache]: Analyzing trace with hash 1365553495, now seen corresponding path program 1 times [2022-12-13 20:08:35,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:35,062 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988241797] [2022-12-13 20:08:35,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:35,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:35,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:35,157 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:35,157 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988241797] [2022-12-13 20:08:35,157 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [988241797] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:35,157 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:35,157 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 20:08:35,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536320372] [2022-12-13 20:08:35,158 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:35,158 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-12-13 20:08:35,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:35,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-12-13 20:08:35,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-12-13 20:08:35,159 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:35,217 INFO L93 Difference]: Finished difference Result 44 states and 49 transitions. [2022-12-13 20:08:35,218 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:35,218 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-12-13 20:08:35,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:35,218 INFO L225 Difference]: With dead ends: 44 [2022-12-13 20:08:35,218 INFO L226 Difference]: Without dead ends: 44 [2022-12-13 20:08:35,219 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-12-13 20:08:35,219 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 66 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:35,220 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 35 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:35,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-12-13 20:08:35,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2022-12-13 20:08:35,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 34 states have (on average 1.3235294117647058) internal successors, (45), 42 states have internal predecessors, (45), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:35,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 49 transitions. [2022-12-13 20:08:35,222 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 49 transitions. Word has length 15 [2022-12-13 20:08:35,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:35,223 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 49 transitions. [2022-12-13 20:08:35,223 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.0) internal successors, (15), 6 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,223 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 49 transitions. [2022-12-13 20:08:35,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-12-13 20:08:35,223 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:35,223 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:35,223 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-12-13 20:08:35,223 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr17REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:35,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:35,224 INFO L85 PathProgramCache]: Analyzing trace with hash 1365553496, now seen corresponding path program 1 times [2022-12-13 20:08:35,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:35,224 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [708971648] [2022-12-13 20:08:35,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:35,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:35,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:35,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:35,338 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [708971648] [2022-12-13 20:08:35,338 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [708971648] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:35,338 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:35,339 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 20:08:35,339 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1090536132] [2022-12-13 20:08:35,339 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:35,339 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-13 20:08:35,339 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:35,340 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-13 20:08:35,340 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-13 20:08:35,340 INFO L87 Difference]: Start difference. First operand 44 states and 49 transitions. Second operand has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:35,383 INFO L93 Difference]: Finished difference Result 43 states and 48 transitions. [2022-12-13 20:08:35,384 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:35,384 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-12-13 20:08:35,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:35,385 INFO L225 Difference]: With dead ends: 43 [2022-12-13 20:08:35,385 INFO L226 Difference]: Without dead ends: 43 [2022-12-13 20:08:35,385 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:35,386 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 56 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:35,386 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 38 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:35,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2022-12-13 20:08:35,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2022-12-13 20:08:35,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 41 states have internal predecessors, (44), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:35,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 48 transitions. [2022-12-13 20:08:35,390 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 48 transitions. Word has length 15 [2022-12-13 20:08:35,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:35,391 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 48 transitions. [2022-12-13 20:08:35,391 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.0) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,391 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 48 transitions. [2022-12-13 20:08:35,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-12-13 20:08:35,391 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:35,392 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:35,392 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-12-13 20:08:35,392 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:35,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:35,392 INFO L85 PathProgramCache]: Analyzing trace with hash -1963083303, now seen corresponding path program 1 times [2022-12-13 20:08:35,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:35,393 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020401904] [2022-12-13 20:08:35,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:35,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:35,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:35,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:35,518 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020401904] [2022-12-13 20:08:35,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020401904] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:35,519 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:35,519 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 20:08:35,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077595406] [2022-12-13 20:08:35,519 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:35,519 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-13 20:08:35,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:35,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-13 20:08:35,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-13 20:08:35,520 INFO L87 Difference]: Start difference. First operand 43 states and 48 transitions. Second operand has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:35,583 INFO L93 Difference]: Finished difference Result 69 states and 79 transitions. [2022-12-13 20:08:35,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:35,583 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-12-13 20:08:35,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:35,584 INFO L225 Difference]: With dead ends: 69 [2022-12-13 20:08:35,584 INFO L226 Difference]: Without dead ends: 69 [2022-12-13 20:08:35,584 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:35,585 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 77 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 53 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:35,585 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 54 Invalid, 53 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:35,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-12-13 20:08:35,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 46. [2022-12-13 20:08:35,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 37 states have (on average 1.2972972972972974) internal successors, (48), 44 states have internal predecessors, (48), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:35,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 52 transitions. [2022-12-13 20:08:35,589 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 52 transitions. Word has length 17 [2022-12-13 20:08:35,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:35,589 INFO L495 AbstractCegarLoop]: Abstraction has 46 states and 52 transitions. [2022-12-13 20:08:35,590 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,590 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 52 transitions. [2022-12-13 20:08:35,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-12-13 20:08:35,590 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:35,591 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:35,591 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-12-13 20:08:35,591 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr20REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:35,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:35,591 INFO L85 PathProgramCache]: Analyzing trace with hash -58695891, now seen corresponding path program 1 times [2022-12-13 20:08:35,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:35,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979104828] [2022-12-13 20:08:35,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:35,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:35,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:35,646 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:35,646 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979104828] [2022-12-13 20:08:35,646 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1979104828] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:35,646 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:35,646 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-12-13 20:08:35,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258814416] [2022-12-13 20:08:35,647 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:35,647 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-13 20:08:35,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:35,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 20:08:35,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:35,648 INFO L87 Difference]: Start difference. First operand 46 states and 52 transitions. Second operand has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:35,702 INFO L93 Difference]: Finished difference Result 44 states and 50 transitions. [2022-12-13 20:08:35,703 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-12-13 20:08:35,703 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-12-13 20:08:35,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:35,704 INFO L225 Difference]: With dead ends: 44 [2022-12-13 20:08:35,704 INFO L226 Difference]: Without dead ends: 44 [2022-12-13 20:08:35,704 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-12-13 20:08:35,705 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 70 mSDsluCounter, 20 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:35,705 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [70 Valid, 47 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:35,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-12-13 20:08:35,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2022-12-13 20:08:35,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 37 states have (on average 1.2432432432432432) internal successors, (46), 42 states have internal predecessors, (46), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:35,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 50 transitions. [2022-12-13 20:08:35,708 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 50 transitions. Word has length 21 [2022-12-13 20:08:35,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:35,709 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 50 transitions. [2022-12-13 20:08:35,709 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 5.25) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,709 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 50 transitions. [2022-12-13 20:08:35,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-12-13 20:08:35,709 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:35,709 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:35,709 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-12-13 20:08:35,709 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:35,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:35,710 INFO L85 PathProgramCache]: Analyzing trace with hash -58695890, now seen corresponding path program 1 times [2022-12-13 20:08:35,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:35,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298796499] [2022-12-13 20:08:35,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:35,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:35,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:35,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:35,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298796499] [2022-12-13 20:08:35,762 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1298796499] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:35,762 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:35,762 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 20:08:35,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1292646666] [2022-12-13 20:08:35,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:35,763 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-13 20:08:35,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:35,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 20:08:35,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:35,763 INFO L87 Difference]: Start difference. First operand 44 states and 50 transitions. Second operand has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:35,791 INFO L93 Difference]: Finished difference Result 64 states and 73 transitions. [2022-12-13 20:08:35,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:35,791 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-12-13 20:08:35,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:35,792 INFO L225 Difference]: With dead ends: 64 [2022-12-13 20:08:35,792 INFO L226 Difference]: Without dead ends: 64 [2022-12-13 20:08:35,792 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-12-13 20:08:35,792 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 37 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 171 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:35,793 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 171 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:35,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-12-13 20:08:35,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 47. [2022-12-13 20:08:35,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 40 states have (on average 1.225) internal successors, (49), 45 states have internal predecessors, (49), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:35,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 53 transitions. [2022-12-13 20:08:35,795 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 53 transitions. Word has length 21 [2022-12-13 20:08:35,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:35,795 INFO L495 AbstractCegarLoop]: Abstraction has 47 states and 53 transitions. [2022-12-13 20:08:35,795 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:35,796 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 53 transitions. [2022-12-13 20:08:35,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-12-13 20:08:35,796 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:35,796 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:35,796 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-12-13 20:08:35,796 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:35,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:35,797 INFO L85 PathProgramCache]: Analyzing trace with hash -309999949, now seen corresponding path program 1 times [2022-12-13 20:08:35,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:35,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046452970] [2022-12-13 20:08:35,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:35,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:35,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,917 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:35,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:35,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046452970] [2022-12-13 20:08:35,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1046452970] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:35,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [744103701] [2022-12-13 20:08:35,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:35,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:35,918 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:35,919 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:35,921 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-12-13 20:08:35,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:35,977 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 18 conjunts are in the unsatisfiable core [2022-12-13 20:08:35,982 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:36,144 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:36,144 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:36,298 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-13 20:08:36,299 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-12-13 20:08:36,343 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:36,343 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [744103701] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:36,343 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:36,343 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6, 6] total 13 [2022-12-13 20:08:36,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294566081] [2022-12-13 20:08:36,343 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:36,344 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-12-13 20:08:36,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:36,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-12-13 20:08:36,344 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2022-12-13 20:08:36,345 INFO L87 Difference]: Start difference. First operand 47 states and 53 transitions. Second operand has 14 states, 13 states have (on average 4.6923076923076925) internal successors, (61), 14 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:36,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:36,582 INFO L93 Difference]: Finished difference Result 111 states and 130 transitions. [2022-12-13 20:08:36,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-12-13 20:08:36,583 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 4.6923076923076925) internal successors, (61), 14 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-12-13 20:08:36,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:36,584 INFO L225 Difference]: With dead ends: 111 [2022-12-13 20:08:36,584 INFO L226 Difference]: Without dead ends: 111 [2022-12-13 20:08:36,584 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2022-12-13 20:08:36,585 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 417 mSDsluCounter, 104 mSDsCounter, 0 mSdLazyCounter, 182 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 417 SdHoareTripleChecker+Valid, 148 SdHoareTripleChecker+Invalid, 219 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 182 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:36,585 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [417 Valid, 148 Invalid, 219 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 182 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-13 20:08:36,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-12-13 20:08:36,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 57. [2022-12-13 20:08:36,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 50 states have (on average 1.22) internal successors, (61), 55 states have internal predecessors, (61), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:36,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 65 transitions. [2022-12-13 20:08:36,591 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 65 transitions. Word has length 22 [2022-12-13 20:08:36,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:36,591 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 65 transitions. [2022-12-13 20:08:36,591 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 4.6923076923076925) internal successors, (61), 14 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:36,592 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 65 transitions. [2022-12-13 20:08:36,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-12-13 20:08:36,592 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:36,592 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:36,599 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-12-13 20:08:36,793 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-12-13 20:08:36,794 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr21REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:36,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:36,796 INFO L85 PathProgramCache]: Analyzing trace with hash -612311662, now seen corresponding path program 1 times [2022-12-13 20:08:36,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:36,796 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173325191] [2022-12-13 20:08:36,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:36,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:36,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:36,998 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-12-13 20:08:37,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:37,002 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:37,002 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173325191] [2022-12-13 20:08:37,002 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1173325191] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:37,002 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:37,002 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 20:08:37,003 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706751520] [2022-12-13 20:08:37,003 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:37,003 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-13 20:08:37,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:37,004 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-13 20:08:37,004 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-13 20:08:37,004 INFO L87 Difference]: Start difference. First operand 57 states and 65 transitions. Second operand has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:37,045 INFO L93 Difference]: Finished difference Result 56 states and 64 transitions. [2022-12-13 20:08:37,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:37,045 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-12-13 20:08:37,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:37,046 INFO L225 Difference]: With dead ends: 56 [2022-12-13 20:08:37,046 INFO L226 Difference]: Without dead ends: 56 [2022-12-13 20:08:37,046 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:37,047 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 32 mSDsluCounter, 15 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 44 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:37,047 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 44 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:37,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-12-13 20:08:37,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2022-12-13 20:08:37,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 50 states have (on average 1.2) internal successors, (60), 54 states have internal predecessors, (60), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:37,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 64 transitions. [2022-12-13 20:08:37,050 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 64 transitions. Word has length 24 [2022-12-13 20:08:37,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:37,050 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 64 transitions. [2022-12-13 20:08:37,051 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,051 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 64 transitions. [2022-12-13 20:08:37,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-12-13 20:08:37,051 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:37,051 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:37,051 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-12-13 20:08:37,052 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:37,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:37,052 INFO L85 PathProgramCache]: Analyzing trace with hash -20987021, now seen corresponding path program 1 times [2022-12-13 20:08:37,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:37,052 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092705494] [2022-12-13 20:08:37,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:37,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:37,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,178 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-12-13 20:08:37,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:37,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:37,181 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1092705494] [2022-12-13 20:08:37,181 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1092705494] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:37,182 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:37,182 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 20:08:37,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279667624] [2022-12-13 20:08:37,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:37,182 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-13 20:08:37,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:37,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-13 20:08:37,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-12-13 20:08:37,183 INFO L87 Difference]: Start difference. First operand 56 states and 64 transitions. Second operand has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:37,226 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-12-13 20:08:37,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:37,226 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-12-13 20:08:37,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:37,227 INFO L225 Difference]: With dead ends: 68 [2022-12-13 20:08:37,227 INFO L226 Difference]: Without dead ends: 68 [2022-12-13 20:08:37,227 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:37,228 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 38 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 49 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:37,228 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 49 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:37,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2022-12-13 20:08:37,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 59. [2022-12-13 20:08:37,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 53 states have (on average 1.2075471698113207) internal successors, (64), 57 states have internal predecessors, (64), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:37,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 68 transitions. [2022-12-13 20:08:37,232 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 68 transitions. Word has length 26 [2022-12-13 20:08:37,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:37,232 INFO L495 AbstractCegarLoop]: Abstraction has 59 states and 68 transitions. [2022-12-13 20:08:37,232 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,232 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 68 transitions. [2022-12-13 20:08:37,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-12-13 20:08:37,233 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:37,233 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:37,233 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-12-13 20:08:37,233 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:37,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:37,234 INFO L85 PathProgramCache]: Analyzing trace with hash 1184799620, now seen corresponding path program 1 times [2022-12-13 20:08:37,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:37,234 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007954422] [2022-12-13 20:08:37,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:37,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:37,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,279 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-12-13 20:08:37,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:37,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:37,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2007954422] [2022-12-13 20:08:37,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2007954422] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:37,282 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:37,282 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 20:08:37,282 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744465880] [2022-12-13 20:08:37,282 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:37,283 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-13 20:08:37,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:37,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 20:08:37,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:37,283 INFO L87 Difference]: Start difference. First operand 59 states and 68 transitions. Second operand has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:37,303 INFO L93 Difference]: Finished difference Result 67 states and 76 transitions. [2022-12-13 20:08:37,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:37,304 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-12-13 20:08:37,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:37,304 INFO L225 Difference]: With dead ends: 67 [2022-12-13 20:08:37,304 INFO L226 Difference]: Without dead ends: 67 [2022-12-13 20:08:37,305 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-12-13 20:08:37,305 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 11 mSDsluCounter, 125 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 169 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:37,305 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 169 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:37,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-12-13 20:08:37,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 62. [2022-12-13 20:08:37,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 56 states have (on average 1.1964285714285714) internal successors, (67), 60 states have internal predecessors, (67), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:37,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 71 transitions. [2022-12-13 20:08:37,309 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 71 transitions. Word has length 30 [2022-12-13 20:08:37,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:37,309 INFO L495 AbstractCegarLoop]: Abstraction has 62 states and 71 transitions. [2022-12-13 20:08:37,309 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,309 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 71 transitions. [2022-12-13 20:08:37,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-12-13 20:08:37,310 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:37,310 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:37,310 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-12-13 20:08:37,310 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:37,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:37,311 INFO L85 PathProgramCache]: Analyzing trace with hash -416344648, now seen corresponding path program 1 times [2022-12-13 20:08:37,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:37,311 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [954530083] [2022-12-13 20:08:37,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:37,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:37,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,480 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-12-13 20:08:37,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,483 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:37,484 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:37,484 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [954530083] [2022-12-13 20:08:37,484 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [954530083] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:37,484 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:37,484 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-12-13 20:08:37,484 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106525702] [2022-12-13 20:08:37,484 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:37,485 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-12-13 20:08:37,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:37,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-12-13 20:08:37,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-12-13 20:08:37,486 INFO L87 Difference]: Start difference. First operand 62 states and 71 transitions. Second operand has 7 states, 7 states have (on average 4.142857142857143) internal successors, (29), 7 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:37,592 INFO L93 Difference]: Finished difference Result 73 states and 83 transitions. [2022-12-13 20:08:37,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-12-13 20:08:37,592 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.142857142857143) internal successors, (29), 7 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-12-13 20:08:37,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:37,593 INFO L225 Difference]: With dead ends: 73 [2022-12-13 20:08:37,593 INFO L226 Difference]: Without dead ends: 73 [2022-12-13 20:08:37,593 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2022-12-13 20:08:37,594 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 27 mSDsluCounter, 134 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 175 SdHoareTripleChecker+Invalid, 115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:37,594 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 175 Invalid, 115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 111 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-13 20:08:37,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-12-13 20:08:37,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 66. [2022-12-13 20:08:37,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 59 states have (on average 1.1864406779661016) internal successors, (70), 63 states have internal predecessors, (70), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-12-13 20:08:37,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 76 transitions. [2022-12-13 20:08:37,597 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 76 transitions. Word has length 31 [2022-12-13 20:08:37,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:37,598 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 76 transitions. [2022-12-13 20:08:37,598 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 4.142857142857143) internal successors, (29), 7 states have internal predecessors, (29), 1 states have call successors, (1), 1 states have call predecessors, (1), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-12-13 20:08:37,598 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 76 transitions. [2022-12-13 20:08:37,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-12-13 20:08:37,599 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:37,599 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:37,599 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-12-13 20:08:37,599 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:37,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:37,600 INFO L85 PathProgramCache]: Analyzing trace with hash 241915192, now seen corresponding path program 1 times [2022-12-13 20:08:37,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:37,600 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788895199] [2022-12-13 20:08:37,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:37,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:37,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,812 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 19 [2022-12-13 20:08:37,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,814 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 28 [2022-12-13 20:08:37,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:37,819 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-12-13 20:08:37,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:37,820 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788895199] [2022-12-13 20:08:37,820 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788895199] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:37,820 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 20:08:37,820 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 20:08:37,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986630099] [2022-12-13 20:08:37,820 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:37,820 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-12-13 20:08:37,821 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:37,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 20:08:37,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 20:08:37,821 INFO L87 Difference]: Start difference. First operand 66 states and 76 transitions. Second operand has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:37,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:37,876 INFO L93 Difference]: Finished difference Result 65 states and 73 transitions. [2022-12-13 20:08:37,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 20:08:37,876 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 33 [2022-12-13 20:08:37,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:37,877 INFO L225 Difference]: With dead ends: 65 [2022-12-13 20:08:37,877 INFO L226 Difference]: Without dead ends: 58 [2022-12-13 20:08:37,877 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-12-13 20:08:37,877 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 27 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:37,878 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 88 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:37,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2022-12-13 20:08:37,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 56. [2022-12-13 20:08:37,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 50 states have (on average 1.18) internal successors, (59), 54 states have internal predecessors, (59), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:37,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 63 transitions. [2022-12-13 20:08:37,880 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 63 transitions. Word has length 33 [2022-12-13 20:08:37,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:37,880 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 63 transitions. [2022-12-13 20:08:37,880 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.6) internal successors, (28), 5 states have internal predecessors, (28), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:37,880 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 63 transitions. [2022-12-13 20:08:37,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-12-13 20:08:37,880 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:37,880 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:37,880 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-12-13 20:08:37,881 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:37,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:37,881 INFO L85 PathProgramCache]: Analyzing trace with hash 701429363, now seen corresponding path program 2 times [2022-12-13 20:08:37,881 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:37,881 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126653694] [2022-12-13 20:08:37,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:37,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:37,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:38,163 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 20:08:38,164 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:38,164 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126653694] [2022-12-13 20:08:38,164 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [126653694] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:38,164 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1384374752] [2022-12-13 20:08:38,164 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 20:08:38,164 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:38,164 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:38,165 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:38,166 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-12-13 20:08:38,223 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-12-13 20:08:38,223 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 20:08:38,224 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 5 conjunts are in the unsatisfiable core [2022-12-13 20:08:38,226 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:38,246 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-12-13 20:08:38,247 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-12-13 20:08:38,247 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1384374752] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 20:08:38,247 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-12-13 20:08:38,247 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [9] total 11 [2022-12-13 20:08:38,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896489130] [2022-12-13 20:08:38,247 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 20:08:38,248 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-12-13 20:08:38,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:38,248 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-12-13 20:08:38,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2022-12-13 20:08:38,248 INFO L87 Difference]: Start difference. First operand 56 states and 63 transitions. Second operand has 4 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:38,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:38,259 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2022-12-13 20:08:38,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-12-13 20:08:38,259 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 32 [2022-12-13 20:08:38,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:38,260 INFO L225 Difference]: With dead ends: 57 [2022-12-13 20:08:38,260 INFO L226 Difference]: Without dead ends: 57 [2022-12-13 20:08:38,260 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2022-12-13 20:08:38,260 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 37 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:38,261 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 81 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:38,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2022-12-13 20:08:38,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2022-12-13 20:08:38,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 51 states have (on average 1.1764705882352942) internal successors, (60), 55 states have internal predecessors, (60), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:38,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 64 transitions. [2022-12-13 20:08:38,263 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 64 transitions. Word has length 32 [2022-12-13 20:08:38,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:38,263 INFO L495 AbstractCegarLoop]: Abstraction has 57 states and 64 transitions. [2022-12-13 20:08:38,264 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.0) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:38,264 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 64 transitions. [2022-12-13 20:08:38,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-12-13 20:08:38,264 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:38,264 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:38,270 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-12-13 20:08:38,465 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-12-13 20:08:38,466 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr19REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:38,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:38,466 INFO L85 PathProgramCache]: Analyzing trace with hash 1203352596, now seen corresponding path program 1 times [2022-12-13 20:08:38,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:38,466 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533584461] [2022-12-13 20:08:38,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:38,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:38,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:38,885 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 10 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:38,886 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:38,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1533584461] [2022-12-13 20:08:38,886 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1533584461] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:38,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [864487379] [2022-12-13 20:08:38,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:38,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:38,886 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:38,887 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:38,888 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-12-13 20:08:38,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:38,947 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 33 conjunts are in the unsatisfiable core [2022-12-13 20:08:38,950 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:38,973 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-13 20:08:38,991 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:38,991 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:39,001 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:39,001 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:39,012 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:39,012 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:39,020 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:39,021 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:39,031 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:39,031 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:39,041 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:39,042 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:39,200 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-13 20:08:39,214 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:39,214 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:39,290 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:39,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [864487379] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:39,290 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:39,290 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 17 [2022-12-13 20:08:39,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [791645057] [2022-12-13 20:08:39,291 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:39,291 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-12-13 20:08:39,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:39,291 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-12-13 20:08:39,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2022-12-13 20:08:39,292 INFO L87 Difference]: Start difference. First operand 57 states and 64 transitions. Second operand has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:39,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:39,553 INFO L93 Difference]: Finished difference Result 97 states and 111 transitions. [2022-12-13 20:08:39,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-12-13 20:08:39,553 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-12-13 20:08:39,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:39,554 INFO L225 Difference]: With dead ends: 97 [2022-12-13 20:08:39,554 INFO L226 Difference]: Without dead ends: 97 [2022-12-13 20:08:39,555 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 60 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=170, Invalid=480, Unknown=0, NotChecked=0, Total=650 [2022-12-13 20:08:39,555 INFO L413 NwaCegarLoop]: 68 mSDtfsCounter, 125 mSDsluCounter, 333 mSDsCounter, 0 mSdLazyCounter, 300 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 401 SdHoareTripleChecker+Invalid, 323 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:39,556 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [125 Valid, 401 Invalid, 323 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 300 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-12-13 20:08:39,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-12-13 20:08:39,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 55. [2022-12-13 20:08:39,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 50 states have (on average 1.14) internal successors, (57), 53 states have internal predecessors, (57), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:39,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 61 transitions. [2022-12-13 20:08:39,558 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 61 transitions. Word has length 33 [2022-12-13 20:08:39,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:39,558 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 61 transitions. [2022-12-13 20:08:39,558 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 4.117647058823529) internal successors, (70), 17 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:39,558 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 61 transitions. [2022-12-13 20:08:39,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-12-13 20:08:39,558 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:39,558 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:39,563 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-12-13 20:08:39,759 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-12-13 20:08:39,759 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:39,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:39,759 INFO L85 PathProgramCache]: Analyzing trace with hash -149943807, now seen corresponding path program 1 times [2022-12-13 20:08:39,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:39,760 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252445204] [2022-12-13 20:08:39,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:39,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:39,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:40,025 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-12-13 20:08:40,025 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:40,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252445204] [2022-12-13 20:08:40,025 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [252445204] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:40,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [723313586] [2022-12-13 20:08:40,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:40,026 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:40,026 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:40,027 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:40,027 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-12-13 20:08:40,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:40,084 INFO L263 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 18 conjunts are in the unsatisfiable core [2022-12-13 20:08:40,086 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:40,248 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-13 20:08:40,248 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:40,413 INFO L321 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-12-13 20:08:40,414 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2022-12-13 20:08:40,449 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-13 20:08:40,449 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [723313586] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:40,449 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:40,449 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 18 [2022-12-13 20:08:40,449 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [432337764] [2022-12-13 20:08:40,449 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:40,450 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-12-13 20:08:40,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:40,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-12-13 20:08:40,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2022-12-13 20:08:40,450 INFO L87 Difference]: Start difference. First operand 55 states and 61 transitions. Second operand has 18 states, 18 states have (on average 5.333333333333333) internal successors, (96), 18 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:40,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:40,749 INFO L93 Difference]: Finished difference Result 79 states and 88 transitions. [2022-12-13 20:08:40,750 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-12-13 20:08:40,750 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 5.333333333333333) internal successors, (96), 18 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-12-13 20:08:40,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:40,750 INFO L225 Difference]: With dead ends: 79 [2022-12-13 20:08:40,750 INFO L226 Difference]: Without dead ends: 79 [2022-12-13 20:08:40,751 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=168, Invalid=588, Unknown=0, NotChecked=0, Total=756 [2022-12-13 20:08:40,751 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 192 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 217 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 192 SdHoareTripleChecker+Valid, 126 SdHoareTripleChecker+Invalid, 234 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 217 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:40,752 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [192 Valid, 126 Invalid, 234 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 217 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-13 20:08:40,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2022-12-13 20:08:40,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 65. [2022-12-13 20:08:40,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.1333333333333333) internal successors, (68), 63 states have internal predecessors, (68), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:40,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 72 transitions. [2022-12-13 20:08:40,754 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 72 transitions. Word has length 34 [2022-12-13 20:08:40,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:40,755 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 72 transitions. [2022-12-13 20:08:40,755 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 5.333333333333333) internal successors, (96), 18 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:40,755 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 72 transitions. [2022-12-13 20:08:40,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-12-13 20:08:40,755 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:40,755 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:40,760 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-12-13 20:08:40,956 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-12-13 20:08:40,957 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:40,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:40,958 INFO L85 PathProgramCache]: Analyzing trace with hash 1336889422, now seen corresponding path program 1 times [2022-12-13 20:08:40,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:40,959 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240906474] [2022-12-13 20:08:40,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:40,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:40,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:41,311 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-12-13 20:08:41,311 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:41,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240906474] [2022-12-13 20:08:41,311 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1240906474] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:41,311 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2070719614] [2022-12-13 20:08:41,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:41,311 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:41,312 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:41,312 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:41,313 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-12-13 20:08:41,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:41,379 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 29 conjunts are in the unsatisfiable core [2022-12-13 20:08:41,381 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:41,400 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-12-13 20:08:41,559 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-13 20:08:41,573 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:41,574 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:41,705 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:41,705 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2070719614] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:41,705 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:41,705 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 9] total 24 [2022-12-13 20:08:41,705 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [389260773] [2022-12-13 20:08:41,705 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:41,705 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-12-13 20:08:41,705 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:41,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-12-13 20:08:41,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=469, Unknown=0, NotChecked=0, Total=552 [2022-12-13 20:08:41,706 INFO L87 Difference]: Start difference. First operand 65 states and 72 transitions. Second operand has 24 states, 24 states have (on average 4.583333333333333) internal successors, (110), 24 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:42,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:42,141 INFO L93 Difference]: Finished difference Result 65 states and 70 transitions. [2022-12-13 20:08:42,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-12-13 20:08:42,142 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 4.583333333333333) internal successors, (110), 24 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2022-12-13 20:08:42,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:42,142 INFO L225 Difference]: With dead ends: 65 [2022-12-13 20:08:42,142 INFO L226 Difference]: Without dead ends: 65 [2022-12-13 20:08:42,143 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=293, Invalid=1039, Unknown=0, NotChecked=0, Total=1332 [2022-12-13 20:08:42,144 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 144 mSDsluCounter, 192 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 219 SdHoareTripleChecker+Invalid, 282 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:42,144 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [144 Valid, 219 Invalid, 282 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-13 20:08:42,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2022-12-13 20:08:42,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2022-12-13 20:08:42,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.1) internal successors, (66), 63 states have internal predecessors, (66), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:42,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 70 transitions. [2022-12-13 20:08:42,146 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 70 transitions. Word has length 43 [2022-12-13 20:08:42,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:42,146 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 70 transitions. [2022-12-13 20:08:42,146 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 4.583333333333333) internal successors, (110), 24 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:42,146 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 70 transitions. [2022-12-13 20:08:42,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-12-13 20:08:42,146 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:42,146 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:42,151 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-12-13 20:08:42,347 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:42,347 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:42,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:42,348 INFO L85 PathProgramCache]: Analyzing trace with hash -990509317, now seen corresponding path program 2 times [2022-12-13 20:08:42,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:42,348 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666450816] [2022-12-13 20:08:42,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:42,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:42,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:42,665 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-12-13 20:08:42,665 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:42,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [666450816] [2022-12-13 20:08:42,665 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [666450816] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:42,665 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1478693222] [2022-12-13 20:08:42,666 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 20:08:42,666 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:42,666 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:42,667 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:42,667 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-12-13 20:08:42,759 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-12-13 20:08:42,759 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 20:08:42,761 INFO L263 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 31 conjunts are in the unsatisfiable core [2022-12-13 20:08:42,763 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:42,781 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-12-13 20:08:42,996 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-13 20:08:43,010 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 7 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:43,010 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:43,174 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 19 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:43,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1478693222] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:43,174 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:43,174 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 11] total 27 [2022-12-13 20:08:43,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [686638187] [2022-12-13 20:08:43,174 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:43,174 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-12-13 20:08:43,174 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:43,175 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-12-13 20:08:43,175 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=125, Invalid=577, Unknown=0, NotChecked=0, Total=702 [2022-12-13 20:08:43,175 INFO L87 Difference]: Start difference. First operand 65 states and 70 transitions. Second operand has 27 states, 27 states have (on average 4.518518518518518) internal successors, (122), 27 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:43,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:43,625 INFO L93 Difference]: Finished difference Result 67 states and 71 transitions. [2022-12-13 20:08:43,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-12-13 20:08:43,625 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 4.518518518518518) internal successors, (122), 27 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2022-12-13 20:08:43,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:43,626 INFO L225 Difference]: With dead ends: 67 [2022-12-13 20:08:43,626 INFO L226 Difference]: Without dead ends: 67 [2022-12-13 20:08:43,627 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 94 SyntacticMatches, 4 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 432 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=421, Invalid=1219, Unknown=0, NotChecked=0, Total=1640 [2022-12-13 20:08:43,627 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 173 mSDsluCounter, 154 mSDsCounter, 0 mSdLazyCounter, 269 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 173 SdHoareTripleChecker+Valid, 182 SdHoareTripleChecker+Invalid, 289 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 269 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:43,628 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [173 Valid, 182 Invalid, 289 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 269 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-13 20:08:43,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-12-13 20:08:43,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 65. [2022-12-13 20:08:43,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.0833333333333333) internal successors, (65), 63 states have internal predecessors, (65), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:43,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 69 transitions. [2022-12-13 20:08:43,629 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 69 transitions. Word has length 53 [2022-12-13 20:08:43,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:43,629 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 69 transitions. [2022-12-13 20:08:43,630 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 4.518518518518518) internal successors, (122), 27 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:43,630 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 69 transitions. [2022-12-13 20:08:43,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-12-13 20:08:43,630 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:43,630 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:43,634 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-12-13 20:08:43,831 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:43,832 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr23REQUIRES_VIOLATIONMEMORY_DEREFERENCE === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:43,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:43,833 INFO L85 PathProgramCache]: Analyzing trace with hash 868555041, now seen corresponding path program 2 times [2022-12-13 20:08:43,833 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:43,834 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084465897] [2022-12-13 20:08:43,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:43,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:43,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:44,113 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 10 proven. 35 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-12-13 20:08:44,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:44,113 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084465897] [2022-12-13 20:08:44,113 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2084465897] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:44,114 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [177591027] [2022-12-13 20:08:44,114 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 20:08:44,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:44,114 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:44,115 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:44,115 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-12-13 20:08:44,197 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-12-13 20:08:44,197 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 20:08:44,199 INFO L263 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 31 conjunts are in the unsatisfiable core [2022-12-13 20:08:44,202 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:44,219 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-12-13 20:08:44,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:44,239 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:44,246 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:44,246 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:44,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:44,254 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:44,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:44,262 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:44,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:44,270 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:44,278 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-12-13 20:08:44,278 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-12-13 20:08:44,425 INFO L350 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-12-13 20:08:44,436 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-12-13 20:08:44,436 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:44,519 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 21 proven. 3 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-12-13 20:08:44,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [177591027] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:44,519 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:44,519 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 9, 8] total 23 [2022-12-13 20:08:44,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289912738] [2022-12-13 20:08:44,519 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:44,520 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-12-13 20:08:44,520 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:44,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-12-13 20:08:44,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=424, Unknown=0, NotChecked=0, Total=506 [2022-12-13 20:08:44,520 INFO L87 Difference]: Start difference. First operand 65 states and 69 transitions. Second operand has 23 states, 23 states have (on average 5.0) internal successors, (115), 23 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:44,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:44,828 INFO L93 Difference]: Finished difference Result 63 states and 66 transitions. [2022-12-13 20:08:44,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-12-13 20:08:44,829 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 5.0) internal successors, (115), 23 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-12-13 20:08:44,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:44,829 INFO L225 Difference]: With dead ends: 63 [2022-12-13 20:08:44,829 INFO L226 Difference]: Without dead ends: 63 [2022-12-13 20:08:44,830 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 96 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 368 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=266, Invalid=1140, Unknown=0, NotChecked=0, Total=1406 [2022-12-13 20:08:44,830 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 96 mSDsluCounter, 232 mSDsCounter, 0 mSdLazyCounter, 370 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 96 SdHoareTripleChecker+Valid, 258 SdHoareTripleChecker+Invalid, 382 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 370 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:44,831 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [96 Valid, 258 Invalid, 382 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 370 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-13 20:08:44,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2022-12-13 20:08:44,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2022-12-13 20:08:44,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 59 states have (on average 1.0508474576271187) internal successors, (62), 61 states have internal predecessors, (62), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:44,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 66 transitions. [2022-12-13 20:08:44,833 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 66 transitions. Word has length 54 [2022-12-13 20:08:44,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:44,833 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 66 transitions. [2022-12-13 20:08:44,834 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 5.0) internal successors, (115), 23 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:44,834 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 66 transitions. [2022-12-13 20:08:44,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-12-13 20:08:44,834 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:44,834 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:44,839 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-12-13 20:08:45,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2022-12-13 20:08:45,036 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:45,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:45,037 INFO L85 PathProgramCache]: Analyzing trace with hash 679832114, now seen corresponding path program 3 times [2022-12-13 20:08:45,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:45,038 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245072902] [2022-12-13 20:08:45,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:45,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:45,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:45,178 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:45,179 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:45,179 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245072902] [2022-12-13 20:08:45,179 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245072902] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:45,179 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1603604340] [2022-12-13 20:08:45,179 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-13 20:08:45,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:45,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:45,180 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:45,181 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-12-13 20:08:45,423 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-12-13 20:08:45,423 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 20:08:45,424 INFO L263 TraceCheckSpWp]: Trace formula consists of 211 conjuncts, 8 conjunts are in the unsatisfiable core [2022-12-13 20:08:45,426 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:45,458 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:45,458 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:45,512 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:45,512 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1603604340] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:45,512 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:45,512 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9 [2022-12-13 20:08:45,512 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406677943] [2022-12-13 20:08:45,512 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:45,513 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-12-13 20:08:45,513 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:45,513 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-12-13 20:08:45,513 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2022-12-13 20:08:45,514 INFO L87 Difference]: Start difference. First operand 63 states and 66 transitions. Second operand has 9 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:45,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:45,594 INFO L93 Difference]: Finished difference Result 66 states and 69 transitions. [2022-12-13 20:08:45,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-12-13 20:08:45,595 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-12-13 20:08:45,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:45,595 INFO L225 Difference]: With dead ends: 66 [2022-12-13 20:08:45,595 INFO L226 Difference]: Without dead ends: 66 [2022-12-13 20:08:45,596 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=79, Unknown=0, NotChecked=0, Total=132 [2022-12-13 20:08:45,596 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 69 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:45,597 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [69 Valid, 90 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:45,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-12-13 20:08:45,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2022-12-13 20:08:45,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 64 states have internal predecessors, (65), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:45,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 69 transitions. [2022-12-13 20:08:45,599 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 69 transitions. Word has length 58 [2022-12-13 20:08:45,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:45,599 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 69 transitions. [2022-12-13 20:08:45,599 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 4.777777777777778) internal successors, (43), 9 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:45,600 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 69 transitions. [2022-12-13 20:08:45,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-12-13 20:08:45,600 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:45,600 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:45,606 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-12-13 20:08:45,800 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-12-13 20:08:45,801 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:45,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:45,801 INFO L85 PathProgramCache]: Analyzing trace with hash -220059533, now seen corresponding path program 4 times [2022-12-13 20:08:45,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:45,801 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317589561] [2022-12-13 20:08:45,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:45,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:45,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:45,960 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:45,961 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:45,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317589561] [2022-12-13 20:08:45,961 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1317589561] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:45,961 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727206174] [2022-12-13 20:08:45,961 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-13 20:08:45,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:45,961 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:45,962 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:45,963 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-12-13 20:08:46,295 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-13 20:08:46,295 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 20:08:46,296 INFO L263 TraceCheckSpWp]: Trace formula consists of 300 conjuncts, 13 conjunts are in the unsatisfiable core [2022-12-13 20:08:46,297 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:46,354 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:46,354 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:46,441 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:46,441 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1727206174] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:46,441 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:46,441 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 18 [2022-12-13 20:08:46,441 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1060748536] [2022-12-13 20:08:46,441 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:46,442 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-12-13 20:08:46,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:46,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-12-13 20:08:46,442 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=202, Unknown=0, NotChecked=0, Total=306 [2022-12-13 20:08:46,443 INFO L87 Difference]: Start difference. First operand 66 states and 69 transitions. Second operand has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 18 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:46,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:46,815 INFO L93 Difference]: Finished difference Result 72 states and 75 transitions. [2022-12-13 20:08:46,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-12-13 20:08:46,816 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 18 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-12-13 20:08:46,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:46,816 INFO L225 Difference]: With dead ends: 72 [2022-12-13 20:08:46,816 INFO L226 Difference]: Without dead ends: 72 [2022-12-13 20:08:46,817 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=174, Invalid=332, Unknown=0, NotChecked=0, Total=506 [2022-12-13 20:08:46,817 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 40 mSDsluCounter, 230 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 270 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:46,817 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 270 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 69 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-12-13 20:08:46,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-12-13 20:08:46,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2022-12-13 20:08:46,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 70 states have internal predecessors, (71), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:46,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 75 transitions. [2022-12-13 20:08:46,819 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 75 transitions. Word has length 61 [2022-12-13 20:08:46,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:46,819 INFO L495 AbstractCegarLoop]: Abstraction has 72 states and 75 transitions. [2022-12-13 20:08:46,819 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 2.888888888888889) internal successors, (52), 18 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:46,819 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 75 transitions. [2022-12-13 20:08:46,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2022-12-13 20:08:46,820 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:46,820 INFO L195 NwaCegarLoop]: trace histogram [10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:46,825 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-12-13 20:08:47,020 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-12-13 20:08:47,021 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:47,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:47,021 INFO L85 PathProgramCache]: Analyzing trace with hash -179470317, now seen corresponding path program 5 times [2022-12-13 20:08:47,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:47,021 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737142586] [2022-12-13 20:08:47,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:47,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:47,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:47,285 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:47,285 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:47,285 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737142586] [2022-12-13 20:08:47,285 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [737142586] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:47,285 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1782532080] [2022-12-13 20:08:47,285 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-12-13 20:08:47,286 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:47,286 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:47,287 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:47,288 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-12-13 20:08:48,087 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-12-13 20:08:48,088 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 20:08:48,091 INFO L263 TraceCheckSpWp]: Trace formula consists of 342 conjuncts, 25 conjunts are in the unsatisfiable core [2022-12-13 20:08:48,092 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:08:48,242 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:48,243 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:08:48,526 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:48,526 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1782532080] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:08:48,526 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:08:48,526 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 36 [2022-12-13 20:08:48,526 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087479708] [2022-12-13 20:08:48,526 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:08:48,527 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-12-13 20:08:48,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:08:48,527 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-12-13 20:08:48,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=362, Invalid=898, Unknown=0, NotChecked=0, Total=1260 [2022-12-13 20:08:48,528 INFO L87 Difference]: Start difference. First operand 72 states and 75 transitions. Second operand has 36 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 36 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:53,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:08:53,633 INFO L93 Difference]: Finished difference Result 84 states and 87 transitions. [2022-12-13 20:08:53,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-12-13 20:08:53,634 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 36 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2022-12-13 20:08:53,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:08:53,634 INFO L225 Difference]: With dead ends: 84 [2022-12-13 20:08:53,634 INFO L226 Difference]: Without dead ends: 84 [2022-12-13 20:08:53,635 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 493 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=648, Invalid=1514, Unknown=0, NotChecked=0, Total=2162 [2022-12-13 20:08:53,635 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 46 mSDsluCounter, 415 mSDsCounter, 0 mSdLazyCounter, 253 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 455 SdHoareTripleChecker+Invalid, 254 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 253 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:08:53,635 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 455 Invalid, 254 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 253 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-12-13 20:08:53,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-12-13 20:08:53,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2022-12-13 20:08:53,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 80 states have (on average 1.0375) internal successors, (83), 82 states have internal predecessors, (83), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:08:53,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 87 transitions. [2022-12-13 20:08:53,638 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 87 transitions. Word has length 67 [2022-12-13 20:08:53,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:08:53,638 INFO L495 AbstractCegarLoop]: Abstraction has 84 states and 87 transitions. [2022-12-13 20:08:53,638 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.9444444444444444) internal successors, (70), 36 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:08:53,638 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 87 transitions. [2022-12-13 20:08:53,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-12-13 20:08:53,639 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:08:53,639 INFO L195 NwaCegarLoop]: trace histogram [22, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:08:53,644 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2022-12-13 20:08:53,840 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-12-13 20:08:53,841 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:08:53,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:08:53,842 INFO L85 PathProgramCache]: Analyzing trace with hash -595228845, now seen corresponding path program 6 times [2022-12-13 20:08:53,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:08:53,842 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949713538] [2022-12-13 20:08:53,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:08:53,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:08:53,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:08:54,610 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:08:54,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:08:54,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949713538] [2022-12-13 20:08:54,610 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [949713538] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:08:54,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [751098574] [2022-12-13 20:08:54,611 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-12-13 20:08:54,611 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:08:54,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:08:54,612 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:08:54,612 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-12-13 20:09:17,406 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2022-12-13 20:09:17,406 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 20:09:17,420 INFO L263 TraceCheckSpWp]: Trace formula consists of 426 conjuncts, 62 conjunts are in the unsatisfiable core [2022-12-13 20:09:17,421 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:09:18,195 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:09:18,195 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:09:19,739 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:09:19,739 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [751098574] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:09:19,739 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:09:19,739 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26] total 72 [2022-12-13 20:09:19,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1101604161] [2022-12-13 20:09:19,739 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:09:19,740 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 72 states [2022-12-13 20:09:19,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:09:19,741 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2022-12-13 20:09:19,742 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1310, Invalid=3802, Unknown=0, NotChecked=0, Total=5112 [2022-12-13 20:09:19,742 INFO L87 Difference]: Start difference. First operand 84 states and 87 transitions. Second operand has 72 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 72 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:10:02,302 WARN L233 SmtUtils]: Spent 5.78s on a formula simplification. DAG size of input: 108 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 20:12:22,467 WARN L233 SmtUtils]: Spent 17.58s on a formula simplification. DAG size of input: 116 DAG size of output: 26 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 20:12:24,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 20:12:24,117 INFO L93 Difference]: Finished difference Result 108 states and 111 transitions. [2022-12-13 20:12:24,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-12-13 20:12:24,119 INFO L78 Accepts]: Start accepts. Automaton has has 72 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 72 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2022-12-13 20:12:24,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-12-13 20:12:24,119 INFO L225 Difference]: With dead ends: 108 [2022-12-13 20:12:24,119 INFO L226 Difference]: Without dead ends: 108 [2022-12-13 20:12:24,121 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 111 SyntacticMatches, 1 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2185 ImplicationChecksByTransitivity, 184.7s TimeCoverageRelationStatistics Valid=2491, Invalid=6621, Unknown=8, NotChecked=0, Total=9120 [2022-12-13 20:12:24,122 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 468 mSDsluCounter, 688 mSDsCounter, 0 mSdLazyCounter, 1024 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 728 SdHoareTripleChecker+Invalid, 1062 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 1024 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-12-13 20:12:24,122 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 728 Invalid, 1062 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 1024 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-12-13 20:12:24,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-12-13 20:12:24,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-12-13 20:12:24,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 106 states have internal predecessors, (107), 2 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-12-13 20:12:24,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 111 transitions. [2022-12-13 20:12:24,125 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 111 transitions. Word has length 79 [2022-12-13 20:12:24,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-12-13 20:12:24,125 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 111 transitions. [2022-12-13 20:12:24,125 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 72 states, 72 states have (on average 1.4722222222222223) internal successors, (106), 72 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:12:24,125 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 111 transitions. [2022-12-13 20:12:24,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2022-12-13 20:12:24,126 INFO L187 NwaCegarLoop]: Found error trace [2022-12-13 20:12:24,126 INFO L195 NwaCegarLoop]: trace histogram [46, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 20:12:24,135 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-12-13 20:12:24,327 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:12:24,328 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONMEMORY_LEAK === [ULTIMATE.startErr0ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr1ASSERT_VIOLATIONMEMORY_DEREFERENCE, ULTIMATE.startErr2REQUIRES_VIOLATIONMEMORY_DEREFERENCE (and 22 more)] === [2022-12-13 20:12:24,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 20:12:24,329 INFO L85 PathProgramCache]: Analyzing trace with hash 51574227, now seen corresponding path program 7 times [2022-12-13 20:12:24,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 20:12:24,329 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019055651] [2022-12-13 20:12:24,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 20:12:24,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 20:12:24,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:12:26,522 INFO L134 CoverageAnalysis]: Checked inductivity of 1123 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:12:26,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 20:12:26,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019055651] [2022-12-13 20:12:26,523 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2019055651] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 20:12:26,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1432098337] [2022-12-13 20:12:26,523 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-12-13 20:12:26,523 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 20:12:26,523 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 20:12:26,524 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 20:12:26,524 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_10fae4ce-bd25-4281-b1e5-4ba0d650ed40/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-12-13 20:12:27,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 20:12:27,100 INFO L263 TraceCheckSpWp]: Trace formula consists of 594 conjuncts, 97 conjunts are in the unsatisfiable core [2022-12-13 20:12:27,103 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 20:12:29,188 INFO L134 CoverageAnalysis]: Checked inductivity of 1123 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:12:29,188 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 20:12:33,657 INFO L134 CoverageAnalysis]: Checked inductivity of 1123 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-12-13 20:12:33,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1432098337] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 20:12:33,657 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 20:12:33,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50] total 144 [2022-12-13 20:12:33,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577739329] [2022-12-13 20:12:33,657 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 20:12:33,658 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 144 states [2022-12-13 20:12:33,658 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 20:12:33,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 144 interpolants. [2022-12-13 20:12:33,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4934, Invalid=15658, Unknown=0, NotChecked=0, Total=20592 [2022-12-13 20:12:33,662 INFO L87 Difference]: Start difference. First operand 108 states and 111 transitions. Second operand has 144 states, 144 states have (on average 1.2361111111111112) internal successors, (178), 144 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 20:13:43,634 WARN L233 SmtUtils]: Spent 16.40s on a formula simplification. DAG size of input: 194 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 20:14:51,126 WARN L233 SmtUtils]: Spent 17.57s on a formula simplification. DAG size of input: 190 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 20:16:07,814 WARN L233 SmtUtils]: Spent 19.98s on a formula simplification. DAG size of input: 186 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 20:17:14,729 WARN L233 SmtUtils]: Spent 12.26s on a formula simplification. DAG size of input: 182 DAG size of output: 14 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 20:17:16,747 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (<= |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 94) (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 42 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (<= 94 |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1|) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:17:18,763 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 41 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:17:20,774 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 40 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:17:22,792 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 39 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:17:24,804 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 37) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 38 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:22:57,557 WARN L233 SmtUtils]: Spent 2.46m on a formula simplification that was a NOOP. DAG size: 155 (called from [L 361] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-12-13 20:22:59,569 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-12-13 20:23:01,577 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-12-13 20:23:03,587 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-12-13 20:23:05,599 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-12-13 20:23:07,604 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-12-13 20:23:09,279 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.51s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-12-13 20:23:11,283 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-12-13 20:23:13,294 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 36 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:23:15,308 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 35 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:23:17,319 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 34 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:23:19,332 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ 33 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:23:21,343 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 32 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:23:23,352 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 31 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:23:25,366 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0) (< (mod (+ 30 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0))) is different from false [2022-12-13 20:23:27,378 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 29 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0))) is different from false [2022-12-13 20:23:29,391 WARN L837 $PredicateComparison]: unable to prove that (let ((.cse0 (mod |c_ULTIMATE.start_#Ultimate.C_memset_#amount#1| 4294967296))) (and (< (mod (+ 18 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 8 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 24) 4294967296) .cse0) (< (mod (+ 3 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 19 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 5 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 9 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 1) 4294967296) .cse0) (< (mod (+ 20 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 23 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 10) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 11) 4294967296) .cse0) (< (mod (+ 7 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 2 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 21 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 17) 4294967296) .cse0) (< (mod (+ 15 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 14 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 13) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 25) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 26) 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 28) 4294967296) .cse0) (< (mod (+ 12 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 16 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 6 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod (+ 22 |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1|) 4294967296) .cse0) (< (mod |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 4294967296) .cse0) (< (mod (+ |c_ULTIMATE.start_#Ultimate.C_memset_#t~loopctr17#1| 27) 4294967296) .cse0))) is different from false