./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 17:06:36,522 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 17:06:36,524 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 17:06:36,544 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 17:06:36,544 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 17:06:36,545 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 17:06:36,546 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 17:06:36,548 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 17:06:36,550 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 17:06:36,551 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 17:06:36,551 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 17:06:36,553 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 17:06:36,553 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 17:06:36,554 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 17:06:36,555 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 17:06:36,556 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 17:06:36,557 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 17:06:36,558 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 17:06:36,560 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 17:06:36,562 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 17:06:36,563 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 17:06:36,565 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 17:06:36,567 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 17:06:36,568 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 17:06:36,575 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 17:06:36,575 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 17:06:36,576 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 17:06:36,577 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 17:06:36,578 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 17:06:36,579 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 17:06:36,580 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 17:06:36,581 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 17:06:36,582 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 17:06:36,582 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 17:06:36,584 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 17:06:36,584 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 17:06:36,584 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 17:06:36,585 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 17:06:36,585 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 17:06:36,586 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 17:06:36,587 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 17:06:36,587 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-12-13 17:06:36,612 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 17:06:36,612 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 17:06:36,613 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 17:06:36,613 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 17:06:36,614 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 17:06:36,614 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 17:06:36,614 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 17:06:36,615 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 17:06:36,615 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 17:06:36,615 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 17:06:36,615 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 17:06:36,615 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 17:06:36,616 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 17:06:36,616 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 17:06:36,616 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 17:06:36,616 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 17:06:36,616 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 17:06:36,617 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 17:06:36,617 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 17:06:36,617 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 17:06:36,617 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 17:06:36,617 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 17:06:36,617 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 17:06:36,618 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 17:06:36,618 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 17:06:36,618 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 17:06:36,618 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 17:06:36,618 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 17:06:36,619 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 17:06:36,620 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf [2022-12-13 17:06:36,826 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 17:06:36,849 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 17:06:36,852 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 17:06:36,853 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 17:06:36,853 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 17:06:36,854 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2022-12-13 17:06:39,451 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 17:06:39,600 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 17:06:39,600 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2022-12-13 17:06:39,604 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/data/938eb43df/cd0e358fe7b947d2a5fe02434e16f0bc/FLAG7b43cf900 [2022-12-13 17:06:40,015 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/data/938eb43df/cd0e358fe7b947d2a5fe02434e16f0bc [2022-12-13 17:06:40,017 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 17:06:40,018 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 17:06:40,019 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 17:06:40,019 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 17:06:40,023 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 17:06:40,023 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,024 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47af51d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40, skipping insertion in model container [2022-12-13 17:06:40,024 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,030 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 17:06:40,038 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 17:06:40,136 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 17:06:40,140 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 17:06:40,151 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 17:06:40,164 INFO L208 MainTranslator]: Completed translation [2022-12-13 17:06:40,165 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40 WrapperNode [2022-12-13 17:06:40,165 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 17:06:40,166 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 17:06:40,166 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 17:06:40,166 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 17:06:40,171 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,176 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,188 INFO L138 Inliner]: procedures = 8, calls = 9, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 32 [2022-12-13 17:06:40,188 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 17:06:40,189 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 17:06:40,189 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 17:06:40,189 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 17:06:40,195 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,195 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,196 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,196 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,199 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,201 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,202 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,202 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,203 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 17:06:40,204 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 17:06:40,204 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 17:06:40,204 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 17:06:40,205 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (1/1) ... [2022-12-13 17:06:40,210 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:40,217 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:40,227 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:40,229 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 17:06:40,263 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-12-13 17:06:40,263 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 17:06:40,264 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 17:06:40,264 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-12-13 17:06:40,264 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-12-13 17:06:40,264 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-12-13 17:06:40,329 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 17:06:40,331 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 17:06:40,413 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 17:06:40,418 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 17:06:40,418 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-12-13 17:06:40,420 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 05:06:40 BoogieIcfgContainer [2022-12-13 17:06:40,420 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 17:06:40,421 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 17:06:40,421 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 17:06:40,425 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 17:06:40,425 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 17:06:40,426 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 05:06:40" (1/3) ... [2022-12-13 17:06:40,427 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@272e76e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 05:06:40, skipping insertion in model container [2022-12-13 17:06:40,427 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 17:06:40,427 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 05:06:40" (2/3) ... [2022-12-13 17:06:40,427 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@272e76e7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 05:06:40, skipping insertion in model container [2022-12-13 17:06:40,427 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 17:06:40,427 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 05:06:40" (3/3) ... [2022-12-13 17:06:40,429 INFO L332 chiAutomizerObserver]: Analyzing ICFG Arrays01-EquivalentConstantIndices-1.c [2022-12-13 17:06:40,480 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 17:06:40,480 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 17:06:40,480 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 17:06:40,481 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 17:06:40,481 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 17:06:40,481 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 17:06:40,481 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 17:06:40,481 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 17:06:40,485 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:40,502 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-12-13 17:06:40,502 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:40,502 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:40,507 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-12-13 17:06:40,507 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:40,507 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 17:06:40,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:40,509 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2022-12-13 17:06:40,509 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:40,509 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:40,509 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-12-13 17:06:40,509 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:40,516 INFO L748 eck$LassoCheckResult]: Stem: 7#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 8#L13-3true [2022-12-13 17:06:40,517 INFO L750 eck$LassoCheckResult]: Loop: 8#L13-3true assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 6#L13-2true main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 8#L13-3true [2022-12-13 17:06:40,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:40,523 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-12-13 17:06:40,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:40,532 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462174386] [2022-12-13 17:06:40,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:40,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:40,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:40,622 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:40,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:40,646 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:40,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:40,649 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-12-13 17:06:40,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:40,650 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324576482] [2022-12-13 17:06:40,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:40,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:40,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:40,661 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:40,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:40,670 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:40,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:40,672 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-12-13 17:06:40,672 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:40,672 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039898556] [2022-12-13 17:06:40,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:40,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:40,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:40,694 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:40,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:40,707 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:40,884 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 17:06:40,885 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 17:06:40,885 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 17:06:40,885 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 17:06:40,885 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-12-13 17:06:40,885 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:40,885 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 17:06:40,885 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 17:06:40,885 INFO L133 ssoRankerPreferences]: Filename of dumped script: Arrays01-EquivalentConstantIndices-1.c_Iteration1_Lasso [2022-12-13 17:06:40,885 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 17:06:40,886 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 17:06:40,898 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 17:06:40,906 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 17:06:40,976 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 17:06:40,978 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 17:06:40,981 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 17:06:40,983 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 17:06:40,985 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 17:06:41,075 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-12-13 17:06:41,079 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-12-13 17:06:41,080 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,080 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,081 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,083 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-12-13 17:06:41,084 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 17:06:41,094 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 17:06:41,095 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 17:06:41,095 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 17:06:41,095 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 17:06:41,099 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 17:06:41,099 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 17:06:41,104 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 17:06:41,107 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-12-13 17:06:41,108 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,108 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,109 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,110 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-12-13 17:06:41,111 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 17:06:41,121 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 17:06:41,122 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 17:06:41,122 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 17:06:41,122 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 17:06:41,125 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 17:06:41,125 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 17:06:41,130 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 17:06:41,132 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2022-12-13 17:06:41,133 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,133 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,134 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,135 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-12-13 17:06:41,136 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 17:06:41,147 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 17:06:41,147 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 17:06:41,147 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 17:06:41,147 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 17:06:41,150 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 17:06:41,150 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 17:06:41,154 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 17:06:41,157 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2022-12-13 17:06:41,158 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,158 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,159 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,160 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-12-13 17:06:41,161 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 17:06:41,172 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 17:06:41,172 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 17:06:41,172 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 17:06:41,172 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 17:06:41,175 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 17:06:41,175 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 17:06:41,179 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 17:06:41,181 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2022-12-13 17:06:41,182 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,182 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,183 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,183 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-12-13 17:06:41,185 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 17:06:41,195 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 17:06:41,195 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 17:06:41,195 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 17:06:41,196 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 17:06:41,196 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 17:06:41,196 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 17:06:41,196 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 17:06:41,198 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 17:06:41,201 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2022-12-13 17:06:41,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,202 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,203 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,204 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-12-13 17:06:41,205 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 17:06:41,216 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 17:06:41,216 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 17:06:41,216 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 17:06:41,216 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 17:06:41,216 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 17:06:41,217 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 17:06:41,217 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 17:06:41,219 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 17:06:41,221 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2022-12-13 17:06:41,222 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,222 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,223 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,224 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-12-13 17:06:41,225 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 17:06:41,236 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 17:06:41,236 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 17:06:41,236 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 17:06:41,236 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 17:06:41,242 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 17:06:41,242 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 17:06:41,251 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-12-13 17:06:41,274 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2022-12-13 17:06:41,274 INFO L444 ModelExtractionUtils]: 3 out of 13 variables were initially zero. Simplification set additionally 7 variables to zero. [2022-12-13 17:06:41,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 17:06:41,276 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,301 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,302 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-12-13 17:06:41,303 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-12-13 17:06:41,315 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-12-13 17:06:41,315 INFO L513 LassoAnalysis]: Proved termination. [2022-12-13 17:06:41,316 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2022-12-13 17:06:41,319 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2022-12-13 17:06:41,324 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2022-12-13 17:06:41,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:41,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:41,356 INFO L263 TraceCheckSpWp]: Trace formula consists of 23 conjuncts, 2 conjunts are in the unsatisfiable core [2022-12-13 17:06:41,357 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 17:06:41,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:41,369 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjunts are in the unsatisfiable core [2022-12-13 17:06:41,370 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 17:06:41,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:41,426 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-12-13 17:06:41,428 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:41,473 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 22 states and 31 transitions. Complement of second has 8 states. [2022-12-13 17:06:41,475 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-12-13 17:06:41,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:41,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 17 transitions. [2022-12-13 17:06:41,481 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 17 transitions. Stem has 2 letters. Loop has 2 letters. [2022-12-13 17:06:41,481 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 17:06:41,481 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 17 transitions. Stem has 4 letters. Loop has 2 letters. [2022-12-13 17:06:41,482 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 17:06:41,482 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 17 transitions. Stem has 2 letters. Loop has 4 letters. [2022-12-13 17:06:41,482 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 17:06:41,483 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 31 transitions. [2022-12-13 17:06:41,485 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:41,488 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 8 states and 10 transitions. [2022-12-13 17:06:41,489 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-12-13 17:06:41,489 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2022-12-13 17:06:41,489 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2022-12-13 17:06:41,490 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 17:06:41,490 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2022-12-13 17:06:41,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2022-12-13 17:06:41,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 7. [2022-12-13 17:06:41,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.2857142857142858) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:41,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 9 transitions. [2022-12-13 17:06:41,511 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 9 transitions. [2022-12-13 17:06:41,511 INFO L428 stractBuchiCegarLoop]: Abstraction has 7 states and 9 transitions. [2022-12-13 17:06:41,512 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 17:06:41,512 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 9 transitions. [2022-12-13 17:06:41,512 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:41,512 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:41,512 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:41,512 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2022-12-13 17:06:41,512 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:41,513 INFO L748 eck$LassoCheckResult]: Stem: 79#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 80#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 81#L13-3 assume !(main_~i~0#1 < 1048); 75#L17-2 [2022-12-13 17:06:41,513 INFO L750 eck$LassoCheckResult]: Loop: 75#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 76#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 75#L17-2 [2022-12-13 17:06:41,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:41,513 INFO L85 PathProgramCache]: Analyzing trace with hash 29861, now seen corresponding path program 1 times [2022-12-13 17:06:41,513 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:41,513 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670177645] [2022-12-13 17:06:41,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:41,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:41,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:41,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:41,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 17:06:41,560 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670177645] [2022-12-13 17:06:41,560 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [670177645] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 17:06:41,561 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 17:06:41,561 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-12-13 17:06:41,561 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141545056] [2022-12-13 17:06:41,562 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 17:06:41,563 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 17:06:41,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:41,564 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 1 times [2022-12-13 17:06:41,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:41,564 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131402967] [2022-12-13 17:06:41,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:41,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:41,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:41,570 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:41,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:41,576 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:41,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 17:06:41,607 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 17:06:41,607 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 17:06:41,609 INFO L87 Difference]: Start difference. First operand 7 states and 9 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:41,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 17:06:41,619 INFO L93 Difference]: Finished difference Result 8 states and 9 transitions. [2022-12-13 17:06:41,619 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8 states and 9 transitions. [2022-12-13 17:06:41,620 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:41,620 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8 states to 8 states and 9 transitions. [2022-12-13 17:06:41,620 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-12-13 17:06:41,620 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2022-12-13 17:06:41,620 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 9 transitions. [2022-12-13 17:06:41,620 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 17:06:41,620 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 9 transitions. [2022-12-13 17:06:41,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 9 transitions. [2022-12-13 17:06:41,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 7. [2022-12-13 17:06:41,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:41,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2022-12-13 17:06:41,622 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-12-13 17:06:41,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 17:06:41,623 INFO L428 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2022-12-13 17:06:41,623 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 17:06:41,623 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2022-12-13 17:06:41,623 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:41,623 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:41,624 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:41,624 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2022-12-13 17:06:41,624 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:41,624 INFO L748 eck$LassoCheckResult]: Stem: 100#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 101#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 102#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 98#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 99#L13-3 assume !(main_~i~0#1 < 1048); 96#L17-2 [2022-12-13 17:06:41,624 INFO L750 eck$LassoCheckResult]: Loop: 96#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 97#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 96#L17-2 [2022-12-13 17:06:41,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:41,625 INFO L85 PathProgramCache]: Analyzing trace with hash 28698723, now seen corresponding path program 1 times [2022-12-13 17:06:41,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:41,625 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928643089] [2022-12-13 17:06:41,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:41,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:41,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:41,670 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2022-12-13 17:06:41,682 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:41,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 17:06:41,682 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928643089] [2022-12-13 17:06:41,682 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [928643089] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 17:06:41,683 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2119210013] [2022-12-13 17:06:41,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:41,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 17:06:41,683 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,684 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,685 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-12-13 17:06:41,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:41,715 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 3 conjunts are in the unsatisfiable core [2022-12-13 17:06:41,716 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 17:06:41,724 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:41,725 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 17:06:41,740 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:41,741 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2119210013] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 17:06:41,741 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 17:06:41,741 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2022-12-13 17:06:41,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854769840] [2022-12-13 17:06:41,741 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 17:06:41,741 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 17:06:41,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:41,742 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 2 times [2022-12-13 17:06:41,742 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:41,742 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732799932] [2022-12-13 17:06:41,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:41,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:41,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:41,746 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:41,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:41,749 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:41,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 17:06:41,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-12-13 17:06:41,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-12-13 17:06:41,780 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 3 Second operand has 7 states, 6 states have (on average 2.0) internal successors, (12), 7 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:41,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 17:06:41,802 INFO L93 Difference]: Finished difference Result 13 states and 14 transitions. [2022-12-13 17:06:41,802 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 14 transitions. [2022-12-13 17:06:41,802 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:41,803 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 14 transitions. [2022-12-13 17:06:41,803 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-12-13 17:06:41,803 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2022-12-13 17:06:41,803 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 14 transitions. [2022-12-13 17:06:41,803 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 17:06:41,803 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-12-13 17:06:41,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 14 transitions. [2022-12-13 17:06:41,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-12-13 17:06:41,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.0769230769230769) internal successors, (14), 12 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:41,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 14 transitions. [2022-12-13 17:06:41,805 INFO L240 hiAutomatonCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-12-13 17:06:41,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-12-13 17:06:41,806 INFO L428 stractBuchiCegarLoop]: Abstraction has 13 states and 14 transitions. [2022-12-13 17:06:41,806 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 17:06:41,806 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 14 transitions. [2022-12-13 17:06:41,807 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:41,807 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:41,807 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:41,807 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1] [2022-12-13 17:06:41,807 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:41,808 INFO L748 eck$LassoCheckResult]: Stem: 154#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 155#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 156#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 152#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 153#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 157#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 162#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 161#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 160#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 159#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 158#L13-3 assume !(main_~i~0#1 < 1048); 150#L17-2 [2022-12-13 17:06:41,808 INFO L750 eck$LassoCheckResult]: Loop: 150#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 151#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 150#L17-2 [2022-12-13 17:06:41,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:41,808 INFO L85 PathProgramCache]: Analyzing trace with hash -1081477475, now seen corresponding path program 2 times [2022-12-13 17:06:41,808 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:41,809 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950334268] [2022-12-13 17:06:41,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:41,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:41,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:41,906 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:41,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 17:06:41,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [950334268] [2022-12-13 17:06:41,907 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [950334268] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 17:06:41,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [960819685] [2022-12-13 17:06:41,907 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 17:06:41,907 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 17:06:41,907 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:41,908 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 17:06:41,909 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-12-13 17:06:41,953 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-12-13 17:06:41,953 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 17:06:41,954 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 6 conjunts are in the unsatisfiable core [2022-12-13 17:06:41,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 17:06:41,975 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:41,975 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 17:06:42,023 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:42,023 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [960819685] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 17:06:42,023 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 17:06:42,023 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2022-12-13 17:06:42,024 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071670491] [2022-12-13 17:06:42,024 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 17:06:42,024 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 17:06:42,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:42,024 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 3 times [2022-12-13 17:06:42,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:42,025 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588691409] [2022-12-13 17:06:42,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:42,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:42,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:42,030 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:42,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:42,034 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:42,061 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 17:06:42,061 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-12-13 17:06:42,062 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-12-13 17:06:42,062 INFO L87 Difference]: Start difference. First operand 13 states and 14 transitions. cyclomatic complexity: 3 Second operand has 13 states, 12 states have (on average 2.0) internal successors, (24), 13 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:42,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 17:06:42,097 INFO L93 Difference]: Finished difference Result 25 states and 26 transitions. [2022-12-13 17:06:42,097 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 26 transitions. [2022-12-13 17:06:42,098 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:42,098 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 26 transitions. [2022-12-13 17:06:42,098 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-12-13 17:06:42,098 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2022-12-13 17:06:42,098 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 26 transitions. [2022-12-13 17:06:42,099 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 17:06:42,099 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 26 transitions. [2022-12-13 17:06:42,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 26 transitions. [2022-12-13 17:06:42,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2022-12-13 17:06:42,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.04) internal successors, (26), 24 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:42,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2022-12-13 17:06:42,101 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 26 transitions. [2022-12-13 17:06:42,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-12-13 17:06:42,102 INFO L428 stractBuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2022-12-13 17:06:42,102 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-12-13 17:06:42,102 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 26 transitions. [2022-12-13 17:06:42,103 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:42,103 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:42,103 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:42,104 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1] [2022-12-13 17:06:42,104 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:42,104 INFO L748 eck$LassoCheckResult]: Stem: 271#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 272#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 268#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 269#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 270#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 266#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 267#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 288#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 287#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 286#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 285#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 284#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 283#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 282#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 281#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 280#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 279#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 278#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 277#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 276#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 275#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 274#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 273#L13-3 assume !(main_~i~0#1 < 1048); 264#L17-2 [2022-12-13 17:06:42,104 INFO L750 eck$LassoCheckResult]: Loop: 264#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 265#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 264#L17-2 [2022-12-13 17:06:42,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:42,104 INFO L85 PathProgramCache]: Analyzing trace with hash 899905681, now seen corresponding path program 3 times [2022-12-13 17:06:42,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:42,105 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055983943] [2022-12-13 17:06:42,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:42,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:42,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:42,314 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:42,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 17:06:42,315 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2055983943] [2022-12-13 17:06:42,315 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2055983943] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 17:06:42,315 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1031146675] [2022-12-13 17:06:42,315 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-13 17:06:42,315 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 17:06:42,315 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:42,316 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 17:06:42,317 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-12-13 17:06:42,410 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-12-13 17:06:42,411 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 17:06:42,412 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 12 conjunts are in the unsatisfiable core [2022-12-13 17:06:42,413 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 17:06:42,451 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:42,451 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 17:06:42,615 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:42,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1031146675] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 17:06:42,616 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 17:06:42,616 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2022-12-13 17:06:42,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1673009662] [2022-12-13 17:06:42,616 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 17:06:42,617 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 17:06:42,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:42,617 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 4 times [2022-12-13 17:06:42,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:42,617 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671079182] [2022-12-13 17:06:42,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:42,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:42,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:42,622 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:42,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:42,624 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:42,654 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 17:06:42,654 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-12-13 17:06:42,655 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-12-13 17:06:42,655 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. cyclomatic complexity: 3 Second operand has 25 states, 24 states have (on average 2.0) internal successors, (48), 25 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:42,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 17:06:42,715 INFO L93 Difference]: Finished difference Result 49 states and 50 transitions. [2022-12-13 17:06:42,715 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 50 transitions. [2022-12-13 17:06:42,717 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:42,718 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 49 states and 50 transitions. [2022-12-13 17:06:42,718 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-12-13 17:06:42,718 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2022-12-13 17:06:42,718 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 50 transitions. [2022-12-13 17:06:42,719 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 17:06:42,719 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 50 transitions. [2022-12-13 17:06:42,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 50 transitions. [2022-12-13 17:06:42,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2022-12-13 17:06:42,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.0204081632653061) internal successors, (50), 48 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:42,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 50 transitions. [2022-12-13 17:06:42,722 INFO L240 hiAutomatonCegarLoop]: Abstraction has 49 states and 50 transitions. [2022-12-13 17:06:42,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-12-13 17:06:42,723 INFO L428 stractBuchiCegarLoop]: Abstraction has 49 states and 50 transitions. [2022-12-13 17:06:42,723 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-12-13 17:06:42,723 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 50 transitions. [2022-12-13 17:06:42,724 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:42,724 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:42,724 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:42,725 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1] [2022-12-13 17:06:42,726 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:42,726 INFO L748 eck$LassoCheckResult]: Stem: 502#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 503#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 504#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 505#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 506#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 500#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 501#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 546#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 545#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 544#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 543#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 542#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 541#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 540#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 539#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 538#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 537#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 536#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 535#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 534#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 533#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 532#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 531#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 530#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 529#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 528#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 527#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 526#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 525#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 524#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 523#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 522#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 521#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 520#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 519#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 518#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 517#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 516#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 515#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 514#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 513#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 512#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 511#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 510#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 509#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 508#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 507#L13-3 assume !(main_~i~0#1 < 1048); 498#L17-2 [2022-12-13 17:06:42,726 INFO L750 eck$LassoCheckResult]: Loop: 498#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 499#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 498#L17-2 [2022-12-13 17:06:42,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:42,726 INFO L85 PathProgramCache]: Analyzing trace with hash -111832455, now seen corresponding path program 4 times [2022-12-13 17:06:42,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:42,727 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16553642] [2022-12-13 17:06:42,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:42,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:42,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:43,222 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:43,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 17:06:43,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16553642] [2022-12-13 17:06:43,223 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [16553642] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 17:06:43,223 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1224829043] [2022-12-13 17:06:43,223 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-13 17:06:43,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 17:06:43,223 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:43,224 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 17:06:43,225 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-12-13 17:06:43,302 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-13 17:06:43,302 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 17:06:43,304 INFO L263 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 24 conjunts are in the unsatisfiable core [2022-12-13 17:06:43,306 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 17:06:43,378 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:43,378 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 17:06:43,942 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:43,943 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1224829043] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 17:06:43,943 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 17:06:43,943 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2022-12-13 17:06:43,943 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513765956] [2022-12-13 17:06:43,943 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 17:06:43,944 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 17:06:43,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:43,944 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 5 times [2022-12-13 17:06:43,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:43,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820632309] [2022-12-13 17:06:43,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:43,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:43,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:43,949 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:43,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:43,953 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:43,979 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 17:06:43,980 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-12-13 17:06:43,981 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-12-13 17:06:43,981 INFO L87 Difference]: Start difference. First operand 49 states and 50 transitions. cyclomatic complexity: 3 Second operand has 49 states, 48 states have (on average 2.0) internal successors, (96), 49 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:44,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 17:06:44,141 INFO L93 Difference]: Finished difference Result 97 states and 98 transitions. [2022-12-13 17:06:44,141 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 98 transitions. [2022-12-13 17:06:44,144 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:44,144 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 97 states and 98 transitions. [2022-12-13 17:06:44,145 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-12-13 17:06:44,145 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2022-12-13 17:06:44,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 98 transitions. [2022-12-13 17:06:44,145 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 17:06:44,145 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 98 transitions. [2022-12-13 17:06:44,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 98 transitions. [2022-12-13 17:06:44,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2022-12-13 17:06:44,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.0103092783505154) internal successors, (98), 96 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:44,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 98 transitions. [2022-12-13 17:06:44,148 INFO L240 hiAutomatonCegarLoop]: Abstraction has 97 states and 98 transitions. [2022-12-13 17:06:44,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-12-13 17:06:44,149 INFO L428 stractBuchiCegarLoop]: Abstraction has 97 states and 98 transitions. [2022-12-13 17:06:44,149 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-12-13 17:06:44,149 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 98 transitions. [2022-12-13 17:06:44,152 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:44,152 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:44,152 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:44,156 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1] [2022-12-13 17:06:44,156 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:44,157 INFO L748 eck$LassoCheckResult]: Stem: 976#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 977#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 978#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 979#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 980#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 974#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 975#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1068#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1067#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1066#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1065#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1064#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1063#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1062#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1061#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1060#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1059#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1058#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1057#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1056#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1055#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1054#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1053#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1052#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1051#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1050#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1049#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1048#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1047#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1046#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1045#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1044#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1043#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1042#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1041#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1040#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1039#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1038#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1037#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1036#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1035#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1034#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1033#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1032#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1031#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1030#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1029#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1028#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1027#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1026#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1025#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1024#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1023#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1022#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1021#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1020#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1019#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1018#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1017#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1016#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1015#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1014#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1013#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1012#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1011#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1010#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1009#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1008#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1007#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1006#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1005#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1004#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1003#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1002#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1001#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1000#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 999#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 998#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 997#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 996#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 995#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 994#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 993#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 992#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 991#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 990#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 989#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 988#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 987#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 986#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 985#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 984#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 983#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 982#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 981#L13-3 assume !(main_~i~0#1 < 1048); 972#L17-2 [2022-12-13 17:06:44,157 INFO L750 eck$LassoCheckResult]: Loop: 972#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 973#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 972#L17-2 [2022-12-13 17:06:44,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:44,158 INFO L85 PathProgramCache]: Analyzing trace with hash -1497227703, now seen corresponding path program 5 times [2022-12-13 17:06:44,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:44,158 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006470922] [2022-12-13 17:06:44,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:44,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:44,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:45,610 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:45,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 17:06:45,610 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006470922] [2022-12-13 17:06:45,611 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2006470922] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 17:06:45,611 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1376564112] [2022-12-13 17:06:45,611 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-12-13 17:06:45,611 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 17:06:45,611 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:45,612 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 17:06:45,613 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-12-13 17:06:48,666 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-12-13 17:06:48,666 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 17:06:48,673 INFO L263 TraceCheckSpWp]: Trace formula consists of 530 conjuncts, 48 conjunts are in the unsatisfiable core [2022-12-13 17:06:48,675 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 17:06:48,793 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:48,793 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 17:06:50,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:50,752 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1376564112] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 17:06:50,752 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 17:06:50,752 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 96 [2022-12-13 17:06:50,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875891796] [2022-12-13 17:06:50,752 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 17:06:50,752 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 17:06:50,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:50,753 INFO L85 PathProgramCache]: Analyzing trace with hash 1574, now seen corresponding path program 6 times [2022-12-13 17:06:50,753 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:50,753 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232228706] [2022-12-13 17:06:50,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:50,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:50,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:50,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 17:06:50,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 17:06:50,759 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 17:06:50,787 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 17:06:50,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-12-13 17:06:50,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2022-12-13 17:06:50,795 INFO L87 Difference]: Start difference. First operand 97 states and 98 transitions. cyclomatic complexity: 3 Second operand has 97 states, 96 states have (on average 2.0) internal successors, (192), 97 states have internal predecessors, (192), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:51,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 17:06:51,104 INFO L93 Difference]: Finished difference Result 193 states and 194 transitions. [2022-12-13 17:06:51,104 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 193 states and 194 transitions. [2022-12-13 17:06:51,106 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:51,107 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 193 states to 193 states and 194 transitions. [2022-12-13 17:06:51,108 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2022-12-13 17:06:51,108 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2022-12-13 17:06:51,108 INFO L73 IsDeterministic]: Start isDeterministic. Operand 193 states and 194 transitions. [2022-12-13 17:06:51,109 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 17:06:51,109 INFO L218 hiAutomatonCegarLoop]: Abstraction has 193 states and 194 transitions. [2022-12-13 17:06:51,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states and 194 transitions. [2022-12-13 17:06:51,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2022-12-13 17:06:51,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 193 states, 193 states have (on average 1.005181347150259) internal successors, (194), 192 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 17:06:51,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 194 transitions. [2022-12-13 17:06:51,117 INFO L240 hiAutomatonCegarLoop]: Abstraction has 193 states and 194 transitions. [2022-12-13 17:06:51,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-12-13 17:06:51,118 INFO L428 stractBuchiCegarLoop]: Abstraction has 193 states and 194 transitions. [2022-12-13 17:06:51,118 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-12-13 17:06:51,118 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 193 states and 194 transitions. [2022-12-13 17:06:51,119 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2022-12-13 17:06:51,120 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 17:06:51,120 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 17:06:51,122 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1] [2022-12-13 17:06:51,122 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 17:06:51,123 INFO L748 eck$LassoCheckResult]: Stem: 1930#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1931#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post0#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem2#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1932#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1933#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1934#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1928#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1929#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2118#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2117#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2116#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2115#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2114#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2113#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2112#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2111#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2110#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2109#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2108#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2107#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2106#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2105#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2104#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2103#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2102#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2101#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2100#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2099#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2098#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2097#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2096#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2095#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2094#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2093#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2092#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2091#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2090#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2089#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2088#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2087#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2086#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2085#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2084#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2083#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2082#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2081#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2080#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2079#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2078#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2077#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2076#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2075#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2074#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2073#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2072#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2071#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2070#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2069#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2068#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2067#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2066#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2065#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2064#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2063#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2062#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2061#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2060#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2059#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2058#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2057#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2056#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2055#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2054#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2053#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2052#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2051#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2050#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2049#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2048#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2047#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2046#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2045#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2044#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2043#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2042#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2041#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2040#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2039#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2038#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2037#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2036#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2035#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2034#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2033#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2032#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2031#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2030#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2029#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2028#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2027#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2026#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2025#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2024#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2023#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2022#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2021#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2020#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2019#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2018#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2017#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2016#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2015#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2014#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2013#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2012#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2011#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2010#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2009#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2008#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2007#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2006#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2005#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2004#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2003#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2002#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 2001#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2000#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1999#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1998#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1997#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1996#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1995#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1994#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1993#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1992#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1991#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1990#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1989#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1988#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1987#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1986#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1985#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1984#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1983#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1982#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1981#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1980#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1979#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1978#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1977#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1976#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1975#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1974#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1973#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1972#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1971#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1970#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1969#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1968#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1967#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1966#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1965#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1964#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1963#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1962#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1961#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1960#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1959#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1958#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1957#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1956#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1955#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1954#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1953#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1952#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1951#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1950#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1949#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1948#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1947#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1946#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1945#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1944#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1943#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1942#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1941#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1940#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1939#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1938#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1937#L13-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1936#L13-2 main_#t~post0#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post0#1;havoc main_#t~post0#1; 1935#L13-3 assume !(main_~i~0#1 < 1048); 1926#L17-2 [2022-12-13 17:06:51,123 INFO L750 eck$LassoCheckResult]: Loop: 1926#L17-2 call main_#t~mem2#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4); 1927#L17 assume !!(main_#t~mem2#1 >= 0);havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1; 1926#L17-2 [2022-12-13 17:06:51,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 17:06:51,123 INFO L85 PathProgramCache]: Analyzing trace with hash 2115802601, now seen corresponding path program 6 times [2022-12-13 17:06:51,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 17:06:51,124 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363213298] [2022-12-13 17:06:51,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 17:06:51,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 17:06:51,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 17:06:55,935 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 17:06:55,935 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 17:06:55,935 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1363213298] [2022-12-13 17:06:55,935 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1363213298] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 17:06:55,935 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [398490629] [2022-12-13 17:06:55,935 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-12-13 17:06:55,935 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 17:06:55,935 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 17:06:55,936 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 17:06:55,939 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_06784413-d59e-4b11-aee8-3229aede680b/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process