./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 1bedc761cea545b8144ad4138a379d7139cc98703c76e9b536a2e7389d5b6a10 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 22:22:41,962 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 22:22:41,963 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 22:22:41,978 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 22:22:41,979 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 22:22:41,979 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 22:22:41,980 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 22:22:41,981 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 22:22:41,982 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 22:22:41,982 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 22:22:41,983 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 22:22:41,984 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 22:22:41,984 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 22:22:41,985 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 22:22:41,985 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 22:22:41,986 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 22:22:41,987 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 22:22:41,987 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 22:22:41,988 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 22:22:41,990 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 22:22:41,991 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 22:22:41,992 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 22:22:41,992 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 22:22:41,993 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 22:22:41,995 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 22:22:41,995 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 22:22:41,995 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 22:22:41,996 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 22:22:41,996 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 22:22:41,997 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 22:22:41,997 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 22:22:41,998 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 22:22:41,998 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 22:22:41,999 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 22:22:41,999 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 22:22:41,999 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 22:22:42,000 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 22:22:42,000 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 22:22:42,000 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 22:22:42,001 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 22:22:42,001 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 22:22:42,002 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-64bit-Automizer_Default.epf [2022-12-13 22:22:42,017 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 22:22:42,017 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 22:22:42,017 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 22:22:42,018 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 22:22:42,018 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 22:22:42,018 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 22:22:42,019 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 22:22:42,019 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 22:22:42,019 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 22:22:42,019 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 22:22:42,019 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 22:22:42,019 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 22:22:42,019 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 22:22:42,019 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 22:22:42,020 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 22:22:42,021 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 22:22:42,021 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 22:22:42,021 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 22:22:42,021 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 22:22:42,021 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 22:22:42,021 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 22:22:42,022 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 22:22:42,022 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1bedc761cea545b8144ad4138a379d7139cc98703c76e9b536a2e7389d5b6a10 [2022-12-13 22:22:42,193 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 22:22:42,208 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 22:22:42,210 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 22:22:42,211 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 22:22:42,211 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 22:22:42,212 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c [2022-12-13 22:22:44,758 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 22:22:44,914 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 22:22:44,914 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/sv-benchmarks/c/termination-crafted/LexIndexValue-Pointer-2.c [2022-12-13 22:22:44,918 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/data/b0a8855bf/acdf95166ff44a37b9240d7b4c732c2d/FLAG5ef601925 [2022-12-13 22:22:45,307 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/data/b0a8855bf/acdf95166ff44a37b9240d7b4c732c2d [2022-12-13 22:22:45,309 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 22:22:45,310 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 22:22:45,311 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 22:22:45,311 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 22:22:45,315 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 22:22:45,315 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,316 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1baa21a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45, skipping insertion in model container [2022-12-13 22:22:45,316 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,322 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 22:22:45,331 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 22:22:45,430 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 22:22:45,438 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 22:22:45,447 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 22:22:45,456 INFO L208 MainTranslator]: Completed translation [2022-12-13 22:22:45,457 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45 WrapperNode [2022-12-13 22:22:45,457 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 22:22:45,458 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 22:22:45,458 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 22:22:45,458 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 22:22:45,463 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,469 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,484 INFO L138 Inliner]: procedures = 10, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 47 [2022-12-13 22:22:45,484 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 22:22:45,485 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 22:22:45,485 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 22:22:45,485 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 22:22:45,491 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,491 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,492 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,492 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,495 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,498 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,498 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,499 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,500 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 22:22:45,501 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 22:22:45,501 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 22:22:45,501 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 22:22:45,502 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (1/1) ... [2022-12-13 22:22:45,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:45,514 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:45,523 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:45,525 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 22:22:45,551 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-12-13 22:22:45,551 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-12-13 22:22:45,551 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 22:22:45,551 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 22:22:45,551 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-12-13 22:22:45,551 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-12-13 22:22:45,604 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 22:22:45,605 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 22:22:45,680 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 22:22:45,685 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 22:22:45,685 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-12-13 22:22:45,687 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 10:22:45 BoogieIcfgContainer [2022-12-13 22:22:45,687 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 22:22:45,687 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 22:22:45,688 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 22:22:45,690 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 22:22:45,691 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:22:45,691 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 10:22:45" (1/3) ... [2022-12-13 22:22:45,692 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5191905b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 10:22:45, skipping insertion in model container [2022-12-13 22:22:45,692 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:22:45,692 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 10:22:45" (2/3) ... [2022-12-13 22:22:45,692 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5191905b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 10:22:45, skipping insertion in model container [2022-12-13 22:22:45,692 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 22:22:45,692 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 10:22:45" (3/3) ... [2022-12-13 22:22:45,694 INFO L332 chiAutomizerObserver]: Analyzing ICFG LexIndexValue-Pointer-2.c [2022-12-13 22:22:45,735 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 22:22:45,735 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 22:22:45,735 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 22:22:45,735 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 22:22:45,735 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 22:22:45,735 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 22:22:45,735 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 22:22:45,735 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 22:22:45,738 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:45,752 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-12-13 22:22:45,752 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:45,752 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:45,756 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-12-13 22:22:45,756 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 22:22:45,757 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 22:22:45,757 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:45,758 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2022-12-13 22:22:45,758 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:45,758 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:45,758 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2022-12-13 22:22:45,758 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-12-13 22:22:45,764 INFO L748 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 9#L18-3true [2022-12-13 22:22:45,765 INFO L750 eck$LassoCheckResult]: Loop: 9#L18-3true assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 7#L18-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 9#L18-3true [2022-12-13 22:22:45,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:45,769 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2022-12-13 22:22:45,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:45,777 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99727387] [2022-12-13 22:22:45,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:45,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:45,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:45,847 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:45,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:45,868 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:45,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:45,870 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2022-12-13 22:22:45,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:45,870 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288092970] [2022-12-13 22:22:45,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:45,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:45,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:45,880 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:45,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:45,886 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:45,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:45,887 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2022-12-13 22:22:45,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:45,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071662381] [2022-12-13 22:22:45,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:45,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:45,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:45,903 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:45,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:45,914 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:46,103 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 22:22:46,103 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 22:22:46,103 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 22:22:46,104 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 22:22:46,104 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2022-12-13 22:22:46,104 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,104 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 22:22:46,104 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 22:22:46,104 INFO L133 ssoRankerPreferences]: Filename of dumped script: LexIndexValue-Pointer-2.c_Iteration1_Lasso [2022-12-13 22:22:46,104 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 22:22:46,105 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 22:22:46,121 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,130 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,132 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,134 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,136 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,255 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,257 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,259 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,262 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,264 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,267 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,269 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,270 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,272 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 22:22:46,447 INFO L294 LassoAnalysis]: Preprocessing complete. [2022-12-13 22:22:46,451 INFO L490 LassoAnalysis]: Using template 'affine'. [2022-12-13 22:22:46,453 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,453 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,454 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2022-12-13 22:22:46,457 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,467 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,467 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 22:22:46,468 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,468 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,468 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,470 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 22:22:46,470 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 22:22:46,472 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,475 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2022-12-13 22:22:46,476 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,476 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,477 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,478 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2022-12-13 22:22:46,479 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,489 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,489 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 22:22:46,490 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,490 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,490 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,490 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 22:22:46,490 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 22:22:46,492 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,495 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2022-12-13 22:22:46,495 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,495 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,496 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,497 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2022-12-13 22:22:46,498 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,508 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,508 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 22:22:46,508 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,508 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,508 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,509 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 22:22:46,509 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 22:22:46,511 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,513 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2022-12-13 22:22:46,513 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,513 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,514 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,515 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2022-12-13 22:22:46,517 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,527 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,527 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 22:22:46,527 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,527 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,527 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,528 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 22:22:46,528 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 22:22:46,529 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,532 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2022-12-13 22:22:46,532 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,532 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,533 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,534 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2022-12-13 22:22:46,535 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,545 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,545 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2022-12-13 22:22:46,545 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,545 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,545 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,545 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2022-12-13 22:22:46,546 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2022-12-13 22:22:46,547 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,550 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2022-12-13 22:22:46,550 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,550 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,551 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,552 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2022-12-13 22:22:46,554 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,564 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,564 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,564 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,565 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,569 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:22:46,569 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:22:46,575 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,578 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2022-12-13 22:22:46,578 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,579 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,579 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,580 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2022-12-13 22:22:46,582 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,592 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,592 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,592 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,592 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,595 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:22:46,595 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:22:46,599 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,602 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2022-12-13 22:22:46,602 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,602 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,603 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,604 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2022-12-13 22:22:46,605 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,616 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,616 INFO L203 nArgumentSynthesizer]: 2 stem disjuncts [2022-12-13 22:22:46,616 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,616 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,620 INFO L401 nArgumentSynthesizer]: We have 8 Motzkin's Theorem applications. [2022-12-13 22:22:46,620 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:22:46,626 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2022-12-13 22:22:46,629 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2022-12-13 22:22:46,629 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,629 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,630 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,631 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2022-12-13 22:22:46,632 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2022-12-13 22:22:46,643 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2022-12-13 22:22:46,643 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2022-12-13 22:22:46,643 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2022-12-13 22:22:46,643 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2022-12-13 22:22:46,650 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2022-12-13 22:22:46,651 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2022-12-13 22:22:46,661 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2022-12-13 22:22:46,690 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2022-12-13 22:22:46,690 INFO L444 ModelExtractionUtils]: 5 out of 19 variables were initially zero. Simplification set additionally 11 variables to zero. [2022-12-13 22:22:46,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 22:22:46,692 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:46,722 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 22:22:46,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2022-12-13 22:22:46,723 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2022-12-13 22:22:46,735 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2022-12-13 22:22:46,735 INFO L513 LassoAnalysis]: Proved termination. [2022-12-13 22:22:46,736 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~p~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2095*v_rep(select #length ULTIMATE.start_main_~p~0#1.base)_1 Supporting invariants [] [2022-12-13 22:22:46,739 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2022-12-13 22:22:46,749 INFO L156 tatePredicateManager]: 2 out of 3 supporting invariants were superfluous and have been removed [2022-12-13 22:22:46,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:46,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:46,797 INFO L263 TraceCheckSpWp]: Trace formula consists of 27 conjuncts, 4 conjunts are in the unsatisfiable core [2022-12-13 22:22:46,798 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:22:46,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:46,811 WARN L261 TraceCheckSpWp]: Trace formula consists of 15 conjuncts, 8 conjunts are in the unsatisfiable core [2022-12-13 22:22:46,812 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:22:46,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:46,879 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2022-12-13 22:22:46,882 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:46,943 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2022-12-13 22:22:46,971 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 33 states and 48 transitions. Complement of second has 7 states. [2022-12-13 22:22:46,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2022-12-13 22:22:46,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:46,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 30 transitions. [2022-12-13 22:22:46,979 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 30 transitions. Stem has 2 letters. Loop has 2 letters. [2022-12-13 22:22:46,980 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 22:22:46,980 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 30 transitions. Stem has 4 letters. Loop has 2 letters. [2022-12-13 22:22:46,980 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 22:22:46,980 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 30 transitions. Stem has 2 letters. Loop has 4 letters. [2022-12-13 22:22:46,980 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2022-12-13 22:22:46,981 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 48 transitions. [2022-12-13 22:22:46,983 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:46,985 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 10 states and 14 transitions. [2022-12-13 22:22:46,986 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2022-12-13 22:22:46,986 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-12-13 22:22:46,986 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 14 transitions. [2022-12-13 22:22:46,987 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:22:46,987 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2022-12-13 22:22:46,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 14 transitions. [2022-12-13 22:22:47,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2022-12-13 22:22:47,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.4) internal successors, (14), 9 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:47,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 14 transitions. [2022-12-13 22:22:47,006 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2022-12-13 22:22:47,006 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 14 transitions. [2022-12-13 22:22:47,006 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 22:22:47,006 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 14 transitions. [2022-12-13 22:22:47,006 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:47,007 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:47,007 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:47,007 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2022-12-13 22:22:47,007 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:22:47,007 INFO L748 eck$LassoCheckResult]: Stem: 108#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 109#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 107#L18-3 assume !(main_~i~0#1 < 1048); 106#L18-4 main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 105#L23-2 [2022-12-13 22:22:47,007 INFO L750 eck$LassoCheckResult]: Loop: 105#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 101#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 102#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1; 110#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 105#L23-2 [2022-12-13 22:22:47,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:47,008 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2022-12-13 22:22:47,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:47,009 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [719746121] [2022-12-13 22:22:47,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:47,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:47,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,052 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:22:47,052 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [719746121] [2022-12-13 22:22:47,052 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [719746121] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 22:22:47,052 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 22:22:47,053 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 22:22:47,053 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [551054766] [2022-12-13 22:22:47,053 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 22:22:47,055 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:22:47,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:47,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 1 times [2022-12-13 22:22:47,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:47,056 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898207001] [2022-12-13 22:22:47,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:47,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:47,062 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:47,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:47,067 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:47,136 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:22:47,137 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 22:22:47,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 22:22:47,139 INFO L87 Difference]: Start difference. First operand 10 states and 14 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:47,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:22:47,147 INFO L93 Difference]: Finished difference Result 11 states and 14 transitions. [2022-12-13 22:22:47,147 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 14 transitions. [2022-12-13 22:22:47,147 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:47,147 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 14 transitions. [2022-12-13 22:22:47,148 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-12-13 22:22:47,148 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-12-13 22:22:47,148 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 14 transitions. [2022-12-13 22:22:47,148 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:22:47,148 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 14 transitions. [2022-12-13 22:22:47,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 14 transitions. [2022-12-13 22:22:47,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2022-12-13 22:22:47,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:47,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2022-12-13 22:22:47,149 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2022-12-13 22:22:47,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 22:22:47,150 INFO L428 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2022-12-13 22:22:47,150 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 22:22:47,150 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2022-12-13 22:22:47,151 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:47,151 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:47,151 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:47,151 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2022-12-13 22:22:47,151 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:22:47,152 INFO L748 eck$LassoCheckResult]: Stem: 135#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 136#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 133#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 130#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 131#L18-3 assume !(main_~i~0#1 < 1048); 134#L18-4 main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 132#L23-2 [2022-12-13 22:22:47,152 INFO L750 eck$LassoCheckResult]: Loop: 132#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 128#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 129#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1; 137#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 132#L23-2 [2022-12-13 22:22:47,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:47,152 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2022-12-13 22:22:47,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:47,153 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1254776112] [2022-12-13 22:22:47,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:47,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:47,188 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:22:47,188 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1254776112] [2022-12-13 22:22:47,189 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1254776112] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:22:47,189 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [291554180] [2022-12-13 22:22:47,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,189 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:22:47,189 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:47,190 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:22:47,191 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-12-13 22:22:47,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:47,225 INFO L263 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 3 conjunts are in the unsatisfiable core [2022-12-13 22:22:47,226 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:22:47,236 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,236 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:22:47,252 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,252 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [291554180] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:22:47,252 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:22:47,253 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2022-12-13 22:22:47,253 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337432667] [2022-12-13 22:22:47,253 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:22:47,253 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:22:47,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:47,254 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 2 times [2022-12-13 22:22:47,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:47,254 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [133620652] [2022-12-13 22:22:47,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:47,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:47,260 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:47,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:47,266 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:47,340 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:22:47,341 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-12-13 22:22:47,341 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-12-13 22:22:47,341 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:47,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:22:47,360 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-12-13 22:22:47,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 19 transitions. [2022-12-13 22:22:47,361 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:47,361 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 19 transitions. [2022-12-13 22:22:47,361 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-12-13 22:22:47,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-12-13 22:22:47,361 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 19 transitions. [2022-12-13 22:22:47,361 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:22:47,361 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-12-13 22:22:47,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 19 transitions. [2022-12-13 22:22:47,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-12-13 22:22:47,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.1875) internal successors, (19), 15 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:47,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2022-12-13 22:22:47,362 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-12-13 22:22:47,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-12-13 22:22:47,363 INFO L428 stractBuchiCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-12-13 22:22:47,364 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 22:22:47,364 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 19 transitions. [2022-12-13 22:22:47,364 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:47,364 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:47,364 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:47,365 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2022-12-13 22:22:47,365 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:22:47,365 INFO L748 eck$LassoCheckResult]: Stem: 204#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 205#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 199#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 200#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 201#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 196#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 197#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 209#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 208#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 207#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 206#L18-3 assume !(main_~i~0#1 < 1048); 202#L18-4 main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 198#L23-2 [2022-12-13 22:22:47,365 INFO L750 eck$LassoCheckResult]: Loop: 198#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 194#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 195#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1; 203#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 198#L23-2 [2022-12-13 22:22:47,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:47,365 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2022-12-13 22:22:47,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:47,365 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115431545] [2022-12-13 22:22:47,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:47,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:47,443 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:22:47,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2115431545] [2022-12-13 22:22:47,443 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2115431545] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:22:47,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [69273184] [2022-12-13 22:22:47,444 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-12-13 22:22:47,444 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:22:47,444 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:47,445 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:22:47,446 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-12-13 22:22:47,481 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-12-13 22:22:47,482 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:22:47,482 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 6 conjunts are in the unsatisfiable core [2022-12-13 22:22:47,483 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:22:47,501 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,501 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:22:47,545 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,545 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [69273184] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:22:47,545 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:22:47,546 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-12-13 22:22:47,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [319150464] [2022-12-13 22:22:47,546 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:22:47,546 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:22:47,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:47,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 3 times [2022-12-13 22:22:47,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:47,546 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655244284] [2022-12-13 22:22:47,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:47,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:47,550 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:47,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:47,554 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:47,618 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:22:47,618 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-12-13 22:22:47,619 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2022-12-13 22:22:47,619 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. cyclomatic complexity: 5 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:47,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:22:47,648 INFO L93 Difference]: Finished difference Result 28 states and 31 transitions. [2022-12-13 22:22:47,648 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 31 transitions. [2022-12-13 22:22:47,649 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:47,649 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 31 transitions. [2022-12-13 22:22:47,649 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-12-13 22:22:47,649 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-12-13 22:22:47,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 31 transitions. [2022-12-13 22:22:47,649 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:22:47,650 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2022-12-13 22:22:47,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 31 transitions. [2022-12-13 22:22:47,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2022-12-13 22:22:47,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1071428571428572) internal successors, (31), 27 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:47,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2022-12-13 22:22:47,651 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 31 transitions. [2022-12-13 22:22:47,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-12-13 22:22:47,652 INFO L428 stractBuchiCegarLoop]: Abstraction has 28 states and 31 transitions. [2022-12-13 22:22:47,652 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-12-13 22:22:47,652 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 31 transitions. [2022-12-13 22:22:47,653 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:47,653 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:47,653 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:47,653 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2022-12-13 22:22:47,653 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:22:47,653 INFO L748 eck$LassoCheckResult]: Stem: 329#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 330#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 325#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 326#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 327#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 322#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 323#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 347#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 346#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 345#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 344#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 343#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 342#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 341#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 340#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 339#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 338#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 337#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 336#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 335#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 334#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 333#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 332#L18-3 assume !(main_~i~0#1 < 1048); 328#L18-4 main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 324#L23-2 [2022-12-13 22:22:47,653 INFO L750 eck$LassoCheckResult]: Loop: 324#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 320#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 321#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1; 331#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 324#L23-2 [2022-12-13 22:22:47,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:47,654 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2022-12-13 22:22:47,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:47,654 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85456875] [2022-12-13 22:22:47,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:47,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:47,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:47,827 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,827 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:22:47,828 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [85456875] [2022-12-13 22:22:47,828 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [85456875] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:22:47,828 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [120173297] [2022-12-13 22:22:47,828 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-12-13 22:22:47,828 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:22:47,828 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:47,829 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:22:47,830 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-12-13 22:22:47,924 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-12-13 22:22:47,924 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:22:47,926 INFO L263 TraceCheckSpWp]: Trace formula consists of 142 conjuncts, 12 conjunts are in the unsatisfiable core [2022-12-13 22:22:47,927 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:22:47,964 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:47,964 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:22:48,126 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:48,127 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [120173297] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:22:48,127 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:22:48,127 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2022-12-13 22:22:48,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486273253] [2022-12-13 22:22:48,127 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:22:48,128 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:22:48,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:48,128 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 4 times [2022-12-13 22:22:48,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:48,128 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032443841] [2022-12-13 22:22:48,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:48,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:48,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:48,133 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:48,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:48,137 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:48,227 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:22:48,228 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-12-13 22:22:48,229 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2022-12-13 22:22:48,229 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. cyclomatic complexity: 5 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:48,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:22:48,304 INFO L93 Difference]: Finished difference Result 52 states and 55 transitions. [2022-12-13 22:22:48,304 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 55 transitions. [2022-12-13 22:22:48,306 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:48,307 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 55 transitions. [2022-12-13 22:22:48,307 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-12-13 22:22:48,307 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-12-13 22:22:48,307 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 55 transitions. [2022-12-13 22:22:48,308 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:22:48,308 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2022-12-13 22:22:48,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 55 transitions. [2022-12-13 22:22:48,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2022-12-13 22:22:48,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0576923076923077) internal successors, (55), 51 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:48,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2022-12-13 22:22:48,310 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 55 transitions. [2022-12-13 22:22:48,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-12-13 22:22:48,311 INFO L428 stractBuchiCegarLoop]: Abstraction has 52 states and 55 transitions. [2022-12-13 22:22:48,311 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2022-12-13 22:22:48,311 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 55 transitions. [2022-12-13 22:22:48,313 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:48,313 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:48,313 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:48,315 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2022-12-13 22:22:48,315 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:22:48,315 INFO L748 eck$LassoCheckResult]: Stem: 575#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 576#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 571#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 572#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 573#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 568#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 569#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 617#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 616#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 615#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 614#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 613#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 612#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 611#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 610#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 609#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 608#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 607#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 606#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 605#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 604#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 603#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 602#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 601#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 600#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 599#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 598#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 597#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 596#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 595#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 594#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 593#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 592#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 591#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 590#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 589#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 588#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 587#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 586#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 585#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 584#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 583#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 582#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 581#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 580#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 579#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 578#L18-3 assume !(main_~i~0#1 < 1048); 574#L18-4 main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 570#L23-2 [2022-12-13 22:22:48,315 INFO L750 eck$LassoCheckResult]: Loop: 570#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 566#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 567#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1; 577#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 570#L23-2 [2022-12-13 22:22:48,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:48,316 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2022-12-13 22:22:48,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:48,316 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229534973] [2022-12-13 22:22:48,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:48,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:48,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:48,730 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:48,730 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:22:48,730 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229534973] [2022-12-13 22:22:48,731 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [229534973] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:22:48,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2139298170] [2022-12-13 22:22:48,731 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-12-13 22:22:48,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:22:48,731 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:48,732 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:22:48,733 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-12-13 22:22:48,798 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-12-13 22:22:48,798 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:22:48,800 INFO L263 TraceCheckSpWp]: Trace formula consists of 274 conjuncts, 24 conjunts are in the unsatisfiable core [2022-12-13 22:22:48,801 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:22:48,862 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:48,863 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:22:49,309 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:49,309 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2139298170] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:22:49,309 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:22:49,310 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2022-12-13 22:22:49,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438131777] [2022-12-13 22:22:49,310 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:22:49,311 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:22:49,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:49,311 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 5 times [2022-12-13 22:22:49,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:49,311 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290937177] [2022-12-13 22:22:49,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:49,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:49,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:49,315 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:22:49,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:22:49,317 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:22:49,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:22:49,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2022-12-13 22:22:49,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2022-12-13 22:22:49,387 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. cyclomatic complexity: 5 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 49 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:49,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:22:49,545 INFO L93 Difference]: Finished difference Result 100 states and 103 transitions. [2022-12-13 22:22:49,545 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 103 transitions. [2022-12-13 22:22:49,546 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:49,547 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 103 transitions. [2022-12-13 22:22:49,547 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-12-13 22:22:49,547 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-12-13 22:22:49,548 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 103 transitions. [2022-12-13 22:22:49,548 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:22:49,548 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2022-12-13 22:22:49,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 103 transitions. [2022-12-13 22:22:49,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2022-12-13 22:22:49,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.03) internal successors, (103), 99 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:22:49,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2022-12-13 22:22:49,554 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2022-12-13 22:22:49,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-12-13 22:22:49,555 INFO L428 stractBuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2022-12-13 22:22:49,555 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2022-12-13 22:22:49,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 103 transitions. [2022-12-13 22:22:49,556 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:22:49,556 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:22:49,556 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:22:49,558 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2022-12-13 22:22:49,558 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:22:49,559 INFO L748 eck$LassoCheckResult]: Stem: 1062#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1063#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 1057#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1058#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1059#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1054#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1055#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1151#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1150#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1149#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1148#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1147#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1146#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1145#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1144#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1143#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1142#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1141#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1140#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1139#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1138#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1137#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1136#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1135#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1134#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1133#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1132#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1131#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1130#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1129#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1128#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1127#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1126#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1125#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1124#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1123#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1122#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1121#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1120#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1119#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1118#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1117#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1116#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1115#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1114#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1113#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1112#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1111#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1110#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1109#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1108#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1107#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1106#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1105#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1104#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1103#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1102#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1101#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1100#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1099#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1098#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1097#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1096#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1095#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1094#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1093#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1092#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1091#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1090#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1089#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1088#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1087#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1086#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1085#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1084#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1083#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1082#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1081#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1080#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1079#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1078#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1077#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1076#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1075#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1074#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1073#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1072#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1071#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1070#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1069#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1068#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1067#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1066#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 1065#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1064#L18-3 assume !(main_~i~0#1 < 1048); 1060#L18-4 main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 1056#L23-2 [2022-12-13 22:22:49,559 INFO L750 eck$LassoCheckResult]: Loop: 1056#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 1052#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 1053#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1; 1061#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 1056#L23-2 [2022-12-13 22:22:49,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:22:49,559 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2022-12-13 22:22:49,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:22:49,560 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551375107] [2022-12-13 22:22:49,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:22:49,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:22:49,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:22:50,835 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:22:50,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:22:50,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1551375107] [2022-12-13 22:22:50,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1551375107] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:22:50,836 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1069041391] [2022-12-13 22:22:50,836 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-12-13 22:22:50,836 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:22:50,836 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:22:50,837 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:22:50,838 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-12-13 22:23:09,493 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2022-12-13 22:23:09,494 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-12-13 22:23:09,509 INFO L263 TraceCheckSpWp]: Trace formula consists of 538 conjuncts, 48 conjunts are in the unsatisfiable core [2022-12-13 22:23:09,513 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-12-13 22:23:09,623 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:23:09,623 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-12-13 22:23:11,488 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:23:11,488 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1069041391] provided 0 perfect and 2 imperfect interpolant sequences [2022-12-13 22:23:11,488 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-12-13 22:23:11,488 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2022-12-13 22:23:11,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [376738053] [2022-12-13 22:23:11,489 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-12-13 22:23:11,490 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 22:23:11,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:23:11,490 INFO L85 PathProgramCache]: Analyzing trace with hash 1573223, now seen corresponding path program 6 times [2022-12-13 22:23:11,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:23:11,490 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127499366] [2022-12-13 22:23:11,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:23:11,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:23:11,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:23:11,494 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 22:23:11,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 22:23:11,498 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 22:23:11,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 22:23:11,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2022-12-13 22:23:11,573 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2022-12-13 22:23:11,573 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. cyclomatic complexity: 5 Second operand has 97 states, 97 states have (on average 1.9896907216494846) internal successors, (193), 97 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:23:11,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 22:23:11,867 INFO L93 Difference]: Finished difference Result 196 states and 199 transitions. [2022-12-13 22:23:11,867 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 199 transitions. [2022-12-13 22:23:11,870 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:23:11,872 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 199 transitions. [2022-12-13 22:23:11,872 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2022-12-13 22:23:11,872 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2022-12-13 22:23:11,872 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 199 transitions. [2022-12-13 22:23:11,874 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 22:23:11,874 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2022-12-13 22:23:11,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 199 transitions. [2022-12-13 22:23:11,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2022-12-13 22:23:11,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0153061224489797) internal successors, (199), 195 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 22:23:11,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 199 transitions. [2022-12-13 22:23:11,885 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 199 transitions. [2022-12-13 22:23:11,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2022-12-13 22:23:11,886 INFO L428 stractBuchiCegarLoop]: Abstraction has 196 states and 199 transitions. [2022-12-13 22:23:11,886 INFO L335 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2022-12-13 22:23:11,886 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 199 transitions. [2022-12-13 22:23:11,888 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2022-12-13 22:23:11,888 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 22:23:11,888 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 22:23:11,891 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2022-12-13 22:23:11,891 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-12-13 22:23:11,892 INFO L748 eck$LassoCheckResult]: Stem: 2027#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2028#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset, main_#t~nondet3#1, main_#t~post2#1, main_~i~0#1, main_#t~nondet6#1, main_#t~post7#1.base, main_#t~post7#1.offset, main_#t~mem8#1, main_#t~post9#1, main_#t~mem4#1, main_#t~short5#1, main_~p~0#1.base, main_~p~0#1.offset, main_~q~0#1.base, main_~q~0#1.offset;call main_#t~malloc1#1.base, main_#t~malloc1#1.offset := #Ultimate.allocOnHeap(4192);main_~p~0#1.base, main_~p~0#1.offset := main_#t~malloc1#1.base, main_#t~malloc1#1.offset;havoc main_#t~malloc1#1.base, main_#t~malloc1#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset;main_~i~0#1 := 0; 2023#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2024#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2025#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2020#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2021#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2213#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2212#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2211#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2210#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2209#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2208#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2207#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2206#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2205#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2204#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2203#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2202#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2201#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2200#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2199#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2198#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2197#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2196#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2195#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2194#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2193#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2192#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2191#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2190#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2189#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2188#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2187#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2186#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2185#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2184#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2183#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2182#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2181#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2180#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2179#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2178#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2177#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2176#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2175#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2174#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2173#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2172#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2171#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2170#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2169#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2168#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2167#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2166#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2165#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2164#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2163#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2162#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2161#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2160#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2159#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2158#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2157#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2156#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2155#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2154#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2153#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2152#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2151#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2150#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2149#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2148#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2147#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2146#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2145#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2144#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2143#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2142#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2141#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2140#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2139#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2138#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2137#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2136#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2135#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2134#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2133#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2132#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2131#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2130#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2129#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2128#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2127#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2126#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2125#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2124#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2123#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2122#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2121#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2120#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2119#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2118#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2117#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2116#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2115#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2114#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2113#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2112#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2111#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2110#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2109#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2108#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2107#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2106#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2105#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2104#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2103#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2102#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2101#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2100#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2099#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2098#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2097#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2096#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2095#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2094#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2093#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2092#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2091#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2090#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2089#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2088#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2087#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2086#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2085#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2084#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2083#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2082#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2081#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2080#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2079#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2078#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2077#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2076#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2075#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2074#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2073#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2072#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2071#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2070#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2069#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2068#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2067#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2066#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2065#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2064#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2063#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2062#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2061#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2060#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2059#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2058#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2057#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2056#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2055#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2054#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2053#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2052#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2051#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2050#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2049#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2048#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2047#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2046#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2045#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2044#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2043#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2042#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2041#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2040#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2039#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2038#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2037#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2036#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2035#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2034#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2033#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2032#L18-3 assume !!(main_~i~0#1 < 1048);call write~int(main_#t~nondet3#1, main_~q~0#1.base, main_~q~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet3#1; 2031#L18-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2030#L18-3 assume !(main_~i~0#1 < 1048); 2026#L18-4 main_~q~0#1.base, main_~q~0#1.offset := main_~p~0#1.base, main_~p~0#1.offset; 2022#L23-2 [2022-12-13 22:23:11,892 INFO L750 eck$LassoCheckResult]: Loop: 2022#L23-2 assume main_~q~0#1.base == main_~p~0#1.base;main_#t~short5#1 := main_~q~0#1.offset < 4192 + main_~p~0#1.offset; 2018#L22-1 assume main_#t~short5#1;call main_#t~mem4#1 := read~int(main_~q~0#1.base, main_~q~0#1.offset, 4);main_#t~short5#1 := main_#t~mem4#1 >= 0; 2019#L22-3 assume !!main_#t~short5#1;havoc main_#t~mem4#1;havoc main_#t~short5#1; 2029#L23 assume 0 != main_#t~nondet6#1;havoc main_#t~nondet6#1;main_#t~post7#1.base, main_#t~post7#1.offset := main_~q~0#1.base, main_~q~0#1.offset;main_~q~0#1.base, main_~q~0#1.offset := main_#t~post7#1.base, 4 + main_#t~post7#1.offset;havoc main_#t~post7#1.base, main_#t~post7#1.offset; 2022#L23-2 [2022-12-13 22:23:11,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 22:23:11,893 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2022-12-13 22:23:11,893 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 22:23:11,893 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [129155134] [2022-12-13 22:23:11,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 22:23:11,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 22:23:11,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 22:23:16,175 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 22:23:16,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 22:23:16,175 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [129155134] [2022-12-13 22:23:16,175 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [129155134] provided 0 perfect and 1 imperfect interpolant sequences [2022-12-13 22:23:16,175 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1771879683] [2022-12-13 22:23:16,175 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-12-13 22:23:16,175 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-12-13 22:23:16,176 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 22:23:16,176 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-12-13 22:23:16,177 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3cdb80e0-e836-42bc-9aee-75127ac87883/bin/uautomizer-uyxdKDjOR8/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process