./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 14:28:54,929 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 14:28:54,930 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 14:28:54,948 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 14:28:54,948 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 14:28:54,949 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 14:28:54,951 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 14:28:54,952 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 14:28:54,954 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 14:28:54,955 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 14:28:54,956 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 14:28:54,957 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 14:28:54,957 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 14:28:54,958 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 14:28:54,959 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 14:28:54,960 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 14:28:54,961 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 14:28:54,962 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 14:28:54,963 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 14:28:54,965 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 14:28:54,966 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 14:28:54,967 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 14:28:54,968 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 14:28:54,969 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 14:28:54,973 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 14:28:54,973 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 14:28:54,973 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 14:28:54,974 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 14:28:54,974 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 14:28:54,975 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 14:28:54,976 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 14:28:54,976 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 14:28:54,977 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 14:28:54,978 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 14:28:54,979 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 14:28:54,979 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 14:28:54,979 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 14:28:54,980 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 14:28:54,980 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 14:28:54,981 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 14:28:54,981 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 14:28:54,982 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-12-13 14:28:55,004 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 14:28:55,004 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 14:28:55,005 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 14:28:55,005 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 14:28:55,006 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 14:28:55,006 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 14:28:55,006 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 14:28:55,007 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 14:28:55,007 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 14:28:55,007 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 14:28:55,007 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 14:28:55,007 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 14:28:55,007 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 14:28:55,008 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 14:28:55,008 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 14:28:55,008 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 14:28:55,008 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 14:28:55,008 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 14:28:55,009 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 14:28:55,009 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 14:28:55,009 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 14:28:55,009 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 14:28:55,009 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 14:28:55,010 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 14:28:55,010 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 14:28:55,010 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 14:28:55,010 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 14:28:55,010 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 14:28:55,011 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 14:28:55,011 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 14:28:55,011 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 14:28:55,012 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 14:28:55,012 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b [2022-12-13 14:28:55,200 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 14:28:55,216 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 14:28:55,218 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 14:28:55,219 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 14:28:55,219 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 14:28:55,220 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c [2022-12-13 14:28:57,757 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 14:28:57,923 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 14:28:57,923 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c [2022-12-13 14:28:57,929 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/data/689bed78e/2d48cae0efc04377be3e1a7325cade94/FLAGcadb113b8 [2022-12-13 14:28:57,940 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/data/689bed78e/2d48cae0efc04377be3e1a7325cade94 [2022-12-13 14:28:57,942 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 14:28:57,943 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 14:28:57,944 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 14:28:57,944 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 14:28:57,946 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 14:28:57,947 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 02:28:57" (1/1) ... [2022-12-13 14:28:57,947 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@35836042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:57, skipping insertion in model container [2022-12-13 14:28:57,947 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 02:28:57" (1/1) ... [2022-12-13 14:28:57,953 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 14:28:57,978 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 14:28:58,162 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c[15075,15088] [2022-12-13 14:28:58,163 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 14:28:58,175 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 14:28:58,224 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c[15075,15088] [2022-12-13 14:28:58,225 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 14:28:58,240 INFO L208 MainTranslator]: Completed translation [2022-12-13 14:28:58,240 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58 WrapperNode [2022-12-13 14:28:58,240 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 14:28:58,241 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 14:28:58,241 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 14:28:58,241 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 14:28:58,247 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,256 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,286 INFO L138 Inliner]: procedures = 25, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 347 [2022-12-13 14:28:58,286 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 14:28:58,287 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 14:28:58,287 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 14:28:58,287 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 14:28:58,295 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,295 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,298 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,298 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,305 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,311 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,313 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,315 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,318 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 14:28:58,319 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 14:28:58,319 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 14:28:58,319 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 14:28:58,320 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (1/1) ... [2022-12-13 14:28:58,327 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 14:28:58,340 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 14:28:58,351 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 14:28:58,353 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f621d02-dd28-4db4-964e-03c948755267/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 14:28:58,386 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 14:28:58,386 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 14:28:58,386 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 14:28:58,386 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 14:28:58,465 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 14:28:58,467 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 14:28:58,777 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 14:28:58,783 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 14:28:58,783 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-12-13 14:28:58,785 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 02:28:58 BoogieIcfgContainer [2022-12-13 14:28:58,785 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 14:28:58,786 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 14:28:58,786 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 14:28:58,788 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 14:28:58,789 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 14:28:58,789 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 02:28:57" (1/3) ... [2022-12-13 14:28:58,790 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@37fda7c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 02:28:58, skipping insertion in model container [2022-12-13 14:28:58,790 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 14:28:58,790 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 02:28:58" (2/3) ... [2022-12-13 14:28:58,790 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@37fda7c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 02:28:58, skipping insertion in model container [2022-12-13 14:28:58,790 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 14:28:58,790 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 02:28:58" (3/3) ... [2022-12-13 14:28:58,791 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.ufo.BOUNDED-12.pals.c [2022-12-13 14:28:58,837 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 14:28:58,837 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 14:28:58,837 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 14:28:58,837 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 14:28:58,837 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 14:28:58,837 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 14:28:58,837 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 14:28:58,838 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 14:28:58,841 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:58,857 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-12-13 14:28:58,857 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 14:28:58,858 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 14:28:58,863 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:58,863 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:58,863 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 14:28:58,864 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:58,867 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2022-12-13 14:28:58,868 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 14:28:58,868 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 14:28:58,868 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:58,868 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:58,874 INFO L748 eck$LassoCheckResult]: Stem: 31#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 35#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 63#L228true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 43#L228-1true init_#res#1 := init_~tmp~0#1; 65#init_returnLabel#1true main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 38#L22true assume !(0 == assume_abort_if_not_~cond#1); 68#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 73#L467-2true [2022-12-13 14:28:58,875 INFO L750 eck$LassoCheckResult]: Loop: 73#L467-2true assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 19#L78true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 39#L78-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 17#L104true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 94#L104-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 80#L129true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 10#L129-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 67#L154true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 95#L154-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 84#L179true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 21#L179-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 77#L204true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 69#L204-2true assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 86#L397true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 74#L397-1true check_#res#1 := check_~tmp~1#1; 15#check_returnLabel#1true main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 82#L500true assume !(0 == assert_~arg#1 % 256); 22#L495true assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 73#L467-2true [2022-12-13 14:28:58,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:58,879 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2022-12-13 14:28:58,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:58,886 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806309168] [2022-12-13 14:28:58,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:58,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:58,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 14:28:59,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 14:28:59,100 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 14:28:59,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806309168] [2022-12-13 14:28:59,100 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806309168] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 14:28:59,100 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 14:28:59,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 14:28:59,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044205475] [2022-12-13 14:28:59,102 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 14:28:59,105 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 14:28:59,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,106 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 1 times [2022-12-13 14:28:59,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,106 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062485568] [2022-12-13 14:28:59,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 14:28:59,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 14:28:59,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 14:28:59,335 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062485568] [2022-12-13 14:28:59,335 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1062485568] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 14:28:59,335 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 14:28:59,336 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 14:28:59,336 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867824166] [2022-12-13 14:28:59,336 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 14:28:59,337 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 14:28:59,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 14:28:59,362 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 14:28:59,362 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 14:28:59,364 INFO L87 Difference]: Start difference. First operand has 97 states, 96 states have (on average 1.7604166666666667) internal successors, (169), 96 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:59,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 14:28:59,453 INFO L93 Difference]: Finished difference Result 100 states and 168 transitions. [2022-12-13 14:28:59,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 168 transitions. [2022-12-13 14:28:59,457 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-12-13 14:28:59,461 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 92 states and 121 transitions. [2022-12-13 14:28:59,462 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-12-13 14:28:59,463 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-12-13 14:28:59,463 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 121 transitions. [2022-12-13 14:28:59,464 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 14:28:59,464 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-12-13 14:28:59,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 121 transitions. [2022-12-13 14:28:59,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-12-13 14:28:59,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.315217391304348) internal successors, (121), 91 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:59,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 121 transitions. [2022-12-13 14:28:59,494 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-12-13 14:28:59,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 14:28:59,499 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 121 transitions. [2022-12-13 14:28:59,499 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 14:28:59,499 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 121 transitions. [2022-12-13 14:28:59,501 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-12-13 14:28:59,501 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 14:28:59,501 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 14:28:59,502 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:59,503 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:59,503 INFO L748 eck$LassoCheckResult]: Stem: 287#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 288#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 260#L228 assume 0 == ~r1~0; 261#L229 assume ~id1~0 >= 0; 231#L230 assume 0 == ~st1~0; 232#L231 assume ~send1~0 == ~id1~0; 245#L232 assume 0 == ~mode1~0 % 256; 305#L233 assume ~id2~0 >= 0; 221#L234 assume 0 == ~st2~0; 222#L235 assume ~send2~0 == ~id2~0; 296#L236 assume 0 == ~mode2~0 % 256; 291#L237 assume ~id3~0 >= 0; 277#L238 assume 0 == ~st3~0; 278#L239 assume ~send3~0 == ~id3~0; 275#L240 assume 0 == ~mode3~0 % 256; 276#L241 assume ~id4~0 >= 0; 280#L242 assume 0 == ~st4~0; 239#L243 assume ~send4~0 == ~id4~0; 233#L244 assume 0 == ~mode4~0 % 256; 234#L245 assume ~id5~0 >= 0; 279#L246 assume 0 == ~st5~0; 293#L247 assume ~send5~0 == ~id5~0; 294#L248 assume 0 == ~mode5~0 % 256; 223#L249 assume ~id6~0 >= 0; 224#L250 assume 0 == ~st6~0; 246#L251 assume ~send6~0 == ~id6~0; 247#L252 assume 0 == ~mode6~0 % 256; 251#L253 assume ~id1~0 != ~id2~0; 252#L254 assume ~id1~0 != ~id3~0; 253#L255 assume ~id1~0 != ~id4~0; 254#L256 assume ~id1~0 != ~id5~0; 300#L257 assume ~id1~0 != ~id6~0; 289#L258 assume ~id2~0 != ~id3~0; 215#L259 assume ~id2~0 != ~id4~0; 216#L260 assume ~id2~0 != ~id5~0; 306#L261 assume ~id2~0 != ~id6~0; 302#L262 assume ~id3~0 != ~id4~0; 303#L263 assume ~id3~0 != ~id5~0; 304#L264 assume ~id3~0 != ~id6~0; 219#L265 assume ~id4~0 != ~id5~0; 220#L266 assume ~id4~0 != ~id6~0; 240#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 274#L228-1 init_#res#1 := init_~tmp~0#1; 271#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 272#L22 assume !(0 == assume_abort_if_not_~cond#1); 284#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 270#L467-2 [2022-12-13 14:28:59,504 INFO L750 eck$LassoCheckResult]: Loop: 270#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 264#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 238#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 257#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 259#L104-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 297#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 241#L129-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 242#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 250#L154-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 301#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 267#L179-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 268#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 285#L204-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 286#L397 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 236#L397-1 check_#res#1 := check_~tmp~1#1; 255#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 256#L500 assume !(0 == assert_~arg#1 % 256); 269#L495 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 270#L467-2 [2022-12-13 14:28:59,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,504 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2022-12-13 14:28:59,504 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,505 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455917875] [2022-12-13 14:28:59,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,527 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 14:28:59,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,572 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 14:28:59,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,573 INFO L85 PathProgramCache]: Analyzing trace with hash 1869415339, now seen corresponding path program 2 times [2022-12-13 14:28:59,573 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,573 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805042841] [2022-12-13 14:28:59,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 14:28:59,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 14:28:59,716 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 14:28:59,716 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805042841] [2022-12-13 14:28:59,716 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [805042841] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 14:28:59,716 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 14:28:59,716 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 14:28:59,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399057164] [2022-12-13 14:28:59,717 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 14:28:59,717 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 14:28:59,717 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 14:28:59,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 14:28:59,718 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 14:28:59,718 INFO L87 Difference]: Start difference. First operand 92 states and 121 transitions. cyclomatic complexity: 30 Second operand has 5 states, 5 states have (on average 3.6) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:59,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 14:28:59,759 INFO L93 Difference]: Finished difference Result 95 states and 123 transitions. [2022-12-13 14:28:59,759 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 123 transitions. [2022-12-13 14:28:59,760 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-12-13 14:28:59,761 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 92 states and 118 transitions. [2022-12-13 14:28:59,761 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 92 [2022-12-13 14:28:59,761 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 92 [2022-12-13 14:28:59,761 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 118 transitions. [2022-12-13 14:28:59,762 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 14:28:59,762 INFO L218 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-12-13 14:28:59,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 118 transitions. [2022-12-13 14:28:59,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2022-12-13 14:28:59,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.2826086956521738) internal successors, (118), 91 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:59,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 118 transitions. [2022-12-13 14:28:59,768 INFO L240 hiAutomatonCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-12-13 14:28:59,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 14:28:59,770 INFO L428 stractBuchiCegarLoop]: Abstraction has 92 states and 118 transitions. [2022-12-13 14:28:59,770 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 14:28:59,770 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 118 transitions. [2022-12-13 14:28:59,771 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 46 [2022-12-13 14:28:59,772 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 14:28:59,772 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 14:28:59,773 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:59,773 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:59,773 INFO L748 eck$LassoCheckResult]: Stem: 486#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 487#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 459#L228 assume 0 == ~r1~0; 460#L229 assume ~id1~0 >= 0; 430#L230 assume 0 == ~st1~0; 431#L231 assume ~send1~0 == ~id1~0; 444#L232 assume 0 == ~mode1~0 % 256; 504#L233 assume ~id2~0 >= 0; 420#L234 assume 0 == ~st2~0; 421#L235 assume ~send2~0 == ~id2~0; 495#L236 assume 0 == ~mode2~0 % 256; 490#L237 assume ~id3~0 >= 0; 476#L238 assume 0 == ~st3~0; 477#L239 assume ~send3~0 == ~id3~0; 474#L240 assume 0 == ~mode3~0 % 256; 475#L241 assume ~id4~0 >= 0; 482#L242 assume 0 == ~st4~0; 437#L243 assume ~send4~0 == ~id4~0; 434#L244 assume 0 == ~mode4~0 % 256; 435#L245 assume ~id5~0 >= 0; 478#L246 assume 0 == ~st5~0; 492#L247 assume ~send5~0 == ~id5~0; 493#L248 assume 0 == ~mode5~0 % 256; 425#L249 assume ~id6~0 >= 0; 426#L250 assume 0 == ~st6~0; 445#L251 assume ~send6~0 == ~id6~0; 446#L252 assume 0 == ~mode6~0 % 256; 452#L253 assume ~id1~0 != ~id2~0; 453#L254 assume ~id1~0 != ~id3~0; 454#L255 assume ~id1~0 != ~id4~0; 455#L256 assume ~id1~0 != ~id5~0; 499#L257 assume ~id1~0 != ~id6~0; 488#L258 assume ~id2~0 != ~id3~0; 414#L259 assume ~id2~0 != ~id4~0; 415#L260 assume ~id2~0 != ~id5~0; 505#L261 assume ~id2~0 != ~id6~0; 501#L262 assume ~id3~0 != ~id4~0; 502#L263 assume ~id3~0 != ~id5~0; 503#L264 assume ~id3~0 != ~id6~0; 418#L265 assume ~id4~0 != ~id5~0; 419#L266 assume ~id4~0 != ~id6~0; 438#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 473#L228-1 init_#res#1 := init_~tmp~0#1; 470#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 471#L22 assume !(0 == assume_abort_if_not_~cond#1); 483#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 469#L467-2 [2022-12-13 14:28:59,773 INFO L750 eck$LassoCheckResult]: Loop: 469#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 465#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 436#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 456#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 458#L104-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 496#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 440#L129-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 441#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 449#L154-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 500#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 463#L179-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 464#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 484#L204-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 485#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 498#L398 assume ~r1~0 >= 6; 433#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 442#L397-1 check_#res#1 := check_~tmp~1#1; 450#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 451#L500 assume !(0 == assert_~arg#1 % 256); 468#L495 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 469#L467-2 [2022-12-13 14:28:59,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,774 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2022-12-13 14:28:59,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,774 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522632694] [2022-12-13 14:28:59,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,786 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 14:28:59,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,800 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 14:28:59,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,801 INFO L85 PathProgramCache]: Analyzing trace with hash -204006149, now seen corresponding path program 1 times [2022-12-13 14:28:59,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,801 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709225630] [2022-12-13 14:28:59,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 14:28:59,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 14:28:59,829 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 14:28:59,830 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709225630] [2022-12-13 14:28:59,830 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1709225630] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 14:28:59,830 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 14:28:59,830 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 14:28:59,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564179828] [2022-12-13 14:28:59,830 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 14:28:59,831 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 14:28:59,831 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 14:28:59,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 14:28:59,832 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 14:28:59,832 INFO L87 Difference]: Start difference. First operand 92 states and 118 transitions. cyclomatic complexity: 27 Second operand has 3 states, 3 states have (on average 6.666666666666667) internal successors, (20), 3 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:59,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 14:28:59,851 INFO L93 Difference]: Finished difference Result 132 states and 179 transitions. [2022-12-13 14:28:59,851 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 132 states and 179 transitions. [2022-12-13 14:28:59,853 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-12-13 14:28:59,854 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 132 states to 132 states and 179 transitions. [2022-12-13 14:28:59,854 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 132 [2022-12-13 14:28:59,855 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 132 [2022-12-13 14:28:59,855 INFO L73 IsDeterministic]: Start isDeterministic. Operand 132 states and 179 transitions. [2022-12-13 14:28:59,856 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 14:28:59,856 INFO L218 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-12-13 14:28:59,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states and 179 transitions. [2022-12-13 14:28:59,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2022-12-13 14:28:59,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 132 states, 132 states have (on average 1.356060606060606) internal successors, (179), 131 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 14:28:59,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 179 transitions. [2022-12-13 14:28:59,860 INFO L240 hiAutomatonCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-12-13 14:28:59,861 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 14:28:59,861 INFO L428 stractBuchiCegarLoop]: Abstraction has 132 states and 179 transitions. [2022-12-13 14:28:59,861 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 14:28:59,861 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 132 states and 179 transitions. [2022-12-13 14:28:59,862 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 86 [2022-12-13 14:28:59,863 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 14:28:59,863 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 14:28:59,864 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:59,864 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 14:28:59,864 INFO L748 eck$LassoCheckResult]: Stem: 716#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 717#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 689#L228 assume 0 == ~r1~0; 690#L229 assume ~id1~0 >= 0; 660#L230 assume 0 == ~st1~0; 661#L231 assume ~send1~0 == ~id1~0; 672#L232 assume 0 == ~mode1~0 % 256; 738#L233 assume ~id2~0 >= 0; 650#L234 assume 0 == ~st2~0; 651#L235 assume ~send2~0 == ~id2~0; 727#L236 assume 0 == ~mode2~0 % 256; 720#L237 assume ~id3~0 >= 0; 706#L238 assume 0 == ~st3~0; 707#L239 assume ~send3~0 == ~id3~0; 704#L240 assume 0 == ~mode3~0 % 256; 705#L241 assume ~id4~0 >= 0; 709#L242 assume 0 == ~st4~0; 667#L243 assume ~send4~0 == ~id4~0; 662#L244 assume 0 == ~mode4~0 % 256; 663#L245 assume ~id5~0 >= 0; 708#L246 assume 0 == ~st5~0; 723#L247 assume ~send5~0 == ~id5~0; 724#L248 assume 0 == ~mode5~0 % 256; 652#L249 assume ~id6~0 >= 0; 653#L250 assume 0 == ~st6~0; 675#L251 assume ~send6~0 == ~id6~0; 676#L252 assume 0 == ~mode6~0 % 256; 680#L253 assume ~id1~0 != ~id2~0; 681#L254 assume ~id1~0 != ~id3~0; 682#L255 assume ~id1~0 != ~id4~0; 683#L256 assume ~id1~0 != ~id5~0; 731#L257 assume ~id1~0 != ~id6~0; 718#L258 assume ~id2~0 != ~id3~0; 644#L259 assume ~id2~0 != ~id4~0; 645#L260 assume ~id2~0 != ~id5~0; 739#L261 assume ~id2~0 != ~id6~0; 735#L262 assume ~id3~0 != ~id4~0; 736#L263 assume ~id3~0 != ~id5~0; 737#L264 assume ~id3~0 != ~id6~0; 648#L265 assume ~id4~0 != ~id5~0; 649#L266 assume ~id4~0 != ~id6~0; 668#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 703#L228-1 init_#res#1 := init_~tmp~0#1; 700#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 701#L22 assume !(0 == assume_abort_if_not_~cond#1); 713#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 699#L467-2 [2022-12-13 14:28:59,864 INFO L750 eck$LassoCheckResult]: Loop: 699#L467-2 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 693#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 666#L78-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 686#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 688#L104-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 728#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 669#L129-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 670#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 679#L154-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 740#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 696#L179-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 697#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 714#L204-2 assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 715#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 734#L398 assume !(~r1~0 >= 6); 664#L401 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 665#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 722#L397-1 check_#res#1 := check_~tmp~1#1; 684#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 685#L500 assume !(0 == assert_~arg#1 % 256); 698#L495 assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 699#L467-2 [2022-12-13 14:28:59,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2022-12-13 14:28:59,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,865 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381279541] [2022-12-13 14:28:59,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,876 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 14:28:59,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,890 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 14:28:59,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,890 INFO L85 PathProgramCache]: Analyzing trace with hash -382651293, now seen corresponding path program 1 times [2022-12-13 14:28:59,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,891 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918509872] [2022-12-13 14:28:59,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,913 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 14:28:59,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,930 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 14:28:59,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 14:28:59,930 INFO L85 PathProgramCache]: Analyzing trace with hash -706871679, now seen corresponding path program 1 times [2022-12-13 14:28:59,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 14:28:59,931 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846860177] [2022-12-13 14:28:59,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 14:28:59,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 14:28:59,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:28:59,984 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 14:29:00,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 14:29:00,015 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 14:29:03,876 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 14:29:03,877 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 14:29:03,877 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 14:29:03,877 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 14:29:03,877 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-12-13 14:29:03,877 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 14:29:03,877 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 14:29:03,877 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 14:29:03,877 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.ufo.BOUNDED-12.pals.c_Iteration4_Loop [2022-12-13 14:29:03,877 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 14:29:03,877 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 14:29:03,902 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:03,908 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:03,911 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:03,915 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:03,917 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,429 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,433 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,436 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,440 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,444 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,447 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,451 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,452 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:05,455 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 14:29:07,298 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 28