./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash de654b8e722eb26a01715e643a442ee96e677f28cab0e875133e4d1d7edb214d --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 13:46:47,537 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 13:46:47,538 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 13:46:47,552 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 13:46:47,552 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 13:46:47,552 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 13:46:47,553 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 13:46:47,554 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 13:46:47,555 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 13:46:47,556 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 13:46:47,556 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 13:46:47,557 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 13:46:47,557 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 13:46:47,558 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 13:46:47,559 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 13:46:47,559 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 13:46:47,560 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 13:46:47,561 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 13:46:47,562 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 13:46:47,563 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 13:46:47,563 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 13:46:47,564 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 13:46:47,565 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 13:46:47,566 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 13:46:47,568 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 13:46:47,568 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 13:46:47,568 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 13:46:47,569 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 13:46:47,569 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 13:46:47,570 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 13:46:47,570 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 13:46:47,571 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 13:46:47,571 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 13:46:47,572 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 13:46:47,572 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 13:46:47,572 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 13:46:47,573 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 13:46:47,573 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 13:46:47,573 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 13:46:47,574 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 13:46:47,574 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 13:46:47,575 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-12-13 13:46:47,590 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 13:46:47,590 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 13:46:47,590 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 13:46:47,591 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 13:46:47,591 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 13:46:47,591 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 13:46:47,592 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 13:46:47,592 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 13:46:47,592 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 13:46:47,592 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 13:46:47,592 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 13:46:47,592 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 13:46:47,592 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 13:46:47,592 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 13:46:47,593 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 13:46:47,594 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 13:46:47,594 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 13:46:47,594 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 13:46:47,594 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 13:46:47,594 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 13:46:47,594 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 13:46:47,595 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 13:46:47,595 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> de654b8e722eb26a01715e643a442ee96e677f28cab0e875133e4d1d7edb214d [2022-12-13 13:46:47,784 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 13:46:47,805 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 13:46:47,807 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 13:46:47,808 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 13:46:47,809 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 13:46:47,810 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c [2022-12-13 13:46:50,391 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 13:46:50,573 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 13:46:50,573 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c [2022-12-13 13:46:50,583 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/data/00841f16d/ab0b7d64919043ae8f955f9a716ad2ff/FLAG5938d8542 [2022-12-13 13:46:50,594 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/data/00841f16d/ab0b7d64919043ae8f955f9a716ad2ff [2022-12-13 13:46:50,595 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 13:46:50,596 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 13:46:50,597 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 13:46:50,597 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 13:46:50,600 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 13:46:50,601 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,601 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@799f9e48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50, skipping insertion in model container [2022-12-13 13:46:50,601 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,607 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 13:46:50,629 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 13:46:50,775 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c[20121,20134] [2022-12-13 13:46:50,775 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 13:46:50,785 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 13:46:50,824 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/sv-benchmarks/c/seq-mthreaded/pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c[20121,20134] [2022-12-13 13:46:50,825 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 13:46:50,836 INFO L208 MainTranslator]: Completed translation [2022-12-13 13:46:50,837 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50 WrapperNode [2022-12-13 13:46:50,837 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 13:46:50,837 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 13:46:50,837 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 13:46:50,838 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 13:46:50,843 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,852 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,878 INFO L138 Inliner]: procedures = 27, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 398 [2022-12-13 13:46:50,878 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 13:46:50,879 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 13:46:50,879 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 13:46:50,879 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 13:46:50,886 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,886 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,890 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,890 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,897 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,903 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,906 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,907 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,912 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 13:46:50,912 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 13:46:50,912 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 13:46:50,912 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 13:46:50,913 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (1/1) ... [2022-12-13 13:46:50,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 13:46:50,930 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 13:46:50,942 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 13:46:50,944 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_50bd8332-792a-4ab5-9b64-b9cf462abbaa/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 13:46:50,975 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 13:46:50,976 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 13:46:50,976 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 13:46:50,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 13:46:51,054 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 13:46:51,056 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 13:46:51,427 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 13:46:51,435 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 13:46:51,435 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-12-13 13:46:51,437 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 01:46:51 BoogieIcfgContainer [2022-12-13 13:46:51,438 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 13:46:51,438 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 13:46:51,439 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 13:46:51,442 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 13:46:51,443 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:46:51,443 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 01:46:50" (1/3) ... [2022-12-13 13:46:51,444 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5c18e5a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 01:46:51, skipping insertion in model container [2022-12-13 13:46:51,444 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:46:51,444 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:46:50" (2/3) ... [2022-12-13 13:46:51,445 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5c18e5a9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 01:46:51, skipping insertion in model container [2022-12-13 13:46:51,445 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:46:51,445 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 01:46:51" (3/3) ... [2022-12-13 13:46:51,446 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c [2022-12-13 13:46:51,493 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 13:46:51,493 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 13:46:51,493 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 13:46:51,493 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 13:46:51,493 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 13:46:51,493 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 13:46:51,493 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 13:46:51,493 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 13:46:51,497 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 113 states, 112 states have (on average 1.7767857142857142) internal successors, (199), 112 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:51,513 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 53 [2022-12-13 13:46:51,513 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:46:51,513 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:46:51,519 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:51,519 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:51,519 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 13:46:51,520 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 113 states, 112 states have (on average 1.7767857142857142) internal successors, (199), 112 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:51,523 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 53 [2022-12-13 13:46:51,524 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:46:51,524 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:46:51,524 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:51,524 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:51,536 INFO L748 eck$LassoCheckResult]: Stem: 29#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 37#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 52#L262true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 23#L262-1true init_#res#1 := init_~tmp~0#1; 83#init_returnLabel#1true main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 44#L24true assume !(0 == assume_abort_if_not_~cond#1); 13#L23true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 46#L547-2true [2022-12-13 13:46:51,537 INFO L750 eck$LassoCheckResult]: Loop: 46#L547-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 51#L87true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 5#L87-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 100#L113true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 41#L113-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 61#L138true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 84#L138-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 47#L163true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 42#L163-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 15#L188true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 8#L188-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 106#L213true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 12#L213-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 24#L238true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 88#L238-2true assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 22#L471true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 95#L471-1true check_#res#1 := check_~tmp~1#1; 16#check_returnLabel#1true main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 109#L582true assume !(0 == assert_~arg#1 % 256); 65#L577true assume { :end_inline_assert } true; 46#L547-2true [2022-12-13 13:46:51,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:51,541 INFO L85 PathProgramCache]: Analyzing trace with hash 2087378158, now seen corresponding path program 1 times [2022-12-13 13:46:51,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:51,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049090950] [2022-12-13 13:46:51,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:51,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:51,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:46:51,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:46:51,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:46:51,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049090950] [2022-12-13 13:46:51,740 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2049090950] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:46:51,740 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:46:51,740 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:46:51,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102746079] [2022-12-13 13:46:51,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:46:51,746 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 13:46:51,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:51,747 INFO L85 PathProgramCache]: Analyzing trace with hash 1398300834, now seen corresponding path program 1 times [2022-12-13 13:46:51,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:51,747 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463815124] [2022-12-13 13:46:51,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:51,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:51,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:46:51,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:46:51,994 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:46:51,994 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463815124] [2022-12-13 13:46:51,995 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1463815124] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:46:51,995 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:46:51,995 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:46:51,995 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665722778] [2022-12-13 13:46:51,995 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:46:51,996 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:46:51,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:46:52,019 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 13:46:52,019 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 13:46:52,021 INFO L87 Difference]: Start difference. First operand has 113 states, 112 states have (on average 1.7767857142857142) internal successors, (199), 112 states have internal predecessors, (199), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:52,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:46:52,108 INFO L93 Difference]: Finished difference Result 112 states and 194 transitions. [2022-12-13 13:46:52,110 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 112 states and 194 transitions. [2022-12-13 13:46:52,112 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-12-13 13:46:52,115 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 112 states to 108 states and 141 transitions. [2022-12-13 13:46:52,116 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 108 [2022-12-13 13:46:52,116 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 108 [2022-12-13 13:46:52,117 INFO L73 IsDeterministic]: Start isDeterministic. Operand 108 states and 141 transitions. [2022-12-13 13:46:52,117 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:46:52,117 INFO L218 hiAutomatonCegarLoop]: Abstraction has 108 states and 141 transitions. [2022-12-13 13:46:52,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states and 141 transitions. [2022-12-13 13:46:52,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-12-13 13:46:52,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.3055555555555556) internal successors, (141), 107 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:52,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 141 transitions. [2022-12-13 13:46:52,139 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 141 transitions. [2022-12-13 13:46:52,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 13:46:52,142 INFO L428 stractBuchiCegarLoop]: Abstraction has 108 states and 141 transitions. [2022-12-13 13:46:52,143 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 13:46:52,143 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 141 transitions. [2022-12-13 13:46:52,144 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-12-13 13:46:52,144 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:46:52,144 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:46:52,145 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:52,145 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:52,146 INFO L748 eck$LassoCheckResult]: Stem: 295#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 296#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 305#L262 assume 0 == ~r1~0 % 256; 321#L263 assume ~id1~0 >= 0; 324#L264 assume 0 == ~st1~0; 325#L265 assume ~send1~0 == ~id1~0; 260#L266 assume 0 == ~mode1~0 % 256; 261#L267 assume ~id2~0 >= 0; 274#L268 assume 0 == ~st2~0; 275#L269 assume ~send2~0 == ~id2~0; 256#L270 assume 0 == ~mode2~0 % 256; 257#L271 assume ~id3~0 >= 0; 299#L272 assume 0 == ~st3~0; 306#L273 assume ~send3~0 == ~id3~0; 323#L274 assume 0 == ~mode3~0 % 256; 343#L275 assume ~id4~0 >= 0; 243#L276 assume 0 == ~st4~0; 244#L277 assume ~send4~0 == ~id4~0; 350#L278 assume 0 == ~mode4~0 % 256; 319#L279 assume ~id5~0 >= 0; 320#L280 assume 0 == ~st5~0; 266#L281 assume ~send5~0 == ~id5~0; 245#L282 assume 0 == ~mode5~0 % 256; 246#L283 assume ~id6~0 >= 0; 326#L284 assume 0 == ~st6~0; 327#L285 assume ~send6~0 == ~id6~0; 342#L286 assume 0 == ~mode6~0 % 256; 331#L287 assume ~id7~0 >= 0; 289#L288 assume 0 == ~st7~0; 290#L289 assume ~send7~0 == ~id7~0; 301#L290 assume 0 == ~mode7~0 % 256; 336#L291 assume ~id1~0 != ~id2~0; 337#L292 assume ~id1~0 != ~id3~0; 345#L293 assume ~id1~0 != ~id4~0; 349#L294 assume ~id1~0 != ~id5~0; 249#L295 assume ~id1~0 != ~id6~0; 250#L296 assume ~id1~0 != ~id7~0; 300#L297 assume ~id2~0 != ~id3~0; 297#L298 assume ~id2~0 != ~id4~0; 298#L299 assume ~id2~0 != ~id5~0; 304#L300 assume ~id2~0 != ~id6~0; 333#L301 assume ~id2~0 != ~id7~0; 340#L302 assume ~id3~0 != ~id4~0; 341#L303 assume ~id3~0 != ~id5~0; 347#L304 assume ~id3~0 != ~id6~0; 328#L305 assume ~id3~0 != ~id7~0; 329#L306 assume ~id4~0 != ~id5~0; 335#L307 assume ~id4~0 != ~id6~0; 258#L308 assume ~id4~0 != ~id7~0; 259#L309 assume ~id5~0 != ~id6~0; 334#L310 assume ~id5~0 != ~id7~0; 315#L311 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 285#L262-1 init_#res#1 := init_~tmp~0#1; 286#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 314#L24 assume !(0 == assume_abort_if_not_~cond#1); 264#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 265#L547-2 [2022-12-13 13:46:52,146 INFO L750 eck$LassoCheckResult]: Loop: 265#L547-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 316#L87 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 247#L87-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 248#L113 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 310#L113-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 311#L138 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 330#L138-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 317#L163 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 312#L163-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 267#L188 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 254#L188-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 255#L213 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 262#L213-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 263#L238 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 288#L238-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 282#L471 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1);check_~tmp~1#1 := 0; 283#L471-1 check_#res#1 := check_~tmp~1#1; 269#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 270#L582 assume !(0 == assert_~arg#1 % 256); 332#L577 assume { :end_inline_assert } true; 265#L547-2 [2022-12-13 13:46:52,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:52,146 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 1 times [2022-12-13 13:46:52,147 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:52,147 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816304647] [2022-12-13 13:46:52,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:52,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:52,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,164 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:46:52,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,206 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:46:52,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:52,207 INFO L85 PathProgramCache]: Analyzing trace with hash 1398300834, now seen corresponding path program 2 times [2022-12-13 13:46:52,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:52,207 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38455104] [2022-12-13 13:46:52,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:52,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:52,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:46:52,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:46:52,396 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:46:52,396 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38455104] [2022-12-13 13:46:52,396 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [38455104] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:46:52,396 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:46:52,396 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:46:52,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171418636] [2022-12-13 13:46:52,397 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:46:52,397 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:46:52,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:46:52,398 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 13:46:52,398 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 13:46:52,398 INFO L87 Difference]: Start difference. First operand 108 states and 141 transitions. cyclomatic complexity: 34 Second operand has 5 states, 5 states have (on average 4.0) internal successors, (20), 5 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:52,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:46:52,440 INFO L93 Difference]: Finished difference Result 111 states and 143 transitions. [2022-12-13 13:46:52,440 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111 states and 143 transitions. [2022-12-13 13:46:52,442 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-12-13 13:46:52,443 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111 states to 108 states and 138 transitions. [2022-12-13 13:46:52,443 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 108 [2022-12-13 13:46:52,443 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 108 [2022-12-13 13:46:52,443 INFO L73 IsDeterministic]: Start isDeterministic. Operand 108 states and 138 transitions. [2022-12-13 13:46:52,444 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:46:52,444 INFO L218 hiAutomatonCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-12-13 13:46:52,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states and 138 transitions. [2022-12-13 13:46:52,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-12-13 13:46:52,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.2777777777777777) internal successors, (138), 107 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:52,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 138 transitions. [2022-12-13 13:46:52,449 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-12-13 13:46:52,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 13:46:52,450 INFO L428 stractBuchiCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-12-13 13:46:52,451 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 13:46:52,451 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 138 transitions. [2022-12-13 13:46:52,452 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 52 [2022-12-13 13:46:52,452 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:46:52,452 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:46:52,453 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:52,453 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:52,454 INFO L748 eck$LassoCheckResult]: Stem: 525#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 526#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 535#L262 assume 0 == ~r1~0 % 256; 552#L263 assume ~id1~0 >= 0; 555#L264 assume 0 == ~st1~0; 556#L265 assume ~send1~0 == ~id1~0; 491#L266 assume 0 == ~mode1~0 % 256; 492#L267 assume ~id2~0 >= 0; 505#L268 assume 0 == ~st2~0; 506#L269 assume ~send2~0 == ~id2~0; 487#L270 assume 0 == ~mode2~0 % 256; 488#L271 assume ~id3~0 >= 0; 529#L272 assume 0 == ~st3~0; 536#L273 assume ~send3~0 == ~id3~0; 554#L274 assume 0 == ~mode3~0 % 256; 574#L275 assume ~id4~0 >= 0; 474#L276 assume 0 == ~st4~0; 475#L277 assume ~send4~0 == ~id4~0; 581#L278 assume 0 == ~mode4~0 % 256; 550#L279 assume ~id5~0 >= 0; 551#L280 assume 0 == ~st5~0; 497#L281 assume ~send5~0 == ~id5~0; 476#L282 assume 0 == ~mode5~0 % 256; 477#L283 assume ~id6~0 >= 0; 557#L284 assume 0 == ~st6~0; 558#L285 assume ~send6~0 == ~id6~0; 573#L286 assume 0 == ~mode6~0 % 256; 562#L287 assume ~id7~0 >= 0; 519#L288 assume 0 == ~st7~0; 520#L289 assume ~send7~0 == ~id7~0; 531#L290 assume 0 == ~mode7~0 % 256; 567#L291 assume ~id1~0 != ~id2~0; 568#L292 assume ~id1~0 != ~id3~0; 576#L293 assume ~id1~0 != ~id4~0; 580#L294 assume ~id1~0 != ~id5~0; 480#L295 assume ~id1~0 != ~id6~0; 481#L296 assume ~id1~0 != ~id7~0; 530#L297 assume ~id2~0 != ~id3~0; 527#L298 assume ~id2~0 != ~id4~0; 528#L299 assume ~id2~0 != ~id5~0; 534#L300 assume ~id2~0 != ~id6~0; 564#L301 assume ~id2~0 != ~id7~0; 571#L302 assume ~id3~0 != ~id4~0; 572#L303 assume ~id3~0 != ~id5~0; 578#L304 assume ~id3~0 != ~id6~0; 559#L305 assume ~id3~0 != ~id7~0; 560#L306 assume ~id4~0 != ~id5~0; 566#L307 assume ~id4~0 != ~id6~0; 489#L308 assume ~id4~0 != ~id7~0; 490#L309 assume ~id5~0 != ~id6~0; 565#L310 assume ~id5~0 != ~id7~0; 546#L311 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 515#L262-1 init_#res#1 := init_~tmp~0#1; 516#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 545#L24 assume !(0 == assume_abort_if_not_~cond#1); 495#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 496#L547-2 [2022-12-13 13:46:52,454 INFO L750 eck$LassoCheckResult]: Loop: 496#L547-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 547#L87 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 478#L87-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 479#L113 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 540#L113-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 541#L138 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 561#L138-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 548#L163 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 542#L163-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 498#L188 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 485#L188-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 486#L213 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 493#L213-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 494#L238 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 518#L238-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 513#L471 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 514#L472 assume ~r1~0 % 256 >= 7; 532#$Ultimate##250 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 544#L471-1 check_#res#1 := check_~tmp~1#1; 500#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 501#L582 assume !(0 == assert_~arg#1 % 256); 563#L577 assume { :end_inline_assert } true; 496#L547-2 [2022-12-13 13:46:52,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:52,454 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 2 times [2022-12-13 13:46:52,455 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:52,455 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288180837] [2022-12-13 13:46:52,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:52,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:52,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,473 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:46:52,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,496 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:46:52,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:52,497 INFO L85 PathProgramCache]: Analyzing trace with hash -1973476622, now seen corresponding path program 1 times [2022-12-13 13:46:52,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:52,497 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692510427] [2022-12-13 13:46:52,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:52,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:52,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:46:52,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:46:52,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:46:52,522 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1692510427] [2022-12-13 13:46:52,522 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1692510427] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:46:52,522 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:46:52,522 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 13:46:52,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1656096386] [2022-12-13 13:46:52,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:46:52,523 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:46:52,523 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:46:52,524 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 13:46:52,524 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 13:46:52,524 INFO L87 Difference]: Start difference. First operand 108 states and 138 transitions. cyclomatic complexity: 31 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:52,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:46:52,546 INFO L93 Difference]: Finished difference Result 154 states and 209 transitions. [2022-12-13 13:46:52,546 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 154 states and 209 transitions. [2022-12-13 13:46:52,548 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 98 [2022-12-13 13:46:52,550 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 154 states to 154 states and 209 transitions. [2022-12-13 13:46:52,550 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 154 [2022-12-13 13:46:52,551 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 154 [2022-12-13 13:46:52,551 INFO L73 IsDeterministic]: Start isDeterministic. Operand 154 states and 209 transitions. [2022-12-13 13:46:52,552 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:46:52,552 INFO L218 hiAutomatonCegarLoop]: Abstraction has 154 states and 209 transitions. [2022-12-13 13:46:52,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states and 209 transitions. [2022-12-13 13:46:52,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2022-12-13 13:46:52,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 154 states have (on average 1.3571428571428572) internal successors, (209), 153 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:46:52,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 209 transitions. [2022-12-13 13:46:52,556 INFO L240 hiAutomatonCegarLoop]: Abstraction has 154 states and 209 transitions. [2022-12-13 13:46:52,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 13:46:52,557 INFO L428 stractBuchiCegarLoop]: Abstraction has 154 states and 209 transitions. [2022-12-13 13:46:52,557 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 13:46:52,557 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 154 states and 209 transitions. [2022-12-13 13:46:52,559 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 98 [2022-12-13 13:46:52,559 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:46:52,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:46:52,560 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:52,560 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:46:52,560 INFO L748 eck$LassoCheckResult]: Stem: 793#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(41, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0; 794#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~ret33#1, main_#t~ret34#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 803#L262 assume 0 == ~r1~0 % 256; 821#L263 assume ~id1~0 >= 0; 824#L264 assume 0 == ~st1~0; 825#L265 assume ~send1~0 == ~id1~0; 759#L266 assume 0 == ~mode1~0 % 256; 760#L267 assume ~id2~0 >= 0; 773#L268 assume 0 == ~st2~0; 774#L269 assume ~send2~0 == ~id2~0; 755#L270 assume 0 == ~mode2~0 % 256; 756#L271 assume ~id3~0 >= 0; 797#L272 assume 0 == ~st3~0; 804#L273 assume ~send3~0 == ~id3~0; 823#L274 assume 0 == ~mode3~0 % 256; 845#L275 assume ~id4~0 >= 0; 742#L276 assume 0 == ~st4~0; 743#L277 assume ~send4~0 == ~id4~0; 852#L278 assume 0 == ~mode4~0 % 256; 819#L279 assume ~id5~0 >= 0; 820#L280 assume 0 == ~st5~0; 765#L281 assume ~send5~0 == ~id5~0; 744#L282 assume 0 == ~mode5~0 % 256; 745#L283 assume ~id6~0 >= 0; 826#L284 assume 0 == ~st6~0; 827#L285 assume ~send6~0 == ~id6~0; 844#L286 assume 0 == ~mode6~0 % 256; 831#L287 assume ~id7~0 >= 0; 787#L288 assume 0 == ~st7~0; 788#L289 assume ~send7~0 == ~id7~0; 799#L290 assume 0 == ~mode7~0 % 256; 838#L291 assume ~id1~0 != ~id2~0; 839#L292 assume ~id1~0 != ~id3~0; 847#L293 assume ~id1~0 != ~id4~0; 851#L294 assume ~id1~0 != ~id5~0; 748#L295 assume ~id1~0 != ~id6~0; 749#L296 assume ~id1~0 != ~id7~0; 798#L297 assume ~id2~0 != ~id3~0; 795#L298 assume ~id2~0 != ~id4~0; 796#L299 assume ~id2~0 != ~id5~0; 802#L300 assume ~id2~0 != ~id6~0; 833#L301 assume ~id2~0 != ~id7~0; 842#L302 assume ~id3~0 != ~id4~0; 843#L303 assume ~id3~0 != ~id5~0; 849#L304 assume ~id3~0 != ~id6~0; 828#L305 assume ~id3~0 != ~id7~0; 829#L306 assume ~id4~0 != ~id5~0; 837#L307 assume ~id4~0 != ~id6~0; 757#L308 assume ~id4~0 != ~id7~0; 758#L309 assume ~id5~0 != ~id6~0; 836#L310 assume ~id5~0 != ~id7~0; 814#L311 assume ~id6~0 != ~id7~0;init_~tmp~0#1 := 1; 783#L262-1 init_#res#1 := init_~tmp~0#1; 784#init_returnLabel#1 main_#t~ret33#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret33#1;havoc main_#t~ret33#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 813#L24 assume !(0 == assume_abort_if_not_~cond#1); 763#L23 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 764#L547-2 [2022-12-13 13:46:52,561 INFO L750 eck$LassoCheckResult]: Loop: 764#L547-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 891#L87 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 801#L87-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 887#L113 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 883#L113-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 881#L138 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 877#L138-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 875#L163 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 873#L163-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 868#L188 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 865#L188-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 863#L213 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 859#L213-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 857#L238 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 855#L238-2 assume { :end_inline_node7 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 854#L471 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 <= 1; 853#L472 assume !(~r1~0 % 256 >= 7); 834#L475 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0; 835#$Ultimate##250 assume ~r1~0 % 256 < 7;check_~tmp~1#1 := 1; 895#L471-1 check_#res#1 := check_~tmp~1#1; 894#check_returnLabel#1 main_#t~ret34#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret34#1;havoc main_#t~ret34#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 893#L582 assume !(0 == assert_~arg#1 % 256); 892#L577 assume { :end_inline_assert } true; 764#L547-2 [2022-12-13 13:46:52,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:52,561 INFO L85 PathProgramCache]: Analyzing trace with hash 292839954, now seen corresponding path program 3 times [2022-12-13 13:46:52,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:52,561 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2119002073] [2022-12-13 13:46:52,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:52,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:52,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,574 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:46:52,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,587 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:46:52,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:52,588 INFO L85 PathProgramCache]: Analyzing trace with hash 598338978, now seen corresponding path program 1 times [2022-12-13 13:46:52,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:52,588 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771195373] [2022-12-13 13:46:52,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:52,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:52,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,608 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:46:52,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:46:52,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:46:52,639 INFO L85 PathProgramCache]: Analyzing trace with hash 75614321, now seen corresponding path program 1 times [2022-12-13 13:46:52,639 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:46:52,640 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390632948] [2022-12-13 13:46:52,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:46:52,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:46:52,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,672 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:46:52,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:46:52,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:46:58,622 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 13:46:58,622 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 13:46:58,622 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 13:46:58,622 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 13:46:58,623 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-12-13 13:46:58,623 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 13:46:58,623 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 13:46:58,623 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 13:46:58,623 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.7_overflow.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-12-13 13:46:58,623 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 13:46:58,623 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 13:46:58,661 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:46:58,672 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:46:58,675 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:46:58,677 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:46:58,681 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:46:58,684 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:01,294 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:01,298 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:01,300 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:01,302 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:01,305 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:01,307 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:01,308 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:47:04,470 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 41