./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 2329fc70 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8 --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-2329fc7 [2022-12-13 13:09:07,636 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-12-13 13:09:07,638 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-12-13 13:09:07,657 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-12-13 13:09:07,657 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-12-13 13:09:07,658 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-12-13 13:09:07,659 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-12-13 13:09:07,661 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-12-13 13:09:07,662 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-12-13 13:09:07,663 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-12-13 13:09:07,664 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-12-13 13:09:07,665 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-12-13 13:09:07,665 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-12-13 13:09:07,666 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-12-13 13:09:07,667 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-12-13 13:09:07,668 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-12-13 13:09:07,669 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-12-13 13:09:07,670 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-12-13 13:09:07,671 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-12-13 13:09:07,673 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-12-13 13:09:07,674 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-12-13 13:09:07,675 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-12-13 13:09:07,676 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-12-13 13:09:07,677 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-12-13 13:09:07,686 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-12-13 13:09:07,686 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-12-13 13:09:07,686 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-12-13 13:09:07,687 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-12-13 13:09:07,687 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-12-13 13:09:07,688 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-12-13 13:09:07,688 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-12-13 13:09:07,689 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-12-13 13:09:07,689 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-12-13 13:09:07,690 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-12-13 13:09:07,691 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-12-13 13:09:07,691 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-12-13 13:09:07,691 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-12-13 13:09:07,691 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-12-13 13:09:07,692 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-12-13 13:09:07,692 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-12-13 13:09:07,693 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-12-13 13:09:07,693 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/config/svcomp-Termination-32bit-Automizer_Default.epf [2022-12-13 13:09:07,709 INFO L113 SettingsManager]: Loading preferences was successful [2022-12-13 13:09:07,709 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-12-13 13:09:07,709 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-12-13 13:09:07,709 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-12-13 13:09:07,710 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-12-13 13:09:07,710 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-12-13 13:09:07,715 INFO L138 SettingsManager]: * Use SBE=true [2022-12-13 13:09:07,715 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-12-13 13:09:07,715 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-12-13 13:09:07,716 INFO L138 SettingsManager]: * Use old map elimination=false [2022-12-13 13:09:07,716 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-12-13 13:09:07,716 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-12-13 13:09:07,716 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-12-13 13:09:07,716 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-12-13 13:09:07,716 INFO L138 SettingsManager]: * sizeof long=4 [2022-12-13 13:09:07,716 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * sizeof long double=12 [2022-12-13 13:09:07,717 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-12-13 13:09:07,718 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-12-13 13:09:07,718 INFO L138 SettingsManager]: * Use constant arrays=true [2022-12-13 13:09:07,718 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-12-13 13:09:07,718 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-12-13 13:09:07,718 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-12-13 13:09:07,718 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-12-13 13:09:07,719 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-12-13 13:09:07,719 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-12-13 13:09:07,719 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8 Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e82362cf624f0e845caa7a60d1834859999824a1181a9b545ac94ec06fd3aa08 [2022-12-13 13:09:07,878 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-12-13 13:09:07,894 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-12-13 13:09:07,896 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-12-13 13:09:07,897 INFO L271 PluginConnector]: Initializing CDTParser... [2022-12-13 13:09:07,898 INFO L275 PluginConnector]: CDTParser initialized [2022-12-13 13:09:07,898 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2022-12-13 13:09:10,432 INFO L500 CDTParser]: Created temporary CDT project at NULL [2022-12-13 13:09:10,615 INFO L351 CDTParser]: Found 1 translation units. [2022-12-13 13:09:10,615 INFO L172 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c [2022-12-13 13:09:10,625 INFO L394 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/data/3a9bc5e9a/2b062c452d9a4ee7bf4882bf9bb67ee7/FLAG00efdf0c2 [2022-12-13 13:09:10,988 INFO L402 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/data/3a9bc5e9a/2b062c452d9a4ee7bf4882bf9bb67ee7 [2022-12-13 13:09:10,990 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-12-13 13:09:10,991 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-12-13 13:09:10,992 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-12-13 13:09:10,992 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-12-13 13:09:10,994 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-12-13 13:09:10,995 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 01:09:10" (1/1) ... [2022-12-13 13:09:10,996 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4575e9b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:10, skipping insertion in model container [2022-12-13 13:09:10,996 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.12 01:09:10" (1/1) ... [2022-12-13 13:09:11,000 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-12-13 13:09:11,032 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-12-13 13:09:11,223 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c[26481,26494] [2022-12-13 13:09:11,224 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 13:09:11,238 INFO L203 MainTranslator]: Completed pre-run [2022-12-13 13:09:11,289 WARN L237 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.ufo.UNBOUNDED.pals.c[26481,26494] [2022-12-13 13:09:11,290 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-12-13 13:09:11,304 INFO L208 MainTranslator]: Completed translation [2022-12-13 13:09:11,305 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11 WrapperNode [2022-12-13 13:09:11,305 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-12-13 13:09:11,306 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-12-13 13:09:11,306 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-12-13 13:09:11,306 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-12-13 13:09:11,311 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,320 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,347 INFO L138 Inliner]: procedures = 28, calls = 19, calls flagged for inlining = 14, calls inlined = 14, statements flattened = 464 [2022-12-13 13:09:11,347 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-12-13 13:09:11,348 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-12-13 13:09:11,348 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-12-13 13:09:11,348 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-12-13 13:09:11,356 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,356 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,359 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,360 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,368 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,373 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,376 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,378 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,382 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-12-13 13:09:11,383 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-12-13 13:09:11,383 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-12-13 13:09:11,383 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-12-13 13:09:11,384 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (1/1) ... [2022-12-13 13:09:11,390 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 13:09:11,398 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/z3 [2022-12-13 13:09:11,408 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-12-13 13:09:11,410 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_26ab2635-8d0a-4398-894c-f574938413aa/bin/uautomizer-uyxdKDjOR8/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-12-13 13:09:11,444 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-12-13 13:09:11,445 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-12-13 13:09:11,445 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-12-13 13:09:11,445 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-12-13 13:09:11,558 INFO L235 CfgBuilder]: Building ICFG [2022-12-13 13:09:11,560 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-12-13 13:09:11,933 INFO L276 CfgBuilder]: Performing block encoding [2022-12-13 13:09:11,939 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-12-13 13:09:11,939 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-12-13 13:09:11,941 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 01:09:11 BoogieIcfgContainer [2022-12-13 13:09:11,941 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-12-13 13:09:11,942 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-12-13 13:09:11,942 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-12-13 13:09:11,945 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-12-13 13:09:11,945 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:09:11,945 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.12 01:09:10" (1/3) ... [2022-12-13 13:09:11,946 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@33c090af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 01:09:11, skipping insertion in model container [2022-12-13 13:09:11,946 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:09:11,946 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.12 01:09:11" (2/3) ... [2022-12-13 13:09:11,947 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@33c090af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.12 01:09:11, skipping insertion in model container [2022-12-13 13:09:11,947 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-12-13 13:09:11,947 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.12 01:09:11" (3/3) ... [2022-12-13 13:09:11,948 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8.ufo.UNBOUNDED.pals.c [2022-12-13 13:09:11,989 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2022-12-13 13:09:11,989 INFO L304 stractBuchiCegarLoop]: Hoare is false [2022-12-13 13:09:11,989 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-12-13 13:09:11,989 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-12-13 13:09:11,989 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-12-13 13:09:11,990 INFO L308 stractBuchiCegarLoop]: Difference is false [2022-12-13 13:09:11,990 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-12-13 13:09:11,990 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-12-13 13:09:11,994 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:12,010 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-12-13 13:09:12,010 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:09:12,011 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:09:12,016 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:12,016 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:12,017 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-12-13 13:09:12,017 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:12,021 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2022-12-13 13:09:12,021 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:09:12,021 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:09:12,022 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:12,022 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:12,028 INFO L748 eck$LassoCheckResult]: Stem: 29#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 42#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 30#L298true assume !(0 == ~r1~0 % 256);init_~tmp~0#1 := 0; 47#L298-1true init_#res#1 := init_~tmp~0#1; 95#init_returnLabel#1true main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 44#L22true assume !(0 == assume_abort_if_not_~cond#1); 100#L21true assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 87#L633-2true [2022-12-13 13:09:12,029 INFO L750 eck$LassoCheckResult]: Loop: 87#L633-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 113#L92true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 60#L92-2true assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 23#L121true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 7#L121-2true assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 88#L146true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 115#L146-2true assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 111#L171true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 77#L171-2true assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 62#L196true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 123#L196-2true assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 82#L221true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 58#L221-2true assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 63#L246true assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 14#L246-2true assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 33#L271true assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 78#L271-2true assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 32#L551true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 20#L551-1true check_#res#1 := check_~tmp~1#1; 17#check_returnLabel#1true main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 118#L671true assume !(0 == assert_~arg#1 % 256); 13#L666true assume { :end_inline_assert } true; 87#L633-2true [2022-12-13 13:09:12,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:12,034 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2022-12-13 13:09:12,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:12,041 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578628152] [2022-12-13 13:09:12,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:12,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:12,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:09:12,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:09:12,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:09:12,320 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578628152] [2022-12-13 13:09:12,321 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1578628152] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:09:12,321 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:09:12,321 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:09:12,322 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966907553] [2022-12-13 13:09:12,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:09:12,326 INFO L753 eck$LassoCheckResult]: stem already infeasible [2022-12-13 13:09:12,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:12,327 INFO L85 PathProgramCache]: Analyzing trace with hash 37408160, now seen corresponding path program 1 times [2022-12-13 13:09:12,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:12,328 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133850229] [2022-12-13 13:09:12,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:12,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:12,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:09:12,577 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:09:12,578 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:09:12,578 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133850229] [2022-12-13 13:09:12,578 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1133850229] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:09:12,578 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:09:12,578 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:09:12,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1888914531] [2022-12-13 13:09:12,579 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:09:12,580 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:09:12,580 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:09:12,603 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 13:09:12,604 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 13:09:12,605 INFO L87 Difference]: Start difference. First operand has 132 states, 131 states have (on average 1.786259541984733) internal successors, (234), 131 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:12,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:09:12,698 INFO L93 Difference]: Finished difference Result 131 states and 229 transitions. [2022-12-13 13:09:12,699 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 229 transitions. [2022-12-13 13:09:12,701 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-12-13 13:09:12,704 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 127 states and 165 transitions. [2022-12-13 13:09:12,705 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2022-12-13 13:09:12,706 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2022-12-13 13:09:12,706 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 165 transitions. [2022-12-13 13:09:12,707 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:09:12,707 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-12-13 13:09:12,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 165 transitions. [2022-12-13 13:09:12,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-12-13 13:09:12,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2992125984251968) internal successors, (165), 126 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:12,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 165 transitions. [2022-12-13 13:09:12,731 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-12-13 13:09:12,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 13:09:12,735 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 165 transitions. [2022-12-13 13:09:12,735 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-12-13 13:09:12,735 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 165 transitions. [2022-12-13 13:09:12,737 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-12-13 13:09:12,737 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:09:12,737 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:09:12,738 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:12,738 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:12,739 INFO L748 eck$LassoCheckResult]: Stem: 323#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 324#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 325#L298 assume 0 == ~r1~0 % 256; 326#L299 assume ~id1~0 >= 0; 342#L300 assume 0 == ~st1~0; 376#L301 assume ~send1~0 == ~id1~0; 387#L302 assume 0 == ~mode1~0 % 256; 388#L303 assume ~id2~0 >= 0; 400#L304 assume 0 == ~st2~0; 370#L305 assume ~send2~0 == ~id2~0; 371#L306 assume 0 == ~mode2~0 % 256; 381#L307 assume ~id3~0 >= 0; 297#L308 assume 0 == ~st3~0; 298#L309 assume ~send3~0 == ~id3~0; 379#L310 assume 0 == ~mode3~0 % 256; 357#L311 assume ~id4~0 >= 0; 358#L312 assume 0 == ~st4~0; 315#L313 assume ~send4~0 == ~id4~0; 316#L314 assume 0 == ~mode4~0 % 256; 350#L315 assume ~id5~0 >= 0; 351#L316 assume 0 == ~st5~0; 286#L317 assume ~send5~0 == ~id5~0; 287#L318 assume 0 == ~mode5~0 % 256; 407#L319 assume ~id6~0 >= 0; 386#L320 assume 0 == ~st6~0; 374#L321 assume ~send6~0 == ~id6~0; 375#L322 assume 0 == ~mode6~0 % 256; 281#L323 assume ~id7~0 >= 0; 282#L324 assume 0 == ~st7~0; 308#L325 assume ~send7~0 == ~id7~0; 322#L326 assume 0 == ~mode7~0 % 256; 311#L327 assume ~id8~0 >= 0; 312#L328 assume 0 == ~st8~0; 334#L329 assume ~send8~0 == ~id8~0; 335#L330 assume 0 == ~mode8~0 % 256; 295#L331 assume ~id1~0 != ~id2~0; 296#L332 assume ~id1~0 != ~id3~0; 319#L333 assume ~id1~0 != ~id4~0; 333#L334 assume ~id1~0 != ~id5~0; 313#L335 assume ~id1~0 != ~id6~0; 314#L336 assume ~id1~0 != ~id7~0; 380#L337 assume ~id1~0 != ~id8~0; 361#L338 assume ~id2~0 != ~id3~0; 362#L339 assume ~id2~0 != ~id4~0; 402#L340 assume ~id2~0 != ~id5~0; 397#L341 assume ~id2~0 != ~id6~0; 336#L342 assume ~id2~0 != ~id7~0; 337#L343 assume ~id2~0 != ~id8~0; 327#L344 assume ~id3~0 != ~id4~0; 328#L345 assume ~id3~0 != ~id5~0; 352#L346 assume ~id3~0 != ~id6~0; 353#L347 assume ~id3~0 != ~id7~0; 406#L348 assume ~id3~0 != ~id8~0; 391#L349 assume ~id4~0 != ~id5~0; 392#L350 assume ~id4~0 != ~id6~0; 377#L351 assume ~id4~0 != ~id7~0; 378#L352 assume ~id4~0 != ~id8~0; 399#L353 assume ~id5~0 != ~id6~0; 367#L354 assume ~id5~0 != ~id7~0; 338#L355 assume ~id5~0 != ~id8~0; 339#L356 assume ~id6~0 != ~id7~0; 364#L357 assume ~id6~0 != ~id8~0; 302#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 303#L298-1 init_#res#1 := init_~tmp~0#1; 354#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 348#L22 assume !(0 == assume_abort_if_not_~cond#1); 349#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 305#L633-2 [2022-12-13 13:09:12,739 INFO L750 eck$LassoCheckResult]: Loop: 305#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 393#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 356#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 317#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 291#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 292#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 395#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 404#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 385#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 372#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 373#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 390#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 368#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 369#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 306#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 307#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 332#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 329#L551 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0; 300#L551-1 check_#res#1 := check_~tmp~1#1; 309#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 310#L671 assume !(0 == assert_~arg#1 % 256); 304#L666 assume { :end_inline_assert } true; 305#L633-2 [2022-12-13 13:09:12,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:12,739 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2022-12-13 13:09:12,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:12,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612043718] [2022-12-13 13:09:12,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:12,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:12,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:12,763 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:09:12,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:12,804 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:09:12,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:12,805 INFO L85 PathProgramCache]: Analyzing trace with hash 37408160, now seen corresponding path program 2 times [2022-12-13 13:09:12,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:12,805 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773896883] [2022-12-13 13:09:12,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:12,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:12,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:09:12,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:09:12,942 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:09:12,942 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773896883] [2022-12-13 13:09:12,942 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773896883] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:09:12,942 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:09:12,942 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-12-13 13:09:12,943 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210472804] [2022-12-13 13:09:12,943 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:09:12,943 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:09:12,943 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:09:12,944 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-12-13 13:09:12,944 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-12-13 13:09:12,944 INFO L87 Difference]: Start difference. First operand 127 states and 165 transitions. cyclomatic complexity: 39 Second operand has 5 states, 5 states have (on average 4.4) internal successors, (22), 5 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:12,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:09:12,987 INFO L93 Difference]: Finished difference Result 130 states and 167 transitions. [2022-12-13 13:09:12,987 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 130 states and 167 transitions. [2022-12-13 13:09:12,989 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-12-13 13:09:12,990 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 130 states to 127 states and 162 transitions. [2022-12-13 13:09:12,990 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2022-12-13 13:09:12,991 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2022-12-13 13:09:12,991 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 162 transitions. [2022-12-13 13:09:12,992 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:09:12,992 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-12-13 13:09:12,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 162 transitions. [2022-12-13 13:09:12,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2022-12-13 13:09:12,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2755905511811023) internal successors, (162), 126 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:12,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 162 transitions. [2022-12-13 13:09:12,998 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-12-13 13:09:12,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-12-13 13:09:12,999 INFO L428 stractBuchiCegarLoop]: Abstraction has 127 states and 162 transitions. [2022-12-13 13:09:12,999 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-12-13 13:09:12,999 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 162 transitions. [2022-12-13 13:09:13,000 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2022-12-13 13:09:13,001 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:09:13,001 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:09:13,002 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:13,002 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:13,003 INFO L748 eck$LassoCheckResult]: Stem: 592#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 593#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 594#L298 assume 0 == ~r1~0 % 256; 595#L299 assume ~id1~0 >= 0; 611#L300 assume 0 == ~st1~0; 645#L301 assume ~send1~0 == ~id1~0; 656#L302 assume 0 == ~mode1~0 % 256; 657#L303 assume ~id2~0 >= 0; 669#L304 assume 0 == ~st2~0; 639#L305 assume ~send2~0 == ~id2~0; 640#L306 assume 0 == ~mode2~0 % 256; 650#L307 assume ~id3~0 >= 0; 566#L308 assume 0 == ~st3~0; 567#L309 assume ~send3~0 == ~id3~0; 648#L310 assume 0 == ~mode3~0 % 256; 626#L311 assume ~id4~0 >= 0; 627#L312 assume 0 == ~st4~0; 584#L313 assume ~send4~0 == ~id4~0; 585#L314 assume 0 == ~mode4~0 % 256; 619#L315 assume ~id5~0 >= 0; 620#L316 assume 0 == ~st5~0; 555#L317 assume ~send5~0 == ~id5~0; 556#L318 assume 0 == ~mode5~0 % 256; 676#L319 assume ~id6~0 >= 0; 655#L320 assume 0 == ~st6~0; 643#L321 assume ~send6~0 == ~id6~0; 644#L322 assume 0 == ~mode6~0 % 256; 550#L323 assume ~id7~0 >= 0; 551#L324 assume 0 == ~st7~0; 577#L325 assume ~send7~0 == ~id7~0; 591#L326 assume 0 == ~mode7~0 % 256; 580#L327 assume ~id8~0 >= 0; 581#L328 assume 0 == ~st8~0; 603#L329 assume ~send8~0 == ~id8~0; 604#L330 assume 0 == ~mode8~0 % 256; 564#L331 assume ~id1~0 != ~id2~0; 565#L332 assume ~id1~0 != ~id3~0; 590#L333 assume ~id1~0 != ~id4~0; 602#L334 assume ~id1~0 != ~id5~0; 582#L335 assume ~id1~0 != ~id6~0; 583#L336 assume ~id1~0 != ~id7~0; 649#L337 assume ~id1~0 != ~id8~0; 630#L338 assume ~id2~0 != ~id3~0; 631#L339 assume ~id2~0 != ~id4~0; 671#L340 assume ~id2~0 != ~id5~0; 666#L341 assume ~id2~0 != ~id6~0; 605#L342 assume ~id2~0 != ~id7~0; 606#L343 assume ~id2~0 != ~id8~0; 596#L344 assume ~id3~0 != ~id4~0; 597#L345 assume ~id3~0 != ~id5~0; 621#L346 assume ~id3~0 != ~id6~0; 622#L347 assume ~id3~0 != ~id7~0; 675#L348 assume ~id3~0 != ~id8~0; 660#L349 assume ~id4~0 != ~id5~0; 661#L350 assume ~id4~0 != ~id6~0; 646#L351 assume ~id4~0 != ~id7~0; 647#L352 assume ~id4~0 != ~id8~0; 668#L353 assume ~id5~0 != ~id6~0; 636#L354 assume ~id5~0 != ~id7~0; 607#L355 assume ~id5~0 != ~id8~0; 608#L356 assume ~id6~0 != ~id7~0; 633#L357 assume ~id6~0 != ~id8~0; 571#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 572#L298-1 init_#res#1 := init_~tmp~0#1; 623#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 617#L22 assume !(0 == assume_abort_if_not_~cond#1); 618#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 574#L633-2 [2022-12-13 13:09:13,003 INFO L750 eck$LassoCheckResult]: Loop: 574#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 662#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 625#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 586#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 560#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 561#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 664#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 673#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 654#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 641#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 642#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 658#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 637#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 638#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 575#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 576#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 601#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 598#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 599#L552 assume ~r1~0 % 256 >= 8; 568#$Ultimate##298 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 569#L551-1 check_#res#1 := check_~tmp~1#1; 578#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 579#L671 assume !(0 == assert_~arg#1 % 256); 573#L666 assume { :end_inline_assert } true; 574#L633-2 [2022-12-13 13:09:13,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:13,003 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2022-12-13 13:09:13,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:13,004 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778114023] [2022-12-13 13:09:13,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:13,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:13,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,031 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:09:13,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,055 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:09:13,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:13,055 INFO L85 PathProgramCache]: Analyzing trace with hash 173692112, now seen corresponding path program 1 times [2022-12-13 13:09:13,055 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:13,055 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995965501] [2022-12-13 13:09:13,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:13,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:13,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-12-13 13:09:13,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-12-13 13:09:13,082 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-12-13 13:09:13,083 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995965501] [2022-12-13 13:09:13,083 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995965501] provided 1 perfect and 0 imperfect interpolant sequences [2022-12-13 13:09:13,083 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-12-13 13:09:13,083 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-12-13 13:09:13,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [935988539] [2022-12-13 13:09:13,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-12-13 13:09:13,084 INFO L765 eck$LassoCheckResult]: loop already infeasible [2022-12-13 13:09:13,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-12-13 13:09:13,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-12-13 13:09:13,085 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-12-13 13:09:13,085 INFO L87 Difference]: Start difference. First operand 127 states and 162 transitions. cyclomatic complexity: 36 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:13,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-12-13 13:09:13,114 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2022-12-13 13:09:13,114 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 181 states and 246 transitions. [2022-12-13 13:09:13,116 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 114 [2022-12-13 13:09:13,119 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 181 states to 181 states and 246 transitions. [2022-12-13 13:09:13,119 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 181 [2022-12-13 13:09:13,120 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 181 [2022-12-13 13:09:13,120 INFO L73 IsDeterministic]: Start isDeterministic. Operand 181 states and 246 transitions. [2022-12-13 13:09:13,121 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-12-13 13:09:13,121 INFO L218 hiAutomatonCegarLoop]: Abstraction has 181 states and 246 transitions. [2022-12-13 13:09:13,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states and 246 transitions. [2022-12-13 13:09:13,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 179. [2022-12-13 13:09:13,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 179 states have (on average 1.3575418994413408) internal successors, (243), 178 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-12-13 13:09:13,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 243 transitions. [2022-12-13 13:09:13,132 INFO L240 hiAutomatonCegarLoop]: Abstraction has 179 states and 243 transitions. [2022-12-13 13:09:13,133 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-12-13 13:09:13,134 INFO L428 stractBuchiCegarLoop]: Abstraction has 179 states and 243 transitions. [2022-12-13 13:09:13,134 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-12-13 13:09:13,134 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 243 transitions. [2022-12-13 13:09:13,135 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 112 [2022-12-13 13:09:13,135 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-12-13 13:09:13,135 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-12-13 13:09:13,137 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:13,137 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-12-13 13:09:13,137 INFO L748 eck$LassoCheckResult]: Stem: 906#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset]; 907#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;~mode1~0 := main_#t~nondet8#1;havoc main_#t~nondet8#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;~mode2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;~mode3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;~mode4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;~mode5~0 := main_#t~nondet24#1;havoc main_#t~nondet24#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;~mode6~0 := main_#t~nondet28#1;havoc main_#t~nondet28#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;~mode7~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;~mode8~0 := main_#t~nondet36#1;havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 908#L298 assume 0 == ~r1~0 % 256; 909#L299 assume ~id1~0 >= 0; 925#L300 assume 0 == ~st1~0; 959#L301 assume ~send1~0 == ~id1~0; 970#L302 assume 0 == ~mode1~0 % 256; 971#L303 assume ~id2~0 >= 0; 985#L304 assume 0 == ~st2~0; 953#L305 assume ~send2~0 == ~id2~0; 954#L306 assume 0 == ~mode2~0 % 256; 964#L307 assume ~id3~0 >= 0; 880#L308 assume 0 == ~st3~0; 881#L309 assume ~send3~0 == ~id3~0; 962#L310 assume 0 == ~mode3~0 % 256; 939#L311 assume ~id4~0 >= 0; 940#L312 assume 0 == ~st4~0; 898#L313 assume ~send4~0 == ~id4~0; 899#L314 assume 0 == ~mode4~0 % 256; 932#L315 assume ~id5~0 >= 0; 933#L316 assume 0 == ~st5~0; 869#L317 assume ~send5~0 == ~id5~0; 870#L318 assume 0 == ~mode5~0 % 256; 991#L319 assume ~id6~0 >= 0; 969#L320 assume 0 == ~st6~0; 957#L321 assume ~send6~0 == ~id6~0; 958#L322 assume 0 == ~mode6~0 % 256; 867#L323 assume ~id7~0 >= 0; 868#L324 assume 0 == ~st7~0; 890#L325 assume ~send7~0 == ~id7~0; 905#L326 assume 0 == ~mode7~0 % 256; 893#L327 assume ~id8~0 >= 0; 894#L328 assume 0 == ~st8~0; 917#L329 assume ~send8~0 == ~id8~0; 918#L330 assume 0 == ~mode8~0 % 256; 878#L331 assume ~id1~0 != ~id2~0; 879#L332 assume ~id1~0 != ~id3~0; 904#L333 assume ~id1~0 != ~id4~0; 916#L334 assume ~id1~0 != ~id5~0; 896#L335 assume ~id1~0 != ~id6~0; 897#L336 assume ~id1~0 != ~id7~0; 963#L337 assume ~id1~0 != ~id8~0; 943#L338 assume ~id2~0 != ~id3~0; 944#L339 assume ~id2~0 != ~id4~0; 986#L340 assume ~id2~0 != ~id5~0; 980#L341 assume ~id2~0 != ~id6~0; 919#L342 assume ~id2~0 != ~id7~0; 920#L343 assume ~id2~0 != ~id8~0; 910#L344 assume ~id3~0 != ~id4~0; 911#L345 assume ~id3~0 != ~id5~0; 934#L346 assume ~id3~0 != ~id6~0; 935#L347 assume ~id3~0 != ~id7~0; 990#L348 assume ~id3~0 != ~id8~0; 974#L349 assume ~id4~0 != ~id5~0; 975#L350 assume ~id4~0 != ~id6~0; 960#L351 assume ~id4~0 != ~id7~0; 961#L352 assume ~id4~0 != ~id8~0; 982#L353 assume ~id5~0 != ~id6~0; 949#L354 assume ~id5~0 != ~id7~0; 923#L355 assume ~id5~0 != ~id8~0; 924#L356 assume ~id6~0 != ~id7~0; 946#L357 assume ~id6~0 != ~id8~0; 884#L358 assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1; 885#L298-1 init_#res#1 := init_~tmp~0#1; 936#init_returnLabel#1 main_#t~ret37#1 := init_#res#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 930#L22 assume !(0 == assume_abort_if_not_~cond#1); 931#L21 assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 983#L633-2 [2022-12-13 13:09:13,138 INFO L750 eck$LassoCheckResult]: Loop: 983#L633-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 1038#L92 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 938#L92-2 assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 1034#L121 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 1030#L121-2 assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 1028#L146 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 1024#L146-2 assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 1022#L171 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 1018#L171-2 assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 1016#L196 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 1012#L196-2 assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 1010#L221 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 1006#L221-2 assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0; 1004#L246 assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1; 1000#L246-2 assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0; 998#L271 assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1; 996#L271-2 assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 995#L551 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1; 994#L552 assume !(~r1~0 % 256 >= 8); 992#L555 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0; 993#$Ultimate##298 assume ~r1~0 % 256 < 8;check_~tmp~1#1 := 1; 1042#L551-1 check_#res#1 := check_~tmp~1#1; 1041#check_returnLabel#1 main_#t~ret38#1 := check_#res#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 1040#L671 assume !(0 == assert_~arg#1 % 256); 1039#L666 assume { :end_inline_assert } true; 983#L633-2 [2022-12-13 13:09:13,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:13,138 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2022-12-13 13:09:13,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:13,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105112821] [2022-12-13 13:09:13,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:13,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:13,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,163 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:09:13,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,197 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:09:13,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:13,197 INFO L85 PathProgramCache]: Analyzing trace with hash -1558906905, now seen corresponding path program 1 times [2022-12-13 13:09:13,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:13,198 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [580296337] [2022-12-13 13:09:13,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:13,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:13,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,234 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:09:13,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,274 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:09:13,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-12-13 13:09:13,275 INFO L85 PathProgramCache]: Analyzing trace with hash -612396504, now seen corresponding path program 1 times [2022-12-13 13:09:13,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-12-13 13:09:13,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6946204] [2022-12-13 13:09:13,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-12-13 13:09:13,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-12-13 13:09:13,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,327 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-12-13 13:09:13,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-12-13 13:09:13,401 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-12-13 13:09:19,713 INFO L210 LassoAnalysis]: Preferences: [2022-12-13 13:09:19,713 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2022-12-13 13:09:19,713 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2022-12-13 13:09:19,713 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2022-12-13 13:09:19,713 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2022-12-13 13:09:19,713 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-12-13 13:09:19,713 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2022-12-13 13:09:19,714 INFO L132 ssoRankerPreferences]: Path of dumped script: [2022-12-13 13:09:19,714 INFO L133 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2022-12-13 13:09:19,714 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2022-12-13 13:09:19,714 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2022-12-13 13:09:19,752 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,761 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,763 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,765 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,769 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,771 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,774 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,776 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,777 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,779 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,782 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,784 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,785 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,787 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,790 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,793 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,795 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,797 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,798 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,800 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,801 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,803 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,806 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,809 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:19,811 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:23,221 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:23,225 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:23,229 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:23,230 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:23,232 INFO L117 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2022-12-13 13:09:27,163 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 45