/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Overflow-32bit-Automizer_Default.epf -i ../sv-benchmarks/c/termination-memory-alloca/lis-alloca-2.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-05d3305-m [2022-10-16 17:58:22,551 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-16 17:58:22,556 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-16 17:58:22,616 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-16 17:58:22,617 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-16 17:58:22,622 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-16 17:58:22,627 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-16 17:58:22,654 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-16 17:58:22,656 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-16 17:58:22,657 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-16 17:58:22,659 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-16 17:58:22,660 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-16 17:58:22,660 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-16 17:58:22,664 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-16 17:58:22,665 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-16 17:58:22,668 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-16 17:58:22,670 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-16 17:58:22,676 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-16 17:58:22,679 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-16 17:58:22,685 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-16 17:58:22,689 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-16 17:58:22,690 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-16 17:58:22,692 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-16 17:58:22,695 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-16 17:58:22,709 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-10-16 17:58:22,723 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-16 17:58:22,724 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-16 17:58:22,725 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-16 17:58:22,731 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Overflow-32bit-Automizer_Default.epf [2022-10-16 17:58:22,781 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-16 17:58:22,781 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-16 17:58:22,782 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-16 17:58:22,782 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-16 17:58:22,783 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-10-16 17:58:22,783 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-10-16 17:58:22,786 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-16 17:58:22,786 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-16 17:58:22,786 INFO L138 SettingsManager]: * Use SBE=true [2022-10-16 17:58:22,786 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-16 17:58:22,787 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-16 17:58:22,788 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-16 17:58:22,788 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-16 17:58:22,788 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-16 17:58:22,788 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-16 17:58:22,788 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-10-16 17:58:22,789 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-10-16 17:58:22,789 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-10-16 17:58:22,789 INFO L138 SettingsManager]: * Check absence of signed integer overflows=true [2022-10-16 17:58:22,789 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-16 17:58:22,789 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-16 17:58:22,790 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-16 17:58:22,790 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-10-16 17:58:22,790 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-16 17:58:22,790 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-16 17:58:22,791 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-10-16 17:58:22,791 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-16 17:58:22,791 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-16 17:58:22,792 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-10-16 17:58:22,792 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-10-16 17:58:22,792 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-16 17:58:22,792 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-10-16 17:58:22,793 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-10-16 17:58:22,793 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-10-16 17:58:23,256 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-16 17:58:23,283 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-16 17:58:23,286 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-16 17:58:23,288 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-16 17:58:23,289 INFO L275 PluginConnector]: CDTParser initialized [2022-10-16 17:58:23,290 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/lis-alloca-2.i [2022-10-16 17:58:23,370 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2395141a1/2b7ace11d62a4640aa45c1313329d957/FLAG3f811294f [2022-10-16 17:58:24,105 INFO L306 CDTParser]: Found 1 translation units. [2022-10-16 17:58:24,106 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/lis-alloca-2.i [2022-10-16 17:58:24,133 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2395141a1/2b7ace11d62a4640aa45c1313329d957/FLAG3f811294f [2022-10-16 17:58:24,376 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2395141a1/2b7ace11d62a4640aa45c1313329d957 [2022-10-16 17:58:24,380 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-16 17:58:24,388 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-10-16 17:58:24,390 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-16 17:58:24,391 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-16 17:58:24,396 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-16 17:58:24,398 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.10 05:58:24" (1/1) ... [2022-10-16 17:58:24,399 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3b4a0d9e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:24, skipping insertion in model container [2022-10-16 17:58:24,400 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.10 05:58:24" (1/1) ... [2022-10-16 17:58:24,410 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-16 17:58:24,493 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-16 17:58:24,986 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-16 17:58:24,996 INFO L203 MainTranslator]: Completed pre-run [2022-10-16 17:58:25,038 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-16 17:58:25,075 INFO L208 MainTranslator]: Completed translation [2022-10-16 17:58:25,076 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25 WrapperNode [2022-10-16 17:58:25,078 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-16 17:58:25,082 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-16 17:58:25,082 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-16 17:58:25,082 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-16 17:58:25,091 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,107 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,135 INFO L138 Inliner]: procedures = 111, calls = 23, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 117 [2022-10-16 17:58:25,135 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-16 17:58:25,136 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-16 17:58:25,136 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-16 17:58:25,136 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-16 17:58:25,148 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,148 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,152 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,153 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,160 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,165 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,167 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,169 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,172 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-16 17:58:25,174 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-16 17:58:25,174 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-16 17:58:25,174 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-16 17:58:25,175 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (1/1) ... [2022-10-16 17:58:25,183 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-16 17:58:25,200 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:25,219 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-10-16 17:58:25,237 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-10-16 17:58:25,298 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-10-16 17:58:25,298 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-10-16 17:58:25,298 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-10-16 17:58:25,298 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-10-16 17:58:25,298 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-16 17:58:25,298 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-16 17:58:25,437 INFO L235 CfgBuilder]: Building ICFG [2022-10-16 17:58:25,439 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-16 17:58:25,882 INFO L276 CfgBuilder]: Performing block encoding [2022-10-16 17:58:25,895 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-16 17:58:25,896 INFO L300 CfgBuilder]: Removed 4 assume(true) statements. [2022-10-16 17:58:25,898 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.10 05:58:25 BoogieIcfgContainer [2022-10-16 17:58:25,899 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-16 17:58:25,901 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-10-16 17:58:25,902 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-10-16 17:58:25,906 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-10-16 17:58:25,906 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.10 05:58:24" (1/3) ... [2022-10-16 17:58:25,907 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6065cc91 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.10 05:58:25, skipping insertion in model container [2022-10-16 17:58:25,907 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 05:58:25" (2/3) ... [2022-10-16 17:58:25,908 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6065cc91 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.10 05:58:25, skipping insertion in model container [2022-10-16 17:58:25,908 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.10 05:58:25" (3/3) ... [2022-10-16 17:58:25,909 INFO L112 eAbstractionObserver]: Analyzing ICFG lis-alloca-2.i [2022-10-16 17:58:25,935 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-10-16 17:58:25,935 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 12 error locations. [2022-10-16 17:58:26,000 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-10-16 17:58:26,010 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6e8a74b5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-16 17:58:26,010 INFO L358 AbstractCegarLoop]: Starting to check reachability of 12 error locations. [2022-10-16 17:58:26,016 INFO L276 IsEmpty]: Start isEmpty. Operand has 46 states, 33 states have (on average 1.7272727272727273) internal successors, (57), 45 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:26,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-10-16 17:58:26,024 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:26,025 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:26,026 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:26,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:26,032 INFO L85 PathProgramCache]: Analyzing trace with hash 1804971307, now seen corresponding path program 1 times [2022-10-16 17:58:26,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:26,045 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [149933119] [2022-10-16 17:58:26,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:26,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:26,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:26,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:26,468 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:26,468 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [149933119] [2022-10-16 17:58:26,469 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [149933119] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:26,470 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:26,470 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 17:58:26,472 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20300085] [2022-10-16 17:58:26,473 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:26,481 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 17:58:26,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:26,529 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 17:58:26,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 17:58:26,533 INFO L87 Difference]: Start difference. First operand has 46 states, 33 states have (on average 1.7272727272727273) internal successors, (57), 45 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:26,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:26,663 INFO L93 Difference]: Finished difference Result 101 states and 124 transitions. [2022-10-16 17:58:26,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 17:58:26,669 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-10-16 17:58:26,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:26,679 INFO L225 Difference]: With dead ends: 101 [2022-10-16 17:58:26,679 INFO L226 Difference]: Without dead ends: 53 [2022-10-16 17:58:26,683 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 17:58:26,687 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 16 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:26,689 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 118 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:26,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-10-16 17:58:26,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 45. [2022-10-16 17:58:26,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 33 states have (on average 1.606060606060606) internal successors, (53), 44 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:26,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 53 transitions. [2022-10-16 17:58:26,733 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 53 transitions. Word has length 7 [2022-10-16 17:58:26,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:26,734 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 53 transitions. [2022-10-16 17:58:26,734 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:26,734 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 53 transitions. [2022-10-16 17:58:26,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-10-16 17:58:26,735 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:26,735 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:26,736 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-10-16 17:58:26,736 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:26,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:26,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1139720646, now seen corresponding path program 1 times [2022-10-16 17:58:26,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:26,737 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51609107] [2022-10-16 17:58:26,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:26,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:26,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:26,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:26,852 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:26,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51609107] [2022-10-16 17:58:26,852 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [51609107] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:26,852 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:26,853 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-16 17:58:26,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [652178335] [2022-10-16 17:58:26,853 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:26,858 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 17:58:26,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:26,859 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 17:58:26,859 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 17:58:26,860 INFO L87 Difference]: Start difference. First operand 45 states and 53 transitions. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:26,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:26,947 INFO L93 Difference]: Finished difference Result 114 states and 134 transitions. [2022-10-16 17:58:26,948 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 17:58:26,948 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-10-16 17:58:26,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:26,950 INFO L225 Difference]: With dead ends: 114 [2022-10-16 17:58:26,950 INFO L226 Difference]: Without dead ends: 84 [2022-10-16 17:58:26,951 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 17:58:26,953 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 43 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:26,954 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 94 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:26,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2022-10-16 17:58:26,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 47. [2022-10-16 17:58:26,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 35 states have (on average 1.6) internal successors, (56), 46 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:26,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 56 transitions. [2022-10-16 17:58:26,964 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 56 transitions. Word has length 10 [2022-10-16 17:58:26,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:26,965 INFO L495 AbstractCegarLoop]: Abstraction has 47 states and 56 transitions. [2022-10-16 17:58:26,965 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:26,965 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 56 transitions. [2022-10-16 17:58:26,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-10-16 17:58:26,966 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:26,966 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:26,967 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-10-16 17:58:26,967 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:26,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:26,968 INFO L85 PathProgramCache]: Analyzing trace with hash -1139719556, now seen corresponding path program 1 times [2022-10-16 17:58:26,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:26,968 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486746472] [2022-10-16 17:58:26,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:26,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:26,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:27,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:27,172 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:27,172 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1486746472] [2022-10-16 17:58:27,172 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1486746472] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:27,173 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:27,173 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-16 17:58:27,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295526430] [2022-10-16 17:58:27,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:27,176 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 17:58:27,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:27,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 17:58:27,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 17:58:27,180 INFO L87 Difference]: Start difference. First operand 47 states and 56 transitions. Second operand has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:27,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:27,291 INFO L93 Difference]: Finished difference Result 80 states and 95 transitions. [2022-10-16 17:58:27,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 17:58:27,292 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-10-16 17:58:27,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:27,293 INFO L225 Difference]: With dead ends: 80 [2022-10-16 17:58:27,293 INFO L226 Difference]: Without dead ends: 47 [2022-10-16 17:58:27,294 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 17:58:27,299 INFO L413 NwaCegarLoop]: 45 mSDtfsCounter, 51 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:27,301 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [51 Valid, 75 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:27,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-10-16 17:58:27,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2022-10-16 17:58:27,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 35 states have (on average 1.5714285714285714) internal successors, (55), 46 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:27,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 55 transitions. [2022-10-16 17:58:27,326 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 55 transitions. Word has length 10 [2022-10-16 17:58:27,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:27,328 INFO L495 AbstractCegarLoop]: Abstraction has 47 states and 55 transitions. [2022-10-16 17:58:27,328 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.5) internal successors, (10), 4 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:27,329 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 55 transitions. [2022-10-16 17:58:27,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-10-16 17:58:27,329 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:27,330 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:27,331 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-10-16 17:58:27,331 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:27,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:27,332 INFO L85 PathProgramCache]: Analyzing trace with hash 560852455, now seen corresponding path program 1 times [2022-10-16 17:58:27,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:27,333 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [937101497] [2022-10-16 17:58:27,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:27,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:27,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:27,529 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:27,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:27,530 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [937101497] [2022-10-16 17:58:27,530 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [937101497] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:27,530 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [672857690] [2022-10-16 17:58:27,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:27,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:27,531 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:27,533 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:27,542 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-10-16 17:58:27,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:27,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 7 conjunts are in the unsatisfiable core [2022-10-16 17:58:27,630 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:27,777 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:27,777 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 17:58:27,778 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [672857690] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:27,778 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 17:58:27,778 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 9 [2022-10-16 17:58:27,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837733369] [2022-10-16 17:58:27,779 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:27,783 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-10-16 17:58:27,783 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:27,784 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-16 17:58:27,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2022-10-16 17:58:27,789 INFO L87 Difference]: Start difference. First operand 47 states and 55 transitions. Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:27,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:27,933 INFO L93 Difference]: Finished difference Result 109 states and 128 transitions. [2022-10-16 17:58:27,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 17:58:27,934 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-10-16 17:58:27,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:27,939 INFO L225 Difference]: With dead ends: 109 [2022-10-16 17:58:27,939 INFO L226 Difference]: Without dead ends: 70 [2022-10-16 17:58:27,942 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2022-10-16 17:58:27,950 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 35 mSDsluCounter, 140 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 178 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:27,950 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 178 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:27,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-10-16 17:58:27,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 55. [2022-10-16 17:58:27,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 43 states have (on average 1.4651162790697674) internal successors, (63), 54 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:27,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 63 transitions. [2022-10-16 17:58:27,971 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 63 transitions. Word has length 11 [2022-10-16 17:58:27,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:27,972 INFO L495 AbstractCegarLoop]: Abstraction has 55 states and 63 transitions. [2022-10-16 17:58:27,972 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 6 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:27,972 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 63 transitions. [2022-10-16 17:58:27,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-10-16 17:58:27,973 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:27,973 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:28,009 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-10-16 17:58:28,173 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:28,175 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:28,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:28,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1240910825, now seen corresponding path program 1 times [2022-10-16 17:58:28,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:28,177 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1946439670] [2022-10-16 17:58:28,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:28,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:28,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:28,268 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:28,269 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:28,269 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1946439670] [2022-10-16 17:58:28,269 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1946439670] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:28,270 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [780869555] [2022-10-16 17:58:28,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:28,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:28,270 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:28,272 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:28,283 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-10-16 17:58:28,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:28,354 INFO L263 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-16 17:58:28,356 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:28,399 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:28,399 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:58:28,452 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:28,453 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [780869555] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:58:28,453 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:58:28,453 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2022-10-16 17:58:28,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505794963] [2022-10-16 17:58:28,454 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:58:28,454 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-10-16 17:58:28,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:28,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-10-16 17:58:28,455 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2022-10-16 17:58:28,456 INFO L87 Difference]: Start difference. First operand 55 states and 63 transitions. Second operand has 12 states, 11 states have (on average 2.1818181818181817) internal successors, (24), 12 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:28,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:28,621 INFO L93 Difference]: Finished difference Result 103 states and 120 transitions. [2022-10-16 17:58:28,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-10-16 17:58:28,622 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 2.1818181818181817) internal successors, (24), 12 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-10-16 17:58:28,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:28,625 INFO L225 Difference]: With dead ends: 103 [2022-10-16 17:58:28,625 INFO L226 Difference]: Without dead ends: 102 [2022-10-16 17:58:28,626 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=113, Invalid=229, Unknown=0, NotChecked=0, Total=342 [2022-10-16 17:58:28,627 INFO L413 NwaCegarLoop]: 32 mSDtfsCounter, 125 mSDsluCounter, 115 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:28,627 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [125 Valid, 147 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 102 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:28,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2022-10-16 17:58:28,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 66. [2022-10-16 17:58:28,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 54 states have (on average 1.462962962962963) internal successors, (79), 65 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:28,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 79 transitions. [2022-10-16 17:58:28,637 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 79 transitions. Word has length 11 [2022-10-16 17:58:28,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:28,638 INFO L495 AbstractCegarLoop]: Abstraction has 66 states and 79 transitions. [2022-10-16 17:58:28,638 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 2.1818181818181817) internal successors, (24), 12 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:28,638 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 79 transitions. [2022-10-16 17:58:28,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-10-16 17:58:28,639 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:28,639 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:28,676 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:28,853 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:28,854 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:28,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:28,855 INFO L85 PathProgramCache]: Analyzing trace with hash -186470036, now seen corresponding path program 1 times [2022-10-16 17:58:28,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:28,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827869602] [2022-10-16 17:58:28,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:28,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:28,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:28,976 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:28,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:28,977 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827869602] [2022-10-16 17:58:28,977 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [827869602] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:28,977 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [143917294] [2022-10-16 17:58:28,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:28,977 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:28,978 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:28,979 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:28,982 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-10-16 17:58:29,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:29,047 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-16 17:58:29,049 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:29,088 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:29,089 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 17:58:29,089 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [143917294] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:29,089 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 17:58:29,089 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2022-10-16 17:58:29,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816739265] [2022-10-16 17:58:29,090 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:29,090 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-10-16 17:58:29,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:29,091 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-16 17:58:29,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-10-16 17:58:29,091 INFO L87 Difference]: Start difference. First operand 66 states and 79 transitions. Second operand has 6 states, 5 states have (on average 2.4) internal successors, (12), 6 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:29,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:29,188 INFO L93 Difference]: Finished difference Result 95 states and 112 transitions. [2022-10-16 17:58:29,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 17:58:29,189 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 2.4) internal successors, (12), 6 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-10-16 17:58:29,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:29,190 INFO L225 Difference]: With dead ends: 95 [2022-10-16 17:58:29,190 INFO L226 Difference]: Without dead ends: 94 [2022-10-16 17:58:29,190 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2022-10-16 17:58:29,194 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 40 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:29,194 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 113 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:29,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-10-16 17:58:29,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 65. [2022-10-16 17:58:29,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 54 states have (on average 1.4074074074074074) internal successors, (76), 64 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:29,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 76 transitions. [2022-10-16 17:58:29,214 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 76 transitions. Word has length 12 [2022-10-16 17:58:29,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:29,215 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 76 transitions. [2022-10-16 17:58:29,215 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 2.4) internal successors, (12), 6 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:29,215 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 76 transitions. [2022-10-16 17:58:29,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-10-16 17:58:29,216 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:29,216 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:29,256 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:29,416 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:29,418 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:29,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:29,419 INFO L85 PathProgramCache]: Analyzing trace with hash 1141490430, now seen corresponding path program 1 times [2022-10-16 17:58:29,419 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:29,420 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257812047] [2022-10-16 17:58:29,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:29,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:29,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:29,517 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:29,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:29,521 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257812047] [2022-10-16 17:58:29,521 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [257812047] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:29,521 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1612157391] [2022-10-16 17:58:29,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:29,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:29,522 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:29,523 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:29,527 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-10-16 17:58:29,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:29,619 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-16 17:58:29,630 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:29,683 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:29,683 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:58:29,740 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:29,741 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1612157391] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:58:29,741 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:58:29,741 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 11 [2022-10-16 17:58:29,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408339022] [2022-10-16 17:58:29,742 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:58:29,743 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-10-16 17:58:29,744 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:29,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-10-16 17:58:29,745 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2022-10-16 17:58:29,745 INFO L87 Difference]: Start difference. First operand 65 states and 76 transitions. Second operand has 11 states, 11 states have (on average 2.090909090909091) internal successors, (23), 11 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:29,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:29,901 INFO L93 Difference]: Finished difference Result 142 states and 165 transitions. [2022-10-16 17:58:29,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-10-16 17:58:29,902 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.090909090909091) internal successors, (23), 11 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-10-16 17:58:29,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:29,903 INFO L225 Difference]: With dead ends: 142 [2022-10-16 17:58:29,903 INFO L226 Difference]: Without dead ends: 111 [2022-10-16 17:58:29,904 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 21 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=156, Unknown=0, NotChecked=0, Total=210 [2022-10-16 17:58:29,905 INFO L413 NwaCegarLoop]: 32 mSDtfsCounter, 89 mSDsluCounter, 186 mSDsCounter, 0 mSdLazyCounter, 133 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 89 SdHoareTripleChecker+Valid, 218 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 133 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:29,906 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [89 Valid, 218 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 133 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:29,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-10-16 17:58:29,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 65. [2022-10-16 17:58:29,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 54 states have (on average 1.4074074074074074) internal successors, (76), 64 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:29,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 76 transitions. [2022-10-16 17:58:29,919 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 76 transitions. Word has length 14 [2022-10-16 17:58:29,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:29,919 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 76 transitions. [2022-10-16 17:58:29,920 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.090909090909091) internal successors, (23), 11 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:29,920 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 76 transitions. [2022-10-16 17:58:29,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-10-16 17:58:29,921 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:29,921 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:29,951 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:30,130 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:30,131 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:30,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:30,132 INFO L85 PathProgramCache]: Analyzing trace with hash -1549998774, now seen corresponding path program 1 times [2022-10-16 17:58:30,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:30,132 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518686744] [2022-10-16 17:58:30,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:30,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:30,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:30,196 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:58:30,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:30,196 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518686744] [2022-10-16 17:58:30,196 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [518686744] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:30,197 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:30,197 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 17:58:30,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520313858] [2022-10-16 17:58:30,197 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:30,198 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 17:58:30,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:30,198 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 17:58:30,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 17:58:30,199 INFO L87 Difference]: Start difference. First operand 65 states and 76 transitions. Second operand has 4 states, 3 states have (on average 5.333333333333333) internal successors, (16), 4 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:30,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:30,244 INFO L93 Difference]: Finished difference Result 72 states and 84 transitions. [2022-10-16 17:58:30,244 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 17:58:30,244 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.333333333333333) internal successors, (16), 4 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-10-16 17:58:30,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:30,245 INFO L225 Difference]: With dead ends: 72 [2022-10-16 17:58:30,245 INFO L226 Difference]: Without dead ends: 70 [2022-10-16 17:58:30,246 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 17:58:30,247 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 7 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:30,247 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 105 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:30,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-10-16 17:58:30,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2022-10-16 17:58:30,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 69 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:30,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 82 transitions. [2022-10-16 17:58:30,256 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 82 transitions. Word has length 16 [2022-10-16 17:58:30,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:30,256 INFO L495 AbstractCegarLoop]: Abstraction has 70 states and 82 transitions. [2022-10-16 17:58:30,257 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.333333333333333) internal successors, (16), 4 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:30,257 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 82 transitions. [2022-10-16 17:58:30,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-10-16 17:58:30,258 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:30,258 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:30,258 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-10-16 17:58:30,259 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:30,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:30,259 INFO L85 PathProgramCache]: Analyzing trace with hash 327608258, now seen corresponding path program 2 times [2022-10-16 17:58:30,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:30,260 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967985075] [2022-10-16 17:58:30,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:30,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:30,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:30,895 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:30,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:30,895 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967985075] [2022-10-16 17:58:30,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1967985075] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:30,896 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [27339154] [2022-10-16 17:58:30,896 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 17:58:30,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:30,896 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:30,898 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:30,919 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-10-16 17:58:30,973 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-16 17:58:30,974 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:58:30,975 INFO L263 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 26 conjunts are in the unsatisfiable core [2022-10-16 17:58:30,979 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:31,027 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2022-10-16 17:58:31,070 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:58:31,075 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:58:31,159 INFO L356 Elim1Store]: treesize reduction 21, result has 25.0 percent of original size [2022-10-16 17:58:31,160 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:58:31,167 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-16 17:58:32,005 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-10-16 17:58:32,006 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 26 treesize of output 10 [2022-10-16 17:58:32,023 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:32,023 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:58:32,165 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_30| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_30|)) (forall ((v_ArrVal_256 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_30| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_256) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) is different from false [2022-10-16 17:58:32,197 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_256 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_30| Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_30| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_30| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_256) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) is different from false [2022-10-16 17:58:32,217 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:58:32,217 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 41 [2022-10-16 17:58:32,225 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 74 [2022-10-16 17:58:32,236 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 35 [2022-10-16 17:58:32,246 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 57 [2022-10-16 17:58:32,259 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:58:32,259 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 49 [2022-10-16 17:58:32,326 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-10-16 17:58:32,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [27339154] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:58:32,327 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:58:32,327 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 21 [2022-10-16 17:58:32,328 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78691475] [2022-10-16 17:58:32,328 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:58:32,328 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-10-16 17:58:32,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:32,329 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-10-16 17:58:32,329 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=310, Unknown=3, NotChecked=74, Total=462 [2022-10-16 17:58:32,330 INFO L87 Difference]: Start difference. First operand 70 states and 82 transitions. Second operand has 22 states, 21 states have (on average 2.238095238095238) internal successors, (47), 22 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:32,851 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_~i~0#1| 0) (forall ((v_ArrVal_256 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_30| Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_30| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_30| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_256) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))))) is different from false [2022-10-16 17:58:34,882 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_30| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_30|)) (forall ((v_ArrVal_256 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_30| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_256) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_#t~post4#1| 0) (= (select .cse0 0) 1))) is different from false [2022-10-16 17:58:35,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:35,168 INFO L93 Difference]: Finished difference Result 91 states and 109 transitions. [2022-10-16 17:58:35,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-10-16 17:58:35,169 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 2.238095238095238) internal successors, (47), 22 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-10-16 17:58:35,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:35,170 INFO L225 Difference]: With dead ends: 91 [2022-10-16 17:58:35,171 INFO L226 Difference]: Without dead ends: 89 [2022-10-16 17:58:35,171 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=110, Invalid=453, Unknown=5, NotChecked=188, Total=756 [2022-10-16 17:58:35,172 INFO L413 NwaCegarLoop]: 39 mSDtfsCounter, 35 mSDsluCounter, 327 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 366 SdHoareTripleChecker+Invalid, 266 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 118 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:35,173 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 366 Invalid, 266 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 138 Invalid, 0 Unknown, 118 Unchecked, 0.1s Time] [2022-10-16 17:58:35,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-10-16 17:58:35,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 76. [2022-10-16 17:58:35,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 65 states have (on average 1.3846153846153846) internal successors, (90), 75 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 90 transitions. [2022-10-16 17:58:35,183 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 90 transitions. Word has length 18 [2022-10-16 17:58:35,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:35,183 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 90 transitions. [2022-10-16 17:58:35,184 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 2.238095238095238) internal successors, (47), 22 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,184 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 90 transitions. [2022-10-16 17:58:35,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-10-16 17:58:35,185 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:35,185 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:35,246 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:35,416 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:35,417 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:35,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:35,418 INFO L85 PathProgramCache]: Analyzing trace with hash 1565927508, now seen corresponding path program 1 times [2022-10-16 17:58:35,419 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:35,419 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361422712] [2022-10-16 17:58:35,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:35,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:35,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:35,461 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-10-16 17:58:35,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:35,462 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361422712] [2022-10-16 17:58:35,462 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1361422712] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:35,462 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:35,462 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 17:58:35,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184749508] [2022-10-16 17:58:35,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:35,463 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 17:58:35,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:35,464 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 17:58:35,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 17:58:35,464 INFO L87 Difference]: Start difference. First operand 76 states and 90 transitions. Second operand has 3 states, 3 states have (on average 5.0) internal successors, (15), 3 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:35,479 INFO L93 Difference]: Finished difference Result 112 states and 133 transitions. [2022-10-16 17:58:35,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 17:58:35,480 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.0) internal successors, (15), 3 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-10-16 17:58:35,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:35,481 INFO L225 Difference]: With dead ends: 112 [2022-10-16 17:58:35,481 INFO L226 Difference]: Without dead ends: 77 [2022-10-16 17:58:35,481 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 17:58:35,482 INFO L413 NwaCegarLoop]: 46 mSDtfsCounter, 0 mSDsluCounter, 40 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 7 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:35,483 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 86 Invalid, 7 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:35,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-10-16 17:58:35,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2022-10-16 17:58:35,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 66 states have (on average 1.378787878787879) internal successors, (91), 76 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 91 transitions. [2022-10-16 17:58:35,491 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 91 transitions. Word has length 19 [2022-10-16 17:58:35,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:35,492 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 91 transitions. [2022-10-16 17:58:35,492 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.0) internal successors, (15), 3 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,492 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 91 transitions. [2022-10-16 17:58:35,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-10-16 17:58:35,493 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:35,493 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:35,493 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-10-16 17:58:35,494 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:35,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:35,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1299118540, now seen corresponding path program 1 times [2022-10-16 17:58:35,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:35,494 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105590030] [2022-10-16 17:58:35,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:35,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:35,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:35,548 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-10-16 17:58:35,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:35,548 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105590030] [2022-10-16 17:58:35,549 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2105590030] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:35,549 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:35,549 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 17:58:35,549 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346548736] [2022-10-16 17:58:35,549 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:35,550 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 17:58:35,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:35,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 17:58:35,551 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 17:58:35,551 INFO L87 Difference]: Start difference. First operand 77 states and 91 transitions. Second operand has 4 states, 3 states have (on average 5.333333333333333) internal successors, (16), 4 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:35,591 INFO L93 Difference]: Finished difference Result 113 states and 133 transitions. [2022-10-16 17:58:35,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 17:58:35,592 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.333333333333333) internal successors, (16), 4 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-10-16 17:58:35,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:35,593 INFO L225 Difference]: With dead ends: 113 [2022-10-16 17:58:35,593 INFO L226 Difference]: Without dead ends: 111 [2022-10-16 17:58:35,594 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 17:58:35,595 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 29 mSDsluCounter, 91 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:35,595 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 147 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:35,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2022-10-16 17:58:35,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 88. [2022-10-16 17:58:35,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 77 states have (on average 1.4155844155844155) internal successors, (109), 87 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 109 transitions. [2022-10-16 17:58:35,605 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 109 transitions. Word has length 20 [2022-10-16 17:58:35,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:35,606 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 109 transitions. [2022-10-16 17:58:35,606 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.333333333333333) internal successors, (16), 4 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,606 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 109 transitions. [2022-10-16 17:58:35,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-10-16 17:58:35,607 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:35,607 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:35,607 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-10-16 17:58:35,608 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:35,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:35,608 INFO L85 PathProgramCache]: Analyzing trace with hash -1992152420, now seen corresponding path program 1 times [2022-10-16 17:58:35,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:35,609 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245571581] [2022-10-16 17:58:35,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:35,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:35,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:35,672 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:58:35,673 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:35,673 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245571581] [2022-10-16 17:58:35,673 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245571581] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:35,673 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1231086487] [2022-10-16 17:58:35,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:35,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:35,674 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:35,675 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:35,701 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-10-16 17:58:35,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:35,753 INFO L263 TraceCheckSpWp]: Trace formula consists of 124 conjuncts, 7 conjunts are in the unsatisfiable core [2022-10-16 17:58:35,755 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:35,838 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:58:35,838 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 17:58:35,838 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1231086487] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:35,838 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 17:58:35,839 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [5] total 11 [2022-10-16 17:58:35,839 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [447946586] [2022-10-16 17:58:35,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:35,839 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-10-16 17:58:35,840 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:35,840 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-10-16 17:58:35,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2022-10-16 17:58:35,841 INFO L87 Difference]: Start difference. First operand 88 states and 109 transitions. Second operand has 7 states, 7 states have (on average 3.0) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:35,926 INFO L93 Difference]: Finished difference Result 104 states and 127 transitions. [2022-10-16 17:58:35,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-16 17:58:35,927 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.0) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-10-16 17:58:35,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:35,928 INFO L225 Difference]: With dead ends: 104 [2022-10-16 17:58:35,928 INFO L226 Difference]: Without dead ends: 82 [2022-10-16 17:58:35,928 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2022-10-16 17:58:35,929 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 28 mSDsluCounter, 120 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 157 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:35,930 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 157 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:35,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2022-10-16 17:58:35,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2022-10-16 17:58:35,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 71 states have (on average 1.4366197183098592) internal successors, (102), 81 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 102 transitions. [2022-10-16 17:58:35,938 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 102 transitions. Word has length 21 [2022-10-16 17:58:35,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:35,939 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 102 transitions. [2022-10-16 17:58:35,939 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.0) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:35,939 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 102 transitions. [2022-10-16 17:58:35,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-10-16 17:58:35,940 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:35,940 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:35,984 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:36,153 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:36,154 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:36,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:36,155 INFO L85 PathProgramCache]: Analyzing trace with hash 1611997200, now seen corresponding path program 1 times [2022-10-16 17:58:36,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:36,155 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901236379] [2022-10-16 17:58:36,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:36,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:36,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:36,250 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-10-16 17:58:36,250 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:36,251 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901236379] [2022-10-16 17:58:36,251 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [901236379] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:36,251 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:36,251 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-16 17:58:36,251 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [705253551] [2022-10-16 17:58:36,251 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:36,253 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-10-16 17:58:36,254 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:36,254 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-16 17:58:36,254 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-10-16 17:58:36,255 INFO L87 Difference]: Start difference. First operand 82 states and 102 transitions. Second operand has 6 states, 5 states have (on average 3.4) internal successors, (17), 6 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:36,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:36,318 INFO L93 Difference]: Finished difference Result 90 states and 110 transitions. [2022-10-16 17:58:36,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 17:58:36,318 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.4) internal successors, (17), 6 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-10-16 17:58:36,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:36,319 INFO L225 Difference]: With dead ends: 90 [2022-10-16 17:58:36,319 INFO L226 Difference]: Without dead ends: 89 [2022-10-16 17:58:36,320 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-10-16 17:58:36,322 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 14 mSDsluCounter, 100 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 53 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:36,322 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 142 Invalid, 53 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 51 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:36,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2022-10-16 17:58:36,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 81. [2022-10-16 17:58:36,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81 states, 71 states have (on average 1.408450704225352) internal successors, (100), 80 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:36,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 100 transitions. [2022-10-16 17:58:36,331 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 100 transitions. Word has length 21 [2022-10-16 17:58:36,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:36,331 INFO L495 AbstractCegarLoop]: Abstraction has 81 states and 100 transitions. [2022-10-16 17:58:36,332 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.4) internal successors, (17), 6 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:36,332 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 100 transitions. [2022-10-16 17:58:36,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-10-16 17:58:36,334 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:36,335 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:36,335 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-10-16 17:58:36,335 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:36,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:36,336 INFO L85 PathProgramCache]: Analyzing trace with hash 613871134, now seen corresponding path program 1 times [2022-10-16 17:58:36,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:36,336 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484368210] [2022-10-16 17:58:36,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:36,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:36,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:36,409 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:58:36,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:36,409 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [484368210] [2022-10-16 17:58:36,409 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [484368210] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:36,409 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1354664053] [2022-10-16 17:58:36,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:36,410 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:36,410 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:36,411 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:36,438 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-10-16 17:58:36,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:36,490 INFO L263 TraceCheckSpWp]: Trace formula consists of 122 conjuncts, 8 conjunts are in the unsatisfiable core [2022-10-16 17:58:36,492 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:36,579 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:36,579 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:58:36,665 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:36,665 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1354664053] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:58:36,666 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:58:36,666 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 9, 9] total 15 [2022-10-16 17:58:36,666 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265950882] [2022-10-16 17:58:36,666 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:58:36,667 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-10-16 17:58:36,667 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:36,667 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-10-16 17:58:36,668 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2022-10-16 17:58:36,668 INFO L87 Difference]: Start difference. First operand 81 states and 100 transitions. Second operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 15 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:36,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:36,874 INFO L93 Difference]: Finished difference Result 133 states and 164 transitions. [2022-10-16 17:58:36,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-10-16 17:58:36,875 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 15 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-10-16 17:58:36,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:36,876 INFO L225 Difference]: With dead ends: 133 [2022-10-16 17:58:36,876 INFO L226 Difference]: Without dead ends: 116 [2022-10-16 17:58:36,877 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2022-10-16 17:58:36,878 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 59 mSDsluCounter, 223 mSDsCounter, 0 mSdLazyCounter, 205 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 250 SdHoareTripleChecker+Invalid, 224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 205 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:36,878 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 250 Invalid, 224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 205 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:36,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-10-16 17:58:36,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 83. [2022-10-16 17:58:36,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 73 states have (on average 1.36986301369863) internal successors, (100), 82 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:36,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 100 transitions. [2022-10-16 17:58:36,886 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 100 transitions. Word has length 21 [2022-10-16 17:58:36,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:36,886 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 100 transitions. [2022-10-16 17:58:36,887 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 15 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:36,887 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 100 transitions. [2022-10-16 17:58:36,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-10-16 17:58:36,888 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:36,888 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:36,931 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:37,101 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:37,101 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:37,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:37,102 INFO L85 PathProgramCache]: Analyzing trace with hash -493090170, now seen corresponding path program 3 times [2022-10-16 17:58:37,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:37,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642735179] [2022-10-16 17:58:37,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:37,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:37,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:37,747 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:37,747 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:37,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [642735179] [2022-10-16 17:58:37,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [642735179] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:37,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1634274011] [2022-10-16 17:58:37,748 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-10-16 17:58:37,748 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:37,748 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:37,749 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:37,755 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-10-16 17:58:37,834 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-10-16 17:58:37,834 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:58:37,837 INFO L263 TraceCheckSpWp]: Trace formula consists of 147 conjuncts, 37 conjunts are in the unsatisfiable core [2022-10-16 17:58:37,840 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:37,856 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2022-10-16 17:58:37,873 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:58:37,877 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:58:37,947 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:58:37,948 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:58:37,956 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-16 17:58:38,073 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:58:38,099 INFO L356 Elim1Store]: treesize reduction 36, result has 49.3 percent of original size [2022-10-16 17:58:38,099 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 58 [2022-10-16 17:58:38,107 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 41 [2022-10-16 17:58:38,845 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-10-16 17:58:38,861 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:38,861 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:58:39,052 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_lis_~i~0#1| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) is different from false [2022-10-16 17:58:42,464 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_42| Int)) (or (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int)) (v_ArrVal_441 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_41| Int)) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_42| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_441))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_41| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_41| 1))) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_42|)))) is different from false [2022-10-16 17:58:42,506 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_42| Int) (v_ArrVal_441 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_41| Int)) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_42| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_441))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_41| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_42| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_41| 1))) is different from false [2022-10-16 17:58:42,525 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:58:42,526 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 112 treesize of output 77 [2022-10-16 17:58:42,535 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 166 treesize of output 162 [2022-10-16 17:58:42,544 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:58:42,548 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 72 [2022-10-16 17:58:42,558 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:58:42,560 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 124 [2022-10-16 17:58:42,568 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:58:42,577 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:58:42,577 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 79 [2022-10-16 17:58:42,592 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 106 [2022-10-16 17:58:42,653 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 12 not checked. [2022-10-16 17:58:42,653 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1634274011] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:58:42,653 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:58:42,654 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13, 13] total 30 [2022-10-16 17:58:42,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2147264194] [2022-10-16 17:58:42,654 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:58:42,654 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-10-16 17:58:42,655 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:42,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-10-16 17:58:42,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=584, Unknown=9, NotChecked=162, Total=930 [2022-10-16 17:58:42,656 INFO L87 Difference]: Start difference. First operand 83 states and 100 transitions. Second operand has 31 states, 30 states have (on average 1.9) internal successors, (57), 31 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:44,669 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|ULTIMATE.start_lis_~i~0#1| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_~i~0#1| 0) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_42| Int) (v_ArrVal_441 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_41| Int)) (or (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_42| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_441))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_41| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_42| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_41| 1))))) is different from false [2022-10-16 17:58:46,681 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|ULTIMATE.start_lis_~i~0#1| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) (forall ((|v_ULTIMATE.start_lis_~i~0#1_42| Int)) (or (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int)) (v_ArrVal_441 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_41| Int)) (or (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_42| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_441))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_41| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_41| 1))) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_42|)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_#t~post4#1| 0) (= (select .cse0 0) 1))) is different from false [2022-10-16 17:58:48,687 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|ULTIMATE.start_lis_~i~0#1| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 1) |c_ULTIMATE.start_lis_~i~0#1|) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= (select .cse0 0) 1))) is different from false [2022-10-16 17:58:50,697 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 1)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|ULTIMATE.start_lis_~i~0#1| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) (<= .cse1 |c_ULTIMATE.start_lis_~i~0#1|) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (exists ((|ULTIMATE.start_lis_~i~0#1| Int)) (and (<= .cse1 |ULTIMATE.start_lis_~i~0#1|) (= (select .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1))) (= (select .cse0 0) 1))) is different from false [2022-10-16 17:58:52,703 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 1)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|ULTIMATE.start_lis_~i~0#1| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (exists ((|ULTIMATE.start_lis_~i~0#1| Int)) (and (<= .cse1 |ULTIMATE.start_lis_~i~0#1|) (= (select .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1))) (<= .cse1 |c_ULTIMATE.start_lis_#t~post4#1|) (= (select .cse0 0) 1))) is different from false [2022-10-16 17:58:54,708 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|ULTIMATE.start_lis_~i~0#1| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_445 Int) (v_ArrVal_446 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_445)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_446) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (exists ((|ULTIMATE.start_lis_~i~0#1| Int)) (and (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 1) |ULTIMATE.start_lis_~i~0#1|) (= (select .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1))) (= (select .cse0 0) 1) (not (= (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 0)))) is different from false [2022-10-16 17:58:55,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:55,325 INFO L93 Difference]: Finished difference Result 194 states and 229 transitions. [2022-10-16 17:58:55,325 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-10-16 17:58:55,326 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 30 states have (on average 1.9) internal successors, (57), 31 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-10-16 17:58:55,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:55,327 INFO L225 Difference]: With dead ends: 194 [2022-10-16 17:58:55,327 INFO L226 Difference]: Without dead ends: 192 [2022-10-16 17:58:55,330 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 22 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 9 IntricatePredicates, 0 DeprecatedPredicates, 290 ImplicationChecksByTransitivity, 16.5s TimeCoverageRelationStatistics Valid=301, Invalid=1052, Unknown=15, NotChecked=702, Total=2070 [2022-10-16 17:58:55,334 INFO L413 NwaCegarLoop]: 71 mSDtfsCounter, 314 mSDsluCounter, 713 mSDsCounter, 0 mSdLazyCounter, 349 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 314 SdHoareTripleChecker+Valid, 784 SdHoareTripleChecker+Invalid, 868 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 349 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 501 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:55,334 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [314 Valid, 784 Invalid, 868 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 349 Invalid, 0 Unknown, 501 Unchecked, 0.3s Time] [2022-10-16 17:58:55,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2022-10-16 17:58:55,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 108. [2022-10-16 17:58:55,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 98 states have (on average 1.4081632653061225) internal successors, (138), 107 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:55,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 138 transitions. [2022-10-16 17:58:55,356 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 138 transitions. Word has length 22 [2022-10-16 17:58:55,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:55,357 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 138 transitions. [2022-10-16 17:58:55,357 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 30 states have (on average 1.9) internal successors, (57), 31 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:55,357 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 138 transitions. [2022-10-16 17:58:55,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-10-16 17:58:55,358 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:55,358 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:55,391 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:55,572 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-10-16 17:58:55,573 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:55,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:55,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1567694262, now seen corresponding path program 1 times [2022-10-16 17:58:55,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:55,575 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614292932] [2022-10-16 17:58:55,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:55,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:55,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:55,641 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-10-16 17:58:55,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:55,641 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614292932] [2022-10-16 17:58:55,642 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1614292932] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:55,642 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:55,642 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-16 17:58:55,642 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962933926] [2022-10-16 17:58:55,642 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:55,643 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-16 17:58:55,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:55,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-16 17:58:55,643 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-16 17:58:55,644 INFO L87 Difference]: Start difference. First operand 108 states and 138 transitions. Second operand has 5 states, 4 states have (on average 4.5) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:55,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:55,708 INFO L93 Difference]: Finished difference Result 122 states and 154 transitions. [2022-10-16 17:58:55,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 17:58:55,708 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 4.5) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-10-16 17:58:55,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:55,710 INFO L225 Difference]: With dead ends: 122 [2022-10-16 17:58:55,710 INFO L226 Difference]: Without dead ends: 121 [2022-10-16 17:58:55,710 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-10-16 17:58:55,711 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 9 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 9 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:55,711 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [9 Valid, 139 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 45 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:55,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-10-16 17:58:55,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 107. [2022-10-16 17:58:55,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 107 states, 98 states have (on average 1.3877551020408163) internal successors, (136), 106 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:55,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 136 transitions. [2022-10-16 17:58:55,722 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 136 transitions. Word has length 22 [2022-10-16 17:58:55,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:55,722 INFO L495 AbstractCegarLoop]: Abstraction has 107 states and 136 transitions. [2022-10-16 17:58:55,722 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 4.5) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:55,722 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 136 transitions. [2022-10-16 17:58:55,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-10-16 17:58:55,723 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:55,723 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 1, 1, 1, 1, 1] [2022-10-16 17:58:55,723 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-10-16 17:58:55,724 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:55,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:55,724 INFO L85 PathProgramCache]: Analyzing trace with hash -868473059, now seen corresponding path program 2 times [2022-10-16 17:58:55,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:55,725 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2091258937] [2022-10-16 17:58:55,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:55,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:55,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:55,883 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:55,883 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:55,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2091258937] [2022-10-16 17:58:55,884 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2091258937] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:55,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [943109772] [2022-10-16 17:58:55,884 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 17:58:55,884 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:55,885 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:55,889 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:55,906 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-10-16 17:58:55,959 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-10-16 17:58:55,959 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:58:55,960 INFO L263 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-16 17:58:55,962 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:56,027 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-10-16 17:58:56,027 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:58:56,103 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-10-16 17:58:56,103 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [943109772] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:58:56,103 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:58:56,103 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 5, 5] total 15 [2022-10-16 17:58:56,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [473434897] [2022-10-16 17:58:56,104 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:58:56,104 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-10-16 17:58:56,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:56,105 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-10-16 17:58:56,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=181, Unknown=0, NotChecked=0, Total=240 [2022-10-16 17:58:56,105 INFO L87 Difference]: Start difference. First operand 107 states and 136 transitions. Second operand has 16 states, 15 states have (on average 2.2) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:56,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:56,400 INFO L93 Difference]: Finished difference Result 165 states and 215 transitions. [2022-10-16 17:58:56,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-10-16 17:58:56,401 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 15 states have (on average 2.2) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-10-16 17:58:56,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:56,402 INFO L225 Difference]: With dead ends: 165 [2022-10-16 17:58:56,402 INFO L226 Difference]: Without dead ends: 164 [2022-10-16 17:58:56,403 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=237, Invalid=575, Unknown=0, NotChecked=0, Total=812 [2022-10-16 17:58:56,404 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 280 mSDsluCounter, 141 mSDsCounter, 0 mSdLazyCounter, 133 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 280 SdHoareTripleChecker+Valid, 167 SdHoareTripleChecker+Invalid, 160 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 133 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:56,404 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [280 Valid, 167 Invalid, 160 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 133 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:58:56,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2022-10-16 17:58:56,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 104. [2022-10-16 17:58:56,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 96 states have (on average 1.3854166666666667) internal successors, (133), 103 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:56,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 133 transitions. [2022-10-16 17:58:56,437 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 133 transitions. Word has length 23 [2022-10-16 17:58:56,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:56,438 INFO L495 AbstractCegarLoop]: Abstraction has 104 states and 133 transitions. [2022-10-16 17:58:56,438 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 15 states have (on average 2.2) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:56,438 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 133 transitions. [2022-10-16 17:58:56,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-10-16 17:58:56,439 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:56,439 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:56,467 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:56,649 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-10-16 17:58:56,650 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:56,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:56,651 INFO L85 PathProgramCache]: Analyzing trace with hash -1498228877, now seen corresponding path program 1 times [2022-10-16 17:58:56,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:56,652 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141254308] [2022-10-16 17:58:56,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:56,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:56,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:56,706 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-10-16 17:58:56,706 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:56,706 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141254308] [2022-10-16 17:58:56,706 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141254308] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:56,707 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 17:58:56,707 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 17:58:56,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1643684238] [2022-10-16 17:58:56,707 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:56,707 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 17:58:56,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:56,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 17:58:56,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 17:58:56,708 INFO L87 Difference]: Start difference. First operand 104 states and 133 transitions. Second operand has 4 states, 3 states have (on average 6.666666666666667) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:56,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:56,758 INFO L93 Difference]: Finished difference Result 154 states and 201 transitions. [2022-10-16 17:58:56,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 17:58:56,759 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 6.666666666666667) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-10-16 17:58:56,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:56,760 INFO L225 Difference]: With dead ends: 154 [2022-10-16 17:58:56,760 INFO L226 Difference]: Without dead ends: 152 [2022-10-16 17:58:56,761 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 17:58:56,762 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 13 mSDsluCounter, 56 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:56,762 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 91 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:56,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-10-16 17:58:56,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 148. [2022-10-16 17:58:56,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 140 states have (on average 1.4071428571428573) internal successors, (197), 147 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:56,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 197 transitions. [2022-10-16 17:58:56,774 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 197 transitions. Word has length 24 [2022-10-16 17:58:56,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:56,775 INFO L495 AbstractCegarLoop]: Abstraction has 148 states and 197 transitions. [2022-10-16 17:58:56,775 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 6.666666666666667) internal successors, (20), 4 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:56,775 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 197 transitions. [2022-10-16 17:58:56,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-10-16 17:58:56,776 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:56,776 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:56,776 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-10-16 17:58:56,776 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:56,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:56,777 INFO L85 PathProgramCache]: Analyzing trace with hash -1498227787, now seen corresponding path program 1 times [2022-10-16 17:58:56,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:56,777 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705952589] [2022-10-16 17:58:56,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:56,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:56,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:56,860 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-10-16 17:58:56,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:56,860 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705952589] [2022-10-16 17:58:56,860 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [705952589] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:56,860 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [139053348] [2022-10-16 17:58:56,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:56,861 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:56,861 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:56,862 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:56,870 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-10-16 17:58:56,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:56,949 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-16 17:58:56,951 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:56,999 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-10-16 17:58:56,999 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 17:58:56,999 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [139053348] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:58:56,999 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 17:58:57,000 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 10 [2022-10-16 17:58:57,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1498373302] [2022-10-16 17:58:57,000 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:58:57,000 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-10-16 17:58:57,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:57,001 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-16 17:58:57,001 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2022-10-16 17:58:57,001 INFO L87 Difference]: Start difference. First operand 148 states and 197 transitions. Second operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:57,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:58:57,069 INFO L93 Difference]: Finished difference Result 229 states and 303 transitions. [2022-10-16 17:58:57,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 17:58:57,070 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-10-16 17:58:57,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:58:57,071 INFO L225 Difference]: With dead ends: 229 [2022-10-16 17:58:57,071 INFO L226 Difference]: Without dead ends: 132 [2022-10-16 17:58:57,072 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2022-10-16 17:58:57,072 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 41 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 41 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:58:57,073 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [41 Valid, 73 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:58:57,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2022-10-16 17:58:57,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 130. [2022-10-16 17:58:57,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 130 states, 122 states have (on average 1.3524590163934427) internal successors, (165), 129 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:57,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 165 transitions. [2022-10-16 17:58:57,085 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 165 transitions. Word has length 24 [2022-10-16 17:58:57,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:58:57,085 INFO L495 AbstractCegarLoop]: Abstraction has 130 states and 165 transitions. [2022-10-16 17:58:57,085 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:58:57,085 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 165 transitions. [2022-10-16 17:58:57,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-10-16 17:58:57,086 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:58:57,086 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:58:57,116 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-10-16 17:58:57,301 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:57,302 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:58:57,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:58:57,303 INFO L85 PathProgramCache]: Analyzing trace with hash 152709962, now seen corresponding path program 4 times [2022-10-16 17:58:57,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:58:57,303 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1093407452] [2022-10-16 17:58:57,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:58:57,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:58:57,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:58:57,999 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:57,999 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:58:57,999 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1093407452] [2022-10-16 17:58:57,999 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1093407452] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:58:58,000 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1683938170] [2022-10-16 17:58:58,000 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-10-16 17:58:58,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:58:58,000 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:58:58,002 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:58:58,008 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-10-16 17:58:58,115 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-10-16 17:58:58,115 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:58:58,117 INFO L263 TraceCheckSpWp]: Trace formula consists of 164 conjuncts, 31 conjunts are in the unsatisfiable core [2022-10-16 17:58:58,120 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:58:58,132 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 94 [2022-10-16 17:58:58,157 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:58:58,161 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:58:58,248 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:58:58,249 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:58:58,277 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-10-16 17:58:58,355 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:58:58,359 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:58:58,363 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-10-16 17:58:58,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:58:58,436 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:58:58,441 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-10-16 17:58:58,504 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-10-16 17:58:58,517 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 10 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:58:58,518 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:58:58,585 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)) is different from false [2022-10-16 17:58:58,600 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_51| Int)) (or (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_51|)))) is different from false [2022-10-16 17:58:58,622 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_51| Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) is different from false [2022-10-16 17:58:58,637 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) is different from false [2022-10-16 17:58:58,666 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_52| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_52|)) (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (v_ArrVal_684 (Array Int Int))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)))))) is different from false [2022-10-16 17:58:58,710 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (|v_ULTIMATE.start_lis_~i~0#1_52| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_52| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)))) is different from false [2022-10-16 17:58:58,735 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (v_ArrVal_681 Int) (v_ArrVal_682 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (|v_ULTIMATE.start_lis_~i~0#1_52| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_52| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)) (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_681)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_682))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) is different from false [2022-10-16 17:58:58,775 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_53| Int)) (or (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (v_ArrVal_681 Int) (v_ArrVal_682 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (|v_ULTIMATE.start_lis_~i~0#1_52| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_52| (+ |v_ULTIMATE.start_lis_~i~0#1_53| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)) (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_53| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_681)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_682))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_53|)))) is different from false [2022-10-16 17:58:58,847 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_53| Int) (v_ArrVal_683 Int) (v_ArrVal_681 Int) (v_ArrVal_682 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (|v_ULTIMATE.start_lis_~i~0#1_52| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_52| (+ |v_ULTIMATE.start_lis_~i~0#1_53| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_53| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)) (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_53| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_681)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_682))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) is different from false [2022-10-16 17:58:58,875 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:58:58,876 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 232 treesize of output 149 [2022-10-16 17:58:58,895 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 342 treesize of output 338 [2022-10-16 17:58:58,936 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 399 treesize of output 395 [2022-10-16 17:58:58,952 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 560 treesize of output 544 [2022-10-16 17:58:58,973 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 584 treesize of output 576 [2022-10-16 17:58:59,000 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 650 treesize of output 646 [2022-10-16 17:58:59,032 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:58:59,033 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 316 treesize of output 318 [2022-10-16 17:58:59,315 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 27 not checked. [2022-10-16 17:58:59,316 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1683938170] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:58:59,316 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:58:59,316 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 14] total 35 [2022-10-16 17:58:59,316 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036512842] [2022-10-16 17:58:59,316 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:58:59,317 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-10-16 17:58:59,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:58:59,318 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-10-16 17:58:59,318 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=586, Unknown=9, NotChecked=522, Total=1260 [2022-10-16 17:58:59,319 INFO L87 Difference]: Start difference. First operand 130 states and 165 transitions. Second operand has 36 states, 35 states have (on average 2.0285714285714285) internal successors, (71), 36 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:00,152 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_~i~0#1| 0) (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_53| Int) (v_ArrVal_683 Int) (v_ArrVal_681 Int) (v_ArrVal_682 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (|v_ULTIMATE.start_lis_~i~0#1_52| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_52| (+ |v_ULTIMATE.start_lis_~i~0#1_53| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_53| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)) (< (select (select (store (let ((.cse1 (store (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_53| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_681)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_682))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))))) is different from false [2022-10-16 17:59:02,158 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((|v_ULTIMATE.start_lis_~i~0#1_53| Int)) (or (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (v_ArrVal_681 Int) (v_ArrVal_682 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (|v_ULTIMATE.start_lis_~i~0#1_52| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_52| (+ |v_ULTIMATE.start_lis_~i~0#1_53| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)) (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 (+ (* |v_ULTIMATE.start_lis_~i~0#1_53| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_681)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_682))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_53|)))) (= |c_ULTIMATE.start_lis_#t~post4#1| 0) (= (select .cse2 0) 1))) is different from false [2022-10-16 17:59:02,797 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 1) |c_ULTIMATE.start_lis_~i~0#1|) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (|v_ULTIMATE.start_lis_~i~0#1_52| Int) (v_ArrVal_684 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_52| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)))) (= (select .cse1 0) 1))) is different from false [2022-10-16 17:59:04,803 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_52| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_52|)) (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (v_ArrVal_683 Int) (|v_ULTIMATE.start_lis_~i~0#1_51| Int) (v_ArrVal_684 (Array Int Int))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ (* |v_ULTIMATE.start_lis_~i~0#1_52| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_683)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_684))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |v_ULTIMATE.start_lis_~i~0#1_52| 1)))))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 1) |c_ULTIMATE.start_lis_#t~post4#1|) (= (select .cse1 0) 1))) is different from false [2022-10-16 17:59:05,540 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_51| Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_51| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647))) (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 2) |c_ULTIMATE.start_lis_~i~0#1|) (= (select .cse0 0) 1))) is different from false [2022-10-16 17:59:07,562 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_51| Int)) (or (forall ((v_ArrVal_687 Int) (v_ArrVal_688 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_51| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_687)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_688) |c_ULTIMATE.start_lis_~best~0#1.base|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 2147483647)) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_51|)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 2) |c_ULTIMATE.start_lis_#t~post4#1|) (= (select .cse0 0) 1))) is different from false [2022-10-16 17:59:08,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:08,046 INFO L93 Difference]: Finished difference Result 208 states and 260 transitions. [2022-10-16 17:59:08,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-10-16 17:59:08,047 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 35 states have (on average 2.0285714285714285) internal successors, (71), 36 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-10-16 17:59:08,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:08,048 INFO L225 Difference]: With dead ends: 208 [2022-10-16 17:59:08,049 INFO L226 Difference]: Without dead ends: 206 [2022-10-16 17:59:08,050 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 30 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 15 IntricatePredicates, 1 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 8.8s TimeCoverageRelationStatistics Valid=250, Invalid=985, Unknown=15, NotChecked=1200, Total=2450 [2022-10-16 17:59:08,051 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 196 mSDsluCounter, 418 mSDsCounter, 0 mSdLazyCounter, 358 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 456 SdHoareTripleChecker+Invalid, 1176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 358 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 791 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:08,051 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 456 Invalid, 1176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 358 Invalid, 0 Unknown, 791 Unchecked, 0.3s Time] [2022-10-16 17:59:08,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2022-10-16 17:59:08,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 101. [2022-10-16 17:59:08,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 93 states have (on average 1.3870967741935485) internal successors, (129), 100 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:08,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 129 transitions. [2022-10-16 17:59:08,063 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 129 transitions. Word has length 26 [2022-10-16 17:59:08,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:08,063 INFO L495 AbstractCegarLoop]: Abstraction has 101 states and 129 transitions. [2022-10-16 17:59:08,063 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 35 states have (on average 2.0285714285714285) internal successors, (71), 36 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:08,064 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 129 transitions. [2022-10-16 17:59:08,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-10-16 17:59:08,064 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:08,064 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:08,104 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:08,279 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:08,280 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:08,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:08,281 INFO L85 PathProgramCache]: Analyzing trace with hash 1689073471, now seen corresponding path program 1 times [2022-10-16 17:59:08,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:08,281 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220864678] [2022-10-16 17:59:08,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:08,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:08,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:08,424 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:59:08,424 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:08,425 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1220864678] [2022-10-16 17:59:08,425 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1220864678] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:08,425 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [391951525] [2022-10-16 17:59:08,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:08,425 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:08,426 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:08,426 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:08,433 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-10-16 17:59:08,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:08,512 INFO L263 TraceCheckSpWp]: Trace formula consists of 146 conjuncts, 10 conjunts are in the unsatisfiable core [2022-10-16 17:59:08,514 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:08,610 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:59:08,610 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:08,702 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:59:08,703 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [391951525] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:08,703 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:08,703 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 18 [2022-10-16 17:59:08,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747945638] [2022-10-16 17:59:08,704 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:08,704 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-10-16 17:59:08,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:08,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-10-16 17:59:08,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2022-10-16 17:59:08,705 INFO L87 Difference]: Start difference. First operand 101 states and 129 transitions. Second operand has 18 states, 18 states have (on average 3.2777777777777777) internal successors, (59), 18 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:08,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:08,936 INFO L93 Difference]: Finished difference Result 214 states and 274 transitions. [2022-10-16 17:59:08,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-10-16 17:59:08,941 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 3.2777777777777777) internal successors, (59), 18 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-10-16 17:59:08,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:08,942 INFO L225 Difference]: With dead ends: 214 [2022-10-16 17:59:08,942 INFO L226 Difference]: Without dead ends: 143 [2022-10-16 17:59:08,944 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 44 SyntacticMatches, 7 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=115, Invalid=485, Unknown=0, NotChecked=0, Total=600 [2022-10-16 17:59:08,945 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 126 mSDsluCounter, 215 mSDsCounter, 0 mSdLazyCounter, 195 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 241 SdHoareTripleChecker+Invalid, 213 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 195 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:08,945 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 241 Invalid, 213 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 195 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:59:08,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2022-10-16 17:59:08,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 123. [2022-10-16 17:59:08,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 115 states have (on average 1.3391304347826087) internal successors, (154), 122 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:08,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 154 transitions. [2022-10-16 17:59:08,959 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 154 transitions. Word has length 29 [2022-10-16 17:59:08,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:08,959 INFO L495 AbstractCegarLoop]: Abstraction has 123 states and 154 transitions. [2022-10-16 17:59:08,959 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 3.2777777777777777) internal successors, (59), 18 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:08,959 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 154 transitions. [2022-10-16 17:59:08,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-10-16 17:59:08,960 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:08,960 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:08,993 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:09,174 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2022-10-16 17:59:09,175 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:09,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:09,177 INFO L85 PathProgramCache]: Analyzing trace with hash 1114731003, now seen corresponding path program 2 times [2022-10-16 17:59:09,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:09,177 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134959421] [2022-10-16 17:59:09,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:09,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:09,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:09,349 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-16 17:59:09,350 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:09,350 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134959421] [2022-10-16 17:59:09,350 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2134959421] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:09,350 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1452776576] [2022-10-16 17:59:09,350 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 17:59:09,351 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:09,351 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:09,358 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:09,385 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-10-16 17:59:09,450 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-10-16 17:59:09,451 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:59:09,452 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-16 17:59:09,462 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:09,533 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:09,534 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:09,589 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:09,589 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1452776576] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:09,589 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:09,590 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-10-16 17:59:09,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [716500746] [2022-10-16 17:59:09,590 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:09,591 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-10-16 17:59:09,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:09,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-10-16 17:59:09,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2022-10-16 17:59:09,592 INFO L87 Difference]: Start difference. First operand 123 states and 154 transitions. Second operand has 10 states, 10 states have (on average 4.9) internal successors, (49), 10 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:09,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:09,766 INFO L93 Difference]: Finished difference Result 240 states and 314 transitions. [2022-10-16 17:59:09,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-10-16 17:59:09,769 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.9) internal successors, (49), 10 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-10-16 17:59:09,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:09,770 INFO L225 Difference]: With dead ends: 240 [2022-10-16 17:59:09,770 INFO L226 Difference]: Without dead ends: 169 [2022-10-16 17:59:09,771 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 61 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=219, Unknown=0, NotChecked=0, Total=306 [2022-10-16 17:59:09,774 INFO L413 NwaCegarLoop]: 31 mSDtfsCounter, 271 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 271 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:09,775 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [271 Valid, 113 Invalid, 124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:59:09,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2022-10-16 17:59:09,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 124. [2022-10-16 17:59:09,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 117 states have (on average 1.3247863247863247) internal successors, (155), 123 states have internal predecessors, (155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:09,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 155 transitions. [2022-10-16 17:59:09,792 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 155 transitions. Word has length 33 [2022-10-16 17:59:09,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:09,792 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 155 transitions. [2022-10-16 17:59:09,792 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 4.9) internal successors, (49), 10 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:09,792 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 155 transitions. [2022-10-16 17:59:09,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-10-16 17:59:09,793 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:09,793 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:09,841 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:10,007 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-10-16 17:59:10,007 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:10,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:10,008 INFO L85 PathProgramCache]: Analyzing trace with hash 787946406, now seen corresponding path program 1 times [2022-10-16 17:59:10,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:10,009 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696556362] [2022-10-16 17:59:10,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:10,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:10,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:10,098 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-10-16 17:59:10,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:10,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696556362] [2022-10-16 17:59:10,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696556362] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:10,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [311891543] [2022-10-16 17:59:10,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:10,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:10,099 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:10,100 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:10,118 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-10-16 17:59:10,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:10,200 INFO L263 TraceCheckSpWp]: Trace formula consists of 164 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-16 17:59:10,202 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:10,231 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-10-16 17:59:10,231 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 17:59:10,231 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [311891543] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:59:10,232 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 17:59:10,232 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2022-10-16 17:59:10,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072078313] [2022-10-16 17:59:10,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:59:10,233 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-10-16 17:59:10,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:10,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-16 17:59:10,233 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-10-16 17:59:10,234 INFO L87 Difference]: Start difference. First operand 124 states and 155 transitions. Second operand has 6 states, 5 states have (on average 6.6) internal successors, (33), 6 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:10,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:10,312 INFO L93 Difference]: Finished difference Result 124 states and 155 transitions. [2022-10-16 17:59:10,312 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 17:59:10,312 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 6.6) internal successors, (33), 6 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2022-10-16 17:59:10,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:10,313 INFO L225 Difference]: With dead ends: 124 [2022-10-16 17:59:10,313 INFO L226 Difference]: Without dead ends: 123 [2022-10-16 17:59:10,314 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2022-10-16 17:59:10,314 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 28 mSDsluCounter, 66 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:10,315 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 94 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:59:10,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2022-10-16 17:59:10,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2022-10-16 17:59:10,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 117 states have (on average 1.3162393162393162) internal successors, (154), 122 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:10,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 154 transitions. [2022-10-16 17:59:10,330 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 154 transitions. Word has length 37 [2022-10-16 17:59:10,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:10,330 INFO L495 AbstractCegarLoop]: Abstraction has 123 states and 154 transitions. [2022-10-16 17:59:10,330 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 6.6) internal successors, (33), 6 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:10,331 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 154 transitions. [2022-10-16 17:59:10,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-10-16 17:59:10,331 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:10,331 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:10,378 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:10,547 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:10,548 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:10,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:10,549 INFO L85 PathProgramCache]: Analyzing trace with hash -1650892304, now seen corresponding path program 1 times [2022-10-16 17:59:10,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:10,549 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740900659] [2022-10-16 17:59:10,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:10,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:10,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:11,428 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 17:59:11,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:11,429 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [740900659] [2022-10-16 17:59:11,429 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [740900659] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:11,429 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [276592704] [2022-10-16 17:59:11,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:11,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:11,430 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:11,431 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:11,440 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-10-16 17:59:11,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:11,541 INFO L263 TraceCheckSpWp]: Trace formula consists of 185 conjuncts, 31 conjunts are in the unsatisfiable core [2022-10-16 17:59:11,547 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:11,561 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2022-10-16 17:59:11,653 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:59:11,657 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:59:11,762 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:59:11,764 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 17:59:11,768 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 17:59:12,013 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-10-16 17:59:12,033 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 10 proven. 17 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 17:59:12,034 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:12,208 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_887 (Array Int Int)) (v_ArrVal_888 Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_888)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_887) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:12,226 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_69| Int)) (or (forall ((v_ArrVal_887 (Array Int Int)) (v_ArrVal_888 Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_69| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_888)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_887) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_69|)))) is different from false [2022-10-16 17:59:12,253 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_887 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_69| Int) (v_ArrVal_888 Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_69| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_69| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_888)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_887) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) is different from false [2022-10-16 17:59:12,266 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:12,267 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 43 [2022-10-16 17:59:12,275 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 82 [2022-10-16 17:59:12,284 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 41 [2022-10-16 17:59:12,298 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:12,299 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 57 treesize of output 57 [2022-10-16 17:59:12,306 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 76 [2022-10-16 17:59:12,444 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 2 trivial. 9 not checked. [2022-10-16 17:59:12,445 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [276592704] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:12,445 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:12,445 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 34 [2022-10-16 17:59:12,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1105382508] [2022-10-16 17:59:12,445 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:12,447 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-10-16 17:59:12,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:12,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-10-16 17:59:12,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=877, Unknown=3, NotChecked=186, Total=1190 [2022-10-16 17:59:12,449 INFO L87 Difference]: Start difference. First operand 123 states and 154 transitions. Second operand has 35 states, 34 states have (on average 3.264705882352941) internal successors, (111), 35 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:13,400 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_~prev~0#1.offset| 0) (<= 1 |c_ULTIMATE.start_lis_~i~0#1|) (forall ((v_ArrVal_887 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_69| Int) (v_ArrVal_888 Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_69| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_69| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_888)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_887) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) (<= |c_ULTIMATE.start_lis_~i~0#1| 1))) is different from false [2022-10-16 17:59:15,405 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= (select .cse0 (+ |c_ULTIMATE.start_lis_~prev~0#1.offset| 4)) 1) (<= (div (+ |c_ULTIMATE.start_lis_~prev~0#1.offset| (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 4) |c_ULTIMATE.start_lis_#t~post4#1|) (= |c_ULTIMATE.start_lis_~prev~0#1.offset| 0) (forall ((|v_ULTIMATE.start_lis_~i~0#1_69| Int)) (or (forall ((v_ArrVal_887 (Array Int Int)) (v_ArrVal_888 Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_69| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_888)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_887) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_69|)))))) is different from false [2022-10-16 17:59:16,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:16,053 INFO L93 Difference]: Finished difference Result 258 states and 314 transitions. [2022-10-16 17:59:16,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-10-16 17:59:16,054 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 3.264705882352941) internal successors, (111), 35 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-10-16 17:59:16,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:16,056 INFO L225 Difference]: With dead ends: 258 [2022-10-16 17:59:16,056 INFO L226 Difference]: Without dead ends: 256 [2022-10-16 17:59:16,057 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 321 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=200, Invalid=1375, Unknown=5, NotChecked=400, Total=1980 [2022-10-16 17:59:16,058 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 145 mSDsluCounter, 731 mSDsCounter, 0 mSdLazyCounter, 695 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 779 SdHoareTripleChecker+Invalid, 929 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 695 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 222 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:16,058 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 779 Invalid, 929 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 695 Invalid, 0 Unknown, 222 Unchecked, 0.5s Time] [2022-10-16 17:59:16,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2022-10-16 17:59:16,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 170. [2022-10-16 17:59:16,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 164 states have (on average 1.3353658536585367) internal successors, (219), 169 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:16,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 219 transitions. [2022-10-16 17:59:16,081 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 219 transitions. Word has length 39 [2022-10-16 17:59:16,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:16,082 INFO L495 AbstractCegarLoop]: Abstraction has 170 states and 219 transitions. [2022-10-16 17:59:16,082 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 3.264705882352941) internal successors, (111), 35 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:16,082 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 219 transitions. [2022-10-16 17:59:16,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-10-16 17:59:16,083 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:16,083 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:16,131 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:16,296 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:16,297 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:16,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:16,298 INFO L85 PathProgramCache]: Analyzing trace with hash 361912444, now seen corresponding path program 1 times [2022-10-16 17:59:16,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:16,299 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875093680] [2022-10-16 17:59:16,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:16,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:16,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:16,409 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:16,410 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:16,410 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875093680] [2022-10-16 17:59:16,410 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1875093680] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:16,410 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1880215391] [2022-10-16 17:59:16,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:16,410 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:16,411 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:16,412 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:16,438 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-10-16 17:59:16,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:16,513 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 7 conjunts are in the unsatisfiable core [2022-10-16 17:59:16,516 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:16,585 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 13 proven. 1 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-16 17:59:16,585 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:16,653 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-16 17:59:16,653 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1880215391] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:16,654 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:16,654 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 8, 8] total 13 [2022-10-16 17:59:16,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1888494482] [2022-10-16 17:59:16,654 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:16,655 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-10-16 17:59:16,655 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:16,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-10-16 17:59:16,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2022-10-16 17:59:16,656 INFO L87 Difference]: Start difference. First operand 170 states and 219 transitions. Second operand has 13 states, 13 states have (on average 4.461538461538462) internal successors, (58), 13 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:16,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:16,883 INFO L93 Difference]: Finished difference Result 295 states and 394 transitions. [2022-10-16 17:59:16,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-10-16 17:59:16,883 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 4.461538461538462) internal successors, (58), 13 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-10-16 17:59:16,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:16,885 INFO L225 Difference]: With dead ends: 295 [2022-10-16 17:59:16,885 INFO L226 Difference]: Without dead ends: 200 [2022-10-16 17:59:16,886 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 71 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=101, Invalid=279, Unknown=0, NotChecked=0, Total=380 [2022-10-16 17:59:16,886 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 123 mSDsluCounter, 153 mSDsCounter, 0 mSdLazyCounter, 190 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 190 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:16,887 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [123 Valid, 189 Invalid, 200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 190 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:59:16,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2022-10-16 17:59:16,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 161. [2022-10-16 17:59:16,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 156 states have (on average 1.294871794871795) internal successors, (202), 160 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:16,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 202 transitions. [2022-10-16 17:59:16,906 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 202 transitions. Word has length 40 [2022-10-16 17:59:16,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:16,907 INFO L495 AbstractCegarLoop]: Abstraction has 161 states and 202 transitions. [2022-10-16 17:59:16,907 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 4.461538461538462) internal successors, (58), 13 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:16,907 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 202 transitions. [2022-10-16 17:59:16,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-10-16 17:59:16,908 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:16,908 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:16,943 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:17,122 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-10-16 17:59:17,123 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:17,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:17,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1664376710, now seen corresponding path program 1 times [2022-10-16 17:59:17,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:17,124 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325230459] [2022-10-16 17:59:17,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:17,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:17,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:17,203 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 13 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:17,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:17,203 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1325230459] [2022-10-16 17:59:17,204 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1325230459] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:17,204 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [794922096] [2022-10-16 17:59:17,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:17,204 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:17,204 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:17,205 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:17,221 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-10-16 17:59:17,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:17,312 INFO L263 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-16 17:59:17,313 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:17,337 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 13 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:17,337 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:17,376 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 13 proven. 5 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:17,376 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [794922096] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:17,377 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:17,377 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2022-10-16 17:59:17,377 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716601760] [2022-10-16 17:59:17,377 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:17,377 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-10-16 17:59:17,378 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:17,378 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-10-16 17:59:17,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2022-10-16 17:59:17,379 INFO L87 Difference]: Start difference. First operand 161 states and 202 transitions. Second operand has 12 states, 11 states have (on average 4.7272727272727275) internal successors, (52), 12 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:17,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:17,526 INFO L93 Difference]: Finished difference Result 334 states and 437 transitions. [2022-10-16 17:59:17,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-10-16 17:59:17,528 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 4.7272727272727275) internal successors, (52), 12 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2022-10-16 17:59:17,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:17,530 INFO L225 Difference]: With dead ends: 334 [2022-10-16 17:59:17,530 INFO L226 Difference]: Without dead ends: 333 [2022-10-16 17:59:17,531 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=113, Invalid=229, Unknown=0, NotChecked=0, Total=342 [2022-10-16 17:59:17,531 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 126 mSDsluCounter, 139 mSDsCounter, 0 mSdLazyCounter, 65 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 173 SdHoareTripleChecker+Invalid, 73 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 65 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:17,532 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 173 Invalid, 73 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 65 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 17:59:17,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2022-10-16 17:59:17,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 239. [2022-10-16 17:59:17,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 239 states, 234 states have (on average 1.3888888888888888) internal successors, (325), 238 states have internal predecessors, (325), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:17,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 325 transitions. [2022-10-16 17:59:17,559 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 325 transitions. Word has length 41 [2022-10-16 17:59:17,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:17,559 INFO L495 AbstractCegarLoop]: Abstraction has 239 states and 325 transitions. [2022-10-16 17:59:17,559 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 4.7272727272727275) internal successors, (52), 12 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:17,560 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 325 transitions. [2022-10-16 17:59:17,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-10-16 17:59:17,560 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:17,560 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:17,600 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:17,776 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-10-16 17:59:17,776 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:17,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:17,777 INFO L85 PathProgramCache]: Analyzing trace with hash 1632391755, now seen corresponding path program 1 times [2022-10-16 17:59:17,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:17,778 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138744317] [2022-10-16 17:59:17,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:17,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:17,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:17,870 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-10-16 17:59:17,870 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:17,870 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138744317] [2022-10-16 17:59:17,871 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [138744317] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:17,871 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2122272122] [2022-10-16 17:59:17,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:17,871 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:17,871 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:17,872 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:17,902 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-10-16 17:59:17,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:17,979 INFO L263 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 12 conjunts are in the unsatisfiable core [2022-10-16 17:59:17,981 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:18,154 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 13 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 17:59:18,155 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:18,290 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 13 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 17:59:18,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2122272122] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:18,291 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:18,291 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 13, 13] total 22 [2022-10-16 17:59:18,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508609990] [2022-10-16 17:59:18,291 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:18,292 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-10-16 17:59:18,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:18,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-10-16 17:59:18,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=389, Unknown=0, NotChecked=0, Total=462 [2022-10-16 17:59:18,293 INFO L87 Difference]: Start difference. First operand 239 states and 325 transitions. Second operand has 22 states, 22 states have (on average 3.9545454545454546) internal successors, (87), 22 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:18,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:18,661 INFO L93 Difference]: Finished difference Result 269 states and 360 transitions. [2022-10-16 17:59:18,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-10-16 17:59:18,662 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.9545454545454546) internal successors, (87), 22 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2022-10-16 17:59:18,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:18,663 INFO L225 Difference]: With dead ends: 269 [2022-10-16 17:59:18,664 INFO L226 Difference]: Without dead ends: 233 [2022-10-16 17:59:18,665 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 62 SyntacticMatches, 6 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 273 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=190, Invalid=932, Unknown=0, NotChecked=0, Total=1122 [2022-10-16 17:59:18,665 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 183 mSDsluCounter, 257 mSDsCounter, 0 mSdLazyCounter, 291 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 317 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 291 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:18,666 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 281 Invalid, 317 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 291 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-10-16 17:59:18,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2022-10-16 17:59:18,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 226. [2022-10-16 17:59:18,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 226 states, 221 states have (on average 1.4027149321266967) internal successors, (310), 225 states have internal predecessors, (310), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:18,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 310 transitions. [2022-10-16 17:59:18,692 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 310 transitions. Word has length 41 [2022-10-16 17:59:18,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:18,692 INFO L495 AbstractCegarLoop]: Abstraction has 226 states and 310 transitions. [2022-10-16 17:59:18,692 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.9545454545454546) internal successors, (87), 22 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:18,692 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 310 transitions. [2022-10-16 17:59:18,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-10-16 17:59:18,693 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:18,693 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:18,738 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:18,908 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-10-16 17:59:18,908 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:18,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:18,909 INFO L85 PathProgramCache]: Analyzing trace with hash -56070360, now seen corresponding path program 1 times [2022-10-16 17:59:18,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:18,910 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [342139363] [2022-10-16 17:59:18,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:18,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:18,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:19,028 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:19,028 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:19,028 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [342139363] [2022-10-16 17:59:19,029 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [342139363] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:19,029 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [448699619] [2022-10-16 17:59:19,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:19,029 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:19,029 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:19,030 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:19,042 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-10-16 17:59:19,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:19,138 INFO L263 TraceCheckSpWp]: Trace formula consists of 185 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-16 17:59:19,139 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:19,165 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2022-10-16 17:59:19,165 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 17:59:19,165 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [448699619] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 17:59:19,166 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 17:59:19,166 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2022-10-16 17:59:19,167 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924041837] [2022-10-16 17:59:19,167 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 17:59:19,167 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-10-16 17:59:19,168 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:19,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-16 17:59:19,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-10-16 17:59:19,168 INFO L87 Difference]: Start difference. First operand 226 states and 310 transitions. Second operand has 6 states, 5 states have (on average 6.8) internal successors, (34), 6 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:19,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:19,227 INFO L93 Difference]: Finished difference Result 228 states and 310 transitions. [2022-10-16 17:59:19,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 17:59:19,228 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 6.8) internal successors, (34), 6 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 42 [2022-10-16 17:59:19,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:19,229 INFO L225 Difference]: With dead ends: 228 [2022-10-16 17:59:19,229 INFO L226 Difference]: Without dead ends: 227 [2022-10-16 17:59:19,230 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2022-10-16 17:59:19,230 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 52 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:19,230 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [52 Valid, 87 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 17:59:19,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2022-10-16 17:59:19,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 225. [2022-10-16 17:59:19,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 225 states, 221 states have (on average 1.3619909502262444) internal successors, (301), 224 states have internal predecessors, (301), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:19,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 301 transitions. [2022-10-16 17:59:19,253 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 301 transitions. Word has length 42 [2022-10-16 17:59:19,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:19,253 INFO L495 AbstractCegarLoop]: Abstraction has 225 states and 301 transitions. [2022-10-16 17:59:19,254 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 6.8) internal successors, (34), 6 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:19,254 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 301 transitions. [2022-10-16 17:59:19,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-10-16 17:59:19,254 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:19,255 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:19,291 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:19,470 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:19,471 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:19,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:19,471 INFO L85 PathProgramCache]: Analyzing trace with hash 1053843884, now seen corresponding path program 2 times [2022-10-16 17:59:19,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:19,472 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019192843] [2022-10-16 17:59:19,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:19,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:19,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:20,355 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 9 proven. 31 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 17:59:20,355 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:20,355 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019192843] [2022-10-16 17:59:20,355 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019192843] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:20,355 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2003058763] [2022-10-16 17:59:20,356 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 17:59:20,356 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:20,356 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:20,357 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:20,382 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-10-16 17:59:20,473 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-16 17:59:20,473 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:59:20,475 INFO L263 TraceCheckSpWp]: Trace formula consists of 202 conjuncts, 39 conjunts are in the unsatisfiable core [2022-10-16 17:59:20,478 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:20,487 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 94 [2022-10-16 17:59:20,516 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:59:20,519 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:59:20,576 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-10-16 17:59:20,576 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 17:59:20,580 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-10-16 17:59:20,757 INFO L356 Elim1Store]: treesize reduction 60, result has 25.9 percent of original size [2022-10-16 17:59:20,758 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 44 [2022-10-16 17:59:20,767 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-10-16 17:59:21,368 INFO L356 Elim1Store]: treesize reduction 30, result has 9.1 percent of original size [2022-10-16 17:59:21,368 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 32 treesize of output 13 [2022-10-16 17:59:21,399 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 4 proven. 37 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:59:21,399 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:21,987 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|))) is different from false [2022-10-16 17:59:22,013 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_86| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_86|)) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))))) is different from false [2022-10-16 17:59:22,051 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) is different from false [2022-10-16 17:59:22,076 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1168 (Array Int Int)) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1168))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|))) is different from false [2022-10-16 17:59:22,116 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_87| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_87|)) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1168 (Array Int Int)) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_87| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1168))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |v_ULTIMATE.start_lis_~i~0#1_87| 1)))))) is different from false [2022-10-16 17:59:22,175 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (|v_ULTIMATE.start_lis_~i~0#1_87| Int) (v_ArrVal_1168 (Array Int Int)) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< |v_ULTIMATE.start_lis_~i~0#1_87| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_87| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1168))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |v_ULTIMATE.start_lis_~i~0#1_87| 1)))) is different from false [2022-10-16 17:59:22,197 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:22,198 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 116 treesize of output 81 [2022-10-16 17:59:22,207 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 198 treesize of output 194 [2022-10-16 17:59:22,235 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 222 treesize of output 210 [2022-10-16 17:59:22,268 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 285 treesize of output 261 [2022-10-16 17:59:22,279 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 289 treesize of output 277 [2022-10-16 17:59:22,300 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:22,300 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 144 treesize of output 144 [2022-10-16 17:59:22,484 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 1 trivial. 22 not checked. [2022-10-16 17:59:22,484 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2003058763] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:22,484 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:22,485 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 19, 19] total 41 [2022-10-16 17:59:22,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737172625] [2022-10-16 17:59:22,485 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:22,485 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-10-16 17:59:22,486 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:22,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-10-16 17:59:22,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=1110, Unknown=6, NotChecked=438, Total=1722 [2022-10-16 17:59:22,488 INFO L87 Difference]: Start difference. First operand 225 states and 301 transitions. Second operand has 42 states, 41 states have (on average 2.658536585365854) internal successors, (109), 42 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:23,321 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (<= 1 |c_ULTIMATE.start_lis_~i~0#1|) (<= |c_ULTIMATE.start_lis_~i~0#1| 1) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (|v_ULTIMATE.start_lis_~i~0#1_87| Int) (v_ArrVal_1168 (Array Int Int)) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< |v_ULTIMATE.start_lis_~i~0#1_87| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_87| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1168))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |v_ULTIMATE.start_lis_~i~0#1_87| 1)))))) is different from false [2022-10-16 17:59:25,327 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (<= 1 |c_ULTIMATE.start_lis_#t~post4#1|) (forall ((|v_ULTIMATE.start_lis_~i~0#1_87| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_87|)) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1168 (Array Int Int)) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_87| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1168))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |v_ULTIMATE.start_lis_~i~0#1_87| 1)))))))) is different from false [2022-10-16 17:59:27,332 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (<= 2 |c_ULTIMATE.start_lis_~i~0#1|) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1168 (Array Int Int)) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1168))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|))))) is different from false [2022-10-16 17:59:28,276 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (<= 2 |c_ULTIMATE.start_lis_~i~0#1|) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_86| Int) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< |v_ULTIMATE.start_lis_~i~0#1_86| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))))) is different from false [2022-10-16 17:59:30,280 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_86| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_86|)) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_86| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))))) (exists ((|ULTIMATE.start_lis_~i~0#1| Int)) (and (<= |ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_#t~post4#1|) (<= 2 |ULTIMATE.start_lis_~i~0#1|) (= (select .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1))))) is different from false [2022-10-16 17:59:30,924 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (exists ((|v_ULTIMATE.start_lis_~i~0#1_82| Int)) (and (<= 2 |v_ULTIMATE.start_lis_~i~0#1_82|) (= (select .cse0 (+ (* |v_ULTIMATE.start_lis_~i~0#1_82| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (<= (+ |v_ULTIMATE.start_lis_~i~0#1_82| 1) |c_ULTIMATE.start_lis_~i~0#1|))) (forall ((v_ArrVal_1170 (Array Int Int)) (|v_ULTIMATE.start_lis_~j~0#1_44| Int) (v_ArrVal_1169 Int)) (or (< |v_ULTIMATE.start_lis_~j~0#1_44| 1) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1169)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1170) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_44|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< 1 |v_ULTIMATE.start_lis_~j~0#1_44|))))) is different from false [2022-10-16 17:59:32,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:32,036 INFO L93 Difference]: Finished difference Result 321 states and 430 transitions. [2022-10-16 17:59:32,036 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-10-16 17:59:32,036 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 41 states have (on average 2.658536585365854) internal successors, (109), 42 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2022-10-16 17:59:32,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:32,038 INFO L225 Difference]: With dead ends: 321 [2022-10-16 17:59:32,038 INFO L226 Difference]: Without dead ends: 319 [2022-10-16 17:59:32,040 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 63 SyntacticMatches, 5 SemanticMatches, 59 ConstructedPredicates, 12 IntricatePredicates, 0 DeprecatedPredicates, 562 ImplicationChecksByTransitivity, 10.3s TimeCoverageRelationStatistics Valid=353, Invalid=2034, Unknown=13, NotChecked=1260, Total=3660 [2022-10-16 17:59:32,041 INFO L413 NwaCegarLoop]: 45 mSDtfsCounter, 104 mSDsluCounter, 656 mSDsCounter, 0 mSdLazyCounter, 269 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 104 SdHoareTripleChecker+Valid, 701 SdHoareTripleChecker+Invalid, 976 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 269 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 702 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:32,041 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [104 Valid, 701 Invalid, 976 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 269 Invalid, 0 Unknown, 702 Unchecked, 0.2s Time] [2022-10-16 17:59:32,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2022-10-16 17:59:32,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 315. [2022-10-16 17:59:32,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 315 states, 311 states have (on average 1.3311897106109325) internal successors, (414), 314 states have internal predecessors, (414), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:32,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 414 transitions. [2022-10-16 17:59:32,074 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 414 transitions. Word has length 43 [2022-10-16 17:59:32,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:32,075 INFO L495 AbstractCegarLoop]: Abstraction has 315 states and 414 transitions. [2022-10-16 17:59:32,075 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 41 states have (on average 2.658536585365854) internal successors, (109), 42 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:32,075 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 414 transitions. [2022-10-16 17:59:32,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-10-16 17:59:32,076 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:32,076 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:32,113 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:32,289 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-10-16 17:59:32,290 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:32,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:32,291 INFO L85 PathProgramCache]: Analyzing trace with hash -1472498128, now seen corresponding path program 1 times [2022-10-16 17:59:32,291 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:32,291 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921826873] [2022-10-16 17:59:32,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:32,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:32,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:33,498 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 29 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:59:33,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:33,498 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921826873] [2022-10-16 17:59:33,498 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1921826873] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:33,499 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [917532263] [2022-10-16 17:59:33,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:33,499 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:33,499 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:33,501 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:33,503 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-10-16 17:59:33,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:33,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 206 conjuncts, 45 conjunts are in the unsatisfiable core [2022-10-16 17:59:33,627 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:33,640 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 94 [2022-10-16 17:59:33,730 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:59:33,735 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:59:33,855 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:59:33,859 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 17:59:34,162 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:59:34,166 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 17:59:34,277 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-10-16 17:59:34,300 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 29 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 17:59:34,301 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:34,425 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1246 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 (* |c_ULTIMATE.start_lis_~j~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,458 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1246 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,466 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1246 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_#t~post5#1|) 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,487 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1246 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,527 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1246 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,549 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1244 Int) (v_ArrVal_1246 (Array Int Int)) (v_ArrVal_1245 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1244)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1245))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,558 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1244 Int) (v_ArrVal_1246 (Array Int Int)) (v_ArrVal_1245 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |c_ULTIMATE.start_lis_#t~post4#1| 4) 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1244)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1245))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,571 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1244 Int) (v_ArrVal_1246 (Array Int Int)) (v_ArrVal_1245 (Array Int Int)) (|ULTIMATE.start_lis_#t~mem12#1| Int)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1244)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1245))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1246) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:34,582 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:34,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 116 treesize of output 81 [2022-10-16 17:59:34,588 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 152 [2022-10-16 17:59:34,601 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:34,602 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 91 treesize of output 91 [2022-10-16 17:59:34,611 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 75 [2022-10-16 17:59:34,616 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 152 treesize of output 136 [2022-10-16 17:59:34,622 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 136 treesize of output 128 [2022-10-16 17:59:34,768 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 28 not checked. [2022-10-16 17:59:34,768 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [917532263] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:34,768 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:34,768 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 16] total 42 [2022-10-16 17:59:34,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613042020] [2022-10-16 17:59:34,769 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:34,769 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-10-16 17:59:34,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:34,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-10-16 17:59:34,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=1081, Unknown=8, NotChecked=584, Total=1806 [2022-10-16 17:59:34,771 INFO L87 Difference]: Start difference. First operand 315 states and 414 transitions. Second operand has 43 states, 42 states have (on average 2.9285714285714284) internal successors, (123), 43 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:36,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:36,067 INFO L93 Difference]: Finished difference Result 363 states and 469 transitions. [2022-10-16 17:59:36,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-10-16 17:59:36,067 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 2.9285714285714284) internal successors, (123), 43 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2022-10-16 17:59:36,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:36,070 INFO L225 Difference]: With dead ends: 363 [2022-10-16 17:59:36,070 INFO L226 Difference]: Without dead ends: 361 [2022-10-16 17:59:36,071 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 60 SyntacticMatches, 8 SemanticMatches, 55 ConstructedPredicates, 8 IntricatePredicates, 1 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=281, Invalid=2095, Unknown=8, NotChecked=808, Total=3192 [2022-10-16 17:59:36,072 INFO L413 NwaCegarLoop]: 35 mSDtfsCounter, 155 mSDsluCounter, 572 mSDsCounter, 0 mSdLazyCounter, 459 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 155 SdHoareTripleChecker+Valid, 607 SdHoareTripleChecker+Invalid, 1022 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 459 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 531 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:36,073 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [155 Valid, 607 Invalid, 1022 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 459 Invalid, 0 Unknown, 531 Unchecked, 0.3s Time] [2022-10-16 17:59:36,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2022-10-16 17:59:36,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 333. [2022-10-16 17:59:36,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 333 states, 329 states have (on average 1.325227963525836) internal successors, (436), 332 states have internal predecessors, (436), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:36,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 436 transitions. [2022-10-16 17:59:36,120 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 436 transitions. Word has length 43 [2022-10-16 17:59:36,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:36,120 INFO L495 AbstractCegarLoop]: Abstraction has 333 states and 436 transitions. [2022-10-16 17:59:36,120 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 42 states have (on average 2.9285714285714284) internal successors, (123), 43 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:36,120 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 436 transitions. [2022-10-16 17:59:36,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-10-16 17:59:36,121 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:36,121 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:36,162 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:36,336 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:36,336 INFO L420 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:36,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:36,338 INFO L85 PathProgramCache]: Analyzing trace with hash -1816206800, now seen corresponding path program 2 times [2022-10-16 17:59:36,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:36,338 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118623659] [2022-10-16 17:59:36,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:36,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:36,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:37,761 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-10-16 17:59:37,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:37,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118623659] [2022-10-16 17:59:37,762 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [118623659] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:37,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1656503304] [2022-10-16 17:59:37,762 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 17:59:37,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:37,763 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:37,764 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:37,780 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-10-16 17:59:37,879 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-16 17:59:37,879 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:59:37,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 206 conjuncts, 48 conjunts are in the unsatisfiable core [2022-10-16 17:59:37,885 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:37,897 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2022-10-16 17:59:37,935 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:59:37,939 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:59:38,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:59:38,064 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:59:38,069 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-10-16 17:59:38,175 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:59:38,176 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 17:59:38,181 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 16 [2022-10-16 17:59:38,592 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:59:38,594 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 31 [2022-10-16 17:59:38,599 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2022-10-16 17:59:38,989 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:38,992 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:38,992 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 15 [2022-10-16 17:59:39,029 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 1 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 17:59:39,029 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:39,682 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_#t~mem12#1_24| Int)) (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (forall ((v_ArrVal_1327 (Array Int Int)) (|v_ULTIMATE.start_lis_~j~0#1_54| Int)) (or (< |c_ULTIMATE.start_lis_~N#1| (+ 2 |v_ULTIMATE.start_lis_~j~0#1_54|)) (< |v_ULTIMATE.start_lis_~j~0#1_54| 1) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_24|))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1327) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_54|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) (not (<= |v_ULTIMATE.start_lis_#t~mem12#1_24| (select .cse0 (+ (* |c_ULTIMATE.start_lis_~j~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|))))))) is different from false [2022-10-16 17:59:41,406 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1327 (Array Int Int)) (v_ArrVal_1326 (Array Int Int)) (|v_ULTIMATE.start_lis_~j~0#1_54| Int) (v_ArrVal_1321 (Array Int Int)) (v_ArrVal_1322 Int) (v_ArrVal_1325 Int) (|v_ULTIMATE.start_lis_#t~mem12#1_24| Int)) (let ((.cse0 (store (let ((.cse3 (* |c_ULTIMATE.start_lis_#t~post4#1| 4))) (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ .cse3 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1322)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1321))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ .cse3 8 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1325)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1326))) (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (select (select (store (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_24|))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1327) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_54|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~j~0#1_54|) (not (<= |v_ULTIMATE.start_lis_#t~mem12#1_24| (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (< |v_ULTIMATE.start_lis_~j~0#1_54| 1))))) is different from false [2022-10-16 17:59:41,464 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1327 (Array Int Int)) (v_ArrVal_1326 (Array Int Int)) (|v_ULTIMATE.start_lis_~j~0#1_54| Int) (v_ArrVal_1321 (Array Int Int)) (v_ArrVal_1322 Int) (v_ArrVal_1325 Int) (|v_ULTIMATE.start_lis_#t~mem12#1_24| Int)) (let ((.cse0 (store (let ((.cse3 (* 4 |c_ULTIMATE.start_lis_~i~0#1|))) (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ .cse3 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1322)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1321))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ .cse3 8 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1325)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1326))) (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ |c_ULTIMATE.start_lis_~i~0#1| 1) |v_ULTIMATE.start_lis_~j~0#1_54|) (< (select (select (store (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_24|))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1327) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_54|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~j~0#1_54| 1) (not (<= |v_ULTIMATE.start_lis_#t~mem12#1_24| (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|))))))) is different from false [2022-10-16 17:59:41,487 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:41,488 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 359 treesize of output 227 [2022-10-16 17:59:41,515 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 580 treesize of output 574 [2022-10-16 17:59:41,529 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,530 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,533 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,541 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,561 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:41,562 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 494 treesize of output 496 [2022-10-16 17:59:41,579 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,580 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,583 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,590 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 17:59:41,592 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 367 treesize of output 359 [2022-10-16 17:59:41,610 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 550 treesize of output 502 [2022-10-16 17:59:41,635 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-10-16 17:59:41,635 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 748 treesize of output 732 [2022-10-16 17:59:41,661 INFO L356 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-10-16 17:59:41,662 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 772 treesize of output 740 [2022-10-16 17:59:41,914 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 13 not checked. [2022-10-16 17:59:41,915 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1656503304] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:41,915 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:41,915 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19, 21] total 56 [2022-10-16 17:59:41,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [239499172] [2022-10-16 17:59:41,915 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:41,916 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 56 states [2022-10-16 17:59:41,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:41,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2022-10-16 17:59:41,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=2282, Unknown=237, NotChecked=312, Total=3080 [2022-10-16 17:59:41,918 INFO L87 Difference]: Start difference. First operand 333 states and 436 transitions. Second operand has 56 states, 56 states have (on average 2.1607142857142856) internal successors, (121), 56 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:46,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:46,896 INFO L93 Difference]: Finished difference Result 703 states and 917 transitions. [2022-10-16 17:59:46,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2022-10-16 17:59:46,905 INFO L78 Accepts]: Start accepts. Automaton has has 56 states, 56 states have (on average 2.1607142857142856) internal successors, (121), 56 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2022-10-16 17:59:46,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:46,908 INFO L225 Difference]: With dead ends: 703 [2022-10-16 17:59:46,908 INFO L226 Difference]: Without dead ends: 523 [2022-10-16 17:59:46,912 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 56 SyntacticMatches, 1 SemanticMatches, 105 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 2377 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=1010, Invalid=9407, Unknown=307, NotChecked=618, Total=11342 [2022-10-16 17:59:46,913 INFO L413 NwaCegarLoop]: 41 mSDtfsCounter, 276 mSDsluCounter, 798 mSDsCounter, 0 mSdLazyCounter, 954 mSolverCounterSat, 75 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 276 SdHoareTripleChecker+Valid, 839 SdHoareTripleChecker+Invalid, 1964 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 75 IncrementalHoareTripleChecker+Valid, 954 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 935 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:46,913 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [276 Valid, 839 Invalid, 1964 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [75 Valid, 954 Invalid, 0 Unknown, 935 Unchecked, 0.7s Time] [2022-10-16 17:59:46,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 523 states. [2022-10-16 17:59:46,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 523 to 440. [2022-10-16 17:59:46,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 440 states, 436 states have (on average 1.3027522935779816) internal successors, (568), 439 states have internal predecessors, (568), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:46,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 440 states to 440 states and 568 transitions. [2022-10-16 17:59:46,964 INFO L78 Accepts]: Start accepts. Automaton has 440 states and 568 transitions. Word has length 43 [2022-10-16 17:59:46,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:46,965 INFO L495 AbstractCegarLoop]: Abstraction has 440 states and 568 transitions. [2022-10-16 17:59:46,965 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 56 states, 56 states have (on average 2.1607142857142856) internal successors, (121), 56 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:46,965 INFO L276 IsEmpty]: Start isEmpty. Operand 440 states and 568 transitions. [2022-10-16 17:59:46,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-10-16 17:59:46,966 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:46,966 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:47,003 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:47,180 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:47,180 INFO L420 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:47,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:47,181 INFO L85 PathProgramCache]: Analyzing trace with hash 1868119472, now seen corresponding path program 1 times [2022-10-16 17:59:47,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:47,182 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1971452177] [2022-10-16 17:59:47,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:47,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:47,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:47,834 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 9 proven. 32 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 17:59:47,835 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:47,835 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1971452177] [2022-10-16 17:59:47,835 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1971452177] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:47,835 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1688802957] [2022-10-16 17:59:47,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:47,835 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:47,836 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:47,837 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:47,861 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-10-16 17:59:47,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:47,962 INFO L263 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 35 conjunts are in the unsatisfiable core [2022-10-16 17:59:47,965 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:47,974 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 94 [2022-10-16 17:59:48,062 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 17:59:48,066 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:59:48,184 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:59:48,186 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 17:59:48,189 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 17:59:48,276 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 17:59:48,277 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 17:59:48,281 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 17:59:48,504 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-10-16 17:59:48,527 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 13 proven. 28 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 17:59:48,528 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:48,730 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1405 Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 17:59:48,743 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_105|)) (forall ((v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1405 Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)))) is different from false [2022-10-16 17:59:48,763 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int) (v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1405 Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_105| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) is different from false [2022-10-16 17:59:48,777 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int) (v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1402 (Array Int Int)) (v_ArrVal_1403 Int) (v_ArrVal_1405 Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_105| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1403)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1402))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) is different from false [2022-10-16 17:59:48,801 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_106| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_106|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int) (v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1402 (Array Int Int)) (v_ArrVal_1403 Int) (v_ArrVal_1405 Int)) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_106|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1403)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1402))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_105| (+ |v_ULTIMATE.start_lis_~i~0#1_106| 1)))))) is different from false [2022-10-16 17:59:48,838 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int) (v_ArrVal_1406 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_106| Int) (v_ArrVal_1402 (Array Int Int)) (v_ArrVal_1403 Int) (v_ArrVal_1405 Int)) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_106|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1403)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1402))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_106| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_105| (+ |v_ULTIMATE.start_lis_~i~0#1_106| 1)))) is different from false [2022-10-16 17:59:48,856 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:48,857 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 114 treesize of output 79 [2022-10-16 17:59:48,865 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 182 treesize of output 178 [2022-10-16 17:59:48,882 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:48,882 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 204 treesize of output 200 [2022-10-16 17:59:48,892 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 269 treesize of output 253 [2022-10-16 17:59:48,905 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 184 treesize of output 176 [2022-10-16 17:59:48,916 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 374 treesize of output 366 [2022-10-16 17:59:49,048 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 22 not checked. [2022-10-16 17:59:49,048 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1688802957] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:49,048 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:49,048 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 15] total 38 [2022-10-16 17:59:49,049 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1535491470] [2022-10-16 17:59:49,049 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:49,049 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-10-16 17:59:49,049 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:49,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-10-16 17:59:49,050 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=948, Unknown=6, NotChecked=402, Total=1482 [2022-10-16 17:59:49,051 INFO L87 Difference]: Start difference. First operand 440 states and 568 transitions. Second operand has 39 states, 38 states have (on average 3.263157894736842) internal successors, (124), 39 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:50,017 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (let ((.cse0 (select .cse2 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)))) (and (= .cse0 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= |c_ULTIMATE.start_lis_~i~0#1| 1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int) (v_ArrVal_1406 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_106| Int) (v_ArrVal_1402 (Array Int Int)) (v_ArrVal_1403 Int) (v_ArrVal_1405 Int)) (or (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_106|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1403)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1402))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_106| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_105| (+ |v_ULTIMATE.start_lis_~i~0#1_106| 1)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= .cse0 1) (<= 1 |c_ULTIMATE.start_lis_~i~0#1|) (<= |c_ULTIMATE.start_lis_~i~0#1| 1)))) is different from false [2022-10-16 17:59:52,021 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse0 (select .cse2 .cse3))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= .cse0 1) (<= 1 |c_ULTIMATE.start_lis_#t~post4#1|) (forall ((|v_ULTIMATE.start_lis_~i~0#1_106| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_106|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int) (v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1402 (Array Int Int)) (v_ArrVal_1403 Int) (v_ArrVal_1405 Int)) (or (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_106|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1403)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1402))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_105| (+ |v_ULTIMATE.start_lis_~i~0#1_106| 1)))))) (<= .cse0 1)))) is different from false [2022-10-16 17:59:52,756 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse0 (select .cse1 .cse2))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= .cse0 1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int) (v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1405 Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_105| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse2) 2147483647))) (<= .cse0 1) (<= 2 |c_ULTIMATE.start_lis_~i~0#1|)))) is different from false [2022-10-16 17:59:54,759 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse2 (select .cse0 .cse1))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_105| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_105|)) (forall ((v_ArrVal_1406 (Array Int Int)) (v_ArrVal_1405 Int)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_105|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1405)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1406) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse1) 2147483647)))) (<= 2 |c_ULTIMATE.start_lis_#t~post4#1|) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= .cse2 1) (<= .cse2 1)))) is different from false [2022-10-16 17:59:55,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:55,534 INFO L93 Difference]: Finished difference Result 565 states and 722 transitions. [2022-10-16 17:59:55,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-10-16 17:59:55,534 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 3.263157894736842) internal successors, (124), 39 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 45 [2022-10-16 17:59:55,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:55,537 INFO L225 Difference]: With dead ends: 565 [2022-10-16 17:59:55,537 INFO L226 Difference]: Without dead ends: 563 [2022-10-16 17:59:55,538 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 64 SyntacticMatches, 3 SemanticMatches, 54 ConstructedPredicates, 10 IntricatePredicates, 1 DeprecatedPredicates, 444 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=266, Invalid=1834, Unknown=10, NotChecked=970, Total=3080 [2022-10-16 17:59:55,539 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 128 mSDsluCounter, 647 mSDsCounter, 0 mSdLazyCounter, 694 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 677 SdHoareTripleChecker+Invalid, 1107 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 694 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 394 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:55,539 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 677 Invalid, 1107 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 694 Invalid, 0 Unknown, 394 Unchecked, 0.4s Time] [2022-10-16 17:59:55,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2022-10-16 17:59:55,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 415. [2022-10-16 17:59:55,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 415 states, 411 states have (on average 1.3017031630170317) internal successors, (535), 414 states have internal predecessors, (535), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:55,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 415 states and 535 transitions. [2022-10-16 17:59:55,585 INFO L78 Accepts]: Start accepts. Automaton has 415 states and 535 transitions. Word has length 45 [2022-10-16 17:59:55,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:55,585 INFO L495 AbstractCegarLoop]: Abstraction has 415 states and 535 transitions. [2022-10-16 17:59:55,586 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 38 states have (on average 3.263157894736842) internal successors, (124), 39 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:55,586 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 535 transitions. [2022-10-16 17:59:55,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-10-16 17:59:55,587 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:55,587 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:55,612 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:55,797 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:55,797 INFO L420 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:55,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:55,798 INFO L85 PathProgramCache]: Analyzing trace with hash 350255971, now seen corresponding path program 3 times [2022-10-16 17:59:55,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:55,799 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301198786] [2022-10-16 17:59:55,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:55,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:55,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:55,946 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-16 17:59:55,947 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:55,947 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301198786] [2022-10-16 17:59:55,947 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [301198786] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:55,947 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1379167209] [2022-10-16 17:59:55,947 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-10-16 17:59:55,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:55,948 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:55,949 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:55,972 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-10-16 17:59:56,064 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-10-16 17:59:56,064 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 17:59:56,065 INFO L263 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 9 conjunts are in the unsatisfiable core [2022-10-16 17:59:56,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:56,196 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-16 17:59:56,196 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:56,296 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 11 proven. 17 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-10-16 17:59:56,296 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1379167209] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:56,297 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:56,297 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2022-10-16 17:59:56,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2088645929] [2022-10-16 17:59:56,297 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:56,298 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-10-16 17:59:56,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:56,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-10-16 17:59:56,298 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-10-16 17:59:56,299 INFO L87 Difference]: Start difference. First operand 415 states and 535 transitions. Second operand has 19 states, 19 states have (on average 3.6842105263157894) internal successors, (70), 19 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:56,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:56,623 INFO L93 Difference]: Finished difference Result 666 states and 872 transitions. [2022-10-16 17:59:56,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-10-16 17:59:56,624 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 3.6842105263157894) internal successors, (70), 19 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 45 [2022-10-16 17:59:56,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:56,626 INFO L225 Difference]: With dead ends: 666 [2022-10-16 17:59:56,626 INFO L226 Difference]: Without dead ends: 441 [2022-10-16 17:59:56,627 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 75 SyntacticMatches, 6 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=145, Invalid=505, Unknown=0, NotChecked=0, Total=650 [2022-10-16 17:59:56,628 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 138 mSDsluCounter, 190 mSDsCounter, 0 mSdLazyCounter, 295 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 218 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 295 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:56,629 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [138 Valid, 218 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 295 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-10-16 17:59:56,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2022-10-16 17:59:56,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 362. [2022-10-16 17:59:56,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 362 states, 358 states have (on average 1.3016759776536313) internal successors, (466), 361 states have internal predecessors, (466), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:56,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 466 transitions. [2022-10-16 17:59:56,674 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 466 transitions. Word has length 45 [2022-10-16 17:59:56,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:56,674 INFO L495 AbstractCegarLoop]: Abstraction has 362 states and 466 transitions. [2022-10-16 17:59:56,675 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 3.6842105263157894) internal successors, (70), 19 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:56,675 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 466 transitions. [2022-10-16 17:59:56,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-10-16 17:59:56,676 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:56,676 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:56,719 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:56,890 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:56,892 INFO L420 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:56,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:56,893 INFO L85 PathProgramCache]: Analyzing trace with hash 311163292, now seen corresponding path program 1 times [2022-10-16 17:59:56,893 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:56,894 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060357385] [2022-10-16 17:59:56,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:56,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:56,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:57,502 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-10-16 17:59:57,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 17:59:57,503 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1060357385] [2022-10-16 17:59:57,503 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1060357385] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 17:59:57,503 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [350314270] [2022-10-16 17:59:57,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:57,504 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 17:59:57,504 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 17:59:57,508 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 17:59:57,512 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-10-16 17:59:57,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 17:59:57,626 INFO L263 TraceCheckSpWp]: Trace formula consists of 214 conjuncts, 33 conjunts are in the unsatisfiable core [2022-10-16 17:59:57,628 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 17:59:57,638 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2022-10-16 17:59:57,773 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 16 [2022-10-16 17:59:57,777 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 17:59:57,948 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-10-16 17:59:57,968 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-10-16 17:59:57,968 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 17:59:58,106 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:58,107 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 29 [2022-10-16 17:59:58,114 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 17:59:58,114 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 40 [2022-10-16 17:59:58,128 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2022-10-16 17:59:58,179 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-10-16 17:59:58,179 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [350314270] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 17:59:58,179 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 17:59:58,180 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 8] total 24 [2022-10-16 17:59:58,180 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923350468] [2022-10-16 17:59:58,180 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 17:59:58,180 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-10-16 17:59:58,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 17:59:58,181 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-10-16 17:59:58,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=512, Unknown=0, NotChecked=0, Total=600 [2022-10-16 17:59:58,182 INFO L87 Difference]: Start difference. First operand 362 states and 466 transitions. Second operand has 25 states, 24 states have (on average 4.291666666666667) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:58,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 17:59:58,898 INFO L93 Difference]: Finished difference Result 387 states and 491 transitions. [2022-10-16 17:59:58,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-10-16 17:59:58,899 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 24 states have (on average 4.291666666666667) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2022-10-16 17:59:58,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 17:59:58,901 INFO L225 Difference]: With dead ends: 387 [2022-10-16 17:59:58,901 INFO L226 Difference]: Without dead ends: 386 [2022-10-16 17:59:58,902 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 77 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=316, Invalid=1406, Unknown=0, NotChecked=0, Total=1722 [2022-10-16 17:59:58,903 INFO L413 NwaCegarLoop]: 32 mSDtfsCounter, 319 mSDsluCounter, 342 mSDsCounter, 0 mSdLazyCounter, 411 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 319 SdHoareTripleChecker+Valid, 374 SdHoareTripleChecker+Invalid, 462 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 411 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-10-16 17:59:58,903 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [319 Valid, 374 Invalid, 462 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 411 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-10-16 17:59:58,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2022-10-16 17:59:58,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 361. [2022-10-16 17:59:58,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 357 states have (on average 1.2913165266106443) internal successors, (461), 360 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:58,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 461 transitions. [2022-10-16 17:59:58,951 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 461 transitions. Word has length 46 [2022-10-16 17:59:58,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 17:59:58,952 INFO L495 AbstractCegarLoop]: Abstraction has 361 states and 461 transitions. [2022-10-16 17:59:58,952 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 24 states have (on average 4.291666666666667) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 17:59:58,952 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 461 transitions. [2022-10-16 17:59:58,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-10-16 17:59:58,953 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 17:59:58,953 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 17:59:58,995 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-10-16 17:59:59,166 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2022-10-16 17:59:59,166 INFO L420 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 17:59:59,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 17:59:59,167 INFO L85 PathProgramCache]: Analyzing trace with hash -768329748, now seen corresponding path program 3 times [2022-10-16 17:59:59,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 17:59:59,167 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563204076] [2022-10-16 17:59:59,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 17:59:59,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 17:59:59,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 18:00:00,832 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 18:00:00,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 18:00:00,832 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563204076] [2022-10-16 18:00:00,832 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1563204076] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 18:00:00,833 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1009793366] [2022-10-16 18:00:00,833 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-10-16 18:00:00,833 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 18:00:00,833 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 18:00:00,838 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 18:00:00,840 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-10-16 18:00:01,035 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-10-16 18:00:01,036 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 18:00:01,039 INFO L263 TraceCheckSpWp]: Trace formula consists of 223 conjuncts, 36 conjunts are in the unsatisfiable core [2022-10-16 18:00:01,041 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 18:00:01,048 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 94 [2022-10-16 18:00:01,168 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 18:00:01,172 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 18:00:01,313 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-10-16 18:00:01,314 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 18:00:01,317 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 18:00:01,377 INFO L356 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-10-16 18:00:01,377 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 36 [2022-10-16 18:00:01,381 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 24 [2022-10-16 18:00:02,036 INFO L356 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-10-16 18:00:02,036 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 40 [2022-10-16 18:00:02,041 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 24 [2022-10-16 18:00:02,286 INFO L356 Elim1Store]: treesize reduction 7, result has 30.0 percent of original size [2022-10-16 18:00:02,287 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 10 [2022-10-16 18:00:02,328 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 18:00:02,328 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 18:00:15,137 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (v_ArrVal_1621 Int) (|ULTIMATE.start_lis_~i~0#1| Int) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| |v_ULTIMATE.start_lis_~i~0#1_117|) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1))) is different from false [2022-10-16 18:00:15,225 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1617 Int) (|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_121| Int) (v_ArrVal_1621 Int) (v_ArrVal_1618 (Array Int Int)) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1617)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1618))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_121|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1) (< |v_ULTIMATE.start_lis_~i~0#1_121| |v_ULTIMATE.start_lis_~i~0#1_117|))) is different from false [2022-10-16 18:00:15,269 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_122| Int)) (or (forall ((v_ArrVal_1617 Int) (|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_121| Int) (v_ArrVal_1621 Int) (v_ArrVal_1618 (Array Int Int)) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_122|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1617)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1618))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_121|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1) (< |v_ULTIMATE.start_lis_~i~0#1_121| |v_ULTIMATE.start_lis_~i~0#1_117|))) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_122|)))) is different from false [2022-10-16 18:00:15,352 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1617 Int) (|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_121| Int) (|v_ULTIMATE.start_lis_~i~0#1_122| Int) (v_ArrVal_1621 Int) (v_ArrVal_1618 (Array Int Int)) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_122|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1617)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1618))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_121|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_122| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1) (< |v_ULTIMATE.start_lis_~i~0#1_121| |v_ULTIMATE.start_lis_~i~0#1_117|))) is different from false [2022-10-16 18:00:15,380 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:15,380 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 236 treesize of output 153 [2022-10-16 18:00:15,398 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 406 treesize of output 402 [2022-10-16 18:00:15,410 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:00:15,410 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:00:15,422 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:15,423 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 207 treesize of output 207 [2022-10-16 18:00:15,436 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:00:15,436 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:00:15,441 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 195 treesize of output 189 [2022-10-16 18:00:15,454 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 436 treesize of output 412 [2022-10-16 18:00:15,466 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 412 treesize of output 364 [2022-10-16 18:00:15,483 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 462 treesize of output 450 [2022-10-16 18:00:15,609 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 18 refuted. 2 times theorem prover too weak. 1 trivial. 22 not checked. [2022-10-16 18:00:15,609 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1009793366] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 18:00:15,609 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 18:00:15,609 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21] total 58 [2022-10-16 18:00:15,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [715429875] [2022-10-16 18:00:15,610 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 18:00:15,610 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 59 states [2022-10-16 18:00:15,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 18:00:15,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2022-10-16 18:00:15,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=288, Invalid=2617, Unknown=81, NotChecked=436, Total=3422 [2022-10-16 18:00:15,612 INFO L87 Difference]: Start difference. First operand 361 states and 461 transitions. Second operand has 59 states, 58 states have (on average 2.2413793103448274) internal successors, (130), 59 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:00:16,884 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= |c_ULTIMATE.start_lis_~i~0#1| 1) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((v_ArrVal_1617 Int) (|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_121| Int) (|v_ULTIMATE.start_lis_~i~0#1_122| Int) (v_ArrVal_1621 Int) (v_ArrVal_1618 (Array Int Int)) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_122|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1617)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1618))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_121|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_122| .cse3) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1) (< |v_ULTIMATE.start_lis_~i~0#1_121| |v_ULTIMATE.start_lis_~i~0#1_117|))) (or (<= (+ 2 |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~best~0#1.offset|) |c_ULTIMATE.start_lis_~N#1|) (and (= (select .cse2 (+ |c_ULTIMATE.start_lis_~N#1| (* (- 1) |c_ULTIMATE.start_lis_~i~0#1|) 3)) 1) (<= .cse3 |c_ULTIMATE.start_lis_~N#1|))) (= (select .cse2 4) 1))) is different from false [2022-10-16 18:00:18,889 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ |c_ULTIMATE.start_lis_#t~post4#1| 1)) (.cse0 (+ |c_ULTIMATE.start_lis_#t~post4#1| 2 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse3 (* (- 1) |c_ULTIMATE.start_lis_#t~post4#1|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (or (<= .cse0 |c_ULTIMATE.start_lis_~N#1|) (and (<= .cse1 |c_ULTIMATE.start_lis_~N#1|) (= (select .cse2 (+ |c_ULTIMATE.start_lis_~N#1| 3 .cse3)) 1))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((|v_ULTIMATE.start_lis_~i~0#1_122| Int)) (or (forall ((v_ArrVal_1617 Int) (|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_121| Int) (v_ArrVal_1621 Int) (v_ArrVal_1618 (Array Int Int)) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< (select (select (store (let ((.cse4 (store (let ((.cse5 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_122|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1617)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1618))) (store .cse5 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse5 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_121|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1) (< |v_ULTIMATE.start_lis_~i~0#1_121| |v_ULTIMATE.start_lis_~i~0#1_117|))) (not (<= .cse1 |v_ULTIMATE.start_lis_~i~0#1_122|)))) (<= 1 |c_ULTIMATE.start_lis_#t~post4#1|) (<= (select .cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (or (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) |c_ULTIMATE.start_lis_~N#1|) (<= |c_ULTIMATE.start_lis_~N#1| .cse0) (and (<= (div (+ |c_ULTIMATE.start_lis_~N#1| .cse3 (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) 4) |c_ULTIMATE.start_lis_#t~post4#1|) (= (select .cse2 (+ |c_ULTIMATE.start_lis_~N#1| .cse3 1)) 1))))) is different from false [2022-10-16 18:00:20,125 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse1 (* (- 1) |c_ULTIMATE.start_lis_~i~0#1|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (or (= (select .cse0 (+ |c_ULTIMATE.start_lis_~N#1| .cse1 4)) 1) (< |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~N#1|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~N#1|) (<= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (<= 2 |c_ULTIMATE.start_lis_~i~0#1|) (forall ((v_ArrVal_1617 Int) (|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_121| Int) (v_ArrVal_1621 Int) (v_ArrVal_1618 (Array Int Int)) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< (select (select (store (let ((.cse2 (store (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1617)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1618))) (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_121|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1) (< |v_ULTIMATE.start_lis_~i~0#1_121| |v_ULTIMATE.start_lis_~i~0#1_117|))) (or (<= (+ 3 |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~best~0#1.offset|) |c_ULTIMATE.start_lis_~N#1|) (and (= 1 (select .cse0 (+ |c_ULTIMATE.start_lis_~N#1| .cse1 2))) (<= (+ (div (+ |c_ULTIMATE.start_lis_~N#1| .cse1 2 (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 4) 1) |c_ULTIMATE.start_lis_~i~0#1|)) (<= |c_ULTIMATE.start_lis_~N#1| (+ |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~best~0#1.offset| 1))))) is different from false [2022-10-16 18:00:21,118 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (v_ArrVal_1621 Int) (|ULTIMATE.start_lis_~i~0#1| Int) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| |v_ULTIMATE.start_lis_~i~0#1_117|) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1))) (<= (select .cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (or (<= (+ 3 |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~best~0#1.offset|) |c_ULTIMATE.start_lis_~N#1|) (let ((.cse2 (* (- 1) |c_ULTIMATE.start_lis_~i~0#1|))) (and (= 1 (select .cse1 (+ |c_ULTIMATE.start_lis_~N#1| .cse2 2))) (<= (+ (div (+ |c_ULTIMATE.start_lis_~N#1| .cse2 2 (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 4) 1) |c_ULTIMATE.start_lis_~i~0#1|))) (<= |c_ULTIMATE.start_lis_~N#1| (+ |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~best~0#1.offset| 1))))) is different from false [2022-10-16 18:00:22,667 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (or (let ((.cse1 (* (- 1) |c_ULTIMATE.start_lis_#t~post4#1|))) (and (= (select .cse0 (+ |c_ULTIMATE.start_lis_~N#1| 2 .cse1)) 1) (<= (+ (div (+ |c_ULTIMATE.start_lis_~N#1| 2 .cse1 (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 4) 1) |c_ULTIMATE.start_lis_#t~post4#1|))) (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 3 |c_ULTIMATE.start_lis_~best~0#1.offset|) |c_ULTIMATE.start_lis_~N#1|) (<= |c_ULTIMATE.start_lis_~N#1| (+ |c_ULTIMATE.start_lis_#t~post4#1| |c_ULTIMATE.start_lis_~best~0#1.offset| 1))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (v_ArrVal_1621 Int) (|ULTIMATE.start_lis_~i~0#1| Int) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| |v_ULTIMATE.start_lis_~i~0#1_117|) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< (select (select (store (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1))) (<= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1))) is different from false [2022-10-16 18:00:23,873 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (or (and (not (= (+ (* 5 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |c_ULTIMATE.start_lis_~N#1| 3))) (= (select .cse0 (+ |c_ULTIMATE.start_lis_~N#1| (* (- 1) |c_ULTIMATE.start_lis_~i~0#1|) 3)) 1)) (<= (+ 2 |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~best~0#1.offset|) |c_ULTIMATE.start_lis_~N#1|) (<= |c_ULTIMATE.start_lis_~N#1| (+ |c_ULTIMATE.start_lis_~i~0#1| |c_ULTIMATE.start_lis_~best~0#1.offset|))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (forall ((|v_ULTIMATE.start_lis_~i~0#1_117| Int) (v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1622 (Array Int Int)) (v_ArrVal_1621 Int) (|ULTIMATE.start_lis_~i~0#1| Int) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (< |ULTIMATE.start_lis_~i~0#1| |v_ULTIMATE.start_lis_~i~0#1_117|) (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |v_ULTIMATE.start_lis_~i~0#1_117|)) (< 2 |v_ULTIMATE.start_lis_~i~0#1_117|) (< (select (select (store (let ((.cse1 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* |ULTIMATE.start_lis_~i~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1621)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1622))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ |c_ULTIMATE.start_lis_~best~0#1.offset| (* 4 |v_ULTIMATE.start_lis_~i~0#1_117|)) v_ArrVal_1623))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~j~0#1_74| 1))) (<= (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1))) is different from false [2022-10-16 18:00:27,111 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ |c_ULTIMATE.start_lis_~j~0#1| 1)) (.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (<= 1 |c_ULTIMATE.start_lis_~j~0#1|) (forall ((|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |c_ULTIMATE.start_lis_~i~0#1|)) (< |v_ULTIMATE.start_lis_~j~0#1_74| .cse0) (< (select .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) (<= (select .cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (forall ((v_ArrVal_1624 (Array Int Int)) (v_ArrVal_1623 Int) (|v_ULTIMATE.start_lis_~j~0#1_74| Int)) (or (not (< |v_ULTIMATE.start_lis_~j~0#1_74| |c_ULTIMATE.start_lis_~i~0#1|)) (< |v_ULTIMATE.start_lis_~j~0#1_74| .cse0) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1623)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1624) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~j~0#1_74|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) (<= |c_ULTIMATE.start_lis_~j~0#1| 1))) is different from false [2022-10-16 18:00:29,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 18:00:29,944 INFO L93 Difference]: Finished difference Result 512 states and 633 transitions. [2022-10-16 18:00:29,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-10-16 18:00:29,945 INFO L78 Accepts]: Start accepts. Automaton has has 59 states, 58 states have (on average 2.2413793103448274) internal successors, (130), 59 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-10-16 18:00:29,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 18:00:29,950 INFO L225 Difference]: With dead ends: 512 [2022-10-16 18:00:29,950 INFO L226 Difference]: Without dead ends: 511 [2022-10-16 18:00:29,954 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 61 SyntacticMatches, 18 SemanticMatches, 110 ConstructedPredicates, 11 IntricatePredicates, 0 DeprecatedPredicates, 2755 ImplicationChecksByTransitivity, 27.1s TimeCoverageRelationStatistics Valid=1358, Invalid=8691, Unknown=95, NotChecked=2288, Total=12432 [2022-10-16 18:00:29,956 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 560 mSDsluCounter, 883 mSDsCounter, 0 mSdLazyCounter, 1180 mSolverCounterSat, 86 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 560 SdHoareTripleChecker+Valid, 925 SdHoareTripleChecker+Invalid, 1968 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 86 IncrementalHoareTripleChecker+Valid, 1180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 702 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-10-16 18:00:29,956 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [560 Valid, 925 Invalid, 1968 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [86 Valid, 1180 Invalid, 0 Unknown, 702 Unchecked, 0.9s Time] [2022-10-16 18:00:29,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 511 states. [2022-10-16 18:00:30,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 511 to 372. [2022-10-16 18:00:30,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 372 states, 368 states have (on average 1.2907608695652173) internal successors, (475), 371 states have internal predecessors, (475), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:00:30,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 475 transitions. [2022-10-16 18:00:30,016 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 475 transitions. Word has length 47 [2022-10-16 18:00:30,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 18:00:30,016 INFO L495 AbstractCegarLoop]: Abstraction has 372 states and 475 transitions. [2022-10-16 18:00:30,017 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 59 states, 58 states have (on average 2.2413793103448274) internal successors, (130), 59 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:00:30,017 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 475 transitions. [2022-10-16 18:00:30,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-10-16 18:00:30,020 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 18:00:30,020 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 18:00:30,046 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-10-16 18:00:30,232 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2022-10-16 18:00:30,232 INFO L420 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 18:00:30,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 18:00:30,233 INFO L85 PathProgramCache]: Analyzing trace with hash 321312368, now seen corresponding path program 1 times [2022-10-16 18:00:30,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 18:00:30,234 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088727210] [2022-10-16 18:00:30,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 18:00:30,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 18:00:30,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 18:00:31,746 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 18:00:31,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 18:00:31,746 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088727210] [2022-10-16 18:00:31,746 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1088727210] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 18:00:31,747 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [819275882] [2022-10-16 18:00:31,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 18:00:31,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 18:00:31,747 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 18:00:31,748 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 18:00:31,764 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-10-16 18:00:31,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 18:00:31,892 INFO L263 TraceCheckSpWp]: Trace formula consists of 227 conjuncts, 53 conjunts are in the unsatisfiable core [2022-10-16 18:00:31,896 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 18:00:31,905 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 94 [2022-10-16 18:00:31,922 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 18:00:31,925 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 18:00:32,059 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,061 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 28 [2022-10-16 18:00:32,064 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-10-16 18:00:32,243 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,245 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,246 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 40 [2022-10-16 18:00:32,251 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 23 [2022-10-16 18:00:32,556 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,557 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 36 [2022-10-16 18:00:32,564 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 29 [2022-10-16 18:00:32,957 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,958 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,959 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:32,961 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2022-10-16 18:00:32,966 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 27 [2022-10-16 18:00:33,171 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:33,171 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 12 [2022-10-16 18:00:33,174 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 18:00:33,175 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 18:00:33,335 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 (* |c_ULTIMATE.start_lis_~j~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 18:00:33,362 WARN L833 $PredicateComparison]: unable to prove that (forall ((|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 18:00:33,376 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_125| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post5#1| 1) |v_ULTIMATE.start_lis_~i~0#1_125|)) (forall ((|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)))) is different from false [2022-10-16 18:00:33,395 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) is different from false [2022-10-16 18:00:33,443 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (not (<= v_ArrVal_1716 (+ |c_ULTIMATE.start_lis_#t~mem12#1| 1))))) is different from false [2022-10-16 18:00:33,473 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (+ (select .cse1 (+ (* |c_ULTIMATE.start_lis_~j~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) v_ArrVal_1716)))) is different from false [2022-10-16 18:00:33,539 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716)))) is different from false [2022-10-16 18:00:33,555 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int))) (let ((.cse1 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< (let ((.cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 .cse2 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse2)) 2147483647) (< (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716)))) is different from false [2022-10-16 18:00:33,615 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse0 (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< (let ((.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse1 (store (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse3 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_125| 2))))) is different from false [2022-10-16 18:00:33,644 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_128| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_128|)) (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_128|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse0 (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< (let ((.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse1 (store (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse3 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3)) 2147483647))))))) is different from false [2022-10-16 18:00:33,691 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_128| Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_128|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse0 (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< (let ((.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse1 (store (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse3 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_128| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)))))) is different from false [2022-10-16 18:00:33,716 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_128| Int) (v_ArrVal_1711 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse2 (store (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1711))) (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_128|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse0 (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< (let ((.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse1 (store (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse3 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_128| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)))))) is different from false [2022-10-16 18:00:33,752 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_128| Int) (v_ArrVal_1711 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse2 (store (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* |c_ULTIMATE.start_lis_#t~post4#1| 4) 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1711))) (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_128|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse0 (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< (let ((.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse1 (store (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse3 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_128| (+ |c_ULTIMATE.start_lis_#t~post4#1| 2)))))) is different from false [2022-10-16 18:00:33,802 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_128| Int) (v_ArrVal_1711 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse2 (store (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) 4 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1711))) (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_128|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse0 (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< |v_ULTIMATE.start_lis_~i~0#1_128| (+ 2 |c_ULTIMATE.start_lis_~i~0#1|)) (< (let ((.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse1 (store (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse3 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse1 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3)) 2147483647))))) is different from false [2022-10-16 18:00:33,819 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:33,819 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 597 treesize of output 369 [2022-10-16 18:00:33,866 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 947 treesize of output 941 [2022-10-16 18:00:33,885 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:00:33,891 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 476 treesize of output 474 [2022-10-16 18:00:33,911 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:00:33,924 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:33,925 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 576 treesize of output 576 [2022-10-16 18:00:33,945 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1043 treesize of output 1039 [2022-10-16 18:00:33,964 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1035 treesize of output 1027 [2022-10-16 18:00:33,986 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 676 treesize of output 612 [2022-10-16 18:00:34,009 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 676 treesize of output 644 [2022-10-16 18:00:34,438 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 35 not checked. [2022-10-16 18:00:34,438 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [819275882] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 18:00:34,438 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 18:00:34,438 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 20] total 56 [2022-10-16 18:00:34,439 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758134108] [2022-10-16 18:00:34,439 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 18:00:34,439 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2022-10-16 18:00:34,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 18:00:34,440 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2022-10-16 18:00:34,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1654, Unknown=14, NotChecked=1330, Total=3192 [2022-10-16 18:00:34,441 INFO L87 Difference]: Start difference. First operand 372 states and 475 transitions. Second operand has 57 states, 56 states have (on average 2.375) internal successors, (133), 57 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:00:35,620 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse6 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (let ((.cse0 (select .cse6 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|))) (.cse1 (select .cse6 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (and (= .cse0 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= |c_ULTIMATE.start_lis_~i~0#1| 1) (<= .cse0 (+ .cse1 1)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= .cse1 1) (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_128| Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse6 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_128|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse2 (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< (let ((.cse5 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (select (select (store (let ((.cse3 (store (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 .cse5 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse5)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_128| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)))))) (= (select .cse6 0) 1) (<= 1 |c_ULTIMATE.start_lis_~i~0#1|) (<= |c_ULTIMATE.start_lis_~i~0#1| 1)))) is different from false [2022-10-16 18:00:37,626 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= (select .cse0 .cse1) 1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_128| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_128|)) (forall ((v_ArrVal_1716 Int) (|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|v_ULTIMATE.start_lis_#t~mem12#1_35| Int) (v_ArrVal_1719 (Array Int Int)) (v_ArrVal_1717 (Array Int Int)) (v_ArrVal_1714 Int) (v_ArrVal_1715 (Array Int Int))) (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_128|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1714)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1715))) (let ((.cse2 (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1716) (< |v_ULTIMATE.start_lis_~i~0#1_125| 2) (< (select (select (store (let ((.cse3 (store (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 .cse1 v_ArrVal_1716)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1717))) (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ 1 |v_ULTIMATE.start_lis_#t~mem12#1_35|)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse1) 2147483647))))))) (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 1) |c_ULTIMATE.start_lis_#t~post4#1|) (<= (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) (<= 1 |c_ULTIMATE.start_lis_#t~post4#1|) (= (select .cse0 0) 1))) is different from false [2022-10-16 18:00:39,117 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (let ((.cse3 (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (.cse2 (* 4 |c_ULTIMATE.start_lis_~i~0#1|))) (let ((.cse0 (select .cse4 (+ .cse2 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (.cse1 (+ .cse3 1)) (.cse5 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= |c_ULTIMATE.start_lis_~i~0#1| 1) (<= .cse0 .cse1) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= .cse2 4) (<= .cse0 2) (<= .cse3 1) (= |c_ULTIMATE.start_lis_~j~0#1| 0) (<= (select .cse4 .cse5) .cse1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse4 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse5) 2147483647))) (<= (select .cse4 (+ (* |c_ULTIMATE.start_lis_~j~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1))))) is different from false [2022-10-16 18:00:39,842 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (let ((.cse2 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse1 (+ .cse2 1)) (.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= |c_ULTIMATE.start_lis_~i~0#1| 1) (<= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) .cse1) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= .cse2 1) (= |c_ULTIMATE.start_lis_#t~post6#1| 0) (<= (select .cse0 .cse3) .cse1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3) 2147483647))))))) is different from false [2022-10-16 18:00:40,622 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (let ((.cse2 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse1 (+ .cse2 1)) (.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= |c_ULTIMATE.start_lis_~i~0#1| 1) (<= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) .cse1) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_~j~0#1| 1) (<= .cse2 1) (<= (select .cse0 .cse3) .cse1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse3) 2147483647))))))) is different from false [2022-10-16 18:00:41,380 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= |c_ULTIMATE.start_lis_~i~0#1| 1) (<= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ .cse1 1)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= .cse1 1) (forall ((|v_ULTIMATE.start_lis_~i~0#1_125| Int) (|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_125| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)))))) is different from false [2022-10-16 18:00:43,455 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse2 (select .cse0 .cse1)) (.cse3 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_125| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post5#1| 1) |v_ULTIMATE.start_lis_~i~0#1_125|)) (forall ((|ULTIMATE.start_lis_#t~mem12#1| Int) (v_ArrVal_1719 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_125|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ |ULTIMATE.start_lis_#t~mem12#1| 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1719) |c_ULTIMATE.start_lis_~best~0#1.base|) .cse1) 2147483647)))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= .cse2 2) (= |c_ULTIMATE.start_lis_#t~post5#1| 1) (<= .cse3 1) (<= .cse2 (+ .cse3 1)) (<= 1 |c_ULTIMATE.start_lis_#t~post5#1|)))) is different from false [2022-10-16 18:00:44,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 18:00:44,299 INFO L93 Difference]: Finished difference Result 515 states and 638 transitions. [2022-10-16 18:00:44,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-10-16 18:00:44,299 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 56 states have (on average 2.375) internal successors, (133), 57 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-10-16 18:00:44,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 18:00:44,302 INFO L225 Difference]: With dead ends: 515 [2022-10-16 18:00:44,302 INFO L226 Difference]: Without dead ends: 514 [2022-10-16 18:00:44,303 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 60 SyntacticMatches, 9 SemanticMatches, 88 ConstructedPredicates, 21 IntricatePredicates, 1 DeprecatedPredicates, 1275 ImplicationChecksByTransitivity, 10.6s TimeCoverageRelationStatistics Valid=571, Invalid=4184, Unknown=21, NotChecked=3234, Total=8010 [2022-10-16 18:00:44,303 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 232 mSDsluCounter, 740 mSDsCounter, 0 mSdLazyCounter, 798 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 232 SdHoareTripleChecker+Valid, 766 SdHoareTripleChecker+Invalid, 1932 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 798 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1093 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-10-16 18:00:44,304 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [232 Valid, 766 Invalid, 1932 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 798 Invalid, 0 Unknown, 1093 Unchecked, 0.6s Time] [2022-10-16 18:00:44,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states. [2022-10-16 18:00:44,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 372. [2022-10-16 18:00:44,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 372 states, 368 states have (on average 1.2907608695652173) internal successors, (475), 371 states have internal predecessors, (475), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:00:44,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 475 transitions. [2022-10-16 18:00:44,361 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 475 transitions. Word has length 47 [2022-10-16 18:00:44,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 18:00:44,362 INFO L495 AbstractCegarLoop]: Abstraction has 372 states and 475 transitions. [2022-10-16 18:00:44,362 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 56 states have (on average 2.375) internal successors, (133), 57 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:00:44,362 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 475 transitions. [2022-10-16 18:00:44,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-10-16 18:00:44,363 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 18:00:44,363 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 18:00:44,400 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-10-16 18:00:44,577 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2022-10-16 18:00:44,577 INFO L420 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 18:00:44,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 18:00:44,578 INFO L85 PathProgramCache]: Analyzing trace with hash -780603408, now seen corresponding path program 1 times [2022-10-16 18:00:44,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 18:00:44,578 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776293339] [2022-10-16 18:00:44,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 18:00:44,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 18:00:44,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 18:00:46,429 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 10 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 18:00:46,430 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 18:00:46,430 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776293339] [2022-10-16 18:00:46,430 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [776293339] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 18:00:46,430 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1574734963] [2022-10-16 18:00:46,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 18:00:46,431 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 18:00:46,431 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 18:00:46,432 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 18:00:46,434 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-10-16 18:00:46,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 18:00:46,565 INFO L263 TraceCheckSpWp]: Trace formula consists of 230 conjuncts, 54 conjunts are in the unsatisfiable core [2022-10-16 18:00:46,568 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 18:00:46,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2022-10-16 18:00:46,730 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 18:00:46,737 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 18:00:46,881 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:46,883 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 18:00:46,887 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 18:00:47,159 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:47,160 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:47,160 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 18:00:47,161 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 42 [2022-10-16 18:00:47,166 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 31 [2022-10-16 18:00:47,942 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:47,942 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 17 [2022-10-16 18:00:47,990 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 18:00:47,991 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 18:00:48,695 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse1 (* 4 |c_ULTIMATE.start_lis_~i~0#1|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (not (<= v_ArrVal_1812 (+ |c_ULTIMATE.start_lis_#t~mem12#1| 1))) (< (select .cse0 (+ .cse1 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)))))) is different from false [2022-10-16 18:00:48,734 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse1 (* 4 |c_ULTIMATE.start_lis_~i~0#1|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 (+ .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< (select .cse0 (+ .cse1 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) (< (+ (select .cse2 (+ (* |c_ULTIMATE.start_lis_~j~0#1| 4) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) v_ArrVal_1812))))) is different from false [2022-10-16 18:00:48,799 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse1 (* 4 |c_ULTIMATE.start_lis_~i~0#1|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 (+ .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (select .cse0 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< (select .cse0 (+ .cse1 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) (< (+ (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812))))) is different from false [2022-10-16 18:00:48,812 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse2 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse1 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse2 .cse1 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (select .cse0 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) (< (select .cse0 .cse1) 2147483647) (< (+ (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812))))) is different from false [2022-10-16 18:00:48,869 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1808 Int) (v_ArrVal_1807 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1808)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1807))) (let ((.cse0 (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse1 (select (store (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse2 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812) (< (select .cse1 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) (< (select .cse1 .cse2) 2147483647)))))) is different from false [2022-10-16 18:00:48,895 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_134| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_134|)) (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1808 Int) (v_ArrVal_1807 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_134|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1808)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1807))) (let ((.cse0 (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse1 (select (store (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse2 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812) (< (select .cse1 .cse2) 2147483647) (< (select .cse1 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))))))) is different from false [2022-10-16 18:00:48,935 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1810 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_134| Int) (v_ArrVal_1808 Int) (v_ArrVal_1807 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_134|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1808)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1807))) (let ((.cse0 (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse1 (select (store (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse2 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< |v_ULTIMATE.start_lis_~i~0#1_134| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812) (< (select .cse1 .cse2) 2147483647) (< (select .cse1 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))))) is different from false [2022-10-16 18:00:48,962 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:48,963 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 388 treesize of output 232 [2022-10-16 18:00:48,971 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 384 treesize of output 376 [2022-10-16 18:00:48,990 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 183 treesize of output 169 [2022-10-16 18:00:49,011 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 313 treesize of output 273 [2022-10-16 18:00:49,023 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 261 treesize of output 245 [2022-10-16 18:00:49,049 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:00:49,050 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 175 treesize of output 175 [2022-10-16 18:00:49,661 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 32 not checked. [2022-10-16 18:00:49,661 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1574734963] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 18:00:49,662 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 18:00:49,662 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 23, 23] total 64 [2022-10-16 18:00:49,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002841247] [2022-10-16 18:00:49,662 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 18:00:49,662 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2022-10-16 18:00:49,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 18:00:49,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2022-10-16 18:00:49,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=242, Invalid=2971, Unknown=7, NotChecked=812, Total=4032 [2022-10-16 18:00:49,664 INFO L87 Difference]: Start difference. First operand 372 states and 475 transitions. Second operand has 64 states, 64 states have (on average 2.1875) internal successors, (140), 64 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:00:50,677 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_~i~0#1| 0) (forall ((v_ArrVal_1810 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_134| Int) (v_ArrVal_1808 Int) (v_ArrVal_1807 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_134|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1808)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1807))) (let ((.cse1 (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse2 (select (store (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 .cse3 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< |v_ULTIMATE.start_lis_~i~0#1_134| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812) (< (select .cse2 .cse3) 2147483647) (< (select .cse2 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))))))) is different from false [2022-10-16 18:00:52,682 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_134| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_134|)) (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1808 Int) (v_ArrVal_1807 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse4 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_134|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1808)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1807))) (let ((.cse0 (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse1 (select (store (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse2 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812) (< (select .cse1 .cse2) 2147483647) (< (select .cse1 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))))))) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= |c_ULTIMATE.start_lis_#t~post4#1| 0) (= (select .cse4 0) 1))) is different from false [2022-10-16 18:00:53,857 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (= (select .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1) (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (<= |c_ULTIMATE.start_lis_~i~0#1| 2) (forall ((v_ArrVal_1810 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_134| Int) (v_ArrVal_1808 Int) (v_ArrVal_1807 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_134|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1808)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1807))) (let ((.cse1 (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse3 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse2 (select (store (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse1 .cse3 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< |v_ULTIMATE.start_lis_~i~0#1_134| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812) (< (select .cse2 .cse3) 2147483647) (< (select .cse2 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (+ (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))))) (<= (+ (div (* (- 1) |c_ULTIMATE.start_lis_~best~0#1.offset|) 4) 2) |c_ULTIMATE.start_lis_~i~0#1|) (= (select .cse0 0) 1))) is different from false [2022-10-16 18:00:55,862 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (+ 8 |c_ULTIMATE.start_lis_~best~0#1.offset|)) (.cse5 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (and (not (= |c_ULTIMATE.start_lis_~best~0#1.base| |c_ULTIMATE.start_lis_~prev~0#1.base|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_134| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_134|)) (forall ((v_ArrVal_1810 (Array Int Int)) (v_ArrVal_1808 Int) (v_ArrVal_1807 (Array Int Int)) (v_ArrVal_1812 Int)) (let ((.cse4 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse5 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_134|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1808)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1807))) (let ((.cse0 (select .cse4 |c_ULTIMATE.start_lis_~best~0#1.base|)) (.cse2 (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|))) (let ((.cse1 (select (store (store .cse4 |c_ULTIMATE.start_lis_~best~0#1.base| (store .cse0 .cse2 v_ArrVal_1812)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1810) |c_ULTIMATE.start_lis_~best~0#1.base|))) (or (< (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1) v_ArrVal_1812) (< (select .cse1 .cse2) 2147483647) (< (select .cse1 .cse3) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))))))) (= (select .cse5 .cse3) 1) (<= 2 |c_ULTIMATE.start_lis_#t~post4#1|) (= 0 |c_ULTIMATE.start_lis_~best~0#1.offset|) (= (select .cse5 0) 1))) is different from false [2022-10-16 18:01:00,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 18:01:00,481 INFO L93 Difference]: Finished difference Result 867 states and 1111 transitions. [2022-10-16 18:01:00,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2022-10-16 18:01:00,481 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 64 states have (on average 2.1875) internal successors, (140), 64 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2022-10-16 18:01:00,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 18:01:00,484 INFO L225 Difference]: With dead ends: 867 [2022-10-16 18:01:00,484 INFO L226 Difference]: Without dead ends: 651 [2022-10-16 18:01:00,486 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 58 SyntacticMatches, 7 SemanticMatches, 107 ConstructedPredicates, 11 IntricatePredicates, 0 DeprecatedPredicates, 2188 ImplicationChecksByTransitivity, 11.7s TimeCoverageRelationStatistics Valid=932, Invalid=8607, Unknown=11, NotChecked=2222, Total=11772 [2022-10-16 18:01:00,487 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 518 mSDsluCounter, 1060 mSDsCounter, 0 mSdLazyCounter, 1795 mSolverCounterSat, 71 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 518 SdHoareTripleChecker+Valid, 1098 SdHoareTripleChecker+Invalid, 2630 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 71 IncrementalHoareTripleChecker+Valid, 1795 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 764 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-10-16 18:01:00,487 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [518 Valid, 1098 Invalid, 2630 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [71 Valid, 1795 Invalid, 0 Unknown, 764 Unchecked, 1.3s Time] [2022-10-16 18:01:00,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states. [2022-10-16 18:01:00,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 437. [2022-10-16 18:01:00,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 437 states, 433 states have (on average 1.2771362586605082) internal successors, (553), 436 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:01:00,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 437 states to 437 states and 553 transitions. [2022-10-16 18:01:00,559 INFO L78 Accepts]: Start accepts. Automaton has 437 states and 553 transitions. Word has length 49 [2022-10-16 18:01:00,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 18:01:00,559 INFO L495 AbstractCegarLoop]: Abstraction has 437 states and 553 transitions. [2022-10-16 18:01:00,560 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 64 states have (on average 2.1875) internal successors, (140), 64 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:01:00,560 INFO L276 IsEmpty]: Start isEmpty. Operand 437 states and 553 transitions. [2022-10-16 18:01:00,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-10-16 18:01:00,561 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 18:01:00,561 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 18:01:00,593 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2022-10-16 18:01:00,774 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 18:01:00,774 INFO L420 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 18:01:00,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 18:01:00,775 INFO L85 PathProgramCache]: Analyzing trace with hash 1308412671, now seen corresponding path program 2 times [2022-10-16 18:01:00,775 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 18:01:00,776 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001110364] [2022-10-16 18:01:00,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 18:01:00,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 18:01:00,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 18:01:00,928 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-10-16 18:01:00,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 18:01:00,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001110364] [2022-10-16 18:01:00,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2001110364] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 18:01:00,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2142865887] [2022-10-16 18:01:00,929 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 18:01:00,929 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 18:01:00,929 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 18:01:00,930 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 18:01:00,947 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-10-16 18:01:01,061 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-10-16 18:01:01,061 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 18:01:01,062 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-16 18:01:01,063 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 18:01:01,164 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2022-10-16 18:01:01,164 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 18:01:01,249 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2022-10-16 18:01:01,250 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2142865887] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 18:01:01,250 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 18:01:01,250 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 5, 5] total 15 [2022-10-16 18:01:01,251 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [518204447] [2022-10-16 18:01:01,251 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 18:01:01,251 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-10-16 18:01:01,252 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 18:01:01,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-10-16 18:01:01,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2022-10-16 18:01:01,253 INFO L87 Difference]: Start difference. First operand 437 states and 553 transitions. Second operand has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:01:01,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 18:01:01,766 INFO L93 Difference]: Finished difference Result 467 states and 587 transitions. [2022-10-16 18:01:01,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-10-16 18:01:01,766 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 50 [2022-10-16 18:01:01,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 18:01:01,770 INFO L225 Difference]: With dead ends: 467 [2022-10-16 18:01:01,770 INFO L226 Difference]: Without dead ends: 426 [2022-10-16 18:01:01,771 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 93 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=208, Invalid=784, Unknown=0, NotChecked=0, Total=992 [2022-10-16 18:01:01,772 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 336 mSDsluCounter, 183 mSDsCounter, 0 mSdLazyCounter, 287 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 336 SdHoareTripleChecker+Valid, 211 SdHoareTripleChecker+Invalid, 316 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 287 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 18:01:01,772 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [336 Valid, 211 Invalid, 316 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 287 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-10-16 18:01:01,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2022-10-16 18:01:01,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 416. [2022-10-16 18:01:01,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 416 states, 413 states have (on average 1.2493946731234866) internal successors, (516), 415 states have internal predecessors, (516), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:01:01,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 416 states and 516 transitions. [2022-10-16 18:01:01,823 INFO L78 Accepts]: Start accepts. Automaton has 416 states and 516 transitions. Word has length 50 [2022-10-16 18:01:01,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 18:01:01,823 INFO L495 AbstractCegarLoop]: Abstraction has 416 states and 516 transitions. [2022-10-16 18:01:01,824 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 4.533333333333333) internal successors, (68), 15 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 18:01:01,824 INFO L276 IsEmpty]: Start isEmpty. Operand 416 states and 516 transitions. [2022-10-16 18:01:01,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-10-16 18:01:01,825 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 18:01:01,825 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 18:01:01,848 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2022-10-16 18:01:02,025 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 30 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2022-10-16 18:01:02,026 INFO L420 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 9 more)] === [2022-10-16 18:01:02,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 18:01:02,027 INFO L85 PathProgramCache]: Analyzing trace with hash -365053016, now seen corresponding path program 4 times [2022-10-16 18:01:02,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 18:01:02,028 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835505390] [2022-10-16 18:01:02,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 18:01:02,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 18:01:02,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 18:01:03,435 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 8 proven. 51 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 18:01:03,436 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 18:01:03,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1835505390] [2022-10-16 18:01:03,436 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1835505390] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 18:01:03,436 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [88433597] [2022-10-16 18:01:03,436 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-10-16 18:01:03,437 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 18:01:03,437 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 18:01:03,438 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 18:01:03,438 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-10-16 18:01:03,622 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-10-16 18:01:03,622 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 18:01:03,624 INFO L263 TraceCheckSpWp]: Trace formula consists of 240 conjuncts, 50 conjunts are in the unsatisfiable core [2022-10-16 18:01:03,627 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 18:01:03,633 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 94 [2022-10-16 18:01:03,729 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 18 [2022-10-16 18:01:03,733 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-10-16 18:01:03,865 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-10-16 18:01:03,865 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 18:01:03,868 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 18:01:03,964 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-10-16 18:01:03,965 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 18:01:03,969 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-10-16 18:01:04,066 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-10-16 18:01:04,066 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 18:01:04,074 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 27 [2022-10-16 18:01:05,089 INFO L356 Elim1Store]: treesize reduction 108, result has 27.0 percent of original size [2022-10-16 18:01:05,090 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 49 treesize of output 65 [2022-10-16 18:01:05,103 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 52 [2022-10-16 18:01:05,987 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:01:05,988 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 76 treesize of output 128 [2022-10-16 18:01:06,447 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 15 proven. 44 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 18:01:06,447 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 18:01:06,715 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1972 (Array Int Int))) (< (let ((.cse1 (* |c_ULTIMATE.start_lis_~j~0#1| 4))) (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse0 (+ .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|))) 2147483647)) is different from false [2022-10-16 18:01:06,737 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1972 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse0 (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) is different from false [2022-10-16 18:01:06,749 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int)) (or (forall ((v_ArrVal_1972 (Array Int Int))) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647)) (not (<= (+ |c_ULTIMATE.start_lis_#t~post5#1| 1) |v_ULTIMATE.start_lis_~i~0#1_149|)))) is different from false [2022-10-16 18:01:06,766 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1972 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_149| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) is different from false [2022-10-16 18:01:06,829 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1972 (Array Int Int))) (or (< |v_ULTIMATE.start_lis_~i~0#1_149| 2) (< (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse0 (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse0 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647))) is different from false [2022-10-16 18:01:06,872 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1972 (Array Int Int)) (v_ArrVal_1969 (Array Int Int))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2))) is different from false [2022-10-16 18:01:06,892 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_152| Int)) (or (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_152|)) (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1972 (Array Int Int)) (v_ArrVal_1969 (Array Int Int))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2))))) is different from false [2022-10-16 18:01:06,922 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1972 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_152| Int) (v_ArrVal_1969 (Array Int Int))) (or (< (select (select (store (let ((.cse0 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_152| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2))) is different from false [2022-10-16 18:01:06,944 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1965 (Array Int Int)) (v_ArrVal_1972 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_152| Int) (v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1966 Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1966)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1965))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_152| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2))) is different from false [2022-10-16 18:01:06,975 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_153| Int)) (or (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1965 (Array Int Int)) (v_ArrVal_1972 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_152| Int) (v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1966 Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_153|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1966)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1965))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2) (< |v_ULTIMATE.start_lis_~i~0#1_152| (+ |v_ULTIMATE.start_lis_~i~0#1_153| 1)))) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_153|)))) is different from false [2022-10-16 18:01:07,032 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1965 (Array Int Int)) (v_ArrVal_1972 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_152| Int) (|v_ULTIMATE.start_lis_~i~0#1_153| Int) (v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1966 Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse2 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_153|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1966)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1965))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_153| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2) (< |v_ULTIMATE.start_lis_~i~0#1_152| (+ |v_ULTIMATE.start_lis_~i~0#1_153| 1)))) is different from false [2022-10-16 18:01:07,081 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1965 (Array Int Int)) (v_ArrVal_1963 (Array Int Int)) (v_ArrVal_1972 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_152| Int) (|v_ULTIMATE.start_lis_~i~0#1_153| Int) (v_ArrVal_1964 Int) (v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1966 Int)) (or (< (select (select (store (let ((.cse0 (store (let ((.cse2 (store (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |c_ULTIMATE.start_lis_~i~0#1|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1964)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1963))) (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_153|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1966))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1965))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_153| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2) (< |v_ULTIMATE.start_lis_~i~0#1_152| (+ |v_ULTIMATE.start_lis_~i~0#1_153| 1)))) is different from false [2022-10-16 18:01:07,144 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_154| Int)) (or (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1965 (Array Int Int)) (v_ArrVal_1963 (Array Int Int)) (v_ArrVal_1972 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_152| Int) (|v_ULTIMATE.start_lis_~i~0#1_153| Int) (v_ArrVal_1964 Int) (v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1966 Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_153| (+ |v_ULTIMATE.start_lis_~i~0#1_154| 1)) (< (select (select (store (let ((.cse0 (store (let ((.cse2 (store (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_154|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1964)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1963))) (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_153|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1966))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1965))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2) (< |v_ULTIMATE.start_lis_~i~0#1_152| (+ |v_ULTIMATE.start_lis_~i~0#1_153| 1)))) (not (<= (+ |c_ULTIMATE.start_lis_#t~post4#1| 1) |v_ULTIMATE.start_lis_~i~0#1_154|)))) is different from false [2022-10-16 18:01:07,234 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_lis_~i~0#1_149| Int) (v_ArrVal_1965 (Array Int Int)) (v_ArrVal_1963 (Array Int Int)) (v_ArrVal_1972 (Array Int Int)) (|v_ULTIMATE.start_lis_~i~0#1_152| Int) (|v_ULTIMATE.start_lis_~i~0#1_153| Int) (|v_ULTIMATE.start_lis_~i~0#1_154| Int) (v_ArrVal_1964 Int) (v_ArrVal_1969 (Array Int Int)) (v_ArrVal_1966 Int)) (or (< |v_ULTIMATE.start_lis_~i~0#1_153| (+ |v_ULTIMATE.start_lis_~i~0#1_154| 1)) (< (select (select (store (let ((.cse0 (store (let ((.cse2 (store (let ((.cse3 (store (store |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_154|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1964)) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1963))) (store .cse3 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse3 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_153|) |c_ULTIMATE.start_lis_~best~0#1.offset|) v_ArrVal_1966))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1965))) (store .cse2 |c_ULTIMATE.start_lis_~best~0#1.base| (store (select .cse2 |c_ULTIMATE.start_lis_~best~0#1.base|) (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_152|) |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1969))) (store .cse0 |c_ULTIMATE.start_lis_~best~0#1.base| (let ((.cse1 (select .cse0 |c_ULTIMATE.start_lis_~best~0#1.base|))) (store .cse1 (+ (* 4 |v_ULTIMATE.start_lis_~i~0#1_149|) |c_ULTIMATE.start_lis_~best~0#1.offset|) (+ (select .cse1 |c_ULTIMATE.start_lis_~best~0#1.offset|) 1))))) |c_ULTIMATE.start_lis_~prev~0#1.base| v_ArrVal_1972) |c_ULTIMATE.start_lis_~best~0#1.base|) (+ 4 |c_ULTIMATE.start_lis_~best~0#1.offset|)) 2147483647) (< |v_ULTIMATE.start_lis_~i~0#1_154| (+ |c_ULTIMATE.start_lis_~i~0#1| 1)) (< |v_ULTIMATE.start_lis_~i~0#1_149| 2) (< |v_ULTIMATE.start_lis_~i~0#1_152| (+ |v_ULTIMATE.start_lis_~i~0#1_153| 1)))) is different from false [2022-10-16 18:01:07,261 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:01:07,262 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 705 treesize of output 430 [2022-10-16 18:01:07,299 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 922 treesize of output 916 [2022-10-16 18:01:07,320 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:01:07,326 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 626 treesize of output 618 [2022-10-16 18:01:07,371 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1016 treesize of output 952 [2022-10-16 18:01:07,385 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:01:07,389 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 864 treesize of output 832 [2022-10-16 18:01:07,403 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:01:07,406 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 784 treesize of output 768 [2022-10-16 18:01:07,461 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 18:01:07,465 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 850 treesize of output 834 [2022-10-16 18:01:07,539 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 18:01:07,540 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 56979 treesize of output 55937 [2022-10-16 18:01:14,400 WARN L233 SmtUtils]: Spent 6.86s on a formula simplification. DAG size of input: 305 DAG size of output: 301 (called from [L 800] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)