/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Overflow-32bit-Automizer_Default.epf -i ../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-05d3305-m [2022-10-16 12:55:55,932 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-16 12:55:55,936 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-16 12:55:55,996 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-16 12:55:55,997 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-16 12:55:56,001 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-16 12:55:56,005 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-16 12:55:56,024 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-16 12:55:56,027 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-16 12:55:56,033 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-16 12:55:56,034 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-16 12:55:56,037 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-16 12:55:56,037 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-16 12:55:56,040 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-16 12:55:56,042 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-16 12:55:56,047 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-16 12:55:56,049 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-16 12:55:56,050 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-16 12:55:56,054 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-16 12:55:56,062 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-16 12:55:56,064 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-16 12:55:56,066 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-16 12:55:56,068 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-16 12:55:56,070 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-16 12:55:56,080 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-10-16 12:55:56,080 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-10-16 12:55:56,081 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-10-16 12:55:56,083 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-10-16 12:55:56,084 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-10-16 12:55:56,085 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-10-16 12:55:56,085 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-10-16 12:55:56,086 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-10-16 12:55:56,088 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-10-16 12:55:56,089 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-10-16 12:55:56,090 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-10-16 12:55:56,090 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-10-16 12:55:56,091 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-10-16 12:55:56,091 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-10-16 12:55:56,092 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-16 12:55:56,093 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-16 12:55:56,094 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-16 12:55:56,095 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Overflow-32bit-Automizer_Default.epf [2022-10-16 12:55:56,144 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-16 12:55:56,145 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-16 12:55:56,145 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-16 12:55:56,145 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-16 12:55:56,147 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-10-16 12:55:56,147 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-10-16 12:55:56,149 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-16 12:55:56,150 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-16 12:55:56,150 INFO L138 SettingsManager]: * Use SBE=true [2022-10-16 12:55:56,150 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-16 12:55:56,151 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-16 12:55:56,151 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-16 12:55:56,152 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-16 12:55:56,152 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-16 12:55:56,152 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-16 12:55:56,152 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-10-16 12:55:56,152 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-10-16 12:55:56,152 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-10-16 12:55:56,153 INFO L138 SettingsManager]: * Check absence of signed integer overflows=true [2022-10-16 12:55:56,153 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-16 12:55:56,153 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-16 12:55:56,153 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-16 12:55:56,153 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-10-16 12:55:56,154 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-16 12:55:56,154 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-16 12:55:56,154 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-10-16 12:55:56,154 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-16 12:55:56,154 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-16 12:55:56,155 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-10-16 12:55:56,155 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-10-16 12:55:56,155 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-16 12:55:56,155 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-10-16 12:55:56,155 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-10-16 12:55:56,156 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-10-16 12:55:56,519 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-16 12:55:56,544 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-16 12:55:56,547 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-16 12:55:56,548 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-16 12:55:56,549 INFO L275 PluginConnector]: CDTParser initialized [2022-10-16 12:55:56,550 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-10-16 12:55:56,616 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/57fbddeb3/54715332f5ca47d9b2a19ec40e4ba4a0/FLAGa3f3d8fbc [2022-10-16 12:55:57,582 INFO L306 CDTParser]: Found 1 translation units. [2022-10-16 12:55:57,582 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-10-16 12:55:57,642 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/57fbddeb3/54715332f5ca47d9b2a19ec40e4ba4a0/FLAGa3f3d8fbc [2022-10-16 12:55:58,053 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/57fbddeb3/54715332f5ca47d9b2a19ec40e4ba4a0 [2022-10-16 12:55:58,056 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-16 12:55:58,062 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-10-16 12:55:58,064 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-16 12:55:58,065 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-16 12:55:58,069 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-16 12:55:58,069 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.10 12:55:58" (1/1) ... [2022-10-16 12:55:58,071 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66e16476 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:55:58, skipping insertion in model container [2022-10-16 12:55:58,071 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.10 12:55:58" (1/1) ... [2022-10-16 12:55:58,079 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-16 12:55:58,200 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-16 12:55:59,782 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-10-16 12:55:59,832 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-16 12:55:59,877 INFO L203 MainTranslator]: Completed pre-run [2022-10-16 12:56:00,405 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-10-16 12:56:00,417 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-16 12:56:00,720 INFO L208 MainTranslator]: Completed translation [2022-10-16 12:56:00,722 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00 WrapperNode [2022-10-16 12:56:00,722 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-16 12:56:00,725 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-16 12:56:00,725 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-16 12:56:00,726 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-16 12:56:00,735 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:00,870 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,041 INFO L138 Inliner]: procedures = 200, calls = 1489, calls flagged for inlining = 98, calls inlined = 84, statements flattened = 3444 [2022-10-16 12:56:01,042 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-16 12:56:01,043 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-16 12:56:01,043 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-16 12:56:01,043 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-16 12:56:01,054 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,054 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,086 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,087 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,203 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,220 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,244 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,262 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,300 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-16 12:56:01,302 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-16 12:56:01,302 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-16 12:56:01,302 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-16 12:56:01,303 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (1/1) ... [2022-10-16 12:56:01,311 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-16 12:56:01,323 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:01,343 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-10-16 12:56:01,356 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-10-16 12:56:01,450 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-10-16 12:56:01,450 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-10-16 12:56:01,451 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-10-16 12:56:01,451 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-10-16 12:56:01,451 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-10-16 12:56:01,451 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-10-16 12:56:01,452 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2022-10-16 12:56:01,452 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2022-10-16 12:56:01,452 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-10-16 12:56:01,452 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-10-16 12:56:01,452 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2022-10-16 12:56:01,452 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2022-10-16 12:56:01,453 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-10-16 12:56:01,453 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-10-16 12:56:01,453 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2022-10-16 12:56:01,453 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2022-10-16 12:56:01,453 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2022-10-16 12:56:01,453 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_return_value [2022-10-16 12:56:01,454 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2022-10-16 12:56:01,454 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_on [2022-10-16 12:56:01,454 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2022-10-16 12:56:01,454 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2022-10-16 12:56:01,454 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-10-16 12:56:01,454 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-10-16 12:56:01,455 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-10-16 12:56:01,455 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-10-16 12:56:01,455 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-10-16 12:56:01,455 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-10-16 12:56:01,455 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-10-16 12:56:01,455 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-10-16 12:56:01,455 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2022-10-16 12:56:01,456 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2022-10-16 12:56:01,456 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2022-10-16 12:56:01,456 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2022-10-16 12:56:01,456 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-10-16 12:56:01,456 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-10-16 12:56:01,456 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_blast_assert [2022-10-16 12:56:01,456 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_blast_assert [2022-10-16 12:56:01,457 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-10-16 12:56:01,457 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-10-16 12:56:01,457 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-10-16 12:56:01,457 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-10-16 12:56:01,457 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2022-10-16 12:56:01,457 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2022-10-16 12:56:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-10-16 12:56:01,458 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-10-16 12:56:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2022-10-16 12:56:01,458 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2022-10-16 12:56:01,458 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-10-16 12:56:01,458 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-10-16 12:56:01,459 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_type_trans [2022-10-16 12:56:01,459 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_type_trans [2022-10-16 12:56:01,459 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-10-16 12:56:01,460 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-10-16 12:56:01,460 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2022-10-16 12:56:01,461 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2022-10-16 12:56:01,461 INFO L130 BoogieDeclarations]: Found specification of procedure farsync_type_trans [2022-10-16 12:56:01,461 INFO L138 BoogieDeclarations]: Found implementation of procedure farsync_type_trans [2022-10-16 12:56:01,461 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-10-16 12:56:01,462 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2022-10-16 12:56:01,462 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2022-10-16 12:56:01,462 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-10-16 12:56:01,463 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-10-16 12:56:01,463 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2022-10-16 12:56:01,463 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2022-10-16 12:56:01,463 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-10-16 12:56:01,463 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-10-16 12:56:01,464 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-10-16 12:56:01,464 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-10-16 12:56:01,465 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_hdlc [2022-10-16 12:56:01,465 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_hdlc [2022-10-16 12:56:01,466 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-10-16 12:56:01,466 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-10-16 12:56:01,467 INFO L130 BoogieDeclarations]: Found specification of procedure fst_issue_cmd [2022-10-16 12:56:01,467 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_issue_cmd [2022-10-16 12:56:01,467 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-10-16 12:56:01,467 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-10-16 12:56:01,467 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-10-16 12:56:01,467 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-10-16 12:56:01,467 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-10-16 12:56:01,468 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2022-10-16 12:56:01,468 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2022-10-16 12:56:01,468 INFO L130 BoogieDeclarations]: Found specification of procedure fst_disable_intr [2022-10-16 12:56:01,468 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_disable_intr [2022-10-16 12:56:01,468 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-10-16 12:56:01,468 INFO L130 BoogieDeclarations]: Found specification of procedure copy_from_user [2022-10-16 12:56:01,469 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_from_user [2022-10-16 12:56:01,469 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-10-16 12:56:01,470 INFO L130 BoogieDeclarations]: Found specification of procedure fst_cpureset [2022-10-16 12:56:01,470 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_cpureset [2022-10-16 12:56:01,470 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-10-16 12:56:01,470 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_schedule [2022-10-16 12:56:01,470 INFO L138 BoogieDeclarations]: Found implementation of procedure tasklet_schedule [2022-10-16 12:56:01,471 INFO L130 BoogieDeclarations]: Found specification of procedure fst_process_rx_status [2022-10-16 12:56:01,471 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_process_rx_status [2022-10-16 12:56:01,472 INFO L130 BoogieDeclarations]: Found specification of procedure fst_q_work_item [2022-10-16 12:56:01,472 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_q_work_item [2022-10-16 12:56:01,473 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-10-16 12:56:01,473 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-10-16 12:56:01,473 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-10-16 12:56:01,474 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-10-16 12:56:01,474 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2022-10-16 12:56:01,474 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2022-10-16 12:56:01,474 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_ioctl [2022-10-16 12:56:01,474 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_ioctl [2022-10-16 12:56:01,474 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-10-16 12:56:01,474 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-10-16 12:56:01,475 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-10-16 12:56:01,475 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-10-16 12:56:01,475 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-10-16 12:56:01,475 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-10-16 12:56:01,475 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2022-10-16 12:56:01,476 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2022-10-16 12:56:01,476 INFO L130 BoogieDeclarations]: Found specification of procedure fst_clear_intr [2022-10-16 12:56:01,476 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_clear_intr [2022-10-16 12:56:01,476 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-10-16 12:56:01,476 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2022-10-16 12:56:01,476 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2022-10-16 12:56:01,477 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2022-10-16 12:56:01,477 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2022-10-16 12:56:01,477 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2022-10-16 12:56:01,478 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2022-10-16 12:56:01,479 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2022-10-16 12:56:01,480 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2022-10-16 12:56:01,483 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-16 12:56:01,488 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-16 12:56:01,488 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-10-16 12:56:01,488 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-10-16 12:56:02,058 INFO L235 CfgBuilder]: Building ICFG [2022-10-16 12:56:02,062 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-16 12:56:02,735 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-16 12:56:02,744 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-16 12:56:02,755 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-16 12:56:02,755 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-16 12:56:02,758 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-16 12:56:02,758 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-16 12:56:02,771 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-10-16 12:56:05,597 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##252: assume !false; [2022-10-16 12:56:05,597 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##251: assume false; [2022-10-16 12:56:05,597 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##283: assume !false; [2022-10-16 12:56:05,597 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##282: assume false; [2022-10-16 12:56:05,598 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##289: assume !false; [2022-10-16 12:56:05,598 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##288: assume false; [2022-10-16 12:56:05,598 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##238: assume !false; [2022-10-16 12:56:05,598 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##237: assume false; [2022-10-16 12:56:05,598 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##438: assume false; [2022-10-16 12:56:05,598 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##439: assume !false; [2022-10-16 12:56:05,599 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-10-16 12:56:05,599 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-10-16 12:56:05,599 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##115: assume false; [2022-10-16 12:56:05,599 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##116: assume !false;call ULTIMATE.dealloc(fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset);havoc fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset;call ULTIMATE.dealloc(fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset);havoc fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset; [2022-10-16 12:56:05,682 INFO L276 CfgBuilder]: Performing block encoding [2022-10-16 12:56:05,699 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-16 12:56:05,700 INFO L300 CfgBuilder]: Removed 0 assume(true) statements. [2022-10-16 12:56:05,704 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.10 12:56:05 BoogieIcfgContainer [2022-10-16 12:56:05,704 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-16 12:56:05,706 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-10-16 12:56:05,706 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-10-16 12:56:05,710 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-10-16 12:56:05,710 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.10 12:55:58" (1/3) ... [2022-10-16 12:56:05,711 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cdb8166 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.10 12:56:05, skipping insertion in model container [2022-10-16 12:56:05,711 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 12:56:00" (2/3) ... [2022-10-16 12:56:05,712 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cdb8166 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.10 12:56:05, skipping insertion in model container [2022-10-16 12:56:05,712 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.10 12:56:05" (3/3) ... [2022-10-16 12:56:05,713 INFO L112 eAbstractionObserver]: Analyzing ICFG module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-10-16 12:56:05,734 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-10-16 12:56:05,734 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 82 error locations. [2022-10-16 12:56:05,824 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-10-16 12:56:05,831 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@58015e98, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-16 12:56:05,832 INFO L358 AbstractCegarLoop]: Starting to check reachability of 82 error locations. [2022-10-16 12:56:05,842 INFO L276 IsEmpty]: Start isEmpty. Operand has 1256 states, 857 states have (on average 1.380396732788798) internal successors, (1183), 946 states have internal predecessors, (1183), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) [2022-10-16 12:56:05,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2022-10-16 12:56:05,851 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:05,851 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2022-10-16 12:56:05,852 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:05,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:05,858 INFO L85 PathProgramCache]: Analyzing trace with hash 1104686478, now seen corresponding path program 1 times [2022-10-16 12:56:05,869 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:05,869 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666795417] [2022-10-16 12:56:05,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:05,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:06,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:06,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:06,480 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:06,481 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [666795417] [2022-10-16 12:56:06,481 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [666795417] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:06,482 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 12:56:06,482 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-16 12:56:06,484 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177316917] [2022-10-16 12:56:06,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:06,489 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:06,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:06,523 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:06,524 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 12:56:06,529 INFO L87 Difference]: Start difference. First operand has 1256 states, 857 states have (on average 1.380396732788798) internal successors, (1183), 946 states have internal predecessors, (1183), 260 states have call successors, (260), 56 states have call predecessors, (260), 56 states have return successors, (260), 260 states have call predecessors, (260), 260 states have call successors, (260) Second operand has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 12:56:06,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:06,823 INFO L93 Difference]: Finished difference Result 2463 states and 3413 transitions. [2022-10-16 12:56:06,825 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:06,826 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 6 [2022-10-16 12:56:06,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:06,863 INFO L225 Difference]: With dead ends: 2463 [2022-10-16 12:56:06,863 INFO L226 Difference]: Without dead ends: 1202 [2022-10-16 12:56:06,882 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 12:56:06,891 INFO L413 NwaCegarLoop]: 1635 mSDtfsCounter, 1 mSDsluCounter, 1631 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 3266 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:06,893 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 3266 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:06,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1202 states. [2022-10-16 12:56:07,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1202 to 1202. [2022-10-16 12:56:07,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1202 states, 851 states have (on average 1.3043478260869565) internal successors, (1110), 893 states have internal predecessors, (1110), 258 states have call successors, (258), 55 states have call predecessors, (258), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2022-10-16 12:56:07,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1202 states to 1202 states and 1626 transitions. [2022-10-16 12:56:07,072 INFO L78 Accepts]: Start accepts. Automaton has 1202 states and 1626 transitions. Word has length 6 [2022-10-16 12:56:07,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:07,072 INFO L495 AbstractCegarLoop]: Abstraction has 1202 states and 1626 transitions. [2022-10-16 12:56:07,073 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 12:56:07,073 INFO L276 IsEmpty]: Start isEmpty. Operand 1202 states and 1626 transitions. [2022-10-16 12:56:07,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-10-16 12:56:07,073 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:07,074 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:07,074 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-10-16 12:56:07,074 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:07,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:07,075 INFO L85 PathProgramCache]: Analyzing trace with hash 418497044, now seen corresponding path program 1 times [2022-10-16 12:56:07,075 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:07,076 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185489963] [2022-10-16 12:56:07,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:07,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:07,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:07,255 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 12:56:07,255 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:07,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185489963] [2022-10-16 12:56:07,258 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1185489963] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:07,258 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 12:56:07,258 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-16 12:56:07,258 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805033959] [2022-10-16 12:56:07,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:07,260 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:07,260 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:07,261 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:07,262 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 12:56:07,262 INFO L87 Difference]: Start difference. First operand 1202 states and 1626 transitions. Second operand has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 12:56:07,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:07,356 INFO L93 Difference]: Finished difference Result 1202 states and 1626 transitions. [2022-10-16 12:56:07,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:07,357 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-10-16 12:56:07,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:07,367 INFO L225 Difference]: With dead ends: 1202 [2022-10-16 12:56:07,367 INFO L226 Difference]: Without dead ends: 1201 [2022-10-16 12:56:07,368 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 12:56:07,371 INFO L413 NwaCegarLoop]: 1616 mSDtfsCounter, 2 mSDsluCounter, 1614 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 3230 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:07,372 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 3230 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:07,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1201 states. [2022-10-16 12:56:07,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1201 to 1201. [2022-10-16 12:56:07,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1201 states, 851 states have (on average 1.3031727379553466) internal successors, (1109), 892 states have internal predecessors, (1109), 258 states have call successors, (258), 55 states have call predecessors, (258), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2022-10-16 12:56:07,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1201 states to 1201 states and 1625 transitions. [2022-10-16 12:56:07,473 INFO L78 Accepts]: Start accepts. Automaton has 1201 states and 1625 transitions. Word has length 10 [2022-10-16 12:56:07,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:07,473 INFO L495 AbstractCegarLoop]: Abstraction has 1201 states and 1625 transitions. [2022-10-16 12:56:07,473 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 5.0) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 12:56:07,474 INFO L276 IsEmpty]: Start isEmpty. Operand 1201 states and 1625 transitions. [2022-10-16 12:56:07,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-10-16 12:56:07,474 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:07,474 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1] [2022-10-16 12:56:07,475 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-10-16 12:56:07,475 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:07,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:07,477 INFO L85 PathProgramCache]: Analyzing trace with hash 88507104, now seen corresponding path program 1 times [2022-10-16 12:56:07,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:07,477 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525424173] [2022-10-16 12:56:07,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:07,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:07,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:07,710 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:07,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:07,715 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525424173] [2022-10-16 12:56:07,715 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1525424173] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:07,716 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [69002436] [2022-10-16 12:56:07,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:07,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:07,717 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:07,722 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:07,744 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-10-16 12:56:08,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:08,173 INFO L263 TraceCheckSpWp]: Trace formula consists of 879 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 12:56:08,180 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:08,257 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:08,258 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:08,258 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [69002436] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:08,258 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:08,258 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [3] total 4 [2022-10-16 12:56:08,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8448513] [2022-10-16 12:56:08,259 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:08,259 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 12:56:08,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:08,260 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 12:56:08,260 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:08,261 INFO L87 Difference]: Start difference. First operand 1201 states and 1625 transitions. Second operand has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 12:56:08,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:08,370 INFO L93 Difference]: Finished difference Result 1201 states and 1625 transitions. [2022-10-16 12:56:08,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 12:56:08,371 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-10-16 12:56:08,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:08,380 INFO L225 Difference]: With dead ends: 1201 [2022-10-16 12:56:08,380 INFO L226 Difference]: Without dead ends: 1200 [2022-10-16 12:56:08,381 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:08,383 INFO L413 NwaCegarLoop]: 1615 mSDtfsCounter, 790 mSDsluCounter, 1208 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1011 SdHoareTripleChecker+Valid, 2823 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:08,383 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1011 Valid, 2823 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:08,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1200 states. [2022-10-16 12:56:08,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1200 to 1197. [2022-10-16 12:56:08,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1197 states, 848 states have (on average 1.303066037735849) internal successors, (1105), 888 states have internal predecessors, (1105), 258 states have call successors, (258), 55 states have call predecessors, (258), 55 states have return successors, (258), 258 states have call predecessors, (258), 258 states have call successors, (258) [2022-10-16 12:56:08,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1197 states to 1197 states and 1621 transitions. [2022-10-16 12:56:08,452 INFO L78 Accepts]: Start accepts. Automaton has 1197 states and 1621 transitions. Word has length 11 [2022-10-16 12:56:08,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:08,452 INFO L495 AbstractCegarLoop]: Abstraction has 1197 states and 1621 transitions. [2022-10-16 12:56:08,453 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 4 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 12:56:08,453 INFO L276 IsEmpty]: Start isEmpty. Operand 1197 states and 1621 transitions. [2022-10-16 12:56:08,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-10-16 12:56:08,455 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:08,455 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:08,495 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:08,668 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:08,669 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:08,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:08,671 INFO L85 PathProgramCache]: Analyzing trace with hash -1483835786, now seen corresponding path program 1 times [2022-10-16 12:56:08,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:08,671 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307053647] [2022-10-16 12:56:08,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:08,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:08,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:08,924 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:08,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:08,935 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:08,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:08,944 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-10-16 12:56:08,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:08,956 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:08,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:08,957 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307053647] [2022-10-16 12:56:08,959 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307053647] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:08,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1975568621] [2022-10-16 12:56:08,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:08,963 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:08,964 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:08,965 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:08,984 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-10-16 12:56:09,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:09,382 INFO L263 TraceCheckSpWp]: Trace formula consists of 1044 conjuncts, 2 conjunts are in the unsatisfiable core [2022-10-16 12:56:09,387 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:09,475 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 12:56:09,475 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:09,475 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1975568621] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:09,476 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:09,476 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [4] total 5 [2022-10-16 12:56:09,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127960146] [2022-10-16 12:56:09,476 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:09,477 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:09,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:09,482 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:09,482 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:09,483 INFO L87 Difference]: Start difference. First operand 1197 states and 1621 transitions. Second operand has 3 states, 2 states have (on average 15.0) internal successors, (30), 2 states have internal predecessors, (30), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:09,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:09,656 INFO L93 Difference]: Finished difference Result 3555 states and 4825 transitions. [2022-10-16 12:56:09,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:09,657 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 15.0) internal successors, (30), 2 states have internal predecessors, (30), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 36 [2022-10-16 12:56:09,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:09,674 INFO L225 Difference]: With dead ends: 3555 [2022-10-16 12:56:09,674 INFO L226 Difference]: Without dead ends: 2372 [2022-10-16 12:56:09,682 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:09,685 INFO L413 NwaCegarLoop]: 2199 mSDtfsCounter, 1578 mSDsluCounter, 1594 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1578 SdHoareTripleChecker+Valid, 3793 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:09,686 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1578 Valid, 3793 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:09,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2372 states. [2022-10-16 12:56:09,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2372 to 2339. [2022-10-16 12:56:09,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2339 states, 1679 states have (on average 1.302561048243002) internal successors, (2187), 1724 states have internal predecessors, (2187), 514 states have call successors, (514), 110 states have call predecessors, (514), 110 states have return successors, (514), 514 states have call predecessors, (514), 514 states have call successors, (514) [2022-10-16 12:56:09,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2339 states to 2339 states and 3215 transitions. [2022-10-16 12:56:09,842 INFO L78 Accepts]: Start accepts. Automaton has 2339 states and 3215 transitions. Word has length 36 [2022-10-16 12:56:09,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:09,843 INFO L495 AbstractCegarLoop]: Abstraction has 2339 states and 3215 transitions. [2022-10-16 12:56:09,843 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 15.0) internal successors, (30), 2 states have internal predecessors, (30), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:09,843 INFO L276 IsEmpty]: Start isEmpty. Operand 2339 states and 3215 transitions. [2022-10-16 12:56:09,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-10-16 12:56:09,852 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:09,852 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:09,892 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:10,066 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-10-16 12:56:10,066 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:10,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:10,067 INFO L85 PathProgramCache]: Analyzing trace with hash 1173277256, now seen corresponding path program 1 times [2022-10-16 12:56:10,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:10,068 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80829643] [2022-10-16 12:56:10,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:10,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:10,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:10,320 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:10,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:10,328 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:10,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:10,335 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:10,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:10,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [80829643] [2022-10-16 12:56:10,336 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [80829643] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:10,336 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1510694739] [2022-10-16 12:56:10,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:10,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:10,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:10,338 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:10,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-10-16 12:56:10,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:10,727 INFO L263 TraceCheckSpWp]: Trace formula consists of 1017 conjuncts, 2 conjunts are in the unsatisfiable core [2022-10-16 12:56:10,730 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:10,746 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 12:56:10,746 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:10,747 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1510694739] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:10,747 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:10,747 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2022-10-16 12:56:10,747 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701164094] [2022-10-16 12:56:10,748 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:10,748 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:10,748 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:10,749 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:10,749 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:10,749 INFO L87 Difference]: Start difference. First operand 2339 states and 3215 transitions. Second operand has 3 states, 2 states have (on average 16.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-10-16 12:56:13,551 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-10-16 12:56:13,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:13,639 INFO L93 Difference]: Finished difference Result 3949 states and 5648 transitions. [2022-10-16 12:56:13,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:13,639 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 16.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 36 [2022-10-16 12:56:13,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:13,667 INFO L225 Difference]: With dead ends: 3949 [2022-10-16 12:56:13,667 INFO L226 Difference]: Without dead ends: 3946 [2022-10-16 12:56:13,670 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:13,671 INFO L413 NwaCegarLoop]: 2392 mSDtfsCounter, 769 mSDsluCounter, 1720 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 7 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 988 SdHoareTripleChecker+Valid, 4112 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.7s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:13,672 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [988 Valid, 4112 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 39 Invalid, 1 Unknown, 0 Unchecked, 2.7s Time] [2022-10-16 12:56:13,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3946 states. [2022-10-16 12:56:13,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3946 to 2381. [2022-10-16 12:56:13,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2381 states, 1715 states have (on average 1.3032069970845481) internal successors, (2235), 1760 states have internal predecessors, (2235), 520 states have call successors, (520), 110 states have call predecessors, (520), 110 states have return successors, (520), 520 states have call predecessors, (520), 520 states have call successors, (520) [2022-10-16 12:56:13,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2381 states to 2381 states and 3275 transitions. [2022-10-16 12:56:13,855 INFO L78 Accepts]: Start accepts. Automaton has 2381 states and 3275 transitions. Word has length 36 [2022-10-16 12:56:13,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:13,855 INFO L495 AbstractCegarLoop]: Abstraction has 2381 states and 3275 transitions. [2022-10-16 12:56:13,855 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 16.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-10-16 12:56:13,856 INFO L276 IsEmpty]: Start isEmpty. Operand 2381 states and 3275 transitions. [2022-10-16 12:56:13,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-10-16 12:56:13,857 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:13,857 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:13,897 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:14,070 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:14,070 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:14,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:14,071 INFO L85 PathProgramCache]: Analyzing trace with hash 1245731589, now seen corresponding path program 1 times [2022-10-16 12:56:14,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:14,072 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231480826] [2022-10-16 12:56:14,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:14,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:14,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:14,296 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:14,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:14,303 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:14,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:14,310 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-10-16 12:56:14,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:14,318 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:14,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:14,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231480826] [2022-10-16 12:56:14,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1231480826] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:14,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1339160560] [2022-10-16 12:56:14,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:14,319 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:14,319 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:14,320 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:14,339 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-10-16 12:56:14,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:14,732 INFO L263 TraceCheckSpWp]: Trace formula consists of 1045 conjuncts, 2 conjunts are in the unsatisfiable core [2022-10-16 12:56:14,735 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:14,797 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 12:56:14,797 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:14,797 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1339160560] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:14,798 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:14,798 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [4] total 5 [2022-10-16 12:56:14,798 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427948931] [2022-10-16 12:56:14,799 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:14,799 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:14,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:14,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:14,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:14,801 INFO L87 Difference]: Start difference. First operand 2381 states and 3275 transitions. Second operand has 3 states, 2 states have (on average 15.5) internal successors, (31), 2 states have internal predecessors, (31), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:15,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:15,023 INFO L93 Difference]: Finished difference Result 3579 states and 4906 transitions. [2022-10-16 12:56:15,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:15,023 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 15.5) internal successors, (31), 2 states have internal predecessors, (31), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 37 [2022-10-16 12:56:15,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:15,048 INFO L225 Difference]: With dead ends: 3579 [2022-10-16 12:56:15,049 INFO L226 Difference]: Without dead ends: 3577 [2022-10-16 12:56:15,051 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:15,052 INFO L413 NwaCegarLoop]: 1886 mSDtfsCounter, 1580 mSDsluCounter, 1596 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1580 SdHoareTripleChecker+Valid, 3482 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:15,052 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1580 Valid, 3482 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:15,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3577 states. [2022-10-16 12:56:15,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3577 to 3544. [2022-10-16 12:56:15,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3544 states, 2565 states have (on average 1.3033138401559454) internal successors, (3343), 2614 states have internal predecessors, (3343), 779 states have call successors, (779), 165 states have call predecessors, (779), 165 states have return successors, (781), 779 states have call predecessors, (781), 779 states have call successors, (781) [2022-10-16 12:56:15,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3544 states to 3544 states and 4903 transitions. [2022-10-16 12:56:15,293 INFO L78 Accepts]: Start accepts. Automaton has 3544 states and 4903 transitions. Word has length 37 [2022-10-16 12:56:15,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:15,294 INFO L495 AbstractCegarLoop]: Abstraction has 3544 states and 4903 transitions. [2022-10-16 12:56:15,294 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 15.5) internal successors, (31), 2 states have internal predecessors, (31), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:15,294 INFO L276 IsEmpty]: Start isEmpty. Operand 3544 states and 4903 transitions. [2022-10-16 12:56:15,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-10-16 12:56:15,296 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:15,296 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:15,336 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:15,510 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:15,510 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:15,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:15,511 INFO L85 PathProgramCache]: Analyzing trace with hash 2011858329, now seen corresponding path program 1 times [2022-10-16 12:56:15,511 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:15,511 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75717490] [2022-10-16 12:56:15,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:15,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:15,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:15,692 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:15,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:15,698 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:15,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:15,707 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:15,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:15,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75717490] [2022-10-16 12:56:15,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [75717490] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:15,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [940791396] [2022-10-16 12:56:15,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:15,708 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:15,709 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:15,709 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:15,718 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-10-16 12:56:16,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:16,198 INFO L263 TraceCheckSpWp]: Trace formula consists of 1018 conjuncts, 2 conjunts are in the unsatisfiable core [2022-10-16 12:56:16,201 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:16,216 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 12:56:16,216 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:16,217 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [940791396] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:16,217 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:16,217 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2022-10-16 12:56:16,217 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275515210] [2022-10-16 12:56:16,217 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:16,218 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:16,218 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:16,218 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:16,218 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:16,219 INFO L87 Difference]: Start difference. First operand 3544 states and 4903 transitions. Second operand has 3 states, 2 states have (on average 16.5) internal successors, (33), 3 states have internal predecessors, (33), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-10-16 12:56:17,693 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.26s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-10-16 12:56:17,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:17,816 INFO L93 Difference]: Finished difference Result 5642 states and 8108 transitions. [2022-10-16 12:56:17,817 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:17,817 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 16.5) internal successors, (33), 3 states have internal predecessors, (33), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 37 [2022-10-16 12:56:17,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:17,859 INFO L225 Difference]: With dead ends: 5642 [2022-10-16 12:56:17,859 INFO L226 Difference]: Without dead ends: 5639 [2022-10-16 12:56:17,864 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:17,865 INFO L413 NwaCegarLoop]: 2486 mSDtfsCounter, 758 mSDsluCounter, 1649 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 970 SdHoareTripleChecker+Valid, 4135 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:17,866 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [970 Valid, 4135 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 25 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-10-16 12:56:17,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5639 states. [2022-10-16 12:56:18,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5639 to 3560. [2022-10-16 12:56:18,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3560 states, 2583 states have (on average 1.300038714672861) internal successors, (3358), 2630 states have internal predecessors, (3358), 779 states have call successors, (779), 165 states have call predecessors, (779), 165 states have return successors, (781), 779 states have call predecessors, (781), 779 states have call successors, (781) [2022-10-16 12:56:18,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3560 states to 3560 states and 4918 transitions. [2022-10-16 12:56:18,187 INFO L78 Accepts]: Start accepts. Automaton has 3560 states and 4918 transitions. Word has length 37 [2022-10-16 12:56:18,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:18,188 INFO L495 AbstractCegarLoop]: Abstraction has 3560 states and 4918 transitions. [2022-10-16 12:56:18,188 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 16.5) internal successors, (33), 3 states have internal predecessors, (33), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-10-16 12:56:18,188 INFO L276 IsEmpty]: Start isEmpty. Operand 3560 states and 4918 transitions. [2022-10-16 12:56:18,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-10-16 12:56:18,190 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:18,190 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:18,232 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:18,406 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:18,407 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:18,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:18,408 INFO L85 PathProgramCache]: Analyzing trace with hash -792137586, now seen corresponding path program 1 times [2022-10-16 12:56:18,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:18,409 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1045839367] [2022-10-16 12:56:18,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:18,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:18,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:18,629 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:18,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:18,638 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:18,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:18,649 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-10-16 12:56:18,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:18,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1045839367] [2022-10-16 12:56:18,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1045839367] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:18,650 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1903794351] [2022-10-16 12:56:18,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:18,650 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:18,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:18,652 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:18,664 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-10-16 12:56:19,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:19,053 INFO L263 TraceCheckSpWp]: Trace formula consists of 1027 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 12:56:19,057 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:19,110 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-10-16 12:56:19,110 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:19,110 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1903794351] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:19,111 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:19,111 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2022-10-16 12:56:19,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [284247110] [2022-10-16 12:56:19,111 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:19,112 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:19,112 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:19,112 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:19,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:19,113 INFO L87 Difference]: Start difference. First operand 3560 states and 4918 transitions. Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 2 states have internal predecessors, (34), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-10-16 12:56:19,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:19,390 INFO L93 Difference]: Finished difference Result 7077 states and 9776 transitions. [2022-10-16 12:56:19,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:19,391 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 2 states have internal predecessors, (34), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 41 [2022-10-16 12:56:19,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:19,415 INFO L225 Difference]: With dead ends: 7077 [2022-10-16 12:56:19,416 INFO L226 Difference]: Without dead ends: 3532 [2022-10-16 12:56:19,429 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:19,430 INFO L413 NwaCegarLoop]: 1607 mSDtfsCounter, 1577 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1577 SdHoareTripleChecker+Valid, 1607 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:19,430 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1577 Valid, 1607 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:19,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3532 states. [2022-10-16 12:56:19,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3532 to 3532. [2022-10-16 12:56:19,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3532 states, 2556 states have (on average 1.296165884194053) internal successors, (3313), 2602 states have internal predecessors, (3313), 779 states have call successors, (779), 165 states have call predecessors, (779), 165 states have return successors, (781), 779 states have call predecessors, (781), 779 states have call successors, (781) [2022-10-16 12:56:19,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3532 states to 3532 states and 4873 transitions. [2022-10-16 12:56:19,708 INFO L78 Accepts]: Start accepts. Automaton has 3532 states and 4873 transitions. Word has length 41 [2022-10-16 12:56:19,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:19,709 INFO L495 AbstractCegarLoop]: Abstraction has 3532 states and 4873 transitions. [2022-10-16 12:56:19,709 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 2 states have internal predecessors, (34), 1 states have call successors, (2), 1 states have call predecessors, (2), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2022-10-16 12:56:19,709 INFO L276 IsEmpty]: Start isEmpty. Operand 3532 states and 4873 transitions. [2022-10-16 12:56:19,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-10-16 12:56:19,710 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:19,711 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:19,757 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:19,925 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:19,925 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:19,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:19,926 INFO L85 PathProgramCache]: Analyzing trace with hash -1920352202, now seen corresponding path program 1 times [2022-10-16 12:56:19,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:19,927 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920456498] [2022-10-16 12:56:19,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:19,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:19,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:20,104 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:20,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:20,110 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:20,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:20,116 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-10-16 12:56:20,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:20,123 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-10-16 12:56:20,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:20,129 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:20,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:20,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920456498] [2022-10-16 12:56:20,130 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [920456498] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:20,130 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1935235202] [2022-10-16 12:56:20,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:20,130 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:20,130 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:20,131 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:20,158 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-10-16 12:56:20,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:20,555 INFO L263 TraceCheckSpWp]: Trace formula consists of 1066 conjuncts, 2 conjunts are in the unsatisfiable core [2022-10-16 12:56:20,558 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:20,615 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 12:56:20,615 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:20,615 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1935235202] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:20,615 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:20,616 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2022-10-16 12:56:20,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958522279] [2022-10-16 12:56:20,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:20,616 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:20,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:20,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:20,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:20,617 INFO L87 Difference]: Start difference. First operand 3532 states and 4873 transitions. Second operand has 3 states, 2 states have (on average 17.5) internal successors, (35), 3 states have internal predecessors, (35), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-10-16 12:56:21,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:21,008 INFO L93 Difference]: Finished difference Result 9102 states and 12836 transitions. [2022-10-16 12:56:21,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:21,009 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 17.5) internal successors, (35), 3 states have internal predecessors, (35), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 43 [2022-10-16 12:56:21,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:21,049 INFO L225 Difference]: With dead ends: 9102 [2022-10-16 12:56:21,049 INFO L226 Difference]: Without dead ends: 5585 [2022-10-16 12:56:21,064 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:21,065 INFO L413 NwaCegarLoop]: 1996 mSDtfsCounter, 724 mSDsluCounter, 1524 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 930 SdHoareTripleChecker+Valid, 3520 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:21,065 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [930 Valid, 3520 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:21,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5585 states. [2022-10-16 12:56:21,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5585 to 5568. [2022-10-16 12:56:21,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5568 states, 4041 states have (on average 1.3142786439000247) internal successors, (5311), 4089 states have internal predecessors, (5311), 1331 states have call successors, (1331), 165 states have call predecessors, (1331), 165 states have return successors, (1333), 1331 states have call predecessors, (1333), 1331 states have call successors, (1333) [2022-10-16 12:56:21,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5568 states to 5568 states and 7975 transitions. [2022-10-16 12:56:21,571 INFO L78 Accepts]: Start accepts. Automaton has 5568 states and 7975 transitions. Word has length 43 [2022-10-16 12:56:21,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:21,571 INFO L495 AbstractCegarLoop]: Abstraction has 5568 states and 7975 transitions. [2022-10-16 12:56:21,573 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 17.5) internal successors, (35), 3 states have internal predecessors, (35), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-10-16 12:56:21,573 INFO L276 IsEmpty]: Start isEmpty. Operand 5568 states and 7975 transitions. [2022-10-16 12:56:21,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-10-16 12:56:21,574 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:21,574 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:21,614 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:21,788 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:21,789 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:21,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:21,790 INFO L85 PathProgramCache]: Analyzing trace with hash 598624767, now seen corresponding path program 1 times [2022-10-16 12:56:21,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:21,791 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007937241] [2022-10-16 12:56:21,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:21,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:21,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:21,938 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:21,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:21,944 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:21,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:21,951 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-10-16 12:56:21,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:21,958 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 37 [2022-10-16 12:56:21,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:21,964 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:21,964 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:21,964 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2007937241] [2022-10-16 12:56:21,964 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2007937241] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:21,965 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [796152160] [2022-10-16 12:56:21,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:21,965 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:21,965 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:21,966 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:21,970 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-10-16 12:56:22,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:22,357 INFO L263 TraceCheckSpWp]: Trace formula consists of 1067 conjuncts, 2 conjunts are in the unsatisfiable core [2022-10-16 12:56:22,360 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:22,410 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 12:56:22,411 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:22,411 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [796152160] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:22,411 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:22,411 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2022-10-16 12:56:22,411 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821341519] [2022-10-16 12:56:22,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:22,412 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 12:56:22,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:22,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 12:56:22,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:22,413 INFO L87 Difference]: Start difference. First operand 5568 states and 7975 transitions. Second operand has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-10-16 12:56:22,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:22,819 INFO L93 Difference]: Finished difference Result 5568 states and 7975 transitions. [2022-10-16 12:56:22,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 12:56:22,820 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 44 [2022-10-16 12:56:22,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:22,844 INFO L225 Difference]: With dead ends: 5568 [2022-10-16 12:56:22,844 INFO L226 Difference]: Without dead ends: 5567 [2022-10-16 12:56:22,847 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-10-16 12:56:22,848 INFO L413 NwaCegarLoop]: 1598 mSDtfsCounter, 756 mSDsluCounter, 602 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 973 SdHoareTripleChecker+Valid, 2200 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:22,849 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [973 Valid, 2200 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 12:56:22,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5567 states. [2022-10-16 12:56:23,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5567 to 5567. [2022-10-16 12:56:23,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5567 states, 4041 states have (on average 1.3135362534026231) internal successors, (5308), 4088 states have internal predecessors, (5308), 1331 states have call successors, (1331), 165 states have call predecessors, (1331), 165 states have return successors, (1333), 1331 states have call predecessors, (1333), 1331 states have call successors, (1333) [2022-10-16 12:56:23,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5567 states to 5567 states and 7972 transitions. [2022-10-16 12:56:23,298 INFO L78 Accepts]: Start accepts. Automaton has 5567 states and 7972 transitions. Word has length 44 [2022-10-16 12:56:23,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:23,299 INFO L495 AbstractCegarLoop]: Abstraction has 5567 states and 7972 transitions. [2022-10-16 12:56:23,299 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 1 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-10-16 12:56:23,299 INFO L276 IsEmpty]: Start isEmpty. Operand 5567 states and 7972 transitions. [2022-10-16 12:56:23,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-10-16 12:56:23,301 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:23,301 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:23,344 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:23,515 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-10-16 12:56:23,516 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:23,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:23,517 INFO L85 PathProgramCache]: Analyzing trace with hash 88520672, now seen corresponding path program 1 times [2022-10-16 12:56:23,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:23,518 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118602078] [2022-10-16 12:56:23,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:23,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:23,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:23,663 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-10-16 12:56:23,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:23,670 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 13 [2022-10-16 12:56:23,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:23,682 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2022-10-16 12:56:23,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:23,690 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:23,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:23,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118602078] [2022-10-16 12:56:23,690 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2118602078] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:23,690 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2144548387] [2022-10-16 12:56:23,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:23,691 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:23,691 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:23,692 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:23,708 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-10-16 12:56:24,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:24,118 INFO L263 TraceCheckSpWp]: Trace formula consists of 1094 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 12:56:24,122 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:24,144 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:24,145 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 12:56:24,192 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:24,192 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2144548387] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 12:56:24,192 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 12:56:24,192 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 8 [2022-10-16 12:56:24,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395269809] [2022-10-16 12:56:24,193 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 12:56:24,195 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-10-16 12:56:24,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:24,196 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-10-16 12:56:24,196 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2022-10-16 12:56:24,196 INFO L87 Difference]: Start difference. First operand 5567 states and 7972 transitions. Second operand has 8 states, 8 states have (on average 7.375) internal successors, (59), 7 states have internal predecessors, (59), 1 states have call successors, (7), 3 states have call predecessors, (7), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-10-16 12:56:26,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:26,596 INFO L93 Difference]: Finished difference Result 11156 states and 16001 transitions. [2022-10-16 12:56:26,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-16 12:56:26,596 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 7.375) internal successors, (59), 7 states have internal predecessors, (59), 1 states have call successors, (7), 3 states have call predecessors, (7), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 46 [2022-10-16 12:56:26,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:26,632 INFO L225 Difference]: With dead ends: 11156 [2022-10-16 12:56:26,632 INFO L226 Difference]: Without dead ends: 5597 [2022-10-16 12:56:26,657 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2022-10-16 12:56:26,658 INFO L413 NwaCegarLoop]: 1571 mSDtfsCounter, 276 mSDsluCounter, 2925 mSDsCounter, 0 mSdLazyCounter, 1389 mSolverCounterSat, 263 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 304 SdHoareTripleChecker+Valid, 4496 SdHoareTripleChecker+Invalid, 1652 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 263 IncrementalHoareTripleChecker+Valid, 1389 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:26,659 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [304 Valid, 4496 Invalid, 1652 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [263 Valid, 1389 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-10-16 12:56:26,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5597 states. [2022-10-16 12:56:27,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5597 to 5579. [2022-10-16 12:56:27,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5579 states, 4053 states have (on average 1.3126079447322971) internal successors, (5320), 4100 states have internal predecessors, (5320), 1331 states have call successors, (1331), 165 states have call predecessors, (1331), 165 states have return successors, (1333), 1331 states have call predecessors, (1333), 1331 states have call successors, (1333) [2022-10-16 12:56:27,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5579 states to 5579 states and 7984 transitions. [2022-10-16 12:56:27,167 INFO L78 Accepts]: Start accepts. Automaton has 5579 states and 7984 transitions. Word has length 46 [2022-10-16 12:56:27,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:27,168 INFO L495 AbstractCegarLoop]: Abstraction has 5579 states and 7984 transitions. [2022-10-16 12:56:27,168 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 7.375) internal successors, (59), 7 states have internal predecessors, (59), 1 states have call successors, (7), 3 states have call predecessors, (7), 2 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-10-16 12:56:27,168 INFO L276 IsEmpty]: Start isEmpty. Operand 5579 states and 7984 transitions. [2022-10-16 12:56:27,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-10-16 12:56:27,170 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:27,170 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:27,209 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:27,383 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:27,383 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:27,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:27,384 INFO L85 PathProgramCache]: Analyzing trace with hash -1435737486, now seen corresponding path program 2 times [2022-10-16 12:56:27,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:27,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245482081] [2022-10-16 12:56:27,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:27,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:27,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:27,630 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-10-16 12:56:27,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:27,637 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-10-16 12:56:27,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:27,650 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-10-16 12:56:27,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:27,657 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:27,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:27,657 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1245482081] [2022-10-16 12:56:27,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1245482081] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:27,658 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [159974788] [2022-10-16 12:56:27,658 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 12:56:27,658 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:27,658 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:27,659 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:27,662 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-10-16 12:56:28,022 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-10-16 12:56:28,022 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 12:56:28,028 INFO L263 TraceCheckSpWp]: Trace formula consists of 1077 conjuncts, 37 conjunts are in the unsatisfiable core [2022-10-16 12:56:28,032 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:28,147 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-10-16 12:56:28,147 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 12:56:28,147 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [159974788] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:28,148 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 12:56:28,148 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [8] total 14 [2022-10-16 12:56:28,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1537738597] [2022-10-16 12:56:28,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:28,149 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-10-16 12:56:28,149 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:28,149 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-10-16 12:56:28,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2022-10-16 12:56:28,150 INFO L87 Difference]: Start difference. First operand 5579 states and 7984 transitions. Second operand has 8 states, 8 states have (on average 5.0) internal successors, (40), 7 states have internal predecessors, (40), 1 states have call successors, (3), 1 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:30,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:30,739 INFO L93 Difference]: Finished difference Result 14575 states and 21207 transitions. [2022-10-16 12:56:30,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-10-16 12:56:30,739 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 7 states have internal predecessors, (40), 1 states have call successors, (3), 1 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 58 [2022-10-16 12:56:30,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:30,780 INFO L225 Difference]: With dead ends: 14575 [2022-10-16 12:56:30,781 INFO L226 Difference]: Without dead ends: 9023 [2022-10-16 12:56:30,858 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=219, Unknown=0, NotChecked=0, Total=272 [2022-10-16 12:56:30,859 INFO L413 NwaCegarLoop]: 2545 mSDtfsCounter, 2502 mSDsluCounter, 12077 mSDsCounter, 0 mSdLazyCounter, 99 mSolverCounterSat, 692 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2502 SdHoareTripleChecker+Valid, 14622 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 692 IncrementalHoareTripleChecker+Valid, 99 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:30,860 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [2502 Valid, 14622 Invalid, 791 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [692 Valid, 99 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-10-16 12:56:30,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9023 states. [2022-10-16 12:56:31,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9023 to 5615. [2022-10-16 12:56:31,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5615 states, 4086 states have (on average 1.3100832109642682) internal successors, (5353), 4130 states have internal predecessors, (5353), 1331 states have call successors, (1331), 165 states have call predecessors, (1331), 168 states have return successors, (1360), 1337 states have call predecessors, (1360), 1331 states have call successors, (1360) [2022-10-16 12:56:31,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5615 states to 5615 states and 8044 transitions. [2022-10-16 12:56:31,534 INFO L78 Accepts]: Start accepts. Automaton has 5615 states and 8044 transitions. Word has length 58 [2022-10-16 12:56:31,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:31,535 INFO L495 AbstractCegarLoop]: Abstraction has 5615 states and 8044 transitions. [2022-10-16 12:56:31,535 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.0) internal successors, (40), 7 states have internal predecessors, (40), 1 states have call successors, (3), 1 states have call predecessors, (3), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:31,535 INFO L276 IsEmpty]: Start isEmpty. Operand 5615 states and 8044 transitions. [2022-10-16 12:56:31,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-10-16 12:56:31,538 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:31,538 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:31,579 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:31,752 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-10-16 12:56:31,753 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ldv_module_putErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:31,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:31,754 INFO L85 PathProgramCache]: Analyzing trace with hash -1065299952, now seen corresponding path program 1 times [2022-10-16 12:56:31,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:31,755 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827606617] [2022-10-16 12:56:31,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:31,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:31,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:32,116 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-10-16 12:56:32,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:32,128 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-10-16 12:56:32,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:32,142 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 38 [2022-10-16 12:56:32,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:32,155 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-10-16 12:56:32,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:32,155 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827606617] [2022-10-16 12:56:32,155 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [827606617] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 12:56:32,156 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 12:56:32,156 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 12:56:32,156 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89378599] [2022-10-16 12:56:32,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 12:56:32,157 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 12:56:32,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:32,158 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 12:56:32,158 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 12:56:32,159 INFO L87 Difference]: Start difference. First operand 5615 states and 8044 transitions. Second operand has 4 states, 3 states have (on average 13.666666666666666) internal successors, (41), 4 states have internal predecessors, (41), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:33,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:33,955 INFO L93 Difference]: Finished difference Result 9379 states and 13392 transitions. [2022-10-16 12:56:33,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 12:56:33,956 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 13.666666666666666) internal successors, (41), 4 states have internal predecessors, (41), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 60 [2022-10-16 12:56:33,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:33,995 INFO L225 Difference]: With dead ends: 9379 [2022-10-16 12:56:33,996 INFO L226 Difference]: Without dead ends: 9377 [2022-10-16 12:56:34,000 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 12:56:34,001 INFO L413 NwaCegarLoop]: 2499 mSDtfsCounter, 3169 mSDsluCounter, 2906 mSDsCounter, 0 mSdLazyCounter, 533 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3169 SdHoareTripleChecker+Valid, 5405 SdHoareTripleChecker+Invalid, 540 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 533 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:34,001 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3169 Valid, 5405 Invalid, 540 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 533 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-10-16 12:56:34,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9377 states. [2022-10-16 12:56:34,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9377 to 9321. [2022-10-16 12:56:34,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9321 states, 6794 states have (on average 1.3104209596702974) internal successors, (8903), 6848 states have internal predecessors, (8903), 2217 states have call successors, (2217), 275 states have call predecessors, (2217), 280 states have return successors, (2266), 2227 states have call predecessors, (2266), 2217 states have call successors, (2266) [2022-10-16 12:56:34,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9321 states to 9321 states and 13386 transitions. [2022-10-16 12:56:34,851 INFO L78 Accepts]: Start accepts. Automaton has 9321 states and 13386 transitions. Word has length 60 [2022-10-16 12:56:34,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:34,851 INFO L495 AbstractCegarLoop]: Abstraction has 9321 states and 13386 transitions. [2022-10-16 12:56:34,851 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 13.666666666666666) internal successors, (41), 4 states have internal predecessors, (41), 2 states have call successors, (4), 2 states have call predecessors, (4), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2022-10-16 12:56:34,852 INFO L276 IsEmpty]: Start isEmpty. Operand 9321 states and 13386 transitions. [2022-10-16 12:56:34,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-10-16 12:56:34,854 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:34,854 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:34,854 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-10-16 12:56:34,855 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:34,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:34,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1611401906, now seen corresponding path program 1 times [2022-10-16 12:56:34,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:34,855 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402600627] [2022-10-16 12:56:34,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:34,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:34,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:35,095 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 20 [2022-10-16 12:56:35,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:35,101 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 25 [2022-10-16 12:56:35,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:35,114 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2022-10-16 12:56:35,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:35,127 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-10-16 12:56:35,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:35,132 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:35,132 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:35,132 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402600627] [2022-10-16 12:56:35,132 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [402600627] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:35,132 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [46321072] [2022-10-16 12:56:35,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:35,133 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:35,134 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:35,135 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:35,154 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-10-16 12:56:35,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:35,578 INFO L263 TraceCheckSpWp]: Trace formula consists of 1182 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-16 12:56:35,580 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:35,627 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:35,627 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 12:56:35,733 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:35,734 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [46321072] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 12:56:35,734 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 12:56:35,734 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-10-16 12:56:35,735 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387297966] [2022-10-16 12:56:35,735 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 12:56:35,736 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-10-16 12:56:35,736 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:35,736 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-10-16 12:56:35,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2022-10-16 12:56:35,737 INFO L87 Difference]: Start difference. First operand 9321 states and 13386 transitions. Second operand has 14 states, 14 states have (on average 6.642857142857143) internal successors, (93), 13 states have internal predecessors, (93), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-10-16 12:56:38,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:38,424 INFO L93 Difference]: Finished difference Result 18666 states and 26816 transitions. [2022-10-16 12:56:38,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-10-16 12:56:38,424 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 6.642857142857143) internal successors, (93), 13 states have internal predecessors, (93), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 65 [2022-10-16 12:56:38,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:38,467 INFO L225 Difference]: With dead ends: 18666 [2022-10-16 12:56:38,468 INFO L226 Difference]: Without dead ends: 9365 [2022-10-16 12:56:38,504 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2022-10-16 12:56:38,505 INFO L413 NwaCegarLoop]: 1571 mSDtfsCounter, 309 mSDsluCounter, 1854 mSDsCounter, 0 mSdLazyCounter, 882 mSolverCounterSat, 268 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 337 SdHoareTripleChecker+Valid, 3425 SdHoareTripleChecker+Invalid, 1150 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 268 IncrementalHoareTripleChecker+Valid, 882 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:38,506 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [337 Valid, 3425 Invalid, 1150 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [268 Valid, 882 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-10-16 12:56:38,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9365 states. [2022-10-16 12:56:39,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9365 to 9345. [2022-10-16 12:56:39,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9345 states, 6818 states have (on average 1.3093282487533) internal successors, (8927), 6872 states have internal predecessors, (8927), 2217 states have call successors, (2217), 275 states have call predecessors, (2217), 280 states have return successors, (2266), 2227 states have call predecessors, (2266), 2217 states have call successors, (2266) [2022-10-16 12:56:39,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9345 states to 9345 states and 13410 transitions. [2022-10-16 12:56:39,607 INFO L78 Accepts]: Start accepts. Automaton has 9345 states and 13410 transitions. Word has length 65 [2022-10-16 12:56:39,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:39,607 INFO L495 AbstractCegarLoop]: Abstraction has 9345 states and 13410 transitions. [2022-10-16 12:56:39,607 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 6.642857142857143) internal successors, (93), 13 states have internal predecessors, (93), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-10-16 12:56:39,607 INFO L276 IsEmpty]: Start isEmpty. Operand 9345 states and 13410 transitions. [2022-10-16 12:56:39,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-10-16 12:56:39,610 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:39,610 INFO L195 NwaCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:39,648 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:39,823 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-10-16 12:56:39,823 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:39,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:39,825 INFO L85 PathProgramCache]: Analyzing trace with hash -711465458, now seen corresponding path program 2 times [2022-10-16 12:56:39,825 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:39,825 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [485416117] [2022-10-16 12:56:39,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:39,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:39,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:40,509 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2022-10-16 12:56:40,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:40,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 49 [2022-10-16 12:56:40,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:40,527 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2022-10-16 12:56:40,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:40,535 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-10-16 12:56:40,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:40,540 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:40,540 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:40,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [485416117] [2022-10-16 12:56:40,540 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [485416117] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:40,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [571243520] [2022-10-16 12:56:40,541 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 12:56:40,541 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:40,541 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:40,542 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:40,548 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-10-16 12:56:41,015 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-16 12:56:41,015 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 12:56:41,023 INFO L263 TraceCheckSpWp]: Trace formula consists of 1284 conjuncts, 12 conjunts are in the unsatisfiable core [2022-10-16 12:56:41,027 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:56:41,100 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:41,100 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 12:56:41,371 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:41,371 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [571243520] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 12:56:41,372 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 12:56:41,372 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-10-16 12:56:41,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [600449265] [2022-10-16 12:56:41,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 12:56:41,373 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-10-16 12:56:41,373 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:56:41,374 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-10-16 12:56:41,374 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=348, Unknown=0, NotChecked=0, Total=650 [2022-10-16 12:56:41,374 INFO L87 Difference]: Start difference. First operand 9345 states and 13410 transitions. Second operand has 26 states, 26 states have (on average 5.423076923076923) internal successors, (141), 25 states have internal predecessors, (141), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-10-16 12:56:44,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:56:44,347 INFO L93 Difference]: Finished difference Result 18714 states and 26870 transitions. [2022-10-16 12:56:44,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-10-16 12:56:44,352 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 5.423076923076923) internal successors, (141), 25 states have internal predecessors, (141), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 89 [2022-10-16 12:56:44,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:56:44,496 INFO L225 Difference]: With dead ends: 18714 [2022-10-16 12:56:44,497 INFO L226 Difference]: Without dead ends: 9413 [2022-10-16 12:56:44,518 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 173 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=302, Invalid=348, Unknown=0, NotChecked=0, Total=650 [2022-10-16 12:56:44,519 INFO L413 NwaCegarLoop]: 1571 mSDtfsCounter, 363 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 1996 mSolverCounterSat, 275 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 391 SdHoareTripleChecker+Valid, 5567 SdHoareTripleChecker+Invalid, 2271 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 275 IncrementalHoareTripleChecker+Valid, 1996 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:56:44,520 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [391 Valid, 5567 Invalid, 2271 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [275 Valid, 1996 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time] [2022-10-16 12:56:44,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9413 states. [2022-10-16 12:56:45,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9413 to 9393. [2022-10-16 12:56:45,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9393 states, 6866 states have (on average 1.3071657442470144) internal successors, (8975), 6920 states have internal predecessors, (8975), 2217 states have call successors, (2217), 275 states have call predecessors, (2217), 280 states have return successors, (2266), 2227 states have call predecessors, (2266), 2217 states have call successors, (2266) [2022-10-16 12:56:45,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9393 states to 9393 states and 13458 transitions. [2022-10-16 12:56:45,659 INFO L78 Accepts]: Start accepts. Automaton has 9393 states and 13458 transitions. Word has length 89 [2022-10-16 12:56:45,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:56:45,660 INFO L495 AbstractCegarLoop]: Abstraction has 9393 states and 13458 transitions. [2022-10-16 12:56:45,660 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 5.423076923076923) internal successors, (141), 25 states have internal predecessors, (141), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-10-16 12:56:45,660 INFO L276 IsEmpty]: Start isEmpty. Operand 9393 states and 13458 transitions. [2022-10-16 12:56:45,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2022-10-16 12:56:45,672 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:56:45,672 INFO L195 NwaCegarLoop]: trace histogram [22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:56:45,714 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-10-16 12:56:45,885 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-10-16 12:56:45,887 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:56:45,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:56:45,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1927569210, now seen corresponding path program 3 times [2022-10-16 12:56:45,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:56:45,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522872124] [2022-10-16 12:56:45,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:56:45,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:56:45,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:47,307 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2022-10-16 12:56:47,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:47,313 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 97 [2022-10-16 12:56:47,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:47,336 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 117 [2022-10-16 12:56:47,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:47,347 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-10-16 12:56:47,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 12:56:47,354 INFO L134 CoverageAnalysis]: Checked inductivity of 946 backedges. 0 proven. 946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:56:47,354 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 12:56:47,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [522872124] [2022-10-16 12:56:47,354 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [522872124] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 12:56:47,354 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1610762503] [2022-10-16 12:56:47,355 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-10-16 12:56:47,355 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 12:56:47,355 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 12:56:47,356 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 12:56:47,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-10-16 12:57:37,402 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2022-10-16 12:57:37,402 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 12:57:37,461 INFO L263 TraceCheckSpWp]: Trace formula consists of 1488 conjuncts, 24 conjunts are in the unsatisfiable core [2022-10-16 12:57:37,466 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 12:57:37,634 INFO L134 CoverageAnalysis]: Checked inductivity of 946 backedges. 0 proven. 946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:57:37,634 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 12:57:38,286 INFO L134 CoverageAnalysis]: Checked inductivity of 946 backedges. 0 proven. 946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 12:57:38,287 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1610762503] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 12:57:38,287 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 12:57:38,287 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 25] total 36 [2022-10-16 12:57:38,287 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [142654129] [2022-10-16 12:57:38,288 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 12:57:38,288 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-10-16 12:57:38,289 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 12:57:38,289 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-10-16 12:57:38,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=597, Invalid=663, Unknown=0, NotChecked=0, Total=1260 [2022-10-16 12:57:38,290 INFO L87 Difference]: Start difference. First operand 9393 states and 13458 transitions. Second operand has 36 states, 36 states have (on average 5.138888888888889) internal successors, (185), 35 states have internal predecessors, (185), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-10-16 12:57:41,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 12:57:41,159 INFO L93 Difference]: Finished difference Result 18754 states and 26908 transitions. [2022-10-16 12:57:41,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-10-16 12:57:41,160 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 5.138888888888889) internal successors, (185), 35 states have internal predecessors, (185), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 137 [2022-10-16 12:57:41,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 12:57:41,203 INFO L225 Difference]: With dead ends: 18754 [2022-10-16 12:57:41,203 INFO L226 Difference]: Without dead ends: 9453 [2022-10-16 12:57:41,231 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 257 SyntacticMatches, 14 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=597, Invalid=663, Unknown=0, NotChecked=0, Total=1260 [2022-10-16 12:57:41,232 INFO L413 NwaCegarLoop]: 1571 mSDtfsCounter, 360 mSDsluCounter, 3996 mSDsCounter, 0 mSdLazyCounter, 2036 mSolverCounterSat, 266 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 388 SdHoareTripleChecker+Valid, 5567 SdHoareTripleChecker+Invalid, 2302 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 266 IncrementalHoareTripleChecker+Valid, 2036 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time [2022-10-16 12:57:41,232 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [388 Valid, 5567 Invalid, 2302 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [266 Valid, 2036 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time] [2022-10-16 12:57:41,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9453 states. [2022-10-16 12:57:42,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9453 to 9433. [2022-10-16 12:57:42,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9433 states, 6906 states have (on average 1.3053866203301476) internal successors, (9015), 6960 states have internal predecessors, (9015), 2217 states have call successors, (2217), 275 states have call predecessors, (2217), 280 states have return successors, (2266), 2227 states have call predecessors, (2266), 2217 states have call successors, (2266) [2022-10-16 12:57:42,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9433 states to 9433 states and 13498 transitions. [2022-10-16 12:57:42,213 INFO L78 Accepts]: Start accepts. Automaton has 9433 states and 13498 transitions. Word has length 137 [2022-10-16 12:57:42,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 12:57:42,213 INFO L495 AbstractCegarLoop]: Abstraction has 9433 states and 13498 transitions. [2022-10-16 12:57:42,213 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 5.138888888888889) internal successors, (185), 35 states have internal predecessors, (185), 2 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2022-10-16 12:57:42,213 INFO L276 IsEmpty]: Start isEmpty. Operand 9433 states and 13498 transitions. [2022-10-16 12:57:42,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2022-10-16 12:57:42,217 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 12:57:42,217 INFO L195 NwaCegarLoop]: trace histogram [32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:57:42,256 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-10-16 12:57:42,418 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-10-16 12:57:42,418 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW === [fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 79 more)] === [2022-10-16 12:57:42,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 12:57:42,419 INFO L85 PathProgramCache]: Analyzing trace with hash 1428656394, now seen corresponding path program 4 times [2022-10-16 12:57:42,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 12:57:42,420 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170784327] [2022-10-16 12:57:42,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 12:57:42,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 12:57:42,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-16 12:57:42,717 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-16 12:57:43,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-16 12:57:43,228 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-16 12:57:43,229 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-10-16 12:57:43,230 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW (81 of 82 remaining) [2022-10-16 12:57:43,232 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr0ASSERT_VIOLATIONINTEGER_OVERFLOW (80 of 82 remaining) [2022-10-16 12:57:43,233 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr1ASSERT_VIOLATIONINTEGER_OVERFLOW (79 of 82 remaining) [2022-10-16 12:57:43,233 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (78 of 82 remaining) [2022-10-16 12:57:43,233 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr3ASSERT_VIOLATIONINTEGER_OVERFLOW (77 of 82 remaining) [2022-10-16 12:57:43,233 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr4ASSERT_VIOLATIONINTEGER_OVERFLOW (76 of 82 remaining) [2022-10-16 12:57:43,234 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr5ASSERT_VIOLATIONINTEGER_OVERFLOW (75 of 82 remaining) [2022-10-16 12:57:43,234 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr6ASSERT_VIOLATIONINTEGER_OVERFLOW (74 of 82 remaining) [2022-10-16 12:57:43,234 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr7ASSERT_VIOLATIONINTEGER_OVERFLOW (73 of 82 remaining) [2022-10-16 12:57:43,234 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr8ASSERT_VIOLATIONINTEGER_OVERFLOW (72 of 82 remaining) [2022-10-16 12:57:43,234 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr9ASSERT_VIOLATIONINTEGER_OVERFLOW (71 of 82 remaining) [2022-10-16 12:57:43,234 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr10ASSERT_VIOLATIONINTEGER_OVERFLOW (70 of 82 remaining) [2022-10-16 12:57:43,235 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr11ASSERT_VIOLATIONINTEGER_OVERFLOW (69 of 82 remaining) [2022-10-16 12:57:43,235 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr12ASSERT_VIOLATIONINTEGER_OVERFLOW (68 of 82 remaining) [2022-10-16 12:57:43,235 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_cpuresetErr13ASSERT_VIOLATIONINTEGER_OVERFLOW (67 of 82 remaining) [2022-10-16 12:57:43,238 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_issue_cmdErr0ASSERT_VIOLATIONINTEGER_OVERFLOW (66 of 82 remaining) [2022-10-16 12:57:43,238 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_issue_cmdErr1ASSERT_VIOLATIONINTEGER_OVERFLOW (65 of 82 remaining) [2022-10-16 12:57:43,238 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_q_work_itemErr0ASSERT_VIOLATIONINTEGER_OVERFLOW (64 of 82 remaining) [2022-10-16 12:57:43,238 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_q_work_itemErr1ASSERT_VIOLATIONINTEGER_OVERFLOW (63 of 82 remaining) [2022-10-16 12:57:43,239 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_module_putErr0ASSERT_VIOLATIONINTEGER_OVERFLOW (62 of 82 remaining) [2022-10-16 12:57:43,239 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ldv_module_putErr1ASSERT_VIOLATIONINTEGER_OVERFLOW (61 of 82 remaining) [2022-10-16 12:57:43,239 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_disable_intrErr0ASSERT_VIOLATIONINTEGER_OVERFLOW (60 of 82 remaining) [2022-10-16 12:57:43,239 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_disable_intrErr1ASSERT_VIOLATIONINTEGER_OVERFLOW (59 of 82 remaining) [2022-10-16 12:57:43,240 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_disable_intrErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (58 of 82 remaining) [2022-10-16 12:57:43,240 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_disable_intrErr3ASSERT_VIOLATIONINTEGER_OVERFLOW (57 of 82 remaining) [2022-10-16 12:57:43,241 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_clear_intrErr0ASSERT_VIOLATIONINTEGER_OVERFLOW (56 of 82 remaining) [2022-10-16 12:57:43,241 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location fst_clear_intrErr1ASSERT_VIOLATIONINTEGER_OVERFLOW (55 of 82 remaining) [2022-10-16 12:57:43,241 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW (54 of 82 remaining) [2022-10-16 12:57:43,241 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW (53 of 82 remaining) [2022-10-16 12:57:43,241 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (52 of 82 remaining) [2022-10-16 12:57:43,242 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW (51 of 82 remaining) [2022-10-16 12:57:43,242 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW (50 of 82 remaining) [2022-10-16 12:57:43,242 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW (49 of 82 remaining) [2022-10-16 12:57:43,242 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW (48 of 82 remaining) [2022-10-16 12:57:43,242 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW (47 of 82 remaining) [2022-10-16 12:57:43,243 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW (46 of 82 remaining) [2022-10-16 12:57:43,243 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW (45 of 82 remaining) [2022-10-16 12:57:43,243 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW (44 of 82 remaining) [2022-10-16 12:57:43,243 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW (43 of 82 remaining) [2022-10-16 12:57:43,243 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW (42 of 82 remaining) [2022-10-16 12:57:43,243 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW (41 of 82 remaining) [2022-10-16 12:57:43,244 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW (40 of 82 remaining) [2022-10-16 12:57:43,244 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW (39 of 82 remaining) [2022-10-16 12:57:43,244 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW (38 of 82 remaining) [2022-10-16 12:57:43,244 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW (37 of 82 remaining) [2022-10-16 12:57:43,244 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW (36 of 82 remaining) [2022-10-16 12:57:43,245 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW (35 of 82 remaining) [2022-10-16 12:57:43,245 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW (34 of 82 remaining) [2022-10-16 12:57:43,245 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW (33 of 82 remaining) [2022-10-16 12:57:43,245 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW (32 of 82 remaining) [2022-10-16 12:57:43,245 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW (31 of 82 remaining) [2022-10-16 12:57:43,245 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW (30 of 82 remaining) [2022-10-16 12:57:43,246 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW (29 of 82 remaining) [2022-10-16 12:57:43,246 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW (28 of 82 remaining) [2022-10-16 12:57:43,246 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW (27 of 82 remaining) [2022-10-16 12:57:43,246 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW (26 of 82 remaining) [2022-10-16 12:57:43,246 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW (25 of 82 remaining) [2022-10-16 12:57:43,246 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW (24 of 82 remaining) [2022-10-16 12:57:43,246 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW (23 of 82 remaining) [2022-10-16 12:57:43,247 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW (22 of 82 remaining) [2022-10-16 12:57:43,247 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW (21 of 82 remaining) [2022-10-16 12:57:43,247 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW (20 of 82 remaining) [2022-10-16 12:57:43,247 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW (19 of 82 remaining) [2022-10-16 12:57:43,247 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW (18 of 82 remaining) [2022-10-16 12:57:43,247 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr38ASSERT_VIOLATIONINTEGER_OVERFLOW (17 of 82 remaining) [2022-10-16 12:57:43,248 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr39ASSERT_VIOLATIONINTEGER_OVERFLOW (16 of 82 remaining) [2022-10-16 12:57:43,248 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr40ASSERT_VIOLATIONINTEGER_OVERFLOW (15 of 82 remaining) [2022-10-16 12:57:43,249 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr41ASSERT_VIOLATIONINTEGER_OVERFLOW (14 of 82 remaining) [2022-10-16 12:57:43,249 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr42ASSERT_VIOLATIONINTEGER_OVERFLOW (13 of 82 remaining) [2022-10-16 12:57:43,249 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr43ASSERT_VIOLATIONINTEGER_OVERFLOW (12 of 82 remaining) [2022-10-16 12:57:43,249 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr44ASSERT_VIOLATIONINTEGER_OVERFLOW (11 of 82 remaining) [2022-10-16 12:57:43,250 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr45ASSERT_VIOLATIONINTEGER_OVERFLOW (10 of 82 remaining) [2022-10-16 12:57:43,250 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr46ASSERT_VIOLATIONINTEGER_OVERFLOW (9 of 82 remaining) [2022-10-16 12:57:43,250 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr47ASSERT_VIOLATIONINTEGER_OVERFLOW (8 of 82 remaining) [2022-10-16 12:57:43,250 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr48ASSERT_VIOLATIONINTEGER_OVERFLOW (7 of 82 remaining) [2022-10-16 12:57:43,250 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr49ASSERT_VIOLATIONINTEGER_OVERFLOW (6 of 82 remaining) [2022-10-16 12:57:43,250 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr50ASSERT_VIOLATIONINTEGER_OVERFLOW (5 of 82 remaining) [2022-10-16 12:57:43,251 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr51ASSERT_VIOLATIONINTEGER_OVERFLOW (4 of 82 remaining) [2022-10-16 12:57:43,251 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr52ASSERT_VIOLATIONINTEGER_OVERFLOW (3 of 82 remaining) [2022-10-16 12:57:43,251 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr53ASSERT_VIOLATIONINTEGER_OVERFLOW (2 of 82 remaining) [2022-10-16 12:57:43,251 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr54ASSERT_VIOLATIONINTEGER_OVERFLOW (1 of 82 remaining) [2022-10-16 12:57:43,251 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr55ASSERT_VIOLATIONINTEGER_OVERFLOW (0 of 82 remaining) [2022-10-16 12:57:43,252 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-10-16 12:57:43,256 INFO L444 BasicCegarLoop]: Path program histogram: [4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 12:57:43,263 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-10-16 12:57:43,534 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.10 12:57:43 BoogieIcfgContainer [2022-10-16 12:57:43,534 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-10-16 12:57:43,536 INFO L158 Benchmark]: Toolchain (without parser) took 105476.97ms. Allocated memory was 153.1MB in the beginning and 1.4GB in the end (delta: 1.3GB). Free memory was 117.4MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 775.0MB. Max. memory is 8.0GB. [2022-10-16 12:57:43,536 INFO L158 Benchmark]: CDTParser took 0.20ms. Allocated memory is still 153.1MB. Free memory is still 123.0MB. There was no memory consumed. Max. memory is 8.0GB. [2022-10-16 12:57:43,537 INFO L158 Benchmark]: CACSL2BoogieTranslator took 2659.01ms. Allocated memory was 153.1MB in the beginning and 191.9MB in the end (delta: 38.8MB). Free memory was 117.1MB in the beginning and 125.3MB in the end (delta: -8.2MB). Peak memory consumption was 105.5MB. Max. memory is 8.0GB. [2022-10-16 12:57:43,538 INFO L158 Benchmark]: Boogie Procedure Inliner took 316.59ms. Allocated memory is still 191.9MB. Free memory was 125.3MB in the beginning and 103.8MB in the end (delta: 21.5MB). Peak memory consumption was 22.0MB. Max. memory is 8.0GB. [2022-10-16 12:57:43,538 INFO L158 Benchmark]: Boogie Preprocessor took 257.32ms. Allocated memory is still 191.9MB. Free memory was 103.8MB in the beginning and 82.3MB in the end (delta: 21.5MB). Peak memory consumption was 21.0MB. Max. memory is 8.0GB. [2022-10-16 12:57:43,539 INFO L158 Benchmark]: RCFGBuilder took 4402.16ms. Allocated memory was 191.9MB in the beginning and 291.5MB in the end (delta: 99.6MB). Free memory was 82.3MB in the beginning and 165.8MB in the end (delta: -83.5MB). Peak memory consumption was 66.4MB. Max. memory is 8.0GB. [2022-10-16 12:57:43,540 INFO L158 Benchmark]: TraceAbstraction took 97828.18ms. Allocated memory was 291.5MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 165.3MB in the beginning and 1.2GB in the end (delta: -1.0GB). Peak memory consumption was 684.3MB. Max. memory is 8.0GB. [2022-10-16 12:57:43,544 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20ms. Allocated memory is still 153.1MB. Free memory is still 123.0MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 2659.01ms. Allocated memory was 153.1MB in the beginning and 191.9MB in the end (delta: 38.8MB). Free memory was 117.1MB in the beginning and 125.3MB in the end (delta: -8.2MB). Peak memory consumption was 105.5MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 316.59ms. Allocated memory is still 191.9MB. Free memory was 125.3MB in the beginning and 103.8MB in the end (delta: 21.5MB). Peak memory consumption was 22.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 257.32ms. Allocated memory is still 191.9MB. Free memory was 103.8MB in the beginning and 82.3MB in the end (delta: 21.5MB). Peak memory consumption was 21.0MB. Max. memory is 8.0GB. * RCFGBuilder took 4402.16ms. Allocated memory was 191.9MB in the beginning and 291.5MB in the end (delta: 99.6MB). Free memory was 82.3MB in the beginning and 165.8MB in the end (delta: -83.5MB). Peak memory consumption was 66.4MB. Max. memory is 8.0GB. * TraceAbstraction took 97828.18ms. Allocated memory was 291.5MB in the beginning and 1.4GB in the end (delta: 1.2GB). Free memory was 165.3MB in the beginning and 1.2GB in the end (delta: -1.0GB). Peak memory consumption was 684.3MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 7495]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: overapproximation of large string literal at line 7781, overapproximation of bitwiseOr at line 4779. Possible FailurePath: [L5238] static int fst_txq_low = 8; [L5239] static int fst_txq_high = 12; [L5240] static int fst_max_reads = 7; [L5241] static int fst_excluded_cards = 0; [L5242] static int fst_excluded_list[32U] ; [L5243-L5251] static struct pci_device_id const fst_pci_dev_id[8U] = { {5657U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 1UL}, {5657U, 1088U, 4294967295U, 4294967295U, 0U, 0U, 2UL}, {5657U, 1552U, 4294967295U, 4294967295U, 0U, 0U, 3UL}, {5657U, 1568U, 4294967295U, 4294967295U, 0U, 0U, 4UL}, {5657U, 1600U, 4294967295U, 4294967295U, 0U, 0U, 5UL}, {5657U, 5648U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {5657U, 5650U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L5252] struct pci_device_id const __mod_pci_device_table ; [L5257] static struct tasklet_struct fst_tx_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_tx_work_q, 0UL}; [L5258] static struct tasklet_struct fst_int_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_int_work_q, 0UL}; [L5259] static struct fst_card_info *fst_card_array[32U] ; [L5260] static spinlock_t fst_work_q_lock ; [L5261] static u64 fst_work_txq ; [L5262] static u64 fst_work_intq ; [L7341-L7342] static char *type_strings[7U] = { (char *)"no hardware", (char *)"FarSync T2P", (char *)"FarSync T4P", (char *)"FarSync T1U", (char *)"FarSync T2U", (char *)"FarSync T4U", (char *)"FarSync TE1"}; [L7394-L7427] static struct net_device_ops const fst_ops = {(int (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, & fst_open, & fst_close, & hdlc_start_xmit, (u16 (*)(struct net_device * , struct sk_buff * ))0, (void (*)(struct net_device * , int ))0, (void (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , void * ))0, (int (*)(struct net_device * ))0, & fst_ioctl, (int (*)(struct net_device * , struct ifmap * ))0, & hdlc_change_mtu, (int (*)(struct net_device * , struct neigh_parms * ))0, & fst_tx_timeout, (struct rtnl_link_stats64 *(*)(struct net_device * , struct rtnl_link_stats64 * ))0, (struct net_device_stats *(*)(struct net_device * ))0, (void (*)(struct net_device * , struct vlan_group * ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , struct netpoll_info * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , int , u8 * ))0, (int (*)(struct net_device * , int , u16 , u8 ))0, (int (*)(struct net_device * , int , int ))0, (int (*)(struct net_device * , int , struct ifla_vf_info * ))0, (int (*)(struct net_device * , int , struct nlattr ** ))0, (int (*)(struct net_device * , int , struct sk_buff * ))0, (int (*)(struct net_device * , u8 ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u16 ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u64 * , int ))0, (int (*)(struct net_device * , struct sk_buff const * , u16 , u32 ))0, (int (*)(struct net_device * , struct net_device * ))0, (int (*)(struct net_device * , struct net_device * ))0, (u32 (*)(struct net_device * , u32 ))0, (int (*)(struct net_device * , u32 ))0}; [L7745-L7759] static struct pci_driver fst_driver = {{(struct list_head *)0, (struct list_head *)0}, "fst", (struct pci_device_id const *)(& fst_pci_dev_id), & fst_add_one, & fst_remove_one, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * ))0, (int (*)(struct pci_dev * ))0, (void (*)(struct pci_dev * ))0, (struct pci_error_handlers *)0, {(char const *)0, (struct bus_type *)0, (struct module *)0, (char const *)0, (_Bool)0, (struct of_device_id const *)0, (int (*)(struct device * ))0, (int (*)(struct device * ))0, (void (*)(struct device * ))0, (int (*)(struct device * , pm_message_t ))0, (int (*)(struct device * ))0, (struct attribute_group const **)0, (struct dev_pm_ops const *)0, (struct driver_private *)0}, {{{{{0U}, 0U, 0U, (void *)0, {(struct lock_class_key *)0, {(struct lock_class *)0, (struct lock_class *)0}, (char const *)0, 0, 0UL}}}}, {(struct list_head *)0, (struct list_head *)0}}}; [L7800] int LDV_IN_INTERRUPT ; [L7953] int ldv_module_refcounter = 1; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=0, ldv_module_refcounter=1, type_strings={53:0}] [L7802] struct net_device *var_group1 ; [L7803] int res_fst_open_36 ; [L7804] int res_fst_close_37 ; [L7805] struct ifreq *var_group2 ; [L7806] int var_fst_ioctl_33_p2 ; [L7807] struct pci_dev *var_group3 ; [L7808] struct pci_device_id const *var_fst_add_one_42_p1 ; [L7809] int res_fst_add_one_42 ; [L7810] int var_fst_intr_27_p0 ; [L7811] void *var_fst_intr_27_p1 ; [L7812] int ldv_s_fst_ops_net_device_ops ; [L7813] int ldv_s_fst_driver_pci_driver ; [L7814] int tmp ; [L7815] int tmp___0 ; [L7816] int tmp___1 ; [L7819] ldv_s_fst_ops_net_device_ops = 0 [L7820] ldv_s_fst_driver_pci_driver = 0 [L7821] LDV_IN_INTERRUPT = 1 [L7822] FCALL ldv_initialize() [L7823] CALL, EXPR fst_init() [L7761] int i ; [L7762] struct lock_class_key __key ; [L7763] int tmp ; [L7765] i = 0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND TRUE i <= 31 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7768] fst_card_array[i] = (struct fst_card_info *)0 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7769] EXPR i + 1 [L7769] i = i + 1 VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7771] COND FALSE !(i <= 31) VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7778] CALL spinlock_check(& fst_work_q_lock) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={50:0}, type_strings={53:0}] [L4600] return (& lock->ldv_6060.rlock); VAL [\result={50:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={50:0}, lock={50:0}, type_strings={53:0}] [L7778] RET spinlock_check(& fst_work_q_lock) VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, spinlock_check(& fst_work_q_lock)={50:0}, type_strings={53:0}] [L7779-L7780] FCALL __raw_spin_lock_init(& fst_work_q_lock.ldv_6060.rlock, "&(&fst_work_q_lock)->rlock", & __key) VAL [__key={61:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L7781] CALL, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L8074] return __VERIFIER_nondet_int(); [L7781] RET, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7781] tmp = __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7783] return (tmp); [L7783] return (tmp); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, tmp=0, type_strings={53:0}] [L7823] RET, EXPR fst_init() [L7823] tmp = fst_init() [L7825] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, type_strings={53:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___1=-2, type_strings={53:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND FALSE !(tmp___0 == 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=4, tmp___1=-2, type_strings={53:0}] [L7837] COND FALSE !(tmp___0 == 1) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=4, tmp___1=-2, type_strings={53:0}] [L7840] COND FALSE !(tmp___0 == 2) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=4, tmp___1=-2, type_strings={53:0}] [L7843] COND FALSE !(tmp___0 == 3) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=4, tmp___1=-2, type_strings={53:0}] [L7846] COND TRUE tmp___0 == 4 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=4, tmp___1=-2, type_strings={53:0}] [L7893] COND TRUE ldv_s_fst_driver_pci_driver == 0 [L7895] CALL fst_add_one(var_group3, var_fst_add_one_42_p1) [L7429] int no_of_cards_added ; [L7430] struct fst_card_info *card ; [L7431] int err ; [L7432] int i ; [L7433] bool __print_once ; [L7434] void *tmp ; [L7435] char *tmp___0 ; [L7436] void *tmp___1 ; [L7437] char *tmp___2 ; [L7438] void *tmp___3 ; [L7439] int tmp___4 ; [L7440] int tmp___5 ; [L7441] struct lock_class_key __key ; [L7442] struct net_device *dev ; [L7443] struct net_device *tmp___6 ; [L7444] hdlc_device *hdlc ; [L7445] int tmp___7 ; [L7446] struct hdlc_device *tmp___8 ; [L7447] int tmp___9 ; [L7449] no_of_cards_added = 0 [L7450] err = 0 VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, ent={4294967306:4294967334}, ent={4294967306:4294967334}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, type_strings={53:0}] [L7451] COND TRUE ! __print_once [L7453] __print_once = (bool )1 [L7458] COND FALSE !(fst_excluded_cards != 0) VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={4294967310:4294967302}, ent={4294967306:4294967334}, ent={4294967306:4294967334}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, type_strings={53:0}] [L7480] CALL, EXPR kzalloc(1000UL, 208U) [L4776] void *tmp ; [L4779] CALL, EXPR kmalloc(size, flags | 32768U) [L4766] void *tmp___2 ; [L4769] CALL, EXPR __kmalloc(size, flags) [L8067] CALL, EXPR ldv_malloc(arg0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L8061] COND FALSE !(__VERIFIER_nondet_bool()) [L8062] void *p = malloc(size); [L8063] CALL, EXPR IS_ERR(p) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ptr={-4294967297:0}, type_strings={53:0}] [L4586] long tmp ; [L4589] tmp = __builtin_expect((long )((unsigned long )ptr > 0x0ffffffffffff000UL), 0L) [L4591] return (tmp); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ptr={-4294967297:0}, ptr={-4294967297:0}, tmp=0, type_strings={53:0}] [L8063] RET, EXPR IS_ERR(p) VAL [\old(size)=1000, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, IS_ERR(p)=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, p={-4294967297:0}, size=1000, type_strings={53:0}] [L8063] CALL assume_abort_if_not(IS_ERR(p) == 0) [L8057] COND FALSE !(!cond) VAL [\old(cond)=1, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, cond=1, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={53:0}] [L8063] RET assume_abort_if_not(IS_ERR(p) == 0) [L8064] return p; VAL [\old(size)=1000, \result={-4294967297:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, p={-4294967297:0}, size=1000, type_strings={53:0}] [L8067] RET, EXPR ldv_malloc(arg0) VAL [\old(arg0)=1000, \old(arg1)=4294967329, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, arg0=1000, arg1=4294967329, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_malloc(arg0)={-4294967297:0}, ldv_module_refcounter=1, type_strings={53:0}] [L8067] return ldv_malloc(arg0); [L4769] RET, EXPR __kmalloc(size, flags) [L4769] tmp___2 = __kmalloc(size, flags) [L4771] return (tmp___2); VAL [\old(flags)=33, \old(size)=1000, \result={-4294967297:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, flags=33, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, size=1000, tmp___2={-4294967297:0}, type_strings={53:0}] [L4779] RET, EXPR kmalloc(size, flags | 32768U) [L4779] tmp = kmalloc(size, flags | 32768U) [L4781] return (tmp); VAL [\old(flags)=208, \old(size)=1000, \result={-4294967297:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={4294967310:4294967302}, flags=208, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, size=1000, tmp={-4294967297:0}, type_strings={53:0}] [L7480] RET, EXPR kzalloc(1000UL, 208U) [L7480] tmp = kzalloc(1000UL, 208U) [L7481] card = (struct fst_card_info *)tmp VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={4294967310:4294967302}, card={-4294967297:0}, ent={4294967306:4294967334}, ent={4294967306:4294967334}, err=0, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, tmp={-4294967297:0}, type_strings={53:0}] [L7483] COND FALSE !((unsigned long )card == (unsigned long )((struct fst_card_info *)0)) [L7491] CALL, EXPR pci_enable_device(pdev) [L8189] return __VERIFIER_nondet_int(); [L7491] RET, EXPR pci_enable_device(pdev) [L7491] err = pci_enable_device(pdev) [L7493] COND TRUE err != 0 [L7495] - err VAL [__key={58:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=1, __this_module={4294967310:4294967302}, card={-4294967297:0}, ent={4294967306:4294967334}, ent={4294967306:4294967334}, err=-2147483648, fst_card_array={49:0}, fst_driver={55:0}, fst_excluded_cards=0, fst_excluded_list={45:0}, fst_int_task={48:0}, fst_max_reads=7, fst_ops={54:0}, fst_pci_dev_id={46:0}, fst_tx_task={47:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={52:0}, fst_work_q_lock={50:0}, fst_work_txq={51:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, no_of_cards_added=0, pdev={4294967328:4294967320}, pdev={4294967328:4294967320}, tmp={-4294967297:0}, type_strings={53:0}] - UnprovableResult [Line: 5364]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5364]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5365]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5365]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5378]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5378]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5391]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5391]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5396]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5396]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5397]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5397]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5398]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5398]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5618]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5618]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5271]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5271]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7992]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7992]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5456]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5456]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5460]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5460]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5430]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5430]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7769]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7769]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7972]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7972]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5715]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5715]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5754]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5754]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7141]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7141]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7864]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7864]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7213]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7213]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7214]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7214]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5410]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5410]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5411]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5411]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5441]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5441]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5445]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5445]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7469]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7469]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7495]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7506]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7506]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7608]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7608]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7643]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7643]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5492]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5492]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5493]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5493]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5494]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 5494]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7660]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7660]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7357]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7357]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7365]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7365]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7378]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 7378]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6252]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6252]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6256]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6256]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6266]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6266]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6395]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - UnprovableResult [Line: 6395]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 57 procedures, 1256 locations, 82 error locations. Started 1 CEGAR loops. OverallTime: 97.5s, OverallIterations: 17, TraceHistogramMax: 32, PathProgramHistogramMax: 4, EmptinessCheckTime: 0.1s, AutomataDifference: 22.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 16701 SdHoareTripleChecker+Valid, 13.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 15514 mSDsluCounter, 71250 SdHoareTripleChecker+Invalid, 12.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 40892 mSDsCounter, 1801 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7073 IncrementalHoareTripleChecker+Invalid, 8875 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1801 mSolverCounterUnsat, 30358 mSDtfsCounter, 7073 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1181 GetRequests, 1048 SyntacticMatches, 14 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 437 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=9433occurred in iteration=16, InterpolantAutomatonStates: 123, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.7s AutomataMinimizationTime, 16 MinimizatonAttempts, 7272 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 52.6s SatisfiabilityAnalysisTime, 6.7s InterpolantComputationTime, 1613 NumberOfCodeBlocks, 1597 NumberOfCodeBlocksAsserted, 53 NumberOfCheckSat, 1740 ConstructedInterpolants, 0 QuantifiedInterpolants, 3304 SizeOfPredicates, 14 NumberOfNonLiveVariables, 14288 ConjunctsInSsa, 100 ConjunctsInUnsatCore, 33 InterpolantComputations, 12 PerfectInterpolantSequences, 78/3612 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-10-16 12:57:43,585 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...