/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Overflow-32bit-Automizer_Default.epf -i ../sv-benchmarks/c/array-fpi/ncompf.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-05d3305-m [2022-10-16 10:42:17,568 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-16 10:42:17,571 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-16 10:42:17,607 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-16 10:42:17,608 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-16 10:42:17,609 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-16 10:42:17,624 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-16 10:42:17,627 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-16 10:42:17,635 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-16 10:42:17,636 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-16 10:42:17,639 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-16 10:42:17,641 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-16 10:42:17,642 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-16 10:42:17,645 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-16 10:42:17,648 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-16 10:42:17,653 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-16 10:42:17,657 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-16 10:42:17,658 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-16 10:42:17,664 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-16 10:42:17,673 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-16 10:42:17,676 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-16 10:42:17,680 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-16 10:42:17,685 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-16 10:42:17,686 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-16 10:42:17,696 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-10-16 10:42:17,711 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-16 10:42:17,712 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-16 10:42:17,713 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-16 10:42:17,714 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Overflow-32bit-Automizer_Default.epf [2022-10-16 10:42:17,770 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-16 10:42:17,770 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-16 10:42:17,771 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-16 10:42:17,771 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-16 10:42:17,773 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-10-16 10:42:17,773 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-10-16 10:42:17,776 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-16 10:42:17,776 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-16 10:42:17,777 INFO L138 SettingsManager]: * Use SBE=true [2022-10-16 10:42:17,777 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-16 10:42:17,778 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-16 10:42:17,778 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-10-16 10:42:17,779 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-16 10:42:17,779 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-16 10:42:17,779 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-16 10:42:17,779 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-10-16 10:42:17,779 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-10-16 10:42:17,780 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-10-16 10:42:17,780 INFO L138 SettingsManager]: * Check absence of signed integer overflows=true [2022-10-16 10:42:17,780 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-16 10:42:17,780 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-16 10:42:17,780 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-16 10:42:17,781 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-10-16 10:42:17,781 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-16 10:42:17,781 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-16 10:42:17,781 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-10-16 10:42:17,782 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-16 10:42:17,782 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-16 10:42:17,782 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-10-16 10:42:17,782 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-10-16 10:42:17,782 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-16 10:42:17,783 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-10-16 10:42:17,783 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-10-16 10:42:17,783 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-10-16 10:42:18,177 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-16 10:42:18,226 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-16 10:42:18,230 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-16 10:42:18,231 INFO L271 PluginConnector]: Initializing CDTParser... [2022-10-16 10:42:18,232 INFO L275 PluginConnector]: CDTParser initialized [2022-10-16 10:42:18,234 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/array-fpi/ncompf.c [2022-10-16 10:42:18,311 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e25aa2130/5ffd84d95e0c418c96c42ef764ab42b7/FLAG6c3514e99 [2022-10-16 10:42:18,999 INFO L306 CDTParser]: Found 1 translation units. [2022-10-16 10:42:19,000 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-fpi/ncompf.c [2022-10-16 10:42:19,014 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e25aa2130/5ffd84d95e0c418c96c42ef764ab42b7/FLAG6c3514e99 [2022-10-16 10:42:19,364 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e25aa2130/5ffd84d95e0c418c96c42ef764ab42b7 [2022-10-16 10:42:19,368 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-16 10:42:19,374 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-10-16 10:42:19,376 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-10-16 10:42:19,376 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-10-16 10:42:19,380 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-10-16 10:42:19,381 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,383 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33bb3d63 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19, skipping insertion in model container [2022-10-16 10:42:19,383 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,392 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-10-16 10:42:19,410 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-10-16 10:42:19,573 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-fpi/ncompf.c[589,602] [2022-10-16 10:42:19,601 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-16 10:42:19,612 INFO L203 MainTranslator]: Completed pre-run [2022-10-16 10:42:19,628 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/array-fpi/ncompf.c[589,602] [2022-10-16 10:42:19,654 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-10-16 10:42:19,677 INFO L208 MainTranslator]: Completed translation [2022-10-16 10:42:19,677 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19 WrapperNode [2022-10-16 10:42:19,677 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-10-16 10:42:19,679 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-16 10:42:19,679 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-16 10:42:19,679 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-16 10:42:19,689 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,698 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,734 INFO L138 Inliner]: procedures = 16, calls = 24, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 119 [2022-10-16 10:42:19,737 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-16 10:42:19,738 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-16 10:42:19,738 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-16 10:42:19,738 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-16 10:42:19,749 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,749 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,752 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,753 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,761 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,767 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,770 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,771 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,774 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-16 10:42:19,776 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-16 10:42:19,776 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-16 10:42:19,776 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-16 10:42:19,777 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (1/1) ... [2022-10-16 10:42:19,785 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-16 10:42:19,801 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:19,819 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-10-16 10:42:19,822 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-10-16 10:42:19,875 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-10-16 10:42:19,875 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-10-16 10:42:19,875 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-10-16 10:42:19,876 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-10-16 10:42:19,876 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-16 10:42:19,876 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-16 10:42:19,876 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-10-16 10:42:19,962 INFO L235 CfgBuilder]: Building ICFG [2022-10-16 10:42:19,965 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-16 10:42:20,490 INFO L276 CfgBuilder]: Performing block encoding [2022-10-16 10:42:20,500 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-16 10:42:20,500 INFO L300 CfgBuilder]: Removed 4 assume(true) statements. [2022-10-16 10:42:20,503 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.10 10:42:20 BoogieIcfgContainer [2022-10-16 10:42:20,504 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-16 10:42:20,507 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-10-16 10:42:20,507 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-10-16 10:42:20,511 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-10-16 10:42:20,512 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 16.10 10:42:19" (1/3) ... [2022-10-16 10:42:20,513 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2cdf9415 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.10 10:42:20, skipping insertion in model container [2022-10-16 10:42:20,513 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.10 10:42:19" (2/3) ... [2022-10-16 10:42:20,514 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2cdf9415 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.10 10:42:20, skipping insertion in model container [2022-10-16 10:42:20,514 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.10 10:42:20" (3/3) ... [2022-10-16 10:42:20,516 INFO L112 eAbstractionObserver]: Analyzing ICFG ncompf.c [2022-10-16 10:42:20,541 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-10-16 10:42:20,542 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 30 error locations. [2022-10-16 10:42:20,616 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-10-16 10:42:20,627 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6420197, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-16 10:42:20,628 INFO L358 AbstractCegarLoop]: Starting to check reachability of 30 error locations. [2022-10-16 10:42:20,634 INFO L276 IsEmpty]: Start isEmpty. Operand has 83 states, 52 states have (on average 1.7884615384615385) internal successors, (93), 82 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:20,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-10-16 10:42:20,643 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:20,644 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:20,645 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:20,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:20,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1806845353, now seen corresponding path program 1 times [2022-10-16 10:42:20,664 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:20,665 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052953515] [2022-10-16 10:42:20,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:20,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:20,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:20,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:20,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:20,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052953515] [2022-10-16 10:42:20,879 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1052953515] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:20,879 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:20,880 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-16 10:42:20,882 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [261870713] [2022-10-16 10:42:20,883 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:20,890 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-10-16 10:42:20,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:20,930 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-10-16 10:42:20,932 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-10-16 10:42:20,936 INFO L87 Difference]: Start difference. First operand has 83 states, 52 states have (on average 1.7884615384615385) internal successors, (93), 82 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:20,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:20,979 INFO L93 Difference]: Finished difference Result 161 states and 180 transitions. [2022-10-16 10:42:20,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-16 10:42:20,983 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-10-16 10:42:20,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:20,994 INFO L225 Difference]: With dead ends: 161 [2022-10-16 10:42:20,995 INFO L226 Difference]: Without dead ends: 77 [2022-10-16 10:42:20,998 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-10-16 10:42:21,004 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:21,005 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-10-16 10:42:21,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-10-16 10:42:21,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2022-10-16 10:42:21,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 48 states have (on average 1.6666666666666667) internal successors, (80), 76 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:21,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 80 transitions. [2022-10-16 10:42:21,050 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 80 transitions. Word has length 7 [2022-10-16 10:42:21,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:21,050 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 80 transitions. [2022-10-16 10:42:21,051 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:21,051 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 80 transitions. [2022-10-16 10:42:21,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-10-16 10:42:21,052 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:21,052 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:21,052 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-10-16 10:42:21,052 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:21,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:21,053 INFO L85 PathProgramCache]: Analyzing trace with hash 1806904935, now seen corresponding path program 1 times [2022-10-16 10:42:21,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:21,054 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177852041] [2022-10-16 10:42:21,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:21,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:21,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:21,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:21,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:21,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177852041] [2022-10-16 10:42:21,262 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1177852041] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:21,262 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:21,263 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-16 10:42:21,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281005186] [2022-10-16 10:42:21,264 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:21,270 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 10:42:21,271 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:21,272 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 10:42:21,272 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 10:42:21,272 INFO L87 Difference]: Start difference. First operand 77 states and 80 transitions. Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:21,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:21,484 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2022-10-16 10:42:21,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 10:42:21,485 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 7 [2022-10-16 10:42:21,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:21,488 INFO L225 Difference]: With dead ends: 130 [2022-10-16 10:42:21,488 INFO L226 Difference]: Without dead ends: 120 [2022-10-16 10:42:21,489 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 10:42:21,490 INFO L413 NwaCegarLoop]: 58 mSDtfsCounter, 39 mSDsluCounter, 26 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:21,491 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 84 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 73 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-10-16 10:42:21,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-10-16 10:42:21,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 90. [2022-10-16 10:42:21,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 61 states have (on average 1.5737704918032787) internal successors, (96), 89 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:21,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 96 transitions. [2022-10-16 10:42:21,524 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 96 transitions. Word has length 7 [2022-10-16 10:42:21,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:21,524 INFO L495 AbstractCegarLoop]: Abstraction has 90 states and 96 transitions. [2022-10-16 10:42:21,524 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:21,527 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 96 transitions. [2022-10-16 10:42:21,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-10-16 10:42:21,528 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:21,528 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:21,528 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-10-16 10:42:21,529 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:21,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:21,533 INFO L85 PathProgramCache]: Analyzing trace with hash 1268856745, now seen corresponding path program 1 times [2022-10-16 10:42:21,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:21,533 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54969056] [2022-10-16 10:42:21,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:21,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:21,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:22,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:22,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:22,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54969056] [2022-10-16 10:42:22,525 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [54969056] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:22,525 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:22,525 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:42:22,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776227084] [2022-10-16 10:42:22,526 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:22,526 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:42:22,526 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:22,527 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:42:22,527 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:22,529 INFO L87 Difference]: Start difference. First operand 90 states and 96 transitions. Second operand has 4 states, 3 states have (on average 3.0) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:22,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:22,765 INFO L93 Difference]: Finished difference Result 120 states and 128 transitions. [2022-10-16 10:42:22,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 10:42:22,765 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 3.0) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-10-16 10:42:22,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:22,767 INFO L225 Difference]: With dead ends: 120 [2022-10-16 10:42:22,767 INFO L226 Difference]: Without dead ends: 118 [2022-10-16 10:42:22,768 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:42:22,770 INFO L413 NwaCegarLoop]: 59 mSDtfsCounter, 26 mSDsluCounter, 81 mSDsCounter, 0 mSdLazyCounter, 99 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 140 SdHoareTripleChecker+Invalid, 103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 99 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:22,770 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 140 Invalid, 103 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 99 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-10-16 10:42:22,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2022-10-16 10:42:22,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 92. [2022-10-16 10:42:22,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 63 states have (on average 1.5555555555555556) internal successors, (98), 91 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:22,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 98 transitions. [2022-10-16 10:42:22,782 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 98 transitions. Word has length 9 [2022-10-16 10:42:22,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:22,782 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 98 transitions. [2022-10-16 10:42:22,782 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 3.0) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:22,783 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 98 transitions. [2022-10-16 10:42:22,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-10-16 10:42:22,783 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:22,784 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:22,784 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-10-16 10:42:22,784 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:22,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:22,785 INFO L85 PathProgramCache]: Analyzing trace with hash 504177845, now seen corresponding path program 1 times [2022-10-16 10:42:22,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:22,786 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864255061] [2022-10-16 10:42:22,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:22,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:22,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:22,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:22,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:22,877 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864255061] [2022-10-16 10:42:22,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [864255061] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:22,878 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:22,878 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:42:22,879 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908651988] [2022-10-16 10:42:22,880 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:22,880 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:42:22,881 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:22,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:42:22,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:22,882 INFO L87 Difference]: Start difference. First operand 92 states and 98 transitions. Second operand has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:23,011 INFO L93 Difference]: Finished difference Result 118 states and 124 transitions. [2022-10-16 10:42:23,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 10:42:23,012 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-10-16 10:42:23,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:23,019 INFO L225 Difference]: With dead ends: 118 [2022-10-16 10:42:23,019 INFO L226 Difference]: Without dead ends: 116 [2022-10-16 10:42:23,020 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:42:23,028 INFO L413 NwaCegarLoop]: 56 mSDtfsCounter, 32 mSDsluCounter, 79 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 107 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:23,029 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 135 Invalid, 107 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 102 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:23,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2022-10-16 10:42:23,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 95. [2022-10-16 10:42:23,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 66 states have (on average 1.5303030303030303) internal successors, (101), 94 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 101 transitions. [2022-10-16 10:42:23,040 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 101 transitions. Word has length 12 [2022-10-16 10:42:23,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:23,040 INFO L495 AbstractCegarLoop]: Abstraction has 95 states and 101 transitions. [2022-10-16 10:42:23,041 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 4.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,041 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 101 transitions. [2022-10-16 10:42:23,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-10-16 10:42:23,042 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:23,042 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:23,042 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-10-16 10:42:23,042 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:23,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:23,043 INFO L85 PathProgramCache]: Analyzing trace with hash 1224983743, now seen corresponding path program 1 times [2022-10-16 10:42:23,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:23,044 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1890694052] [2022-10-16 10:42:23,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:23,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:23,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:23,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:23,118 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:23,118 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1890694052] [2022-10-16 10:42:23,119 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1890694052] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:23,119 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:23,119 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-16 10:42:23,119 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460566440] [2022-10-16 10:42:23,119 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:23,120 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-16 10:42:23,120 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:23,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-16 10:42:23,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:42:23,121 INFO L87 Difference]: Start difference. First operand 95 states and 101 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:23,257 INFO L93 Difference]: Finished difference Result 203 states and 214 transitions. [2022-10-16 10:42:23,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-16 10:42:23,258 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-10-16 10:42:23,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:23,259 INFO L225 Difference]: With dead ends: 203 [2022-10-16 10:42:23,259 INFO L226 Difference]: Without dead ends: 137 [2022-10-16 10:42:23,260 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:42:23,261 INFO L413 NwaCegarLoop]: 53 mSDtfsCounter, 59 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 59 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:23,262 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [59 Valid, 133 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:23,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2022-10-16 10:42:23,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 99. [2022-10-16 10:42:23,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 70 states have (on average 1.5) internal successors, (105), 98 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 105 transitions. [2022-10-16 10:42:23,273 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 105 transitions. Word has length 13 [2022-10-16 10:42:23,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:23,273 INFO L495 AbstractCegarLoop]: Abstraction has 99 states and 105 transitions. [2022-10-16 10:42:23,274 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 5 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,274 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 105 transitions. [2022-10-16 10:42:23,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-10-16 10:42:23,274 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:23,275 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:23,275 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-10-16 10:42:23,275 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:23,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:23,276 INFO L85 PathProgramCache]: Analyzing trace with hash 1186956715, now seen corresponding path program 1 times [2022-10-16 10:42:23,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:23,276 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [151707574] [2022-10-16 10:42:23,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:23,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:23,292 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-16 10:42:23,293 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1987196510] [2022-10-16 10:42:23,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:23,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:23,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:23,299 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:23,318 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-10-16 10:42:23,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:23,374 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 10:42:23,380 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:23,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:23,406 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:23,406 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:23,406 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [151707574] [2022-10-16 10:42:23,406 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-16 10:42:23,407 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1987196510] [2022-10-16 10:42:23,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1987196510] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:23,407 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:23,407 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-16 10:42:23,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1757894024] [2022-10-16 10:42:23,408 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:23,408 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-16 10:42:23,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:23,409 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-16 10:42:23,409 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 10:42:23,409 INFO L87 Difference]: Start difference. First operand 99 states and 105 transitions. Second operand has 3 states, 2 states have (on average 6.5) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:23,505 INFO L93 Difference]: Finished difference Result 118 states and 124 transitions. [2022-10-16 10:42:23,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-16 10:42:23,506 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 2 states have (on average 6.5) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-10-16 10:42:23,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:23,507 INFO L225 Difference]: With dead ends: 118 [2022-10-16 10:42:23,507 INFO L226 Difference]: Without dead ends: 115 [2022-10-16 10:42:23,508 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-16 10:42:23,509 INFO L413 NwaCegarLoop]: 70 mSDtfsCounter, 14 mSDsluCounter, 26 mSDsCounter, 0 mSdLazyCounter, 63 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 63 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:23,509 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 96 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 63 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:23,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2022-10-16 10:42:23,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 104. [2022-10-16 10:42:23,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 75 states have (on average 1.4666666666666666) internal successors, (110), 103 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 110 transitions. [2022-10-16 10:42:23,538 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 110 transitions. Word has length 13 [2022-10-16 10:42:23,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:23,538 INFO L495 AbstractCegarLoop]: Abstraction has 104 states and 110 transitions. [2022-10-16 10:42:23,538 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 6.5) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:23,538 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 110 transitions. [2022-10-16 10:42:23,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-10-16 10:42:23,539 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:23,539 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:23,581 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:23,740 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-10-16 10:42:23,741 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:23,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:23,743 INFO L85 PathProgramCache]: Analyzing trace with hash 461611375, now seen corresponding path program 1 times [2022-10-16 10:42:23,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:23,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032177390] [2022-10-16 10:42:23,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:23,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:23,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:23,851 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:23,852 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:23,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1032177390] [2022-10-16 10:42:23,852 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1032177390] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:23,852 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1833108779] [2022-10-16 10:42:23,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:23,853 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:23,853 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:23,854 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:23,878 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-10-16 10:42:23,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:23,950 INFO L263 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 4 conjunts are in the unsatisfiable core [2022-10-16 10:42:23,953 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:24,022 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:24,022 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:42:24,077 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:24,077 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1833108779] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:42:24,077 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:42:24,078 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 9 [2022-10-16 10:42:24,078 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329067001] [2022-10-16 10:42:24,078 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:42:24,079 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-10-16 10:42:24,079 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:24,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-10-16 10:42:24,080 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-10-16 10:42:24,080 INFO L87 Difference]: Start difference. First operand 104 states and 110 transitions. Second operand has 10 states, 9 states have (on average 3.888888888888889) internal successors, (35), 10 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:24,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:24,376 INFO L93 Difference]: Finished difference Result 147 states and 156 transitions. [2022-10-16 10:42:24,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-16 10:42:24,377 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 3.888888888888889) internal successors, (35), 10 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-10-16 10:42:24,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:24,378 INFO L225 Difference]: With dead ends: 147 [2022-10-16 10:42:24,378 INFO L226 Difference]: Without dead ends: 144 [2022-10-16 10:42:24,379 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=139, Unknown=0, NotChecked=0, Total=210 [2022-10-16 10:42:24,380 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 200 mSDsluCounter, 150 mSDsCounter, 0 mSdLazyCounter, 275 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 184 SdHoareTripleChecker+Invalid, 318 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 275 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:24,381 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 184 Invalid, 318 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 275 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-10-16 10:42:24,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-10-16 10:42:24,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 101. [2022-10-16 10:42:24,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 75 states have (on average 1.4266666666666667) internal successors, (107), 100 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:24,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 107 transitions. [2022-10-16 10:42:24,391 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 107 transitions. Word has length 15 [2022-10-16 10:42:24,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:24,391 INFO L495 AbstractCegarLoop]: Abstraction has 101 states and 107 transitions. [2022-10-16 10:42:24,391 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 3.888888888888889) internal successors, (35), 10 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:24,392 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 107 transitions. [2022-10-16 10:42:24,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-10-16 10:42:24,392 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:24,393 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:24,441 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-10-16 10:42:24,606 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-10-16 10:42:24,607 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:24,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:24,608 INFO L85 PathProgramCache]: Analyzing trace with hash 1425050793, now seen corresponding path program 1 times [2022-10-16 10:42:24,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:24,609 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253380707] [2022-10-16 10:42:24,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:24,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:24,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:24,709 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:24,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:24,710 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253380707] [2022-10-16 10:42:24,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1253380707] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:24,711 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [295718372] [2022-10-16 10:42:24,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:24,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:24,721 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:24,727 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:24,758 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-10-16 10:42:24,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:24,826 INFO L263 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjunts are in the unsatisfiable core [2022-10-16 10:42:24,827 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:24,889 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:24,890 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:24,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [295718372] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:24,890 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 10:42:24,890 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2022-10-16 10:42:24,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [30209691] [2022-10-16 10:42:24,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:24,891 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-16 10:42:24,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:24,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-16 10:42:24,892 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-10-16 10:42:24,892 INFO L87 Difference]: Start difference. First operand 101 states and 107 transitions. Second operand has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:25,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:25,017 INFO L93 Difference]: Finished difference Result 120 states and 126 transitions. [2022-10-16 10:42:25,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 10:42:25,018 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-10-16 10:42:25,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:25,019 INFO L225 Difference]: With dead ends: 120 [2022-10-16 10:42:25,019 INFO L226 Difference]: Without dead ends: 118 [2022-10-16 10:42:25,020 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2022-10-16 10:42:25,021 INFO L413 NwaCegarLoop]: 52 mSDtfsCounter, 44 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 136 SdHoareTripleChecker+Invalid, 137 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:25,021 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 136 Invalid, 137 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:25,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2022-10-16 10:42:25,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 98. [2022-10-16 10:42:25,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 97 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:25,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 104 transitions. [2022-10-16 10:42:25,029 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 104 transitions. Word has length 16 [2022-10-16 10:42:25,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:25,029 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 104 transitions. [2022-10-16 10:42:25,029 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 4.0) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:25,030 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 104 transitions. [2022-10-16 10:42:25,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-10-16 10:42:25,030 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:25,031 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:25,071 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:25,244 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:25,245 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:25,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:25,246 INFO L85 PathProgramCache]: Analyzing trace with hash 723612591, now seen corresponding path program 1 times [2022-10-16 10:42:25,246 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:25,246 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142209174] [2022-10-16 10:42:25,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:25,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:25,263 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-16 10:42:25,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [517495747] [2022-10-16 10:42:25,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:25,264 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:25,264 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:25,265 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:25,287 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-10-16 10:42:25,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:25,336 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 10:42:25,338 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:25,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:25,404 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:25,404 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:25,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142209174] [2022-10-16 10:42:25,404 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-16 10:42:25,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [517495747] [2022-10-16 10:42:25,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [517495747] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:25,405 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:25,405 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:42:25,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584848356] [2022-10-16 10:42:25,405 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:25,405 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:42:25,406 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:25,406 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:42:25,406 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:25,407 INFO L87 Difference]: Start difference. First operand 98 states and 104 transitions. Second operand has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:25,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:25,485 INFO L93 Difference]: Finished difference Result 109 states and 115 transitions. [2022-10-16 10:42:25,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 10:42:25,486 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-10-16 10:42:25,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:25,488 INFO L225 Difference]: With dead ends: 109 [2022-10-16 10:42:25,488 INFO L226 Difference]: Without dead ends: 108 [2022-10-16 10:42:25,488 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:25,491 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 75 mSDsluCounter, 23 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:25,491 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 80 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:25,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-10-16 10:42:25,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 99. [2022-10-16 10:42:25,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 75 states have (on average 1.4) internal successors, (105), 98 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:25,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 105 transitions. [2022-10-16 10:42:25,504 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 105 transitions. Word has length 17 [2022-10-16 10:42:25,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:25,505 INFO L495 AbstractCegarLoop]: Abstraction has 99 states and 105 transitions. [2022-10-16 10:42:25,505 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 5.666666666666667) internal successors, (17), 4 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:25,505 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 105 transitions. [2022-10-16 10:42:25,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-10-16 10:42:25,508 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:25,508 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:25,535 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:25,719 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:25,720 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:25,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:25,721 INFO L85 PathProgramCache]: Analyzing trace with hash 1226901681, now seen corresponding path program 1 times [2022-10-16 10:42:25,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:25,721 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359619900] [2022-10-16 10:42:25,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:25,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:25,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:26,403 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:26,403 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:26,403 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359619900] [2022-10-16 10:42:26,404 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1359619900] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:26,404 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1512974185] [2022-10-16 10:42:26,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:26,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:26,404 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:26,405 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:26,429 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-10-16 10:42:26,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:26,486 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 26 conjunts are in the unsatisfiable core [2022-10-16 10:42:26,492 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:26,589 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-10-16 10:42:26,600 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:26,601 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:26,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:26,605 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2022-10-16 10:42:26,619 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-10-16 10:42:26,619 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 19 [2022-10-16 10:42:26,698 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 32 [2022-10-16 10:42:26,857 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 10:42:26,857 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 12 [2022-10-16 10:42:26,874 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:26,874 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:42:27,001 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:27,001 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1512974185] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:42:27,001 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:42:27,002 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 17 [2022-10-16 10:42:27,002 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785575590] [2022-10-16 10:42:27,002 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:42:27,002 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-10-16 10:42:27,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:27,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-10-16 10:42:27,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2022-10-16 10:42:27,004 INFO L87 Difference]: Start difference. First operand 99 states and 105 transitions. Second operand has 18 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 18 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:27,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:27,687 INFO L93 Difference]: Finished difference Result 153 states and 163 transitions. [2022-10-16 10:42:27,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-10-16 10:42:27,687 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 18 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-10-16 10:42:27,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:27,689 INFO L225 Difference]: With dead ends: 153 [2022-10-16 10:42:27,689 INFO L226 Difference]: Without dead ends: 152 [2022-10-16 10:42:27,689 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=119, Invalid=433, Unknown=0, NotChecked=0, Total=552 [2022-10-16 10:42:27,690 INFO L413 NwaCegarLoop]: 50 mSDtfsCounter, 88 mSDsluCounter, 316 mSDsCounter, 0 mSdLazyCounter, 592 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 366 SdHoareTripleChecker+Invalid, 615 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 592 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:27,691 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [88 Valid, 366 Invalid, 615 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 592 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-10-16 10:42:27,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-10-16 10:42:27,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 112. [2022-10-16 10:42:27,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 111 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:27,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 122 transitions. [2022-10-16 10:42:27,698 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 122 transitions. Word has length 17 [2022-10-16 10:42:27,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:27,699 INFO L495 AbstractCegarLoop]: Abstraction has 112 states and 122 transitions. [2022-10-16 10:42:27,699 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 17 states have (on average 2.2941176470588234) internal successors, (39), 18 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:27,699 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 122 transitions. [2022-10-16 10:42:27,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-10-16 10:42:27,700 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:27,700 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:27,740 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:27,914 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-10-16 10:42:27,915 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:27,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:27,916 INFO L85 PathProgramCache]: Analyzing trace with hash 957153991, now seen corresponding path program 1 times [2022-10-16 10:42:27,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:27,917 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [609229522] [2022-10-16 10:42:27,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:27,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:27,932 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-16 10:42:27,932 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1982160201] [2022-10-16 10:42:27,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:27,932 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:27,932 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:27,933 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:27,952 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-10-16 10:42:27,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:27,998 INFO L263 TraceCheckSpWp]: Trace formula consists of 115 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 10:42:28,000 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:28,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:28,039 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:28,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:28,039 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [609229522] [2022-10-16 10:42:28,039 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-16 10:42:28,039 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1982160201] [2022-10-16 10:42:28,039 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1982160201] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:28,040 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:28,040 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:42:28,040 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087420595] [2022-10-16 10:42:28,040 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:28,040 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:42:28,041 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:28,041 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:42:28,041 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:28,041 INFO L87 Difference]: Start difference. First operand 112 states and 122 transitions. Second operand has 4 states, 3 states have (on average 6.0) internal successors, (18), 4 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:30,048 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2022-10-16 10:42:30,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:30,173 INFO L93 Difference]: Finished difference Result 130 states and 140 transitions. [2022-10-16 10:42:30,173 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 10:42:30,173 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 6.0) internal successors, (18), 4 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-10-16 10:42:30,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:30,174 INFO L225 Difference]: With dead ends: 130 [2022-10-16 10:42:30,174 INFO L226 Difference]: Without dead ends: 129 [2022-10-16 10:42:30,175 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:30,176 INFO L413 NwaCegarLoop]: 42 mSDtfsCounter, 144 mSDsluCounter, 18 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 10 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 144 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:30,176 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [144 Valid, 60 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 67 Invalid, 1 Unknown, 0 Unchecked, 2.1s Time] [2022-10-16 10:42:30,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2022-10-16 10:42:30,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 111. [2022-10-16 10:42:30,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 88 states have (on average 1.375) internal successors, (121), 110 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:30,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 121 transitions. [2022-10-16 10:42:30,186 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 121 transitions. Word has length 18 [2022-10-16 10:42:30,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:30,186 INFO L495 AbstractCegarLoop]: Abstraction has 111 states and 121 transitions. [2022-10-16 10:42:30,187 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 6.0) internal successors, (18), 4 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:30,187 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 121 transitions. [2022-10-16 10:42:30,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-10-16 10:42:30,187 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:30,188 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:30,224 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:30,402 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:30,403 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:30,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:30,404 INFO L85 PathProgramCache]: Analyzing trace with hash -620753493, now seen corresponding path program 1 times [2022-10-16 10:42:30,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:30,404 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1394113794] [2022-10-16 10:42:30,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:30,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:30,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:30,651 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:30,652 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:30,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1394113794] [2022-10-16 10:42:30,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1394113794] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:30,652 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1250537509] [2022-10-16 10:42:30,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:30,653 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:30,653 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:30,654 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:30,677 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-10-16 10:42:30,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:30,730 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 10 conjunts are in the unsatisfiable core [2022-10-16 10:42:30,732 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:30,745 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2022-10-16 10:42:30,788 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 9 [2022-10-16 10:42:30,793 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:30,794 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:30,794 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1250537509] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:30,794 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 10:42:30,794 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [6] total 8 [2022-10-16 10:42:30,795 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [194060294] [2022-10-16 10:42:30,795 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:30,795 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-10-16 10:42:30,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:30,796 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-10-16 10:42:30,796 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2022-10-16 10:42:30,796 INFO L87 Difference]: Start difference. First operand 111 states and 121 transitions. Second operand has 6 states, 5 states have (on average 3.6) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:30,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:30,967 INFO L93 Difference]: Finished difference Result 111 states and 121 transitions. [2022-10-16 10:42:30,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 10:42:30,968 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-10-16 10:42:30,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:30,969 INFO L225 Difference]: With dead ends: 111 [2022-10-16 10:42:30,969 INFO L226 Difference]: Without dead ends: 110 [2022-10-16 10:42:30,970 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2022-10-16 10:42:30,971 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 12 mSDsluCounter, 151 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 213 SdHoareTripleChecker+Invalid, 132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:30,971 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 213 Invalid, 132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:30,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2022-10-16 10:42:30,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2022-10-16 10:42:30,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 88 states have (on average 1.3522727272727273) internal successors, (119), 109 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:30,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 119 transitions. [2022-10-16 10:42:30,982 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 119 transitions. Word has length 18 [2022-10-16 10:42:30,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:30,982 INFO L495 AbstractCegarLoop]: Abstraction has 110 states and 119 transitions. [2022-10-16 10:42:30,983 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 3.6) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:30,983 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 119 transitions. [2022-10-16 10:42:30,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-10-16 10:42:30,983 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:30,983 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:31,028 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:31,197 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:31,197 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:31,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:31,198 INFO L85 PathProgramCache]: Analyzing trace with hash 456349357, now seen corresponding path program 1 times [2022-10-16 10:42:31,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:31,199 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587046229] [2022-10-16 10:42:31,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:31,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:31,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:31,281 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:31,282 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:31,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1587046229] [2022-10-16 10:42:31,282 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1587046229] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:31,282 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1515016714] [2022-10-16 10:42:31,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:31,282 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:31,283 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:31,283 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:31,307 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-10-16 10:42:31,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:31,365 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 5 conjunts are in the unsatisfiable core [2022-10-16 10:42:31,367 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:31,398 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:31,398 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:42:31,446 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:31,446 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1515016714] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:42:31,446 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:42:31,446 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 11 [2022-10-16 10:42:31,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [301568302] [2022-10-16 10:42:31,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:42:31,447 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-10-16 10:42:31,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:31,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-10-16 10:42:31,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2022-10-16 10:42:31,448 INFO L87 Difference]: Start difference. First operand 110 states and 119 transitions. Second operand has 12 states, 11 states have (on average 4.090909090909091) internal successors, (45), 12 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:31,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:31,671 INFO L93 Difference]: Finished difference Result 154 states and 165 transitions. [2022-10-16 10:42:31,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-16 10:42:31,672 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 4.090909090909091) internal successors, (45), 12 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-10-16 10:42:31,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:31,674 INFO L225 Difference]: With dead ends: 154 [2022-10-16 10:42:31,674 INFO L226 Difference]: Without dead ends: 153 [2022-10-16 10:42:31,675 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=163, Unknown=0, NotChecked=0, Total=240 [2022-10-16 10:42:31,676 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 137 mSDsluCounter, 150 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 137 SdHoareTripleChecker+Valid, 188 SdHoareTripleChecker+Invalid, 280 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:31,676 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [137 Valid, 188 Invalid, 280 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-10-16 10:42:31,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2022-10-16 10:42:31,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 121. [2022-10-16 10:42:31,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 121 states, 99 states have (on average 1.3232323232323233) internal successors, (131), 120 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:31,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 131 transitions. [2022-10-16 10:42:31,689 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 131 transitions. Word has length 20 [2022-10-16 10:42:31,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:31,689 INFO L495 AbstractCegarLoop]: Abstraction has 121 states and 131 transitions. [2022-10-16 10:42:31,689 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 4.090909090909091) internal successors, (45), 12 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:31,690 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 131 transitions. [2022-10-16 10:42:31,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-10-16 10:42:31,690 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:31,690 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:31,731 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:31,905 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-10-16 10:42:31,906 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:31,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:31,907 INFO L85 PathProgramCache]: Analyzing trace with hash -257699385, now seen corresponding path program 1 times [2022-10-16 10:42:31,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:31,907 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224239083] [2022-10-16 10:42:31,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:31,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:31,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:32,519 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:32,519 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:32,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224239083] [2022-10-16 10:42:32,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [224239083] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:32,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [434182218] [2022-10-16 10:42:32,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:32,520 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:32,520 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:32,522 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:32,540 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-10-16 10:42:32,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:32,597 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 26 conjunts are in the unsatisfiable core [2022-10-16 10:42:32,600 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:32,628 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:32,632 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:32,633 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:32,646 INFO L356 Elim1Store]: treesize reduction 11, result has 45.0 percent of original size [2022-10-16 10:42:32,646 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 23 [2022-10-16 10:42:32,657 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-10-16 10:42:32,658 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 50 [2022-10-16 10:42:32,681 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-10-16 10:42:32,833 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:32,834 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 10:42:33,069 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-10-16 10:42:33,089 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:33,090 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:42:33,507 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:33,507 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [434182218] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:42:33,507 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:42:33,507 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 21 [2022-10-16 10:42:33,507 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977237677] [2022-10-16 10:42:33,508 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:42:33,508 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-10-16 10:42:33,508 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:33,508 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-10-16 10:42:33,509 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=370, Unknown=0, NotChecked=0, Total=462 [2022-10-16 10:42:33,509 INFO L87 Difference]: Start difference. First operand 121 states and 131 transitions. Second operand has 22 states, 21 states have (on average 2.619047619047619) internal successors, (55), 22 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:34,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:34,035 INFO L93 Difference]: Finished difference Result 185 states and 198 transitions. [2022-10-16 10:42:34,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-10-16 10:42:34,036 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 21 states have (on average 2.619047619047619) internal successors, (55), 22 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-10-16 10:42:34,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:34,037 INFO L225 Difference]: With dead ends: 185 [2022-10-16 10:42:34,037 INFO L226 Difference]: Without dead ends: 184 [2022-10-16 10:42:34,038 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=135, Invalid=465, Unknown=0, NotChecked=0, Total=600 [2022-10-16 10:42:34,038 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 182 mSDsluCounter, 452 mSDsCounter, 0 mSdLazyCounter, 410 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 501 SdHoareTripleChecker+Invalid, 679 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 410 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 250 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:34,039 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [182 Valid, 501 Invalid, 679 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 410 Invalid, 0 Unknown, 250 Unchecked, 0.4s Time] [2022-10-16 10:42:34,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2022-10-16 10:42:34,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 128. [2022-10-16 10:42:34,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 106 states have (on average 1.3113207547169812) internal successors, (139), 127 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:34,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 139 transitions. [2022-10-16 10:42:34,051 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 139 transitions. Word has length 21 [2022-10-16 10:42:34,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:34,051 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 139 transitions. [2022-10-16 10:42:34,051 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 21 states have (on average 2.619047619047619) internal successors, (55), 22 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:34,051 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 139 transitions. [2022-10-16 10:42:34,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-10-16 10:42:34,052 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:34,052 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:34,094 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:34,266 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-10-16 10:42:34,267 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:34,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:34,267 INFO L85 PathProgramCache]: Analyzing trace with hash 301600395, now seen corresponding path program 1 times [2022-10-16 10:42:34,268 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:34,268 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818135554] [2022-10-16 10:42:34,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:34,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:34,280 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-16 10:42:34,281 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [163197906] [2022-10-16 10:42:34,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:34,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:34,281 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:34,282 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:34,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-10-16 10:42:34,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:34,360 INFO L263 TraceCheckSpWp]: Trace formula consists of 124 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 10:42:34,363 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:34,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:34,381 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:34,381 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:34,382 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1818135554] [2022-10-16 10:42:34,382 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-16 10:42:34,382 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [163197906] [2022-10-16 10:42:34,382 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [163197906] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:34,382 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:34,382 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:42:34,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422576428] [2022-10-16 10:42:34,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:34,383 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:42:34,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:34,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:42:34,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:34,384 INFO L87 Difference]: Start difference. First operand 128 states and 139 transitions. Second operand has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:34,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:34,472 INFO L93 Difference]: Finished difference Result 136 states and 147 transitions. [2022-10-16 10:42:34,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-10-16 10:42:34,473 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-10-16 10:42:34,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:34,474 INFO L225 Difference]: With dead ends: 136 [2022-10-16 10:42:34,474 INFO L226 Difference]: Without dead ends: 135 [2022-10-16 10:42:34,474 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:42:34,475 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 5 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 146 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:34,475 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 146 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:34,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2022-10-16 10:42:34,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 133. [2022-10-16 10:42:34,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 111 states have (on average 1.2972972972972974) internal successors, (144), 132 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:34,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 144 transitions. [2022-10-16 10:42:34,486 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 144 transitions. Word has length 22 [2022-10-16 10:42:34,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:34,486 INFO L495 AbstractCegarLoop]: Abstraction has 133 states and 144 transitions. [2022-10-16 10:42:34,486 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.333333333333333) internal successors, (22), 4 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:34,486 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 144 transitions. [2022-10-16 10:42:34,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-10-16 10:42:34,487 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:34,487 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:34,525 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:34,700 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-10-16 10:42:34,701 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:34,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:34,701 INFO L85 PathProgramCache]: Analyzing trace with hash 601253747, now seen corresponding path program 1 times [2022-10-16 10:42:34,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:34,702 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1590416269] [2022-10-16 10:42:34,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:34,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:34,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:35,261 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:35,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:35,261 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1590416269] [2022-10-16 10:42:35,261 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1590416269] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:35,261 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [822169189] [2022-10-16 10:42:35,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:35,262 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:35,262 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:35,263 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:35,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-10-16 10:42:35,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:35,344 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 29 conjunts are in the unsatisfiable core [2022-10-16 10:42:35,347 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:35,370 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:35,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:35,376 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 26 [2022-10-16 10:42:35,406 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:35,408 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2022-10-16 10:42:35,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-10-16 10:42:35,426 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-10-16 10:42:35,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:35,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:35,437 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:35,438 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2022-10-16 10:42:35,449 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-10-16 10:42:35,449 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 19 [2022-10-16 10:42:35,535 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:35,538 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 10:42:35,716 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-10-16 10:42:35,748 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:35,748 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:42:36,405 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:36,405 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [822169189] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:42:36,405 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:42:36,405 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 6] total 15 [2022-10-16 10:42:36,406 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985062802] [2022-10-16 10:42:36,406 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:42:36,407 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-10-16 10:42:36,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:36,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-10-16 10:42:36,407 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2022-10-16 10:42:36,408 INFO L87 Difference]: Start difference. First operand 133 states and 144 transitions. Second operand has 16 states, 15 states have (on average 3.8666666666666667) internal successors, (58), 16 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:37,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:37,142 INFO L93 Difference]: Finished difference Result 280 states and 298 transitions. [2022-10-16 10:42:37,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-10-16 10:42:37,143 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 15 states have (on average 3.8666666666666667) internal successors, (58), 16 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-10-16 10:42:37,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:37,144 INFO L225 Difference]: With dead ends: 280 [2022-10-16 10:42:37,144 INFO L226 Difference]: Without dead ends: 279 [2022-10-16 10:42:37,145 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=122, Invalid=384, Unknown=0, NotChecked=0, Total=506 [2022-10-16 10:42:37,146 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 246 mSDsluCounter, 447 mSDsCounter, 0 mSdLazyCounter, 454 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 246 SdHoareTripleChecker+Valid, 496 SdHoareTripleChecker+Invalid, 614 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 454 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 128 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:37,146 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [246 Valid, 496 Invalid, 614 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 454 Invalid, 0 Unknown, 128 Unchecked, 0.5s Time] [2022-10-16 10:42:37,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2022-10-16 10:42:37,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 141. [2022-10-16 10:42:37,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 119 states have (on average 1.2941176470588236) internal successors, (154), 140 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:37,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 154 transitions. [2022-10-16 10:42:37,161 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 154 transitions. Word has length 22 [2022-10-16 10:42:37,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:37,161 INFO L495 AbstractCegarLoop]: Abstraction has 141 states and 154 transitions. [2022-10-16 10:42:37,161 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 15 states have (on average 3.8666666666666667) internal successors, (58), 16 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:37,161 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 154 transitions. [2022-10-16 10:42:37,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-10-16 10:42:37,162 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:37,162 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:37,197 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:37,376 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-10-16 10:42:37,377 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:37,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:37,378 INFO L85 PathProgramCache]: Analyzing trace with hash 759677818, now seen corresponding path program 1 times [2022-10-16 10:42:37,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:37,378 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953662418] [2022-10-16 10:42:37,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:37,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:37,390 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-16 10:42:37,390 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [622183481] [2022-10-16 10:42:37,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:37,390 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:37,390 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:37,391 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:37,393 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-10-16 10:42:37,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:37,482 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 3 conjunts are in the unsatisfiable core [2022-10-16 10:42:37,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:37,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:37,507 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:37,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:37,507 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953662418] [2022-10-16 10:42:37,507 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-16 10:42:37,508 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [622183481] [2022-10-16 10:42:37,508 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [622183481] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:37,508 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:37,508 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:42:37,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709939897] [2022-10-16 10:42:37,508 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:37,509 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:42:37,509 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:37,509 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:42:37,509 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:37,510 INFO L87 Difference]: Start difference. First operand 141 states and 154 transitions. Second operand has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:37,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:37,616 INFO L93 Difference]: Finished difference Result 160 states and 173 transitions. [2022-10-16 10:42:37,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 10:42:37,616 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-10-16 10:42:37,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:37,617 INFO L225 Difference]: With dead ends: 160 [2022-10-16 10:42:37,617 INFO L226 Difference]: Without dead ends: 158 [2022-10-16 10:42:37,618 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:42:37,618 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 43 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 100 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 100 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:37,619 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 90 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 100 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:37,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2022-10-16 10:42:37,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 139. [2022-10-16 10:42:37,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 119 states have (on average 1.2773109243697478) internal successors, (152), 138 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:37,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 152 transitions. [2022-10-16 10:42:37,631 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 152 transitions. Word has length 23 [2022-10-16 10:42:37,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:37,632 INFO L495 AbstractCegarLoop]: Abstraction has 139 states and 152 transitions. [2022-10-16 10:42:37,632 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 7.666666666666667) internal successors, (23), 4 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:37,632 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 152 transitions. [2022-10-16 10:42:37,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-10-16 10:42:37,632 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:37,633 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:37,670 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:37,847 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-10-16 10:42:37,847 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:37,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:37,848 INFO L85 PathProgramCache]: Analyzing trace with hash -2015731147, now seen corresponding path program 1 times [2022-10-16 10:42:37,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:37,849 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651153195] [2022-10-16 10:42:37,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:37,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:37,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:37,897 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 10:42:37,898 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:37,898 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651153195] [2022-10-16 10:42:37,898 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [651153195] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:37,898 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:37,898 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:42:37,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [815983927] [2022-10-16 10:42:37,899 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:37,899 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:42:37,899 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:37,899 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:42:37,900 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:42:37,900 INFO L87 Difference]: Start difference. First operand 139 states and 152 transitions. Second operand has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:37,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:37,998 INFO L93 Difference]: Finished difference Result 158 states and 171 transitions. [2022-10-16 10:42:37,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 10:42:37,998 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-10-16 10:42:37,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:37,999 INFO L225 Difference]: With dead ends: 158 [2022-10-16 10:42:38,000 INFO L226 Difference]: Without dead ends: 156 [2022-10-16 10:42:38,000 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:42:38,001 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 28 mSDsluCounter, 68 mSDsCounter, 0 mSdLazyCounter, 96 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 116 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 96 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:38,001 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 116 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 96 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:38,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2022-10-16 10:42:38,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 144. [2022-10-16 10:42:38,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 124 states have (on average 1.282258064516129) internal successors, (159), 143 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:38,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 159 transitions. [2022-10-16 10:42:38,014 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 159 transitions. Word has length 24 [2022-10-16 10:42:38,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:38,014 INFO L495 AbstractCegarLoop]: Abstraction has 144 states and 159 transitions. [2022-10-16 10:42:38,014 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 8.0) internal successors, (24), 4 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:38,014 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 159 transitions. [2022-10-16 10:42:38,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-10-16 10:42:38,015 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:38,015 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:38,015 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-10-16 10:42:38,015 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:38,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:38,016 INFO L85 PathProgramCache]: Analyzing trace with hash -94052804, now seen corresponding path program 1 times [2022-10-16 10:42:38,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:38,016 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932597481] [2022-10-16 10:42:38,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:38,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:38,026 ERROR L245 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2022-10-16 10:42:38,027 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [846226455] [2022-10-16 10:42:38,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:38,027 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:38,027 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:38,028 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:38,046 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-10-16 10:42:38,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:38,104 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 6 conjunts are in the unsatisfiable core [2022-10-16 10:42:38,105 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:38,178 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:38,178 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:38,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:38,178 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [932597481] [2022-10-16 10:42:38,178 WARN L310 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2022-10-16 10:42:38,179 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [846226455] [2022-10-16 10:42:38,179 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [846226455] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:38,179 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:42:38,179 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-10-16 10:42:38,179 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100836220] [2022-10-16 10:42:38,179 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:38,180 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-10-16 10:42:38,180 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:38,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-10-16 10:42:38,180 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-10-16 10:42:38,181 INFO L87 Difference]: Start difference. First operand 144 states and 159 transitions. Second operand has 7 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:38,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:38,336 INFO L93 Difference]: Finished difference Result 188 states and 201 transitions. [2022-10-16 10:42:38,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-10-16 10:42:38,337 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-10-16 10:42:38,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:38,338 INFO L225 Difference]: With dead ends: 188 [2022-10-16 10:42:38,338 INFO L226 Difference]: Without dead ends: 152 [2022-10-16 10:42:38,339 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2022-10-16 10:42:38,339 INFO L413 NwaCegarLoop]: 40 mSDtfsCounter, 75 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 75 SdHoareTripleChecker+Valid, 107 SdHoareTripleChecker+Invalid, 156 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:38,340 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [75 Valid, 107 Invalid, 156 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:38,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-10-16 10:42:38,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 140. [2022-10-16 10:42:38,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 120 states have (on average 1.25) internal successors, (150), 139 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:38,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 150 transitions. [2022-10-16 10:42:38,351 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 150 transitions. Word has length 25 [2022-10-16 10:42:38,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:38,352 INFO L495 AbstractCegarLoop]: Abstraction has 140 states and 150 transitions. [2022-10-16 10:42:38,352 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:38,352 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 150 transitions. [2022-10-16 10:42:38,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-10-16 10:42:38,353 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:38,353 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:38,395 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:38,566 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:38,567 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:38,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:38,568 INFO L85 PathProgramCache]: Analyzing trace with hash 1586227149, now seen corresponding path program 1 times [2022-10-16 10:42:38,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:38,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159496252] [2022-10-16 10:42:38,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:38,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:38,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:38,626 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 10:42:38,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:38,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159496252] [2022-10-16 10:42:38,627 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [159496252] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:38,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [11003571] [2022-10-16 10:42:38,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:38,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:38,627 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:38,628 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:38,643 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-10-16 10:42:38,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:38,722 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 4 conjunts are in the unsatisfiable core [2022-10-16 10:42:38,724 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:38,757 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 10:42:38,757 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:42:38,793 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 10:42:38,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [11003571] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:42:38,793 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:42:38,793 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 9 [2022-10-16 10:42:38,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731446983] [2022-10-16 10:42:38,794 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:42:38,794 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-10-16 10:42:38,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:38,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-10-16 10:42:38,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2022-10-16 10:42:38,795 INFO L87 Difference]: Start difference. First operand 140 states and 150 transitions. Second operand has 10 states, 9 states have (on average 5.666666666666667) internal successors, (51), 10 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:38,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:38,985 INFO L93 Difference]: Finished difference Result 167 states and 179 transitions. [2022-10-16 10:42:38,985 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-16 10:42:38,985 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 5.666666666666667) internal successors, (51), 10 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-10-16 10:42:38,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:38,986 INFO L225 Difference]: With dead ends: 167 [2022-10-16 10:42:38,987 INFO L226 Difference]: Without dead ends: 166 [2022-10-16 10:42:38,987 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 48 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=139, Unknown=0, NotChecked=0, Total=210 [2022-10-16 10:42:38,988 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 155 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 155 SdHoareTripleChecker+Valid, 104 SdHoareTripleChecker+Invalid, 208 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:38,988 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [155 Valid, 104 Invalid, 208 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:38,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2022-10-16 10:42:38,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 139. [2022-10-16 10:42:38,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 120 states have (on average 1.2416666666666667) internal successors, (149), 138 states have internal predecessors, (149), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:39,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 149 transitions. [2022-10-16 10:42:39,000 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 149 transitions. Word has length 27 [2022-10-16 10:42:39,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:39,001 INFO L495 AbstractCegarLoop]: Abstraction has 139 states and 149 transitions. [2022-10-16 10:42:39,001 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 5.666666666666667) internal successors, (51), 10 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:39,001 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 149 transitions. [2022-10-16 10:42:39,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-10-16 10:42:39,001 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:39,002 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:39,045 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:39,217 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:39,217 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:39,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:39,218 INFO L85 PathProgramCache]: Analyzing trace with hash 1928401445, now seen corresponding path program 1 times [2022-10-16 10:42:39,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:39,218 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150812648] [2022-10-16 10:42:39,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:39,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:39,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:39,313 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 10:42:39,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:39,314 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150812648] [2022-10-16 10:42:39,314 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [150812648] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:39,314 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [577715808] [2022-10-16 10:42:39,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:39,314 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:39,314 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:39,315 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:39,338 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-10-16 10:42:39,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:39,404 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 4 conjunts are in the unsatisfiable core [2022-10-16 10:42:39,405 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:39,437 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 10:42:39,437 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-10-16 10:42:39,437 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [577715808] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:42:39,437 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-10-16 10:42:39,437 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2022-10-16 10:42:39,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249796138] [2022-10-16 10:42:39,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:42:39,438 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-16 10:42:39,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:42:39,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-16 10:42:39,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2022-10-16 10:42:39,439 INFO L87 Difference]: Start difference. First operand 139 states and 149 transitions. Second operand has 5 states, 4 states have (on average 7.0) internal successors, (28), 5 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:39,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:42:39,559 INFO L93 Difference]: Finished difference Result 150 states and 158 transitions. [2022-10-16 10:42:39,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-16 10:42:39,560 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 7.0) internal successors, (28), 5 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-10-16 10:42:39,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:42:39,561 INFO L225 Difference]: With dead ends: 150 [2022-10-16 10:42:39,561 INFO L226 Difference]: Without dead ends: 147 [2022-10-16 10:42:39,561 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2022-10-16 10:42:39,563 INFO L413 NwaCegarLoop]: 46 mSDtfsCounter, 36 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 133 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 128 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 133 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:42:39,563 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 128 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 133 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:42:39,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2022-10-16 10:42:39,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 135. [2022-10-16 10:42:39,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 119 states have (on average 1.218487394957983) internal successors, (145), 134 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:39,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 145 transitions. [2022-10-16 10:42:39,579 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 145 transitions. Word has length 28 [2022-10-16 10:42:39,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:42:39,580 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 145 transitions. [2022-10-16 10:42:39,580 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 7.0) internal successors, (28), 5 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:42:39,580 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 145 transitions. [2022-10-16 10:42:39,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-10-16 10:42:39,582 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:42:39,582 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:42:39,639 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-10-16 10:42:39,795 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:39,796 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:42:39,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:42:39,797 INFO L85 PathProgramCache]: Analyzing trace with hash 336221903, now seen corresponding path program 2 times [2022-10-16 10:42:39,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:42:39,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340508091] [2022-10-16 10:42:39,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:42:39,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:42:39,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:42:40,763 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:40,763 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:42:40,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340508091] [2022-10-16 10:42:40,764 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1340508091] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:42:40,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1370258426] [2022-10-16 10:42:40,764 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 10:42:40,764 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:42:40,764 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:42:40,766 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:42:40,785 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-10-16 10:42:40,861 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-16 10:42:40,861 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 10:42:40,863 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 30 conjunts are in the unsatisfiable core [2022-10-16 10:42:40,866 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:42:40,905 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:40,910 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:40,911 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:40,912 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:40,913 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 19 [2022-10-16 10:42:40,926 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-10-16 10:42:40,926 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 90 treesize of output 84 [2022-10-16 10:42:40,946 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-10-16 10:42:41,082 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 37 [2022-10-16 10:42:41,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:42:41,265 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-10-16 10:42:41,501 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-10-16 10:42:41,527 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:42:41,527 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:43:28,970 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_981 Int) (v_ArrVal_980 Int) (|v_ULTIMATE.start_main_~i~0#1_74| Int)) (or (< (let ((.cse0 (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* 8 |c_ULTIMATE.start_main_~i~0#1|) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_980) (+ (* |v_ULTIMATE.start_main_~i~0#1_74| 8) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_981))) (+ (select .cse0 |c_ULTIMATE.start_main_~a~0#1.offset|) (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| .cse0) |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|))) 9223372036854775808) (< |v_ULTIMATE.start_main_~i~0#1_74| (+ |c_ULTIMATE.start_main_~i~0#1| 1)))) is different from false [2022-10-16 10:43:34,334 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-10-16 10:43:34,335 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1370258426] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:43:34,335 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:43:34,335 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9, 11] total 25 [2022-10-16 10:43:34,335 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094985628] [2022-10-16 10:43:34,335 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:43:34,338 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-10-16 10:43:34,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:43:34,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-10-16 10:43:34,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=478, Unknown=27, NotChecked=46, Total=650 [2022-10-16 10:43:34,340 INFO L87 Difference]: Start difference. First operand 135 states and 145 transitions. Second operand has 26 states, 25 states have (on average 3.16) internal successors, (79), 26 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:43:35,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:43:35,155 INFO L93 Difference]: Finished difference Result 157 states and 166 transitions. [2022-10-16 10:43:35,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-16 10:43:35,157 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 25 states have (on average 3.16) internal successors, (79), 26 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-10-16 10:43:35,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:43:35,160 INFO L225 Difference]: With dead ends: 157 [2022-10-16 10:43:35,160 INFO L226 Difference]: Without dead ends: 156 [2022-10-16 10:43:35,161 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 40 SyntacticMatches, 5 SemanticMatches, 31 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 53.2s TimeCoverageRelationStatistics Valid=201, Invalid=768, Unknown=27, NotChecked=60, Total=1056 [2022-10-16 10:43:35,161 INFO L413 NwaCegarLoop]: 43 mSDtfsCounter, 195 mSDsluCounter, 321 mSDsCounter, 0 mSdLazyCounter, 452 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 195 SdHoareTripleChecker+Valid, 364 SdHoareTripleChecker+Invalid, 807 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 452 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 333 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-10-16 10:43:35,162 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [195 Valid, 364 Invalid, 807 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 452 Invalid, 0 Unknown, 333 Unchecked, 0.4s Time] [2022-10-16 10:43:35,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2022-10-16 10:43:35,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 128. [2022-10-16 10:43:35,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 112 states have (on average 1.2142857142857142) internal successors, (136), 127 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:43:35,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2022-10-16 10:43:35,172 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 29 [2022-10-16 10:43:35,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:43:35,173 INFO L495 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2022-10-16 10:43:35,173 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 25 states have (on average 3.16) internal successors, (79), 26 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:43:35,173 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2022-10-16 10:43:35,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-10-16 10:43:35,174 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:43:35,174 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:43:35,207 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2022-10-16 10:43:35,388 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-10-16 10:43:35,389 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:43:35,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:43:35,390 INFO L85 PathProgramCache]: Analyzing trace with hash -475019823, now seen corresponding path program 1 times [2022-10-16 10:43:35,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:43:35,391 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347509313] [2022-10-16 10:43:35,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:43:35,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:43:35,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:43:35,530 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:43:35,530 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:43:35,530 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347509313] [2022-10-16 10:43:35,530 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [347509313] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:43:35,530 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1301565837] [2022-10-16 10:43:35,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:43:35,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:43:35,531 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:43:35,534 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:43:35,560 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-10-16 10:43:35,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:43:35,637 INFO L263 TraceCheckSpWp]: Trace formula consists of 148 conjuncts, 8 conjunts are in the unsatisfiable core [2022-10-16 10:43:35,639 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:43:35,750 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:43:35,750 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:43:35,836 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 6 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:43:35,836 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1301565837] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:43:35,836 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:43:35,837 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 16 [2022-10-16 10:43:35,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135748032] [2022-10-16 10:43:35,837 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:43:35,837 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-10-16 10:43:35,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:43:35,838 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-10-16 10:43:35,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-10-16 10:43:35,838 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand has 16 states, 16 states have (on average 3.9375) internal successors, (63), 16 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:43:36,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:43:36,230 INFO L93 Difference]: Finished difference Result 273 states and 287 transitions. [2022-10-16 10:43:36,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-10-16 10:43:36,230 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 3.9375) internal successors, (63), 16 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-10-16 10:43:36,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:43:36,231 INFO L225 Difference]: With dead ends: 273 [2022-10-16 10:43:36,231 INFO L226 Difference]: Without dead ends: 209 [2022-10-16 10:43:36,232 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 50 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=362, Unknown=0, NotChecked=0, Total=462 [2022-10-16 10:43:36,233 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 213 mSDsluCounter, 188 mSDsCounter, 0 mSdLazyCounter, 357 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 213 SdHoareTripleChecker+Valid, 218 SdHoareTripleChecker+Invalid, 394 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 357 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-10-16 10:43:36,233 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [213 Valid, 218 Invalid, 394 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 357 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-10-16 10:43:36,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2022-10-16 10:43:36,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 180. [2022-10-16 10:43:36,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 164 states have (on average 1.201219512195122) internal successors, (197), 179 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:43:36,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 197 transitions. [2022-10-16 10:43:36,248 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 197 transitions. Word has length 31 [2022-10-16 10:43:36,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:43:36,248 INFO L495 AbstractCegarLoop]: Abstraction has 180 states and 197 transitions. [2022-10-16 10:43:36,249 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 3.9375) internal successors, (63), 16 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:43:36,249 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 197 transitions. [2022-10-16 10:43:36,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-10-16 10:43:36,249 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:43:36,249 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:43:36,291 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-10-16 10:43:36,464 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:43:36,465 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:43:36,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:43:36,465 INFO L85 PathProgramCache]: Analyzing trace with hash 921207273, now seen corresponding path program 1 times [2022-10-16 10:43:36,465 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:43:36,465 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934895809] [2022-10-16 10:43:36,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:43:36,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:43:36,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:43:37,161 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-10-16 10:43:37,161 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:43:37,161 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934895809] [2022-10-16 10:43:37,161 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [934895809] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:43:37,162 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [976012282] [2022-10-16 10:43:37,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:43:37,162 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:43:37,162 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:43:37,163 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:43:37,172 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-10-16 10:43:37,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:43:37,258 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 32 conjunts are in the unsatisfiable core [2022-10-16 10:43:37,261 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:43:37,865 INFO L356 Elim1Store]: treesize reduction 252, result has 37.8 percent of original size [2022-10-16 10:43:37,866 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 6 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 8 new quantified variables, introduced 19 case distinctions, treesize of input 226 treesize of output 790 [2022-10-16 10:43:37,916 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2022-10-16 10:43:37,965 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2022-10-16 10:43:37,999 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2022-10-16 10:43:38,276 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2022-10-16 10:43:39,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:43:39,210 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:39,246 INFO L244 Elim1Store]: Index analysis took 168 ms [2022-10-16 10:43:39,351 INFO L356 Elim1Store]: treesize reduction 96, result has 15.0 percent of original size [2022-10-16 10:43:39,352 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 18 case distinctions, treesize of input 363 treesize of output 617 [2022-10-16 10:43:40,161 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:40,189 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:40,217 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:40,218 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:40,221 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:40,234 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:40,238 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:40,244 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 387 [2022-10-16 10:43:40,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-10-16 10:43:40,425 WARN L234 Elim1Store]: Array PQE input equivalent to false [2022-10-16 10:43:40,435 WARN L234 Elim1Store]: Array PQE input equivalent to false [2022-10-16 10:43:40,481 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 160 treesize of output 156 [2022-10-16 10:43:40,903 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 442 treesize of output 438 [2022-10-16 10:43:41,347 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:41,353 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:41,354 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 72 [2022-10-16 10:43:41,844 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:41,859 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:41,867 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:41,891 INFO L356 Elim1Store]: treesize reduction 37, result has 17.8 percent of original size [2022-10-16 10:43:41,892 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 7 case distinctions, treesize of input 235 treesize of output 325 [2022-10-16 10:43:42,080 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,105 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,118 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,154 INFO L356 Elim1Store]: treesize reduction 37, result has 17.8 percent of original size [2022-10-16 10:43:42,154 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 7 case distinctions, treesize of input 350 treesize of output 432 [2022-10-16 10:43:42,526 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,530 WARN L234 Elim1Store]: Array PQE input equivalent to false [2022-10-16 10:43:42,730 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,754 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,757 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,757 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:42,764 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 195 treesize of output 271 [2022-10-16 10:43:43,640 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:43,675 INFO L356 Elim1Store]: treesize reduction 58, result has 12.1 percent of original size [2022-10-16 10:43:43,676 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 1393 treesize of output 1294 [2022-10-16 10:43:44,058 WARN L234 Elim1Store]: Array PQE input equivalent to false [2022-10-16 10:43:44,123 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-10-16 10:43:44,475 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-10-16 10:43:44,984 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:45,003 INFO L356 Elim1Store]: treesize reduction 48, result has 2.0 percent of original size [2022-10-16 10:43:45,003 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 262 treesize of output 175 [2022-10-16 10:43:45,068 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:45,072 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:45,096 INFO L356 Elim1Store]: treesize reduction 26, result has 56.7 percent of original size [2022-10-16 10:43:45,097 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 5 case distinctions, treesize of input 354 treesize of output 320 [2022-10-16 10:43:45,124 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-10-16 10:43:45,272 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-10-16 10:43:45,287 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2022-10-16 10:43:45,361 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:45,362 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 23 [2022-10-16 10:43:45,967 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:46,604 INFO L356 Elim1Store]: treesize reduction 136, result has 65.1 percent of original size [2022-10-16 10:43:46,605 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 9 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 11 new quantified variables, introduced 19 case distinctions, treesize of input 2969 treesize of output 5107 [2022-10-16 10:43:56,219 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,252 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,264 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,265 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,277 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,346 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,360 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,575 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:56,984 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:57,117 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:57,225 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:57,225 INFO L244 Elim1Store]: Index analysis took 1038 ms [2022-10-16 10:43:57,239 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:43:58,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,161 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,162 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,162 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,170 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,171 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,171 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,178 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,179 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,196 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,196 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,206 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,207 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,213 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,213 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:58,223 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 872 treesize of output 5970 [2022-10-16 10:43:59,673 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:59,762 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:59,793 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:59,794 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:43:59,829 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:00,003 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:00,049 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:00,716 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:02,256 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:02,733 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:03,213 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:03,213 INFO L244 Elim1Store]: Index analysis took 3591 ms [2022-10-16 10:44:03,225 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:44:04,364 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:04,395 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:04,405 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:04,405 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:04,427 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:04,492 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:04,503 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:04,719 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:05,188 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:05,339 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:05,511 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:05,512 INFO L244 Elim1Store]: Index analysis took 1200 ms [2022-10-16 10:44:05,525 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:44:06,770 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,771 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,776 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,777 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,777 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,778 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,779 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,780 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,790 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,791 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,791 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,798 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,798 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,815 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,816 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,827 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,828 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,834 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,835 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:06,844 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 872 treesize of output 5970 [2022-10-16 10:44:07,690 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:07,743 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:07,754 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:07,755 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:07,769 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:07,827 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:07,839 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:08,033 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:08,477 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:08,622 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:08,736 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:08,737 INFO L244 Elim1Store]: Index analysis took 1091 ms [2022-10-16 10:44:08,745 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:44:09,984 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:10,120 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:10,142 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:10,143 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:10,191 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:10,507 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:10,546 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:11,139 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:12,905 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:13,483 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:14,049 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:14,050 INFO L244 Elim1Store]: Index analysis took 4093 ms [2022-10-16 10:44:14,061 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:44:15,548 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:15,575 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:15,584 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:15,585 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:15,593 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:15,646 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:15,655 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:15,823 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:16,230 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:16,363 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:16,466 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:16,467 INFO L244 Elim1Store]: Index analysis took 930 ms [2022-10-16 10:44:16,477 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:44:17,597 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:17,734 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:17,744 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:17,744 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:17,754 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:17,811 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:17,821 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:18,012 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:18,472 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:18,627 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:18,751 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:18,752 INFO L244 Elim1Store]: Index analysis took 1222 ms [2022-10-16 10:44:18,762 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:44:19,926 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:19,965 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:19,979 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:19,980 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:19,993 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:20,054 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:20,064 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:20,248 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:20,684 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:20,829 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:20,942 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:20,943 INFO L244 Elim1Store]: Index analysis took 1029 ms [2022-10-16 10:44:20,953 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 901 treesize of output 5997 [2022-10-16 10:44:21,947 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,948 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,952 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,953 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,955 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,964 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,964 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,965 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,965 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,965 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,966 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,967 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,968 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,978 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,979 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,983 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,984 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:21,992 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 8 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 872 treesize of output 5970 [2022-10-16 10:44:36,643 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:36,722 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:36,781 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:36,838 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:36,862 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:36,862 INFO L244 Elim1Store]: Index analysis took 225 ms [2022-10-16 10:44:36,867 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 532 treesize of output 1983 [2022-10-16 10:44:37,464 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,465 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,471 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,472 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,472 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,477 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,477 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,486 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,487 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,492 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,492 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,496 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 503 treesize of output 1956 [2022-10-16 10:44:37,807 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,808 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,823 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,824 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,834 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,835 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,842 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,843 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,848 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,848 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:37,851 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 503 treesize of output 1956 [2022-10-16 10:44:38,116 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,116 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,129 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,130 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,140 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,140 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,153 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,158 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,161 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 503 treesize of output 1956 [2022-10-16 10:44:38,767 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,880 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:38,962 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,021 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,055 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,055 INFO L244 Elim1Store]: Index analysis took 294 ms [2022-10-16 10:44:39,061 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 532 treesize of output 1983 [2022-10-16 10:44:39,333 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,445 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,511 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,556 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,575 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,576 INFO L244 Elim1Store]: Index analysis took 251 ms [2022-10-16 10:44:39,581 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 532 treesize of output 1983 [2022-10-16 10:44:39,790 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,877 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,937 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,975 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,996 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:39,997 INFO L244 Elim1Store]: Index analysis took 213 ms [2022-10-16 10:44:40,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 532 treesize of output 1983 [2022-10-16 10:44:40,336 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:40,411 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:40,468 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:40,511 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:40,548 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:40,549 INFO L244 Elim1Store]: Index analysis took 219 ms [2022-10-16 10:44:40,554 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 5 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 532 treesize of output 1983 [2022-10-16 10:44:46,810 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,811 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,820 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,821 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,828 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,828 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,832 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,833 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:46,835 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 283 treesize of output 829 [2022-10-16 10:44:47,066 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,067 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,071 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,072 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,073 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,077 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,078 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,082 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,083 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,084 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 283 treesize of output 829 [2022-10-16 10:44:47,693 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,735 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,762 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,777 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:47,779 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 312 treesize of output 852 [2022-10-16 10:44:47,996 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,049 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,084 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,103 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,104 INFO L244 Elim1Store]: Index analysis took 112 ms [2022-10-16 10:44:48,107 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 312 treesize of output 852 [2022-10-16 10:44:48,252 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,253 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,262 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,262 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,269 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,269 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,273 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,274 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,277 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 283 treesize of output 829 [2022-10-16 10:44:48,487 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,527 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,555 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,570 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,573 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 312 treesize of output 852 [2022-10-16 10:44:48,930 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:48,974 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:49,003 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:49,019 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:49,022 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 312 treesize of output 852 [2022-10-16 10:44:52,351 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,369 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,381 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,383 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 249 treesize of output 453 [2022-10-16 10:44:52,822 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,840 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,852 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,854 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 249 treesize of output 453 [2022-10-16 10:44:52,926 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,927 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,933 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,933 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,937 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,937 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:52,938 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 220 treesize of output 430 [2022-10-16 10:44:53,065 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,065 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,071 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,072 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,076 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,076 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,077 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 220 treesize of output 430 [2022-10-16 10:44:53,244 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,265 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,278 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,281 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 249 treesize of output 453 [2022-10-16 10:44:53,596 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,613 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,625 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,627 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 249 treesize of output 453 [2022-10-16 10:44:53,779 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,779 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,785 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,786 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,790 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,790 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:53,792 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 3 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 220 treesize of output 430 [2022-10-16 10:44:54,046 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2965 treesize of output 2941 [2022-10-16 10:44:57,302 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:44:57,303 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:57,408 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:57,408 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:44:57,418 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 4 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 2256 treesize of output 2791 [2022-10-16 10:45:01,746 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:01,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:01,752 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:01,773 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:01,778 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 546 treesize of output 785 [2022-10-16 10:45:02,137 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:02,137 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,151 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,164 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 1488 treesize of output 2185 [2022-10-16 10:45:02,357 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:02,357 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,365 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,369 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 318 treesize of output 71 [2022-10-16 10:45:02,385 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:02,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:02,388 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,398 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,398 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,400 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,406 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 599 treesize of output 350 [2022-10-16 10:45:02,455 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,455 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,459 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,460 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,461 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 29 [2022-10-16 10:45:02,536 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:02,536 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,550 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,553 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 334 treesize of output 511 [2022-10-16 10:45:02,758 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:02,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:02,765 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,796 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,798 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:02,802 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 1249 treesize of output 1039 [2022-10-16 10:45:03,181 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,185 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 280 treesize of output 33 [2022-10-16 10:45:03,238 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,239 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,245 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,246 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,246 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,247 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,247 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:03,250 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 333 treesize of output 194 [2022-10-16 10:45:05,485 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:05,500 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 2186 treesize of output 33 [2022-10-16 10:45:06,279 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-10-16 10:45:06,280 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 50 [2022-10-16 10:45:16,006 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:16,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:16,567 INFO L356 Elim1Store]: treesize reduction 13, result has 58.1 percent of original size [2022-10-16 10:45:16,568 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 963 treesize of output 828 [2022-10-16 10:45:16,708 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 761 treesize of output 757 [2022-10-16 10:45:16,776 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 757 treesize of output 753 [2022-10-16 10:45:16,850 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 753 treesize of output 751 [2022-10-16 10:45:16,938 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 751 treesize of output 749 [2022-10-16 10:45:17,074 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 749 treesize of output 747 [2022-10-16 10:45:17,230 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 747 treesize of output 745 [2022-10-16 10:45:17,352 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 745 treesize of output 741 [2022-10-16 10:45:17,485 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 741 treesize of output 737 [2022-10-16 10:45:17,693 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2022-10-16 10:45:17,725 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-10-16 10:45:17,745 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-10-16 10:45:17,808 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 14 [2022-10-16 10:45:17,838 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2022-10-16 10:45:17,845 WARN L234 Elim1Store]: Array PQE input equivalent to false [2022-10-16 10:45:17,952 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 216 treesize of output 204 [2022-10-16 10:45:18,133 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 31 [2022-10-16 10:45:18,159 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 18 [2022-10-16 10:45:18,574 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:18,576 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 30 [2022-10-16 10:45:18,813 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-10-16 10:45:18,898 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:45:18,898 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:45:19,677 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:45:19,677 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [976012282] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:45:19,678 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:45:19,678 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 8] total 19 [2022-10-16 10:45:19,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817542015] [2022-10-16 10:45:19,678 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:45:19,678 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-10-16 10:45:19,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:45:19,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-10-16 10:45:19,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=292, Unknown=3, NotChecked=0, Total=380 [2022-10-16 10:45:19,680 INFO L87 Difference]: Start difference. First operand 180 states and 197 transitions. Second operand has 20 states, 19 states have (on average 4.7894736842105265) internal successors, (91), 20 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:20,216 WARN L855 $PredicateComparison]: unable to prove that (let ((.cse11 (select |c_#memory_int| |c_ULTIMATE.start_main_~c~0#1.base|))) (let ((.cse2 (= |c_ULTIMATE.start_main_~a~0#1.base| |c_ULTIMATE.start_main_~c~0#1.base|)) (.cse0 (select .cse11 |c_ULTIMATE.start_main_~c~0#1.offset|)) (.cse1 (select |c_#memory_int| |c_ULTIMATE.start_main_~b~0#1.base|))) (and (= .cse0 0) (= 0 |c_ULTIMATE.start_main_~b~0#1.offset|) (= (select .cse1 |c_ULTIMATE.start_main_~b~0#1.offset|) 1) (not .cse2) (= |c_ULTIMATE.start_main_~c~0#1.offset| 0) (not (= |c_ULTIMATE.start_main_~b~0#1.base| |c_ULTIMATE.start_main_~a~0#1.base|)) (= |c_ULTIMATE.start_main_~a~0#1.offset| 0) (let ((.cse5 (select .cse1 |c_ULTIMATE.start_main_~c~0#1.offset|)) (.cse7 (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|))) (or (and (exists ((v_DerPreprocessor_51 (Array Int Int)) (v_DerPreprocessor_52 (Array Int Int)) (v_DerPreprocessor_53 (Array Int Int)) (v_DerPreprocessor_20 (Array Int Int)) (v_DerPreprocessor_19 (Array Int Int)) (v_DerPreprocessor_18 (Array Int Int))) (let ((.cse10 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_18) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_19) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_20) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_18) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_19) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_20))) (let ((.cse9 (store (store (store (store (store (store (store (store (store (store (store (store .cse10 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53))) (let ((.cse4 (select (select .cse10 |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|)) (.cse8 (select .cse9 |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse3 (select v_DerPreprocessor_53 |c_ULTIMATE.start_main_~c~0#1.offset|)) (.cse6 (select .cse10 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= .cse3 (select v_DerPreprocessor_20 |c_ULTIMATE.start_main_~c~0#1.offset|)) (= .cse4 .cse5) (= v_DerPreprocessor_18 .cse6) (= .cse7 .cse8) (= .cse1 (select .cse9 |c_ULTIMATE.start_main_~b~0#1.base|)) (<= .cse4 1) (<= .cse3 0) (= v_DerPreprocessor_51 .cse8) (= .cse0 .cse3) (= .cse7 .cse6)))))) (= .cse11 (store (store .cse1 |c_ULTIMATE.start_main_~b~0#1.offset| (select .cse11 |c_ULTIMATE.start_main_~b~0#1.offset|)) |c_ULTIMATE.start_main_~c~0#1.offset| .cse0))) (and .cse2 (let ((.cse14 (<= .cse0 0)) (.cse20 (<= .cse5 0)) (.cse21 (= .cse0 .cse5))) (or (and (exists ((v_prenex_104 (Array Int Int)) (v_prenex_105 (Array Int Int))) (let ((.cse13 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_104) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_105) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_104) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_105) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse12 (select (select .cse13 |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|))) (and (= .cse5 .cse12) (= v_prenex_104 (select .cse13 |c_ULTIMATE.start_main_~a~0#1.base|)) (<= .cse12 1))))) .cse14) (exists ((v_prenex_107 (Array Int Int)) (v_DerPreprocessor_185 (Array Int Int)) (v_DerPreprocessor_27 (Array Int Int)) (v_DerPreprocessor_186 (Array Int Int)) (v_DerPreprocessor_28 (Array Int Int)) (v_DerPreprocessor_184 (Array Int Int)) (v_prenex_106 (Array Int Int))) (let ((.cse15 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_27) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_28) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_27) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_28) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse18 (select .cse15 |c_ULTIMATE.start_main_~b~0#1.base|)) (.cse17 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse15 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_184) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_185) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_186))) (let ((.cse16 (select .cse17 |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse19 (select .cse18 |c_ULTIMATE.start_main_~c~0#1.offset|))) (and (= v_DerPreprocessor_27 (select .cse15 |c_ULTIMATE.start_main_~a~0#1.base|)) (= .cse11 .cse16) (= (select .cse17 |c_ULTIMATE.start_main_~b~0#1.base|) (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_106) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_107) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_106) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_107) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|)) (= v_DerPreprocessor_184 .cse16) (= .cse1 .cse18) (<= .cse19 0) (= .cse0 .cse19)))))) (and .cse20 .cse21 (exists ((v_prenex_107 (Array Int Int)) (v_DerPreprocessor_125 (Array Int Int)) (v_prenex_100 (Array Int Int)) (v_prenex_99 (Array Int Int)) (v_DerPreprocessor_192 (Array Int Int)) (v_DerPreprocessor_24 (Array Int Int)) (v_DerPreprocessor_190 (Array Int Int)) (v_DerPreprocessor_25 (Array Int Int)) (v_DerPreprocessor_191 (Array Int Int)) (v_prenex_106 (Array Int Int))) (let ((.cse22 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_99) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_100) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_99) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_100) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse23 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (let ((.cse25 (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_24) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_25) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_24) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_25) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~b~0#1.base|))) (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse22 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~b~0#1.base| .cse25) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~b~0#1.base| .cse25) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~b~0#1.base| .cse25) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~b~0#1.base| .cse25) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~b~0#1.base| .cse25) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~b~0#1.base| .cse25)) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_125) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_190) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_191) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_192))) (let ((.cse24 (select .cse23 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= (select .cse22 |c_ULTIMATE.start_main_~a~0#1.base|) v_prenex_99) (= (select .cse23 |c_ULTIMATE.start_main_~b~0#1.base|) (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_106) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_107) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_106) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_107) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|)) (= .cse11 .cse24) (= (select (select .cse22 |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|) .cse5) (= .cse24 v_DerPreprocessor_190))))))) (and .cse20 .cse21 (exists ((v_prenex_1509 (Array Int Int)) (v_prenex_1510 (Array Int Int)) (v_DerPreprocessor_183 (Array Int Int)) (v_DerPreprocessor_181 (Array Int Int)) (v_prenex_1512 (Array Int Int)) (v_prenex_1511 (Array Int Int)) (v_DerPreprocessor_182 (Array Int Int))) (let ((.cse27 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1510) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1511) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1510) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1511) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse28 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse27 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_181) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_182) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_183))) (let ((.cse26 (select .cse28 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= .cse11 .cse26) (= (select (select .cse27 |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|) .cse5) (= v_prenex_1510 (select .cse27 |c_ULTIMATE.start_main_~a~0#1.base|)) (= (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1512) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1509) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1512) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1509) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|) (select .cse28 |c_ULTIMATE.start_main_~b~0#1.base|)) (= .cse26 v_DerPreprocessor_181))))))) (and .cse20 .cse21 (exists ((v_DerPreprocessor_143 (Array Int Int)) (v_DerPreprocessor_174 (Array Int Int)) (v_prenex_1442 (Array Int Int)) (v_DerPreprocessor_152 (Array Int Int)) (v_DerPreprocessor_141 (Array Int Int)) (v_DerPreprocessor_142 (Array Int Int)) (v_prenex_1444 (Array Int Int)) (v_DerPreprocessor_172 (Array Int Int)) (v_DerPreprocessor_150 (Array Int Int)) (v_prenex_1443 (Array Int Int)) (v_DerPreprocessor_173 (Array Int Int)) (v_DerPreprocessor_151 (Array Int Int)) (v_prenex_104 (Array Int Int)) (v_prenex_105 (Array Int Int)) (v_prenex_1447 (Array Int Int))) (let ((.cse33 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1443) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1444) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1443) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1444) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse29 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse33 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_141) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_142) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_143)) (.cse30 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse33 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_172) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_173) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_174))) (let ((.cse31 (select .cse30 |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse32 (select .cse29 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= (select .cse29 |c_ULTIMATE.start_main_~b~0#1.base|) (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_104) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_105) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_104) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_105) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|)) (= (select .cse30 |c_ULTIMATE.start_main_~b~0#1.base|) (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1447) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1442) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1447) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1442) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|)) (= .cse11 .cse31) (= .cse11 .cse32) (= v_DerPreprocessor_172 .cse31) (= v_DerPreprocessor_141 .cse32) (= v_prenex_1443 (select .cse33 |c_ULTIMATE.start_main_~a~0#1.base|)) (= (select (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse33 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_150) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_151) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_152) |c_ULTIMATE.start_main_~a~0#1.base|) v_DerPreprocessor_150) (= (select .cse33 |c_ULTIMATE.start_main_~b~0#1.base|) .cse1))))))) (and .cse20 (or (exists ((v_prenex_107 (Array Int Int)) (v_DerPreprocessor_178 (Array Int Int)) (v_DerPreprocessor_179 (Array Int Int)) (v_prenex_101 (Array Int Int)) (v_prenex_102 (Array Int Int)) (v_DerPreprocessor_180 (Array Int Int)) (v_prenex_106 (Array Int Int))) (let ((.cse35 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_101) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_102) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_101) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_102) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse36 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse35 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_178) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_179) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_180))) (let ((.cse34 (select .cse36 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= v_DerPreprocessor_178 .cse34) (= (select (select .cse35 |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~c~0#1.offset|) .cse5) (= (select .cse36 |c_ULTIMATE.start_main_~b~0#1.base|) (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_106) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_107) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_106) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_107) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|)) (= v_prenex_101 (select .cse35 |c_ULTIMATE.start_main_~a~0#1.base|)) (= .cse11 .cse34)))))) (exists ((v_prenex_1507 (Array Int Int)) (v_prenex_1508 (Array Int Int))) (let ((.cse37 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1508) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1507) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1508) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1507) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse39 (select .cse37 |c_ULTIMATE.start_main_~b~0#1.base|))) (let ((.cse38 (select .cse39 |c_ULTIMATE.start_main_~b~0#1.offset|))) (and (= v_prenex_1508 (select .cse37 |c_ULTIMATE.start_main_~a~0#1.base|)) (= (store (store .cse1 |c_ULTIMATE.start_main_~b~0#1.offset| .cse38) |c_ULTIMATE.start_main_~c~0#1.offset| (select .cse39 |c_ULTIMATE.start_main_~c~0#1.offset|)) .cse39) (= .cse38 .cse5))))))) .cse21) (and (or (exists ((v_prenex_1439 (Array Int Int)) (v_prenex_1438 (Array Int Int))) (let ((.cse40 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1438) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1439) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1438) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1439) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse43 (select .cse40 |c_ULTIMATE.start_main_~b~0#1.base|))) (let ((.cse41 (select .cse43 |c_ULTIMATE.start_main_~c~0#1.offset|)) (.cse42 (select .cse43 |c_ULTIMATE.start_main_~b~0#1.offset|))) (and (= v_prenex_1438 (select .cse40 |c_ULTIMATE.start_main_~a~0#1.base|)) (= .cse0 .cse41) (= (store (store .cse1 |c_ULTIMATE.start_main_~b~0#1.offset| .cse42) |c_ULTIMATE.start_main_~c~0#1.offset| .cse41) .cse43) (= .cse42 .cse5)))))) (exists ((v_DerPreprocessor_169 (Array Int Int)) (v_prenex_101 (Array Int Int)) (v_prenex_102 (Array Int Int)) (v_DerPreprocessor_170 (Array Int Int)) (v_prenex_1435 (Array Int Int)) (v_DerPreprocessor_171 (Array Int Int)) (v_prenex_1434 (Array Int Int))) (let ((.cse47 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_101) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_102) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_101) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_102) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse46 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse47 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_169) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_170) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_171))) (let ((.cse44 (select .cse47 |c_ULTIMATE.start_main_~b~0#1.base|)) (.cse45 (select .cse46 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= .cse0 (select .cse44 |c_ULTIMATE.start_main_~c~0#1.offset|)) (= .cse45 v_DerPreprocessor_169) (= (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1435) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1434) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1435) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1434) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|) (select .cse46 |c_ULTIMATE.start_main_~b~0#1.base|)) (= (select .cse44 |c_ULTIMATE.start_main_~b~0#1.offset|) .cse5) (= .cse11 .cse45) (= v_prenex_101 (select .cse47 |c_ULTIMATE.start_main_~a~0#1.base|)))))))) .cse14) (and .cse20 (exists ((v_DerPreprocessor_176 (Array Int Int)) (v_prenex_1451 (Array Int Int)) (v_DerPreprocessor_177 (Array Int Int)) (v_prenex_1450 (Array Int Int)) (v_prenex_100 (Array Int Int)) (v_DerPreprocessor_153 (Array Int Int)) (v_DerPreprocessor_175 (Array Int Int)) (v_prenex_99 (Array Int Int)) (v_prenex_1567 (Array Int Int)) (v_prenex_1568 (Array Int Int))) (let ((.cse50 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_99) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_100) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_99) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_100) |c_ULTIMATE.start_main_~c~0#1.base| .cse11))) (let ((.cse49 (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (let ((.cse51 (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1567) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1568) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1567) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1568) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~b~0#1.base|))) (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store (store .cse50 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~b~0#1.base| .cse51) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~b~0#1.base| .cse51) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~b~0#1.base| .cse51) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~b~0#1.base| .cse51) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~b~0#1.base| .cse51) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~b~0#1.base| .cse51)) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_153) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_175) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_176) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_177))) (let ((.cse48 (select .cse49 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= .cse11 .cse48) (= (select .cse49 |c_ULTIMATE.start_main_~b~0#1.base|) (select (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1450) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1451) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~a~0#1.base| v_prenex_1450) |c_ULTIMATE.start_main_~b~0#1.base| v_prenex_1451) |c_ULTIMATE.start_main_~c~0#1.base| .cse11) |c_ULTIMATE.start_main_~b~0#1.base|)) (= (select .cse50 |c_ULTIMATE.start_main_~a~0#1.base|) v_prenex_99) (= (select (select .cse50 |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|) .cse5) (= v_DerPreprocessor_175 .cse48)))))) .cse21)))) (exists ((v_DerPreprocessor_20 (Array Int Int)) (v_DerPreprocessor_19 (Array Int Int)) (v_DerPreprocessor_18 (Array Int Int))) (let ((.cse57 (store (store (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_18) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_19) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_20) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_18) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_19) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_20))) (let ((.cse52 (select (select .cse57 |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|)) (.cse53 (select .cse57 |c_ULTIMATE.start_main_~a~0#1.base|))) (and (= .cse52 .cse5) (= v_DerPreprocessor_18 .cse53) (exists ((v_DerPreprocessor_51 (Array Int Int)) (v_DerPreprocessor_52 (Array Int Int)) (v_DerPreprocessor_53 (Array Int Int))) (let ((.cse56 (store (store (store (store (store (store (store (store (store (store (store (store .cse57 |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53) |c_ULTIMATE.start_main_~a~0#1.base| v_DerPreprocessor_51) |c_ULTIMATE.start_main_~b~0#1.base| v_DerPreprocessor_52) |c_ULTIMATE.start_main_~c~0#1.base| v_DerPreprocessor_53))) (let ((.cse55 (select .cse56 |c_ULTIMATE.start_main_~a~0#1.base|)) (.cse54 (select v_DerPreprocessor_53 |c_ULTIMATE.start_main_~c~0#1.offset|))) (and (= .cse54 (select v_DerPreprocessor_20 |c_ULTIMATE.start_main_~c~0#1.offset|)) (= .cse7 .cse55) (exists ((v_DerPreprocessor_7 Int)) (= (select (store (store .cse1 |c_ULTIMATE.start_main_~b~0#1.offset| v_DerPreprocessor_7) |c_ULTIMATE.start_main_~c~0#1.offset| .cse54) |c_ULTIMATE.start_main_~b~0#1.offset|) v_DerPreprocessor_7)) (= .cse1 (select .cse56 |c_ULTIMATE.start_main_~b~0#1.base|)) (<= .cse54 0) (= v_DerPreprocessor_51 .cse55) (= .cse0 .cse54))))) (<= .cse52 1) (= .cse7 .cse53))))))) (not (= |c_ULTIMATE.start_main_~b~0#1.base| |c_ULTIMATE.start_main_~c~0#1.base|)) (= |c_ULTIMATE.start_main_~i~0#1| 1)))) is different from true [2022-10-16 10:45:20,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:45:20,624 INFO L93 Difference]: Finished difference Result 282 states and 311 transitions. [2022-10-16 10:45:20,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-10-16 10:45:20,625 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 19 states have (on average 4.7894736842105265) internal successors, (91), 20 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-10-16 10:45:20,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:45:20,627 INFO L225 Difference]: With dead ends: 282 [2022-10-16 10:45:20,627 INFO L226 Difference]: Without dead ends: 280 [2022-10-16 10:45:20,628 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=147, Invalid=405, Unknown=4, NotChecked=44, Total=600 [2022-10-16 10:45:20,628 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 128 mSDsluCounter, 280 mSDsCounter, 0 mSdLazyCounter, 182 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 128 SdHoareTripleChecker+Valid, 328 SdHoareTripleChecker+Invalid, 340 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 182 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 145 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-10-16 10:45:20,629 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [128 Valid, 328 Invalid, 340 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 182 Invalid, 0 Unknown, 145 Unchecked, 0.2s Time] [2022-10-16 10:45:20,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2022-10-16 10:45:20,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 192. [2022-10-16 10:45:20,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 192 states, 176 states have (on average 1.1931818181818181) internal successors, (210), 191 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:20,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 210 transitions. [2022-10-16 10:45:20,647 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 210 transitions. Word has length 33 [2022-10-16 10:45:20,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:45:20,647 INFO L495 AbstractCegarLoop]: Abstraction has 192 states and 210 transitions. [2022-10-16 10:45:20,647 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 4.7894736842105265) internal successors, (91), 20 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:20,647 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 210 transitions. [2022-10-16 10:45:20,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-10-16 10:45:20,648 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:45:20,648 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2022-10-16 10:45:20,685 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-10-16 10:45:20,861 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:45:20,861 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:45:20,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:45:20,863 INFO L85 PathProgramCache]: Analyzing trace with hash 728765121, now seen corresponding path program 2 times [2022-10-16 10:45:20,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:45:20,863 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447563570] [2022-10-16 10:45:20,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:45:20,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:45:20,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:45:22,051 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:45:22,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:45:22,051 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447563570] [2022-10-16 10:45:22,052 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1447563570] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:45:22,052 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [604813462] [2022-10-16 10:45:22,052 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 10:45:22,052 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:45:22,052 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:45:22,055 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:45:22,064 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-10-16 10:45:22,156 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-16 10:45:22,156 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 10:45:22,158 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 47 conjunts are in the unsatisfiable core [2022-10-16 10:45:22,161 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:45:22,173 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-10-16 10:45:22,177 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,179 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,180 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,181 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2022-10-16 10:45:22,186 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-10-16 10:45:22,187 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 19 [2022-10-16 10:45:22,269 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 32 [2022-10-16 10:45:22,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,476 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,478 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,479 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:22,481 INFO L356 Elim1Store]: treesize reduction 2, result has 33.3 percent of original size [2022-10-16 10:45:22,482 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 52 treesize of output 53 [2022-10-16 10:45:22,820 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,822 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,823 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,824 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,826 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,827 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:22,827 INFO L173 IndexEqualityManager]: detected equality via solver [2022-10-16 10:45:22,831 INFO L356 Elim1Store]: treesize reduction 2, result has 33.3 percent of original size [2022-10-16 10:45:22,831 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 75 treesize of output 70 [2022-10-16 10:45:23,143 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-10-16 10:45:23,143 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 54 treesize of output 22 [2022-10-16 10:45:23,148 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:45:23,148 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:45:23,682 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:45:23,683 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [604813462] provided 0 perfect and 2 imperfect interpolant sequences [2022-10-16 10:45:23,683 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-10-16 10:45:23,683 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 41 [2022-10-16 10:45:23,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [750731904] [2022-10-16 10:45:23,683 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-10-16 10:45:23,685 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-10-16 10:45:23,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:45:23,686 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-10-16 10:45:23,687 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=1441, Unknown=0, NotChecked=0, Total=1722 [2022-10-16 10:45:23,687 INFO L87 Difference]: Start difference. First operand 192 states and 210 transitions. Second operand has 42 states, 41 states have (on average 2.1219512195121952) internal successors, (87), 42 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:25,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:45:25,051 INFO L93 Difference]: Finished difference Result 233 states and 256 transitions. [2022-10-16 10:45:25,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-10-16 10:45:25,052 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 41 states have (on average 2.1219512195121952) internal successors, (87), 42 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-10-16 10:45:25,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:45:25,053 INFO L225 Difference]: With dead ends: 233 [2022-10-16 10:45:25,053 INFO L226 Difference]: Without dead ends: 232 [2022-10-16 10:45:25,055 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1004 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=496, Invalid=2584, Unknown=0, NotChecked=0, Total=3080 [2022-10-16 10:45:25,056 INFO L413 NwaCegarLoop]: 53 mSDtfsCounter, 167 mSDsluCounter, 377 mSDsCounter, 0 mSdLazyCounter, 745 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 167 SdHoareTripleChecker+Valid, 430 SdHoareTripleChecker+Invalid, 787 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 745 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-10-16 10:45:25,057 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [167 Valid, 430 Invalid, 787 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 745 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-10-16 10:45:25,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2022-10-16 10:45:25,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 213. [2022-10-16 10:45:25,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 213 states, 197 states have (on average 1.1928934010152283) internal successors, (235), 212 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:25,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 235 transitions. [2022-10-16 10:45:25,082 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 235 transitions. Word has length 33 [2022-10-16 10:45:25,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:45:25,083 INFO L495 AbstractCegarLoop]: Abstraction has 213 states and 235 transitions. [2022-10-16 10:45:25,083 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 41 states have (on average 2.1219512195121952) internal successors, (87), 42 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:25,083 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 235 transitions. [2022-10-16 10:45:25,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-10-16 10:45:25,084 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:45:25,084 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:45:25,123 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-10-16 10:45:25,297 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:45:25,297 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:45:25,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:45:25,299 INFO L85 PathProgramCache]: Analyzing trace with hash -1155032271, now seen corresponding path program 1 times [2022-10-16 10:45:25,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:45:25,299 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [223098383] [2022-10-16 10:45:25,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:45:25,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:45:25,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:45:25,368 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-10-16 10:45:25,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:45:25,369 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [223098383] [2022-10-16 10:45:25,369 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [223098383] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-16 10:45:25,369 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-16 10:45:25,369 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-16 10:45:25,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18816500] [2022-10-16 10:45:25,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-16 10:45:25,370 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-16 10:45:25,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-16 10:45:25,370 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-16 10:45:25,370 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-16 10:45:25,370 INFO L87 Difference]: Start difference. First operand 213 states and 235 transitions. Second operand has 4 states, 3 states have (on average 12.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:25,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-10-16 10:45:25,484 INFO L93 Difference]: Finished difference Result 226 states and 249 transitions. [2022-10-16 10:45:25,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-16 10:45:25,485 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 3 states have (on average 12.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-10-16 10:45:25,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-10-16 10:45:25,486 INFO L225 Difference]: With dead ends: 226 [2022-10-16 10:45:25,487 INFO L226 Difference]: Without dead ends: 224 [2022-10-16 10:45:25,487 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-10-16 10:45:25,488 INFO L413 NwaCegarLoop]: 48 mSDtfsCounter, 22 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-10-16 10:45:25,488 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 115 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-10-16 10:45:25,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2022-10-16 10:45:25,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 221. [2022-10-16 10:45:25,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 205 states have (on average 1.1951219512195121) internal successors, (245), 220 states have internal predecessors, (245), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:25,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 245 transitions. [2022-10-16 10:45:25,506 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 245 transitions. Word has length 36 [2022-10-16 10:45:25,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-10-16 10:45:25,506 INFO L495 AbstractCegarLoop]: Abstraction has 221 states and 245 transitions. [2022-10-16 10:45:25,506 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 12.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-16 10:45:25,507 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 245 transitions. [2022-10-16 10:45:25,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-10-16 10:45:25,507 INFO L187 NwaCegarLoop]: Found error trace [2022-10-16 10:45:25,507 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-16 10:45:25,507 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-10-16 10:45:25,508 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW === [ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW (and 27 more)] === [2022-10-16 10:45:25,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-16 10:45:25,508 INFO L85 PathProgramCache]: Analyzing trace with hash -2035603613, now seen corresponding path program 2 times [2022-10-16 10:45:25,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-16 10:45:25,508 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430195867] [2022-10-16 10:45:25,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-16 10:45:25,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-16 10:45:25,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-16 10:45:26,421 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:45:26,421 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-16 10:45:26,421 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430195867] [2022-10-16 10:45:26,422 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1430195867] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-16 10:45:26,422 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [99349324] [2022-10-16 10:45:26,422 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-10-16 10:45:26,422 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-10-16 10:45:26,422 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-16 10:45:26,423 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-10-16 10:45:26,430 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-10-16 10:45:26,536 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-10-16 10:45:26,537 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-10-16 10:45:26,538 INFO L263 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 37 conjunts are in the unsatisfiable core [2022-10-16 10:45:26,541 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-10-16 10:45:26,557 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,560 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,561 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 26 [2022-10-16 10:45:26,568 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,569 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2022-10-16 10:45:26,578 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-10-16 10:45:26,586 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2022-10-16 10:45:26,592 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,593 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,594 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,595 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2022-10-16 10:45:26,600 INFO L356 Elim1Store]: treesize reduction 7, result has 12.5 percent of original size [2022-10-16 10:45:26,601 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 19 [2022-10-16 10:45:26,700 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,701 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-10-16 10:45:26,883 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:26,884 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-10-16 10:45:27,071 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-10-16 10:45:27,072 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-10-16 10:45:27,296 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2022-10-16 10:45:27,328 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 7 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-16 10:45:27,328 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-10-16 10:45:30,092 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_91| Int)) (or (not (<= (+ |c_ULTIMATE.start_main_#t~post8#1| 1) |v_ULTIMATE.start_main_~i~0#1_91|)) (forall ((v_ArrVal_1281 Int)) (< 0 (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_91| 8) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1281))) (+ (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| .cse0) |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|) 9223372036854775809 (select .cse0 |c_ULTIMATE.start_main_~a~0#1.offset|))))))) is different from false [2022-10-16 10:45:30,898 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_91| Int) (v_ArrVal_1281 Int)) (or (< 0 (let ((.cse0 (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* |v_ULTIMATE.start_main_~i~0#1_91| 8) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1281))) (+ (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| .cse0) |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|) 9223372036854775809 (select .cse0 |c_ULTIMATE.start_main_~a~0#1.offset|)))) (< |v_ULTIMATE.start_main_~i~0#1_91| (+ |c_ULTIMATE.start_main_~i~0#1| 1)))) is different from false [2022-10-16 10:45:32,921 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_main_~i~0#1_91| Int) (v_ArrVal_1281 Int) (v_ArrVal_1279 Int)) (or (< 0 (let ((.cse0 (store (store (select |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base|) (+ (* 8 |c_ULTIMATE.start_main_~i~0#1|) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1279) (+ (* |v_ULTIMATE.start_main_~i~0#1_91| 8) |c_ULTIMATE.start_main_~a~0#1.offset|) v_ArrVal_1281))) (+ (select .cse0 |c_ULTIMATE.start_main_~a~0#1.offset|) 9223372036854775809 (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~a~0#1.base| .cse0) |c_ULTIMATE.start_main_~b~0#1.base|) |c_ULTIMATE.start_main_~b~0#1.offset|)))) (< |v_ULTIMATE.start_main_~i~0#1_91| (+ |c_ULTIMATE.start_main_~i~0#1| 1)))) is different from false