./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-data-race.prp --file ../../sv-benchmarks/c/pthread-ext/47_ticket_lock_hc_backoff_vs.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for data races Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/config/GemCutterReach.xml -i ../../sv-benchmarks/c/pthread-ext/47_ticket_lock_hc_backoff_vs.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/config/svcomp-DataRace-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! data-race) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 22ccde2ce516925ebfe813d783d47f1167b5115e5910734aa9e1bf526ce8c733 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-04 12:05:48,507 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-04 12:05:48,510 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-04 12:05:48,559 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-04 12:05:48,560 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-04 12:05:48,565 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-04 12:05:48,567 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-04 12:05:48,574 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-04 12:05:48,575 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-04 12:05:48,576 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-04 12:05:48,577 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-04 12:05:48,578 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-04 12:05:48,579 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-04 12:05:48,581 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-04 12:05:48,583 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-04 12:05:48,585 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-04 12:05:48,586 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-04 12:05:48,592 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-04 12:05:48,593 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-04 12:05:48,601 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-04 12:05:48,604 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-04 12:05:48,606 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-04 12:05:48,609 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-04 12:05:48,610 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-04 12:05:48,618 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-04 12:05:48,619 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-04 12:05:48,619 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-04 12:05:48,621 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-04 12:05:48,621 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-04 12:05:48,622 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-04 12:05:48,623 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-04 12:05:48,625 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-04 12:05:48,627 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-04 12:05:48,628 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-04 12:05:48,629 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-04 12:05:48,629 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-04 12:05:48,630 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-04 12:05:48,630 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-04 12:05:48,631 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-04 12:05:48,632 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-04 12:05:48,632 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-04 12:05:48,633 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/config/svcomp-DataRace-32bit-GemCutter_Default.epf [2022-11-04 12:05:48,671 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-04 12:05:48,672 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-04 12:05:48,672 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-04 12:05:48,673 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-04 12:05:48,674 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-04 12:05:48,674 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-04 12:05:48,675 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-04 12:05:48,675 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-04 12:05:48,675 INFO L138 SettingsManager]: * Use SBE=true [2022-11-04 12:05:48,675 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-04 12:05:48,677 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-04 12:05:48,677 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-04 12:05:48,677 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-04 12:05:48,677 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-04 12:05:48,678 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-04 12:05:48,678 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-04 12:05:48,678 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-04 12:05:48,678 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-04 12:05:48,679 INFO L138 SettingsManager]: * Check absence of data races in concurrent programs=true [2022-11-04 12:05:48,679 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-04 12:05:48,679 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-04 12:05:48,679 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-04 12:05:48,679 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-04 12:05:48,680 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-04 12:05:48,680 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-04 12:05:48,680 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-11-04 12:05:48,681 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-04 12:05:48,681 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-04 12:05:48,681 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-04 12:05:48,681 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-04 12:05:48,682 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-04 12:05:48,682 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-04 12:05:48,682 INFO L138 SettingsManager]: * DFS Order used in POR=PSEUDO_LOCKSTEP [2022-11-04 12:05:48,683 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-04 12:05:48,683 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-04 12:05:48,683 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2022-11-04 12:05:48,683 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-04 12:05:48,684 INFO L138 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2022-11-04 12:05:48,684 INFO L138 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2022-11-04 12:05:48,684 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! data-race) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 22ccde2ce516925ebfe813d783d47f1167b5115e5910734aa9e1bf526ce8c733 [2022-11-04 12:05:49,000 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-04 12:05:49,033 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-04 12:05:49,036 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-04 12:05:49,038 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-04 12:05:49,039 INFO L275 PluginConnector]: CDTParser initialized [2022-11-04 12:05:49,040 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/../../sv-benchmarks/c/pthread-ext/47_ticket_lock_hc_backoff_vs.i [2022-11-04 12:05:49,136 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/data/796bb769f/ae0109696a594a45963839f157fba452/FLAGa40dd536d [2022-11-04 12:05:49,607 INFO L306 CDTParser]: Found 1 translation units. [2022-11-04 12:05:49,608 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/sv-benchmarks/c/pthread-ext/47_ticket_lock_hc_backoff_vs.i [2022-11-04 12:05:49,621 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/data/796bb769f/ae0109696a594a45963839f157fba452/FLAGa40dd536d [2022-11-04 12:05:49,932 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/data/796bb769f/ae0109696a594a45963839f157fba452 [2022-11-04 12:05:49,934 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-04 12:05:49,935 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-04 12:05:49,937 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-04 12:05:49,937 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-04 12:05:49,940 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-04 12:05:49,941 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.11 12:05:49" (1/1) ... [2022-11-04 12:05:49,943 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@57425760 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:49, skipping insertion in model container [2022-11-04 12:05:49,943 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.11 12:05:49" (1/1) ... [2022-11-04 12:05:49,950 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-04 12:05:49,985 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-04 12:05:50,494 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/sv-benchmarks/c/pthread-ext/47_ticket_lock_hc_backoff_vs.i[30336,30349] [2022-11-04 12:05:50,502 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-04 12:05:50,516 INFO L203 MainTranslator]: Completed pre-run [2022-11-04 12:05:50,570 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/sv-benchmarks/c/pthread-ext/47_ticket_lock_hc_backoff_vs.i[30336,30349] [2022-11-04 12:05:50,577 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-04 12:05:50,621 INFO L208 MainTranslator]: Completed translation [2022-11-04 12:05:50,621 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50 WrapperNode [2022-11-04 12:05:50,621 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-04 12:05:50,622 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-04 12:05:50,623 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-04 12:05:50,623 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-04 12:05:50,631 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,667 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,695 INFO L138 Inliner]: procedures = 169, calls = 18, calls flagged for inlining = 5, calls inlined = 7, statements flattened = 188 [2022-11-04 12:05:50,696 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-04 12:05:50,697 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-04 12:05:50,697 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-04 12:05:50,697 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-04 12:05:50,707 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,708 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,711 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,711 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,735 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,740 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,742 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,743 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,751 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-04 12:05:50,752 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-04 12:05:50,752 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-04 12:05:50,752 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-04 12:05:50,753 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (1/1) ... [2022-11-04 12:05:50,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-04 12:05:50,782 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 [2022-11-04 12:05:50,797 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-04 12:05:50,834 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-04 12:05:50,865 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-04 12:05:50,865 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-11-04 12:05:50,866 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-11-04 12:05:50,866 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-04 12:05:50,866 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-04 12:05:50,867 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-04 12:05:50,867 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-04 12:05:50,867 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-04 12:05:50,867 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-04 12:05:50,867 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-04 12:05:50,869 WARN L209 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-11-04 12:05:51,017 INFO L235 CfgBuilder]: Building ICFG [2022-11-04 12:05:51,019 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-04 12:05:51,523 INFO L276 CfgBuilder]: Performing block encoding [2022-11-04 12:05:51,647 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-04 12:05:51,648 INFO L300 CfgBuilder]: Removed 5 assume(true) statements. [2022-11-04 12:05:51,650 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.11 12:05:51 BoogieIcfgContainer [2022-11-04 12:05:51,650 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-04 12:05:51,652 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-04 12:05:51,652 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-04 12:05:51,656 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-04 12:05:51,656 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.11 12:05:49" (1/3) ... [2022-11-04 12:05:51,657 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62aa26eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.11 12:05:51, skipping insertion in model container [2022-11-04 12:05:51,657 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.11 12:05:50" (2/3) ... [2022-11-04 12:05:51,658 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62aa26eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.11 12:05:51, skipping insertion in model container [2022-11-04 12:05:51,658 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.11 12:05:51" (3/3) ... [2022-11-04 12:05:51,659 INFO L112 eAbstractionObserver]: Analyzing ICFG 47_ticket_lock_hc_backoff_vs.i [2022-11-04 12:05:51,668 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-11-04 12:05:51,678 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-04 12:05:51,678 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 24 error locations. [2022-11-04 12:05:51,679 INFO L515 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-11-04 12:05:51,733 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2022-11-04 12:05:51,803 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-04 12:05:51,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-11-04 12:05:51,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 [2022-11-04 12:05:51,806 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-11-04 12:05:51,827 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2022-11-04 12:05:51,863 INFO L156 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-11-04 12:05:51,887 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thr1Thread1of1ForFork0 ======== [2022-11-04 12:05:51,901 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@46b3e8f3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-04 12:05:51,902 INFO L358 AbstractCegarLoop]: Starting to check reachability of 12 error locations. [2022-11-04 12:05:53,327 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting thr1Err0ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:53,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:53,333 INFO L85 PathProgramCache]: Analyzing trace with hash 1514594659, now seen corresponding path program 1 times [2022-11-04 12:05:53,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:53,357 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161313699] [2022-11-04 12:05:53,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:53,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:53,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:53,607 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-04 12:05:53,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:53,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [161313699] [2022-11-04 12:05:53,608 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [161313699] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:05:53,609 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:05:53,609 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-04 12:05:53,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055933663] [2022-11-04 12:05:53,611 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:05:53,615 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-04 12:05:53,616 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:05:53,636 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-04 12:05:53,638 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-04 12:05:53,639 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:53,640 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:05:53,641 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 15.0) internal successors, (30), 2 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:05:53,642 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:53,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:53,723 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-04 12:05:53,724 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting thr1Err5ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:53,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:53,726 INFO L85 PathProgramCache]: Analyzing trace with hash 1141338934, now seen corresponding path program 1 times [2022-11-04 12:05:53,726 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:53,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985670879] [2022-11-04 12:05:53,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:53,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:53,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:53,895 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-04 12:05:53,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:53,895 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985670879] [2022-11-04 12:05:53,896 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1985670879] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:05:53,896 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:05:53,896 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-04 12:05:53,896 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994887274] [2022-11-04 12:05:53,896 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:05:53,898 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:05:53,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:05:53,898 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:05:53,899 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:05:53,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:53,901 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:05:53,901 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 17.5) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:05:53,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:53,901 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:54,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:54,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:54,149 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-04 12:05:54,149 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting thr1Err6ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:54,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:54,150 INFO L85 PathProgramCache]: Analyzing trace with hash -1542571548, now seen corresponding path program 1 times [2022-11-04 12:05:54,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:54,151 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420453714] [2022-11-04 12:05:54,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:54,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:54,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:54,769 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-04 12:05:54,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:54,772 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420453714] [2022-11-04 12:05:54,772 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [420453714] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:05:54,772 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:05:54,773 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-11-04 12:05:54,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992093773] [2022-11-04 12:05:54,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:05:54,778 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-04 12:05:54,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:05:54,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-04 12:05:54,781 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-11-04 12:05:54,781 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:54,781 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:05:54,781 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 9.4) internal successors, (47), 6 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:05:54,781 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:54,782 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:54,782 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,004 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-04 12:05:55,004 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting thr1Err7ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:55,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:55,005 INFO L85 PathProgramCache]: Analyzing trace with hash -30623212, now seen corresponding path program 1 times [2022-11-04 12:05:55,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:55,005 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257709881] [2022-11-04 12:05:55,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:55,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:55,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:55,066 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-04 12:05:55,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:55,067 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257709881] [2022-11-04 12:05:55,067 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [257709881] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:05:55,067 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:05:55,067 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-04 12:05:55,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956982156] [2022-11-04 12:05:55,068 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:05:55,068 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:05:55,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:05:55,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:05:55,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:05:55,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,069 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:05:55,070 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 29.5) internal successors, (59), 3 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:05:55,070 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,070 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,070 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,070 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,194 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-04 12:05:55,194 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting thr1Err8ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:55,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:55,194 INFO L85 PathProgramCache]: Analyzing trace with hash 1913867185, now seen corresponding path program 1 times [2022-11-04 12:05:55,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:55,195 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063369933] [2022-11-04 12:05:55,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:55,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:55,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:55,261 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-04 12:05:55,262 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:55,262 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1063369933] [2022-11-04 12:05:55,262 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1063369933] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:05:55,262 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:05:55,262 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-04 12:05:55,263 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807855806] [2022-11-04 12:05:55,263 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:05:55,263 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:05:55,264 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:05:55,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:05:55,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:05:55,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,265 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:05:55,265 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 32.5) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:05:55,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,265 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,310 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-04 12:05:55,310 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting thr1Err9ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:55,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:55,311 INFO L85 PathProgramCache]: Analyzing trace with hash 731636563, now seen corresponding path program 1 times [2022-11-04 12:05:55,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:55,311 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845624802] [2022-11-04 12:05:55,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:55,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:55,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:55,368 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-04 12:05:55,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:55,368 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845624802] [2022-11-04 12:05:55,369 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [845624802] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:05:55,369 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:05:55,369 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-04 12:05:55,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [546019445] [2022-11-04 12:05:55,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:05:55,370 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:05:55,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:05:55,370 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:05:55,371 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:05:55,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,371 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:05:55,371 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 35.5) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:05:55,371 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,372 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,372 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,372 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,372 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,372 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,421 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,421 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-04 12:05:55,422 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting thr1Err11ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:55,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:55,423 INFO L85 PathProgramCache]: Analyzing trace with hash -841705288, now seen corresponding path program 1 times [2022-11-04 12:05:55,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:55,424 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1909118116] [2022-11-04 12:05:55,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:55,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:55,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:55,532 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-11-04 12:05:55,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:55,537 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1909118116] [2022-11-04 12:05:55,537 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1909118116] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:05:55,537 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:05:55,538 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-04 12:05:55,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27342101] [2022-11-04 12:05:55,538 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:05:55,538 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:05:55,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:05:55,539 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:05:55,539 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:05:55,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,540 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:05:55,540 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 39.5) internal successors, (79), 3 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:05:55,540 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:55,540 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,540 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:55,540 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,541 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,541 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:55,541 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:57,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:05:57,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:57,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:05:57,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:57,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:57,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:57,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:05:57,006 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-11-04 12:05:57,007 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting thr1Err6ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:05:57,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:05:57,007 INFO L85 PathProgramCache]: Analyzing trace with hash 162022256, now seen corresponding path program 1 times [2022-11-04 12:05:57,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:05:57,008 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265367387] [2022-11-04 12:05:57,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:57,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:05:57,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:58,254 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-04 12:05:58,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:05:58,254 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1265367387] [2022-11-04 12:05:58,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1265367387] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-04 12:05:58,255 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1840296217] [2022-11-04 12:05:58,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:05:58,255 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:05:58,255 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 [2022-11-04 12:05:58,261 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-04 12:05:58,286 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-04 12:05:58,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:05:58,449 INFO L263 TraceCheckSpWp]: Trace formula consists of 457 conjuncts, 77 conjunts are in the unsatisfiable core [2022-11-04 12:05:58,461 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-04 12:05:58,625 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-04 12:05:58,862 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-04 12:05:58,862 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-04 12:05:58,932 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-04 12:05:59,132 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-04 12:05:59,367 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 19 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-04 12:05:59,368 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-04 12:05:59,429 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_330 (Array Int Int))) (= (select (select (store |c_#race| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_330) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0)) is different from false [2022-11-04 12:05:59,544 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_thr1_~#l~0#1.base_33| Int) (v_ArrVal_330 (Array Int Int)) (v_ArrVal_329 Int)) (or (= (select (select (store |c_#race| |v_ULTIMATE.start_thr1_~#l~0#1.base_33| v_ArrVal_330) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0) (not (= (select (store |c_#valid| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_329) |v_ULTIMATE.start_thr1_~#l~0#1.base_33|) 0)))) is different from false [2022-11-04 12:05:59,564 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-04 12:05:59,565 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 19 [2022-11-04 12:05:59,573 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 22 [2022-11-04 12:05:59,578 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-04 12:06:01,188 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 10 proven. 7 refuted. 2 times theorem prover too weak. 0 trivial. 1 not checked. [2022-11-04 12:06:01,189 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1840296217] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-04 12:06:01,189 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-04 12:06:01,189 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 18] total 35 [2022-11-04 12:06:01,189 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198109818] [2022-11-04 12:06:01,190 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-04 12:06:01,191 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-11-04 12:06:01,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:01,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-11-04 12:06:01,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=204, Invalid=856, Unknown=4, NotChecked=126, Total=1190 [2022-11-04 12:06:01,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:01,193 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:01,194 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 9.771428571428572) internal successors, (342), 35 states have internal predecessors, (342), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:01,194 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:01,868 WARN L833 $PredicateComparison]: unable to prove that (and (= (select (select |c_#race| |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0) (not (= |c_ULTIMATE.start_thr1_~#l~0#1.base| |c_thr1Thread1of1ForFork0_~#l~0#1.base|)) (forall ((|v_ULTIMATE.start_thr1_~#l~0#1.base_33| Int) (v_ArrVal_330 (Array Int Int)) (v_ArrVal_329 Int)) (or (= (select (select (store |c_#race| |v_ULTIMATE.start_thr1_~#l~0#1.base_33| v_ArrVal_330) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0) (not (= (select (store |c_#valid| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_329) |v_ULTIMATE.start_thr1_~#l~0#1.base_33|) 0)))) (= (select |c_#valid| |c_thr1Thread1of1ForFork0_~#l~0#1.base|) 1)) is different from false [2022-11-04 12:06:05,006 WARN L833 $PredicateComparison]: unable to prove that (and (= (select (select |c_#race| |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0) (not (= |c_ULTIMATE.start_thr1_~#l~0#1.base| |c_thr1Thread1of1ForFork0_~#l~0#1.base|)) (= (select |c_#valid| |c_ULTIMATE.start_thr1_~#l~0#1.base|) 1) (forall ((|v_ULTIMATE.start_thr1_~#l~0#1.base_33| Int) (v_ArrVal_330 (Array Int Int)) (v_ArrVal_329 Int)) (or (= (select (select (store |c_#race| |v_ULTIMATE.start_thr1_~#l~0#1.base_33| v_ArrVal_330) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0) (not (= (select (store |c_#valid| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_329) |v_ULTIMATE.start_thr1_~#l~0#1.base_33|) 0)))) (= (select |c_#valid| |c_thr1Thread1of1ForFork0_~#l~0#1.base|) 1)) is different from false [2022-11-04 12:06:05,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:05,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:05,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:05,259 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-04 12:06:05,431 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:06:05,432 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting thr1Err7ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:05,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:05,432 INFO L85 PathProgramCache]: Analyzing trace with hash -505477054, now seen corresponding path program 1 times [2022-11-04 12:06:05,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:05,433 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492693934] [2022-11-04 12:06:05,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:05,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:05,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:05,910 INFO L134 CoverageAnalysis]: Checked inductivity of 507 backedges. 214 proven. 0 refuted. 0 times theorem prover too weak. 293 trivial. 0 not checked. [2022-11-04 12:06:05,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:06:05,911 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492693934] [2022-11-04 12:06:05,911 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492693934] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:06:05,911 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:06:05,911 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-04 12:06:05,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041821478] [2022-11-04 12:06:05,912 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:06:05,912 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:06:05,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:05,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:06:05,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:06:05,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:05,914 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:05,914 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.0) internal successors, (180), 3 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:05,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:05,915 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,915 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:05,915 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,915 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,915 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,915 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:05,915 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:05,916 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:06,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:06,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:06,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,078 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:06,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,079 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-04 12:06:06,081 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting thr1Err8ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:06,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:06,087 INFO L85 PathProgramCache]: Analyzing trace with hash -1488941339, now seen corresponding path program 1 times [2022-11-04 12:06:06,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:06,087 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333452915] [2022-11-04 12:06:06,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:06,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:06,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:06,429 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 828 trivial. 0 not checked. [2022-11-04 12:06:06,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:06:06,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333452915] [2022-11-04 12:06:06,431 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [333452915] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:06:06,431 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:06:06,432 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-04 12:06:06,432 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134398463] [2022-11-04 12:06:06,432 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:06:06,433 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:06:06,433 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:06,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:06:06,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:06:06,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:06,435 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:06,435 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 38.0) internal successors, (114), 3 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:06,435 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:06,435 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,435 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:06,436 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,436 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,436 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,436 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,436 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:06,436 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,436 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:06,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:06,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:06,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:06,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:06,524 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-11-04 12:06:06,525 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting thr1Err8ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:06,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:06,525 INFO L85 PathProgramCache]: Analyzing trace with hash -1488941308, now seen corresponding path program 1 times [2022-11-04 12:06:06,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:06,526 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027486838] [2022-11-04 12:06:06,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:06,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:06,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:08,366 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 360 proven. 18 refuted. 0 times theorem prover too weak. 459 trivial. 0 not checked. [2022-11-04 12:06:08,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:06:08,367 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027486838] [2022-11-04 12:06:08,367 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1027486838] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-04 12:06:08,368 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [155508896] [2022-11-04 12:06:08,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:08,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:06:08,369 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 [2022-11-04 12:06:08,372 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-04 12:06:08,403 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-04 12:06:08,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:08,964 INFO L263 TraceCheckSpWp]: Trace formula consists of 1408 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-04 12:06:08,973 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-04 12:06:09,561 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-04 12:06:09,663 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-04 12:06:09,772 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 360 proven. 22 refuted. 0 times theorem prover too weak. 455 trivial. 0 not checked. [2022-11-04 12:06:09,772 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-04 12:06:10,390 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 364 proven. 18 refuted. 0 times theorem prover too weak. 455 trivial. 0 not checked. [2022-11-04 12:06:10,391 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [155508896] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-04 12:06:10,391 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-04 12:06:10,391 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12, 10] total 23 [2022-11-04 12:06:10,391 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885132825] [2022-11-04 12:06:10,392 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-04 12:06:10,393 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-11-04 12:06:10,393 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:10,393 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-11-04 12:06:10,394 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2022-11-04 12:06:10,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:10,394 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:10,395 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 15.956521739130435) internal successors, (367), 23 states have internal predecessors, (367), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:10,395 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:10,395 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:10,395 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:10,395 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:10,395 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:10,395 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:10,395 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:10,396 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:10,396 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:10,396 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:10,396 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:11,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:11,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:11,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:11,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:11,512 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:11,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:11,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:11,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:11,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:11,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:11,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-04 12:06:11,556 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-11-04 12:06:11,714 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-11-04 12:06:11,714 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting thr1Err6ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:11,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:11,715 INFO L85 PathProgramCache]: Analyzing trace with hash -827833868, now seen corresponding path program 1 times [2022-11-04 12:06:11,715 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:11,715 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781288640] [2022-11-04 12:06:11,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:11,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:11,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:13,811 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 39 proven. 31 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2022-11-04 12:06:13,811 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:06:13,811 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781288640] [2022-11-04 12:06:13,811 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1781288640] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-04 12:06:13,812 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1396333350] [2022-11-04 12:06:13,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:13,812 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:06:13,812 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 [2022-11-04 12:06:13,813 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-04 12:06:13,820 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-04 12:06:14,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:14,099 INFO L263 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 65 conjunts are in the unsatisfiable core [2022-11-04 12:06:14,106 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-04 12:06:14,162 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2022-11-04 12:06:14,288 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-04 12:06:14,288 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-04 12:06:14,714 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-11-04 12:06:14,741 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-04 12:06:14,741 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-04 12:06:14,964 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-11-04 12:06:14,991 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-04 12:06:14,996 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-04 12:06:15,328 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-11-04 12:06:15,356 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-04 12:06:15,357 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-04 12:06:15,493 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-04 12:06:15,536 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2022-11-04 12:06:15,581 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-04 12:06:15,582 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-04 12:06:15,630 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-04 12:06:15,631 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-04 12:06:15,632 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2022-11-04 12:06:15,700 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-04 12:06:15,700 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-04 12:06:15,753 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 30 [2022-11-04 12:06:15,794 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-04 12:06:15,795 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-04 12:06:15,796 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-04 12:06:15,798 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-04 12:06:15,799 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 44 [2022-11-04 12:06:15,851 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 27 proven. 77 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2022-11-04 12:06:15,852 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-04 12:06:15,887 WARN L833 $PredicateComparison]: unable to prove that (and (forall ((v_ArrVal_1386 (Array Int Int))) (= (select (select (store |c_#race| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_1386) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) (+ |c_thr1Thread1of1ForFork0_~#l~0#1.offset| 1)) 0)) (forall ((v_ArrVal_1386 (Array Int Int))) (= (select (select (store |c_#race| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_1386) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) (+ 2 |c_thr1Thread1of1ForFork0_~#l~0#1.offset|)) 0)) (forall ((v_ArrVal_1386 (Array Int Int))) (= (select (select (store |c_#race| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_1386) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0))) is different from false [2022-11-04 12:06:17,522 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_ULTIMATE.start_thr1_~#l~0#1.base_47| Int) (v_ArrVal_1381 Int) (v_ArrVal_1386 (Array Int Int))) (or (not (= (select (store |c_#valid| |c_ULTIMATE.start_thr1_~#l~0#1.base| v_ArrVal_1381) |v_ULTIMATE.start_thr1_~#l~0#1.base_47|) 0)) (= (select (select (store (store |c_#race| |c_thr1Thread1of1ForFork0_~#l~0#1.base| (store (store (select |c_#race| |c_thr1Thread1of1ForFork0_~#l~0#1.base|) (+ |c_thr1Thread1of1ForFork0_~#l~0#1.offset| 1) 0) (+ 2 |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0)) |v_ULTIMATE.start_thr1_~#l~0#1.base_47| v_ArrVal_1386) |c_thr1Thread1of1ForFork0_~#l~0#1.base|) |c_thr1Thread1of1ForFork0_~#l~0#1.offset|) 0))) is different from false [2022-11-04 12:06:17,542 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-04 12:06:17,543 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 28 treesize of output 39 [2022-11-04 12:06:17,550 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-04 12:06:17,550 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 50 treesize of output 30 [2022-11-04 12:06:17,554 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2022-11-04 12:06:19,394 INFO L134 CoverageAnalysis]: Checked inductivity of 160 backedges. 62 proven. 29 refuted. 4 times theorem prover too weak. 62 trivial. 3 not checked. [2022-11-04 12:06:19,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1396333350] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-04 12:06:19,394 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-04 12:06:19,395 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 17, 16] total 39 [2022-11-04 12:06:19,395 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793474481] [2022-11-04 12:06:19,395 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-04 12:06:19,396 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2022-11-04 12:06:19,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:19,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2022-11-04 12:06:19,398 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=252, Invalid=1152, Unknown=10, NotChecked=146, Total=1560 [2022-11-04 12:06:19,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:19,398 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:19,398 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 39 states have (on average 11.487179487179487) internal successors, (448), 40 states have internal predecessors, (448), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:19,399 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:19,399 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:19,399 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:19,399 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:19,399 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:19,399 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:19,400 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:19,400 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:19,400 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:19,400 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:19,400 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2022-11-04 12:06:19,400 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:22,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:22,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-04 12:06:22,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-11-04 12:06:22,399 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-04 12:06:22,575 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:06:22,576 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting thr1Err5ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:22,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:22,576 INFO L85 PathProgramCache]: Analyzing trace with hash 1063381209, now seen corresponding path program 1 times [2022-11-04 12:06:22,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:22,577 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2112145437] [2022-11-04 12:06:22,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:22,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:22,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:22,731 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2022-11-04 12:06:22,732 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:06:22,732 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2112145437] [2022-11-04 12:06:22,732 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2112145437] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-04 12:06:22,732 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-04 12:06:22,732 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-04 12:06:22,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801889313] [2022-11-04 12:06:22,735 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-04 12:06:22,735 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-04 12:06:22,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:22,736 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-04 12:06:22,736 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-04 12:06:22,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:22,736 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:22,737 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 38.666666666666664) internal successors, (116), 3 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:22,737 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:22,737 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,737 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:22,737 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,737 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 32 states. [2022-11-04 12:06:22,738 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:22,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:22,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-04 12:06:22,841 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-11-04 12:06:22,842 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:22,842 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-11-04 12:06:22,843 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting thr1Err5ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:22,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:22,844 INFO L85 PathProgramCache]: Analyzing trace with hash 1063381240, now seen corresponding path program 1 times [2022-11-04 12:06:22,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:22,844 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989249282] [2022-11-04 12:06:22,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:22,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:22,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:23,770 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 113 proven. 70 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-04 12:06:23,770 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:06:23,771 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989249282] [2022-11-04 12:06:23,771 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1989249282] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-04 12:06:23,771 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [191365162] [2022-11-04 12:06:23,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:23,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:06:23,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 [2022-11-04 12:06:23,772 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-04 12:06:23,774 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-04 12:06:24,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:24,112 INFO L263 TraceCheckSpWp]: Trace formula consists of 813 conjuncts, 56 conjunts are in the unsatisfiable core [2022-11-04 12:06:24,142 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-04 12:06:24,671 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-04 12:06:25,335 INFO L356 Elim1Store]: treesize reduction 15, result has 42.3 percent of original size [2022-11-04 12:06:25,335 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 30 [2022-11-04 12:06:25,481 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-04 12:06:25,593 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 113 proven. 70 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-11-04 12:06:25,593 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-04 12:06:26,139 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 165 proven. 10 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-11-04 12:06:26,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [191365162] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-04 12:06:26,140 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-04 12:06:26,140 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 17, 9] total 29 [2022-11-04 12:06:26,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948788072] [2022-11-04 12:06:26,141 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-04 12:06:26,142 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-11-04 12:06:26,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:26,142 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-11-04 12:06:26,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=113, Invalid=699, Unknown=0, NotChecked=0, Total=812 [2022-11-04 12:06:26,143 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:26,143 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:26,144 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 15.482758620689655) internal successors, (449), 29 states have internal predecessors, (449), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:26,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:26,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,144 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:26,145 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,145 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,145 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,145 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,145 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:26,145 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,145 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,146 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2022-11-04 12:06:26,146 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 32 states. [2022-11-04 12:06:26,146 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:26,146 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:30,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:30,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:30,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:30,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-11-04 12:06:31,026 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-11-04 12:06:31,197 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:06:31,197 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting thr1Err7ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:31,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:31,198 INFO L85 PathProgramCache]: Analyzing trace with hash -2025641908, now seen corresponding path program 1 times [2022-11-04 12:06:31,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:31,198 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078678244] [2022-11-04 12:06:31,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:31,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:31,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:32,749 INFO L134 CoverageAnalysis]: Checked inductivity of 608 backedges. 358 proven. 144 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2022-11-04 12:06:32,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-04 12:06:32,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078678244] [2022-11-04 12:06:32,750 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078678244] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-04 12:06:32,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [596031531] [2022-11-04 12:06:32,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:32,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-04 12:06:32,751 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 [2022-11-04 12:06:32,752 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-04 12:06:32,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-04 12:06:33,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-04 12:06:33,260 INFO L263 TraceCheckSpWp]: Trace formula consists of 1221 conjuncts, 42 conjunts are in the unsatisfiable core [2022-11-04 12:06:33,266 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-04 12:06:34,414 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2022-11-04 12:06:34,493 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-04 12:06:34,573 INFO L134 CoverageAnalysis]: Checked inductivity of 608 backedges. 358 proven. 164 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2022-11-04 12:06:34,573 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-04 12:06:35,407 INFO L134 CoverageAnalysis]: Checked inductivity of 608 backedges. 358 proven. 83 refuted. 0 times theorem prover too weak. 167 trivial. 0 not checked. [2022-11-04 12:06:35,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [596031531] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-04 12:06:35,407 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-04 12:06:35,407 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 17, 10] total 31 [2022-11-04 12:06:35,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644845098] [2022-11-04 12:06:35,408 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-04 12:06:35,409 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-11-04 12:06:35,409 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-04 12:06:35,410 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-11-04 12:06:35,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=809, Unknown=0, NotChecked=0, Total=930 [2022-11-04 12:06:35,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:35,410 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-04 12:06:35,411 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 17.516129032258064) internal successors, (543), 31 states have internal predecessors, (543), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-04 12:06:35,411 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:35,411 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,412 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2022-11-04 12:06:35,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 32 states. [2022-11-04 12:06:35,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:35,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 43 states. [2022-11-04 12:06:35,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:37,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-04 12:06:37,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-11-04 12:06:37,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-11-04 12:06:37,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-04 12:06:37,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2022-11-04 12:06:37,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-04 12:06:37,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-11-04 12:06:37,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2022-11-04 12:06:37,493 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-04 12:06:37,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-11-04 12:06:37,657 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting thr1Err11ASSERT_VIOLATIONDATA_RACE === [thr1Err0ASSERT_VIOLATIONDATA_RACE, thr1Err1ASSERT_VIOLATIONDATA_RACE, thr1Err2ASSERT_VIOLATIONDATA_RACE, thr1Err3ASSERT_VIOLATIONDATA_RACE (and 8 more)] === [2022-11-04 12:06:37,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-04 12:06:37,657 INFO L85 PathProgramCache]: Analyzing trace with hash 677113457, now seen corresponding path program 1 times [2022-11-04 12:06:37,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-04 12:06:37,658 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323720459] [2022-11-04 12:06:37,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-04 12:06:37,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-04 12:06:37,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-04 12:06:37,758 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-04 12:06:37,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-04 12:06:38,017 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-11-04 12:06:38,018 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-04 12:06:38,019 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location thr1Err11ASSERT_VIOLATIONDATA_RACE (11 of 12 remaining) [2022-11-04 12:06:38,020 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err0ASSERT_VIOLATIONDATA_RACE (10 of 12 remaining) [2022-11-04 12:06:38,021 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err1ASSERT_VIOLATIONDATA_RACE (9 of 12 remaining) [2022-11-04 12:06:38,021 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err2ASSERT_VIOLATIONDATA_RACE (8 of 12 remaining) [2022-11-04 12:06:38,021 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err3ASSERT_VIOLATIONDATA_RACE (7 of 12 remaining) [2022-11-04 12:06:38,021 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err4ASSERT_VIOLATIONDATA_RACE (6 of 12 remaining) [2022-11-04 12:06:38,021 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err5ASSERT_VIOLATIONDATA_RACE (5 of 12 remaining) [2022-11-04 12:06:38,022 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err7ASSERT_VIOLATIONDATA_RACE (4 of 12 remaining) [2022-11-04 12:06:38,022 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err8ASSERT_VIOLATIONDATA_RACE (3 of 12 remaining) [2022-11-04 12:06:38,022 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err6ASSERT_VIOLATIONDATA_RACE (2 of 12 remaining) [2022-11-04 12:06:38,022 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err9ASSERT_VIOLATIONDATA_RACE (1 of 12 remaining) [2022-11-04 12:06:38,022 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location thr1Err10ASSERT_VIOLATIONDATA_RACE (0 of 12 remaining) [2022-11-04 12:06:38,023 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-11-04 12:06:38,029 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-04 12:06:38,031 INFO L307 ceAbstractionStarter]: Result for error location thr1Thread1of1ForFork0 was UNSAFE,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN,UNKNOWN (1/2) [2022-11-04 12:06:38,037 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2022-11-04 12:06:38,037 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-04 12:06:38,452 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.11 12:06:38 BasicIcfg [2022-11-04 12:06:38,452 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-04 12:06:38,453 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-04 12:06:38,453 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-04 12:06:38,454 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-04 12:06:38,454 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.11 12:05:51" (3/4) ... [2022-11-04 12:06:38,457 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-04 12:06:38,457 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-04 12:06:38,458 INFO L158 Benchmark]: Toolchain (without parser) took 48522.89ms. Allocated memory was 90.2MB in the beginning and 625.0MB in the end (delta: 534.8MB). Free memory was 52.5MB in the beginning and 498.5MB in the end (delta: -446.1MB). Peak memory consumption was 88.0MB. Max. memory is 16.1GB. [2022-11-04 12:06:38,458 INFO L158 Benchmark]: CDTParser took 0.29ms. Allocated memory is still 90.2MB. Free memory was 62.6MB in the beginning and 62.5MB in the end (delta: 28.2kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-04 12:06:38,462 INFO L158 Benchmark]: CACSL2BoogieTranslator took 685.07ms. Allocated memory was 90.2MB in the beginning and 113.2MB in the end (delta: 23.1MB). Free memory was 52.3MB in the beginning and 76.9MB in the end (delta: -24.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2022-11-04 12:06:38,463 INFO L158 Benchmark]: Boogie Procedure Inliner took 73.88ms. Allocated memory is still 113.2MB. Free memory was 76.9MB in the beginning and 74.5MB in the end (delta: 2.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-04 12:06:38,463 INFO L158 Benchmark]: Boogie Preprocessor took 54.37ms. Allocated memory is still 113.2MB. Free memory was 74.5MB in the beginning and 72.5MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-04 12:06:38,464 INFO L158 Benchmark]: RCFGBuilder took 898.38ms. Allocated memory is still 113.2MB. Free memory was 72.5MB in the beginning and 71.7MB in the end (delta: 736.9kB). Peak memory consumption was 22.7MB. Max. memory is 16.1GB. [2022-11-04 12:06:38,464 INFO L158 Benchmark]: TraceAbstraction took 46800.35ms. Allocated memory was 113.2MB in the beginning and 625.0MB in the end (delta: 511.7MB). Free memory was 70.9MB in the beginning and 499.6MB in the end (delta: -428.7MB). Peak memory consumption was 304.9MB. Max. memory is 16.1GB. [2022-11-04 12:06:38,464 INFO L158 Benchmark]: Witness Printer took 4.25ms. Allocated memory is still 625.0MB. Free memory was 499.6MB in the beginning and 498.5MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2022-11-04 12:06:38,467 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29ms. Allocated memory is still 90.2MB. Free memory was 62.6MB in the beginning and 62.5MB in the end (delta: 28.2kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 685.07ms. Allocated memory was 90.2MB in the beginning and 113.2MB in the end (delta: 23.1MB). Free memory was 52.3MB in the beginning and 76.9MB in the end (delta: -24.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 73.88ms. Allocated memory is still 113.2MB. Free memory was 76.9MB in the beginning and 74.5MB in the end (delta: 2.5MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 54.37ms. Allocated memory is still 113.2MB. Free memory was 74.5MB in the beginning and 72.5MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * RCFGBuilder took 898.38ms. Allocated memory is still 113.2MB. Free memory was 72.5MB in the beginning and 71.7MB in the end (delta: 736.9kB). Peak memory consumption was 22.7MB. Max. memory is 16.1GB. * TraceAbstraction took 46800.35ms. Allocated memory was 113.2MB in the beginning and 625.0MB in the end (delta: 511.7MB). Free memory was 70.9MB in the beginning and 499.6MB in the end (delta: -428.7MB). Peak memory consumption was 304.9MB. Max. memory is 16.1GB. * Witness Printer took 4.25ms. Allocated memory is still 625.0MB. Free memory was 499.6MB in the beginning and 498.5MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 29078, positive: 21199, positive conditional: 10095, positive unconditional: 11104, negative: 7879, negative conditional: 7746, negative unconditional: 133, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 21443, positive: 21199, positive conditional: 10095, positive unconditional: 11104, negative: 244, negative conditional: 111, negative unconditional: 133, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 21443, positive: 21199, positive conditional: 10095, positive unconditional: 11104, negative: 244, negative conditional: 111, negative unconditional: 133, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 22041, positive: 21199, positive conditional: 111, positive unconditional: 21088, negative: 842, negative conditional: 487, negative unconditional: 355, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 22041, positive: 21199, positive conditional: 111, positive unconditional: 21088, negative: 842, negative conditional: 89, negative unconditional: 753, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 22041, positive: 21199, positive conditional: 111, positive unconditional: 21088, negative: 842, negative conditional: 89, negative unconditional: 753, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 7661, positive: 7462, positive conditional: 42, positive unconditional: 7420, negative: 199, negative conditional: 51, negative unconditional: 148, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 7661, positive: 7249, positive conditional: 0, positive unconditional: 7249, negative: 412, negative conditional: 0, negative unconditional: 412, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Independence Queries: [ total: 412, positive: 213, positive conditional: 42, positive unconditional: 171, negative: 190, negative conditional: 48, negative unconditional: 142, unknown: 9, unknown conditional: 3, unknown unconditional: 6] , SemanticIndependenceRelation.Query Time [ms]: [ total: 9972, positive: 658, positive conditional: 157, positive unconditional: 501, negative: 778, negative conditional: 364, negative unconditional: 414, unknown: 8537, unknown conditional: 3186, unknown unconditional: 5350] ], Cache Queries: [ total: 22041, positive: 13737, positive conditional: 69, positive unconditional: 13668, negative: 643, negative conditional: 38, negative unconditional: 605, unknown: 7661, unknown conditional: 93, unknown unconditional: 7568] , Statistics on independence cache: Total cache size (in pairs): 7661, Positive cache size: 7462, Positive conditional cache size: 42, Positive unconditional cache size: 7420, Negative cache size: 199, Negative conditional cache size: 51, Negative unconditional cache size: 148, Eliminated conditions: 398, Maximal queried relation: 8, Independence queries for same thread: 7635 - StatisticsResult: Persistent set benchmarks Persistent set computation time: 6.4s, Number of persistent set computation: 1022, Number of trivial persistent sets: 957, Underlying independence relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 11237, positive: 11104, positive conditional: 0, positive unconditional: 11104, negative: 133, negative conditional: 0, negative unconditional: 133, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 29078, positive: 21199, positive conditional: 10095, positive unconditional: 11104, negative: 7879, negative conditional: 7746, negative unconditional: 133, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 21443, positive: 21199, positive conditional: 10095, positive unconditional: 11104, negative: 244, negative conditional: 111, negative unconditional: 133, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 21443, positive: 21199, positive conditional: 10095, positive unconditional: 11104, negative: 244, negative conditional: 111, negative unconditional: 133, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 22041, positive: 21199, positive conditional: 111, positive unconditional: 21088, negative: 842, negative conditional: 487, negative unconditional: 355, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 22041, positive: 21199, positive conditional: 111, positive unconditional: 21088, negative: 842, negative conditional: 89, negative unconditional: 753, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 22041, positive: 21199, positive conditional: 111, positive unconditional: 21088, negative: 842, negative conditional: 89, negative unconditional: 753, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 7661, positive: 7462, positive conditional: 42, positive unconditional: 7420, negative: 199, negative conditional: 51, negative unconditional: 148, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 7661, positive: 7249, positive conditional: 0, positive unconditional: 7249, negative: 412, negative conditional: 0, negative unconditional: 412, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Independence Queries: [ total: 412, positive: 213, positive conditional: 42, positive unconditional: 171, negative: 190, negative conditional: 48, negative unconditional: 142, unknown: 9, unknown conditional: 3, unknown unconditional: 6] , SemanticIndependenceRelation.Query Time [ms]: [ total: 9972, positive: 658, positive conditional: 157, positive unconditional: 501, negative: 778, negative conditional: 364, negative unconditional: 414, unknown: 8537, unknown conditional: 3186, unknown unconditional: 5350] ], Cache Queries: [ total: 22041, positive: 13737, positive conditional: 69, positive unconditional: 13668, negative: 643, negative conditional: 38, negative unconditional: 605, unknown: 7661, unknown conditional: 93, unknown unconditional: 7568] , Statistics on independence cache: Total cache size (in pairs): 7661, Positive cache size: 7462, Positive conditional cache size: 42, Positive unconditional cache size: 7420, Negative cache size: 199, Negative conditional cache size: 51, Negative unconditional cache size: 148, Eliminated conditions: 398, Maximal queried relation: 8, Independence queries for same thread: 7635 - DataRaceFoundResult [Line: 704]: Data race detected Data race detected The following path leads to a data race: [L689] 0 volatile unsigned s = 0; VAL [s=0] [L690] 0 volatile unsigned t = 0; VAL [s=0, t=0] [L697] 0 unsigned c = 0; VAL [c=0, s=0, t=0] [L710] 0 pthread_t t; VAL [c=0, s=0, t={9:0}, t=0] [L711] COND TRUE 0 __VERIFIER_nondet_int() VAL [__VERIFIER_nondet_int()=1, c=0, s=0, t=0, t={9:0}] [L711] FCALL, FORK 0 pthread_create(&t, 0, thr1, 0) VAL [c=0, pthread_create(&t, 0, thr1, 0)=-1, s=0, t={9:0}, t=0] [L700] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, c=0, s=0, t=0] [L701] 1 unsigned l; VAL [arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=0] [L702] CALL 1 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 1 t != -1 [L693] CALL 1 assume_abort_if_not(t != -1) [L4] COND FALSE 1 !(!cond) [L693] RET 1 assume_abort_if_not(t != -1) [L694] 1 *l = t [L695] EXPR 1 t + 1 [L695] 1 t = t + 1 [L702] RET 1 __VERIFIER_atomic_fetch_and_inc(&l) [L711] COND FALSE 0 !(__VERIFIER_nondet_int()) VAL [__VERIFIER_nondet_int()=0, c=0, s=0, t=1, t={9:0}] [L702] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L712] CALL 0 thr1(0) [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L702] EXPR 1 \read(l) VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L702] 1 s == l VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L702] 1 s == l VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L700] COND TRUE 0 1 VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L702] 1 s == l VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, s=0, t=1] [L701] 0 unsigned l; VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=1] [L702] 1 s == l VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={10:0}, s=0, t=1] [L702] CALL 0 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 0 t != -1 [L693] CALL 0 assume_abort_if_not(t != -1) [L4] COND FALSE 0 !(!cond) [L693] RET 0 assume_abort_if_not(t != -1) [L694] 0 *l = t [L695] EXPR 0 t + 1 [L695] 0 t = t + 1 [L702] RET 0 __VERIFIER_atomic_fetch_and_inc(&l) [L702] COND TRUE 1 s == l VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=2] [L702] COND TRUE 0 1 VAL [\read(l)=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={10:0}, s=0, t=2] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={10:0}, s=0, t=2] [L703] 1 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={10:0}, s=0, t=2] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={10:0}, l={11:0}, s=0, t=2] [L702] EXPR 0 \read(l) VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={10:0}, l={11:0}, s=0, t=2] [L703] 1 c = 1 VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=63, l={10:0}, l={11:0}, s=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=63, l={10:0}, l={11:0}, s=0, t=2] [L703] 1 c = 1 VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=63, l={10:0}, l={11:0}, s=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=63, l={11:0}, l={10:0}, s=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={10:0}, s=0, t=2] [L703] EXPR 1 c == 1 VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={10:0}, s=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={10:0}, s=0, t=2] [L703] EXPR 1 c == 1 VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={10:0}, l={11:0}, s=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={10:0}, s=0, t=2] [L703] COND FALSE 1 !(!(c == 1)) VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={10:0}, s=0, t=2] [L702] COND FALSE 0 !(s == l) VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={10:0}, s=0, t=2] [L703] 1 c = 0 VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=2] [L702] COND TRUE 0 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=2] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=50, l={10:0}, l={11:0}, s=0, t=2] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=50, l={10:0}, l={11:0}, s=0, t=2] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=50, l={11:0}, l={10:0}, s=0, t=2] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=50, l={11:0}, l={10:0}, s=0, t=2] [L702] EXPR 0 \read(l) VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=2] [L704] 1 s++ VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={10:0}, s=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=2] [L704] 1 s++ VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, t=2] [L704] 1 s++ VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=0, s++=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={10:0}, s=0, s++=0, t=2] [L704] 1 s++ VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=1, s++=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={10:0}, s=1, s++=0, t=2] [L702] 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=1, s++=0, t=2] [L704] 1 s++ VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=1, s++=0, s++=65, t=2] [L702] COND TRUE 0 s == l VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=1, s++=0, s++=65, t=2] [L704] 1 s++ VAL [\read(l)=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={10:0}, l={11:0}, s=1, s++=0, s++=65, t=2] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={10:0}, l={11:0}, s=1, s++=65, t=2] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=71, l={10:0}, l={11:0}, s=1, t=2] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=71, l={11:0}, s=1, t=2] [L700] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=71, l={11:0}, s=1, t=2] [L701] 1 unsigned l; VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={11:0}, s=1, t=2] [L703] EXPR 0 c == 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={12:0}, s=1, t=2] [L702] CALL 1 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 1 t != -1 [L693] CALL 1 assume_abort_if_not(t != -1) [L4] COND FALSE 1 !(!cond) [L693] RET 1 assume_abort_if_not(t != -1) [L694] 1 *l = t [L695] EXPR 1 t + 1 [L695] 1 t = t + 1 [L702] RET 1 __VERIFIER_atomic_fetch_and_inc(&l) [L703] EXPR 0 c == 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={11:0}, s=1, t=3] [L702] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={11:0}, s=1, t=3] [L703] COND FALSE 0 !(!(c == 1)) VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={12:0}, s=1, t=3] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={11:0}, l={12:0}, s=1, t=3] [L703] 0 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=1, t=3] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=1, t=3] [L702] EXPR 1 \read(l) VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=1, t=3] [L703] 0 c = 0 VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=66, l={12:0}, l={11:0}, s=1, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=66, l={11:0}, l={12:0}, s=1, t=3] [L703] 0 c = 0 VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=66, l={12:0}, l={11:0}, s=1, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=66, l={12:0}, l={11:0}, s=1, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=1, t=3] [L704] 0 s++ VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=1, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=1, t=3] [L704] 0 s++ VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=1, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=1, t=3] [L704] 0 s++ VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=1, s++=1, t=3] [L702] COND FALSE 1 !(s == l) VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=1, s++=1, t=3] [L704] 0 s++ VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=2, s++=1, t=3] [L702] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=2, s++=1, t=3] [L704] 0 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=2, s++=0, s++=1, t=3] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=2, s++=1, s++=0, t=3] [L704] 0 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=2, s++=0, s++=1, t=3] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=2, s++=1, s++=0, t=3] [L702] EXPR 1 \read(l) VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=2, s++=0, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={11:0}, l={12:0}, s=2, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={11:0}, s=2, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, s=2, t=3] [L700] COND TRUE 0 1 VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, s=2, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, s=2, t=3] [L701] 0 unsigned l; VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=3] [L702] 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=3] [L702] CALL 0 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 0 t != -1 [L693] CALL 0 assume_abort_if_not(t != -1) [L4] COND FALSE 0 !(!cond) [L693] RET 0 assume_abort_if_not(t != -1) [L694] 0 *l = t [L695] EXPR 0 t + 1 [L695] 0 t = t + 1 [L702] RET 0 __VERIFIER_atomic_fetch_and_inc(&l) [L702] COND TRUE 1 s == l VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=4] [L702] COND TRUE 0 1 VAL [\read(l)=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=4] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=4] [L703] 1 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={12:0}, s=2, t=4] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={12:0}, s=2, t=4] [L702] EXPR 0 \read(l) VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={12:0}, s=2, t=4] [L703] 1 c = 1 VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=61, l={13:0}, l={12:0}, s=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=61, l={12:0}, l={13:0}, s=2, t=4] [L703] 1 c = 1 VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=61, l={12:0}, l={13:0}, s=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=61, l={12:0}, l={13:0}, s=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={13:0}, s=2, t=4] [L703] EXPR 1 c == 1 VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={12:0}, s=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={13:0}, s=2, t=4] [L703] EXPR 1 c == 1 VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={12:0}, s=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={13:0}, s=2, t=4] [L703] COND FALSE 1 !(!(c == 1)) VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={13:0}, s=2, t=4] [L702] COND FALSE 0 !(s == l) VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={12:0}, l={13:0}, s=2, t=4] [L703] 1 c = 0 VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=2, t=4] [L702] COND TRUE 0 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=2, t=4] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=52, l={12:0}, l={13:0}, s=2, t=4] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=52, l={13:0}, l={12:0}, s=2, t=4] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=52, l={12:0}, l={13:0}, s=2, t=4] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=52, l={12:0}, l={13:0}, s=2, t=4] [L702] EXPR 0 \read(l) VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=4] [L704] 1 s++ VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=2, t=4] [L704] 1 s++ VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, t=4] [L704] 1 s++ VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=2, s++=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=2, s++=2, t=4] [L704] 1 s++ VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=3, s++=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=3, s++=2, t=4] [L702] 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=3, s++=2, t=4] [L704] 1 s++ VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={12:0}, s=3, s++=2, s++=49, t=4] [L702] COND TRUE 0 s == l VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=3, s++=2, s++=49, t=4] [L704] 1 s++ VAL [\read(l)=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={12:0}, l={13:0}, s=3, s++=49, s++=2, t=4] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={12:0}, s=3, s++=49, t=4] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=69, l={12:0}, l={13:0}, s=3, t=4] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=69, l={13:0}, s=3, t=4] [L700] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=69, l={13:0}, s=3, t=4] [L701] 1 unsigned l; VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={14:0}, s=3, t=4] [L703] EXPR 0 c == 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={14:0}, s=3, t=4] [L702] CALL 1 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 1 t != -1 [L693] CALL 1 assume_abort_if_not(t != -1) [L4] COND FALSE 1 !(!cond) [L693] RET 1 assume_abort_if_not(t != -1) [L694] 1 *l = t [L695] EXPR 1 t + 1 [L695] 1 t = t + 1 [L702] RET 1 __VERIFIER_atomic_fetch_and_inc(&l) [L703] EXPR 0 c == 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={14:0}, l={13:0}, s=3, t=5] [L702] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={14:0}, l={13:0}, s=3, t=5] [L703] COND FALSE 0 !(!(c == 1)) VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={14:0}, l={13:0}, s=3, t=5] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={13:0}, l={14:0}, s=3, t=5] [L703] 0 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={13:0}, s=3, t=5] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=3, t=5] [L702] EXPR 1 \read(l) VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={13:0}, s=3, t=5] [L703] 0 c = 0 VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=64, l={13:0}, l={14:0}, s=3, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=64, l={14:0}, l={13:0}, s=3, t=5] [L703] 0 c = 0 VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=64, l={14:0}, l={13:0}, s=3, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=64, l={14:0}, l={13:0}, s=3, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={13:0}, s=3, t=5] [L704] 0 s++ VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=3, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=3, t=5] [L704] 0 s++ VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=3, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=3, t=5] [L704] 0 s++ VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=3, s++=3, t=5] [L702] COND FALSE 1 !(s == l) VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=3, s++=3, t=5] [L704] 0 s++ VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=4, s++=3, t=5] [L702] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=4, s++=3, t=5] [L704] 0 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=4, s++=3, s++=0, t=5] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={13:0}, s=4, s++=0, s++=3, t=5] [L704] 0 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=4, s++=0, s++=3, t=5] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=4, s++=3, s++=0, t=5] [L702] EXPR 1 \read(l) VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={13:0}, s=4, s++=0, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={13:0}, l={14:0}, s=4, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={13:0}, s=4, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, s=4, t=5] [L700] COND TRUE 0 1 VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, s=4, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, s=4, t=5] [L701] 0 unsigned l; VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=5] [L702] 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=5] [L702] CALL 0 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 0 t != -1 [L693] CALL 0 assume_abort_if_not(t != -1) [L4] COND FALSE 0 !(!cond) [L693] RET 0 assume_abort_if_not(t != -1) [L694] 0 *l = t [L695] EXPR 0 t + 1 [L695] 0 t = t + 1 [L702] RET 0 __VERIFIER_atomic_fetch_and_inc(&l) [L702] COND TRUE 1 s == l VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=6] [L702] COND TRUE 0 1 VAL [\read(l)=4, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=6] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=6] [L703] 1 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={14:0}, s=4, t=6] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={14:0}, s=4, t=6] [L702] EXPR 0 \read(l) VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={14:0}, l={15:0}, s=4, t=6] [L703] 1 c = 1 VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=56, l={14:0}, l={15:0}, s=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=56, l={15:0}, l={14:0}, s=4, t=6] [L703] 1 c = 1 VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=56, l={15:0}, l={14:0}, s=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=56, l={14:0}, l={15:0}, s=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={14:0}, s=4, t=6] [L703] EXPR 1 c == 1 VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={14:0}, s=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={14:0}, s=4, t=6] [L703] EXPR 1 c == 1 VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={14:0}, s=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={14:0}, l={15:0}, s=4, t=6] [L703] COND FALSE 1 !(!(c == 1)) VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={14:0}, l={15:0}, s=4, t=6] [L702] COND FALSE 0 !(s == l) VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={14:0}, l={15:0}, s=4, t=6] [L703] 1 c = 0 VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=4, t=6] [L702] COND TRUE 0 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=4, t=6] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=68, l={15:0}, l={14:0}, s=4, t=6] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=68, l={14:0}, l={15:0}, s=4, t=6] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=68, l={14:0}, l={15:0}, s=4, t=6] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=68, l={15:0}, l={14:0}, s=4, t=6] [L702] EXPR 0 \read(l) VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=4, t=6] [L704] 1 s++ VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=6] [L704] 1 s++ VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, t=6] [L704] 1 s++ VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=4, s++=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=4, s++=4, t=6] [L704] 1 s++ VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=5, s++=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=5, s++=4, t=6] [L702] 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=5, s++=4, t=6] [L704] 1 s++ VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=5, s++=60, s++=4, t=6] [L702] COND TRUE 0 s == l VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={14:0}, l={15:0}, s=5, s++=60, s++=4, t=6] [L704] 1 s++ VAL [\read(l)=5, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={14:0}, s=5, s++=60, s++=4, t=6] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={14:0}, s=5, s++=60, t=6] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=62, l={14:0}, l={15:0}, s=5, t=6] [L703] 0 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=62, l={15:0}, s=5, t=6] [L700] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=62, l={15:0}, s=5, t=6] [L701] 1 unsigned l; VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={15:0}, s=5, t=6] [L703] EXPR 0 c == 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={16:0}, s=5, t=6] [L702] CALL 1 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 1 t != -1 [L693] CALL 1 assume_abort_if_not(t != -1) [L4] COND FALSE 1 !(!cond) [L693] RET 1 assume_abort_if_not(t != -1) [L694] 1 *l = t [L695] EXPR 1 t + 1 [L695] 1 t = t + 1 [L702] RET 1 __VERIFIER_atomic_fetch_and_inc(&l) [L703] EXPR 0 c == 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={15:0}, l={16:0}, s=5, t=7] [L702] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={15:0}, s=5, t=7] [L703] COND FALSE 0 !(!(c == 1)) VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={15:0}, s=5, t=7] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={15:0}, s=5, t=7] [L703] 0 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=5, t=7] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=5, t=7] [L702] EXPR 1 \read(l) VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={15:0}, s=5, t=7] [L703] 0 c = 0 VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=74, l={16:0}, l={15:0}, s=5, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=74, l={16:0}, l={15:0}, s=5, t=7] [L703] 0 c = 0 VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=74, l={15:0}, l={16:0}, s=5, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=74, l={15:0}, l={16:0}, s=5, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=5, t=7] [L704] 0 s++ VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=5, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=5, t=7] [L704] 0 s++ VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={15:0}, s=5, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={15:0}, s=5, t=7] [L704] 0 s++ VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=5, s++=5, t=7] [L702] COND FALSE 1 !(s == l) VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=5, s++=5, t=7] [L704] 0 s++ VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={15:0}, s=6, s++=5, t=7] [L702] COND TRUE 1 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=6, s++=5, t=7] [L704] 0 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=6, s++=0, s++=5, t=7] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=6, s++=0, s++=5, t=7] [L704] 0 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=6, s++=0, s++=5, t=7] [L702] 1 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=6, s++=0, s++=5, t=7] [L702] EXPR 1 \read(l) VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={15:0}, s=6, s++=0, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={15:0}, l={16:0}, s=6, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={15:0}, s=6, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, s=6, t=7] [L700] COND TRUE 0 1 VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, s=6, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, s=6, t=7] [L701] 0 unsigned l; VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={8:0}, l={16:0}, s=6, t=7] [L702] 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, t=7] [L702] CALL 0 __VERIFIER_atomic_fetch_and_inc(&l) [L693] EXPR 0 t != -1 [L693] CALL 0 assume_abort_if_not(t != -1) [L4] COND FALSE 0 !(!cond) [L693] RET 0 assume_abort_if_not(t != -1) [L694] 0 *l = t [L695] EXPR 0 t + 1 [L695] 0 t = t + 1 [L702] RET 0 __VERIFIER_atomic_fetch_and_inc(&l) [L702] COND TRUE 1 s == l VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, t=8] [L702] COND TRUE 0 1 VAL [\read(l)=6, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={8:0}, l={16:0}, s=6, t=8] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={8:0}, l={16:0}, s=6, t=8] [L703] 1 c = 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={8:0}, l={16:0}, s=6, t=8] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={8:0}, s=6, t=8] [L702] EXPR 0 \read(l) VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={8:0}, s=6, t=8] [L703] 1 c = 1 VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=72, l={16:0}, l={8:0}, s=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=72, l={8:0}, l={16:0}, s=6, t=8] [L703] 1 c = 1 VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=72, l={16:0}, l={8:0}, s=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, c = 1=72, l={8:0}, l={16:0}, s=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={8:0}, s=6, t=8] [L703] EXPR 1 c == 1 VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={8:0}, s=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={8:0}, l={16:0}, s=6, t=8] [L703] EXPR 1 c == 1 VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={8:0}, s=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={8:0}, s=6, t=8] [L703] COND FALSE 1 !(!(c == 1)) VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={16:0}, l={8:0}, s=6, t=8] [L702] COND FALSE 0 !(s == l) VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=1, l={8:0}, l={16:0}, s=6, t=8] [L703] 1 c = 0 VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={8:0}, l={16:0}, s=6, t=8] [L702] COND TRUE 0 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, t=8] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=51, l={8:0}, l={16:0}, s=6, t=8] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=51, l={8:0}, l={16:0}, s=6, t=8] [L703] 1 c = 0 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=51, l={16:0}, l={8:0}, s=6, t=8] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, c = 0=51, l={16:0}, l={8:0}, s=6, t=8] [L702] EXPR 0 \read(l) VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, t=8] [L704] 1 s++ VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, t=8] [L704] 1 s++ VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={8:0}, l={16:0}, s=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, t=8] [L704] 1 s++ VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={8:0}, l={16:0}, s=6, s++=6, t=8] [L702] 0 s == l VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=6, s++=6, t=8] [L702] COND FALSE 0 !(s == l) VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={8:0}, l={16:0}, s=6, s++=6, t=8] [L704] 1 s++ VAL [\read(l)=7, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=7, s++=6, t=8] [L702] COND TRUE 0 1 VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=7, s++=6, t=8] [L704] 1 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=7, s++=6, s++=70, t=8] [L702] 0 s == l VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=7, s++=6, s++=70, t=8] [L704] 1 s++ VAL [arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, c=0, l={16:0}, l={8:0}, s=7, s++=70, s++=6, t=8] Now there is a data race on ~s~0 between C: s == l [702] and C: s++ [704] - UnprovableResult [Line: 693]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 694]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 694]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 695]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 695]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 702]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 703]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 703]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 702]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 703]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - UnprovableResult [Line: 704]: Unable to prove that there are no data races Unable to prove that there are no data races Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data for errors in thread instance: thr1Thread1of1ForFork0 with 1 thread instances CFG has 3 procedures, 210 locations, 37 error locations. Started 1 CEGAR loops. OverallTime: 46.2s, OverallIterations: 16, TraceHistogramMax: 0, PathProgramHistogramMax: 1, EmptinessCheckTime: 19.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 219, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 1.8s SatisfiabilityAnalysisTime, 22.3s InterpolantComputationTime, 4589 NumberOfCodeBlocks, 4589 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 5569 ConstructedInterpolants, 297 QuantifiedInterpolants, 33726 SizeOfPredicates, 73 NumberOfNonLiveVariables, 4664 ConjunctsInSsa, 274 ConjunctsInUnsatCore, 25 InterpolantComputations, 10 PerfectInterpolantSequences, 6314/7076 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-04 12:06:38,928 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2022-11-04 12:06:39,099 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aced0f70-c825-4bda-bd5e-cd54e6e51134/bin/ugemcutter-C1kR7RIaUi/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE