./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/pthread/queue_ok.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version b09c85b7 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/config/GemCutterReach.xml -i ../../sv-benchmarks/c/pthread/queue_ok.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/config/svcomp-Overflow-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7cc273f13a619f37768d5108c297b75ab7c37145fe391daced9c134730721251 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-b09c85b [2022-11-08 07:41:55,897 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-08 07:41:55,900 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-08 07:41:55,951 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-08 07:41:55,952 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-08 07:41:55,956 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-08 07:41:55,960 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-08 07:41:55,965 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-08 07:41:55,968 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-08 07:41:55,974 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-08 07:41:55,976 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-08 07:41:55,979 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-08 07:41:55,979 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-08 07:41:55,983 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-08 07:41:55,984 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-08 07:41:55,986 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-08 07:41:55,989 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-08 07:41:55,990 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-08 07:41:55,992 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-08 07:41:56,000 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-08 07:41:56,002 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-08 07:41:56,003 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-08 07:41:56,007 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-08 07:41:56,008 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-08 07:41:56,017 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-08 07:41:56,018 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-08 07:41:56,018 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-08 07:41:56,020 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-08 07:41:56,021 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-08 07:41:56,023 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-08 07:41:56,024 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-08 07:41:56,025 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-08 07:41:56,027 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-08 07:41:56,029 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-08 07:41:56,030 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-08 07:41:56,031 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-08 07:41:56,031 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-08 07:41:56,032 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-08 07:41:56,032 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-08 07:41:56,033 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-08 07:41:56,034 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-08 07:41:56,035 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/config/svcomp-Overflow-32bit-GemCutter_Default.epf [2022-11-08 07:41:56,083 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-08 07:41:56,085 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-08 07:41:56,086 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-08 07:41:56,086 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-08 07:41:56,088 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-08 07:41:56,088 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-08 07:41:56,089 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-08 07:41:56,089 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-08 07:41:56,089 INFO L138 SettingsManager]: * Use SBE=true [2022-11-08 07:41:56,090 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-08 07:41:56,091 INFO L138 SettingsManager]: * sizeof long=4 [2022-11-08 07:41:56,091 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-11-08 07:41:56,091 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-08 07:41:56,092 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-11-08 07:41:56,092 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-08 07:41:56,092 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-08 07:41:56,092 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-08 07:41:56,093 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-08 07:41:56,093 INFO L138 SettingsManager]: * Check absence of signed integer overflows=true [2022-11-08 07:41:56,093 INFO L138 SettingsManager]: * sizeof long double=12 [2022-11-08 07:41:56,093 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-08 07:41:56,093 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-08 07:41:56,094 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-08 07:41:56,094 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-08 07:41:56,094 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-08 07:41:56,094 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-11-08 07:41:56,095 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-08 07:41:56,095 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-08 07:41:56,095 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-08 07:41:56,096 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-08 07:41:56,096 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-08 07:41:56,096 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-11-08 07:41:56,096 INFO L138 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2022-11-08 07:41:56,097 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-08 07:41:56,097 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-11-08 07:41:56,097 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2022-11-08 07:41:56,097 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-08 07:41:56,098 INFO L138 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2022-11-08 07:41:56,098 INFO L138 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2022-11-08 07:41:56,098 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7cc273f13a619f37768d5108c297b75ab7c37145fe391daced9c134730721251 [2022-11-08 07:41:56,439 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-08 07:41:56,481 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-08 07:41:56,484 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-08 07:41:56,486 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-08 07:41:56,505 INFO L275 PluginConnector]: CDTParser initialized [2022-11-08 07:41:56,507 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/../../sv-benchmarks/c/pthread/queue_ok.i [2022-11-08 07:41:56,597 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/data/45032c8ff/76523e2b67c441769d4afe41dbad1b5f/FLAG484ce83d9 [2022-11-08 07:41:57,260 INFO L306 CDTParser]: Found 1 translation units. [2022-11-08 07:41:57,260 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/sv-benchmarks/c/pthread/queue_ok.i [2022-11-08 07:41:57,287 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/data/45032c8ff/76523e2b67c441769d4afe41dbad1b5f/FLAG484ce83d9 [2022-11-08 07:41:57,493 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/data/45032c8ff/76523e2b67c441769d4afe41dbad1b5f [2022-11-08 07:41:57,496 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-08 07:41:57,498 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-08 07:41:57,502 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-08 07:41:57,503 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-08 07:41:57,510 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-08 07:41:57,511 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:41:57" (1/1) ... [2022-11-08 07:41:57,513 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@645abe48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:57, skipping insertion in model container [2022-11-08 07:41:57,514 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:41:57" (1/1) ... [2022-11-08 07:41:57,521 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-08 07:41:57,599 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-08 07:41:58,166 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/sv-benchmarks/c/pthread/queue_ok.i[43266,43279] [2022-11-08 07:41:58,174 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/sv-benchmarks/c/pthread/queue_ok.i[43543,43556] [2022-11-08 07:41:58,181 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-08 07:41:58,193 INFO L203 MainTranslator]: Completed pre-run [2022-11-08 07:41:58,237 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/sv-benchmarks/c/pthread/queue_ok.i[43266,43279] [2022-11-08 07:41:58,240 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/sv-benchmarks/c/pthread/queue_ok.i[43543,43556] [2022-11-08 07:41:58,243 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-08 07:41:58,312 INFO L208 MainTranslator]: Completed translation [2022-11-08 07:41:58,313 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58 WrapperNode [2022-11-08 07:41:58,313 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-08 07:41:58,314 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-08 07:41:58,314 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-08 07:41:58,314 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-08 07:41:58,322 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,348 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,401 INFO L138 Inliner]: procedures = 274, calls = 59, calls flagged for inlining = 7, calls inlined = 7, statements flattened = 216 [2022-11-08 07:41:58,403 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-08 07:41:58,404 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-08 07:41:58,404 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-08 07:41:58,405 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-08 07:41:58,415 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,415 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,419 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,420 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,430 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,434 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,436 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,438 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,441 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-08 07:41:58,442 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-08 07:41:58,442 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-08 07:41:58,442 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-08 07:41:58,443 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (1/1) ... [2022-11-08 07:41:58,450 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-08 07:41:58,462 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:41:58,483 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-08 07:41:58,499 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-08 07:41:58,535 INFO L130 BoogieDeclarations]: Found specification of procedure t1 [2022-11-08 07:41:58,535 INFO L138 BoogieDeclarations]: Found implementation of procedure t1 [2022-11-08 07:41:58,535 INFO L130 BoogieDeclarations]: Found specification of procedure t2 [2022-11-08 07:41:58,535 INFO L138 BoogieDeclarations]: Found implementation of procedure t2 [2022-11-08 07:41:58,536 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-08 07:41:58,536 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-08 07:41:58,536 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-08 07:41:58,536 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-08 07:41:58,536 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2022-11-08 07:41:58,537 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-08 07:41:58,537 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-08 07:41:58,537 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-08 07:41:58,537 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-08 07:41:58,539 WARN L209 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-11-08 07:41:58,803 INFO L235 CfgBuilder]: Building ICFG [2022-11-08 07:41:58,806 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-08 07:41:59,198 INFO L276 CfgBuilder]: Performing block encoding [2022-11-08 07:41:59,209 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-08 07:41:59,210 INFO L300 CfgBuilder]: Removed 2 assume(true) statements. [2022-11-08 07:41:59,212 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:41:59 BoogieIcfgContainer [2022-11-08 07:41:59,212 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-08 07:41:59,218 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-08 07:41:59,218 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-08 07:41:59,222 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-08 07:41:59,223 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 07:41:57" (1/3) ... [2022-11-08 07:41:59,224 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1211a9ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 07:41:59, skipping insertion in model container [2022-11-08 07:41:59,224 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:41:58" (2/3) ... [2022-11-08 07:41:59,224 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1211a9ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 07:41:59, skipping insertion in model container [2022-11-08 07:41:59,224 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:41:59" (3/3) ... [2022-11-08 07:41:59,226 INFO L112 eAbstractionObserver]: Analyzing ICFG queue_ok.i [2022-11-08 07:41:59,239 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-11-08 07:41:59,250 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-08 07:41:59,252 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 12 error locations. [2022-11-08 07:41:59,253 INFO L515 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-11-08 07:41:59,419 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-11-08 07:41:59,489 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-08 07:41:59,489 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-11-08 07:41:59,490 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:41:59,492 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-11-08 07:41:59,494 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2022-11-08 07:41:59,539 INFO L156 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-11-08 07:41:59,559 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == t1Thread1of1ForFork0 ======== [2022-11-08 07:41:59,567 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@602cba29, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-08 07:41:59,567 INFO L358 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2022-11-08 07:41:59,861 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:41:59,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:41:59,870 INFO L85 PathProgramCache]: Analyzing trace with hash 764524555, now seen corresponding path program 1 times [2022-11-08 07:41:59,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:41:59,882 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167938162] [2022-11-08 07:41:59,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:41:59,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:00,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:00,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:00,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:00,291 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167938162] [2022-11-08 07:42:00,292 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1167938162] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:42:00,292 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-08 07:42:00,293 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-11-08 07:42:00,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491903958] [2022-11-08 07:42:00,295 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:42:00,301 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-11-08 07:42:00,301 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:00,324 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-11-08 07:42:00,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-11-08 07:42:00,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:00,330 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:00,331 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 51.5) internal successors, (103), 2 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:00,332 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:00,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:00,374 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-08 07:42:00,374 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:42:00,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:42:00,375 INFO L85 PathProgramCache]: Analyzing trace with hash 589379819, now seen corresponding path program 1 times [2022-11-08 07:42:00,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:42:00,376 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312724349] [2022-11-08 07:42:00,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:00,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:00,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:00,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:00,793 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:00,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312724349] [2022-11-08 07:42:00,793 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1312724349] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:42:00,793 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-08 07:42:00,794 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-08 07:42:00,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854378363] [2022-11-08 07:42:00,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:42:00,796 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-11-08 07:42:00,796 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:00,796 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-11-08 07:42:00,797 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-11-08 07:42:00,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:00,797 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:00,798 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 33.666666666666664) internal successors, (101), 3 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:00,798 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:00,798 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:00,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:00,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:00,845 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-08 07:42:00,846 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:42:00,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:42:00,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1426708750, now seen corresponding path program 1 times [2022-11-08 07:42:00,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:42:00,847 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [739750261] [2022-11-08 07:42:00,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:00,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:00,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:04,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:04,376 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:04,379 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [739750261] [2022-11-08 07:42:04,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [739750261] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:42:04,380 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-08 07:42:04,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2022-11-08 07:42:04,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208031648] [2022-11-08 07:42:04,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:42:04,385 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-11-08 07:42:04,385 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:04,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-11-08 07:42:04,393 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=311, Unknown=0, NotChecked=0, Total=380 [2022-11-08 07:42:04,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:04,395 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:04,396 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 5.105263157894737) internal successors, (97), 20 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:04,396 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:04,396 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:04,396 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:06,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:06,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:06,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:06,045 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-11-08 07:42:06,045 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting t1Err4ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:42:06,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:42:06,046 INFO L85 PathProgramCache]: Analyzing trace with hash 831049436, now seen corresponding path program 1 times [2022-11-08 07:42:06,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:42:06,051 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522463606] [2022-11-08 07:42:06,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:06,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:06,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:06,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:06,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:06,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522463606] [2022-11-08 07:42:06,244 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1522463606] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:42:06,244 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-08 07:42:06,244 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-08 07:42:06,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1821178852] [2022-11-08 07:42:06,245 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:42:06,245 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-08 07:42:06,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:06,246 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-08 07:42:06,246 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-08 07:42:06,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:06,246 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:06,246 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 37.666666666666664) internal successors, (113), 4 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:06,247 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:06,247 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:06,247 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:06,247 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:06,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:06,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:06,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:06,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:06,306 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-11-08 07:42:06,307 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:42:06,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:42:06,307 INFO L85 PathProgramCache]: Analyzing trace with hash 223885726, now seen corresponding path program 1 times [2022-11-08 07:42:06,307 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:42:06,308 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1663070748] [2022-11-08 07:42:06,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:06,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:06,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:12,427 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:12,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:12,428 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1663070748] [2022-11-08 07:42:12,428 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1663070748] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:42:12,428 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-08 07:42:12,428 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2022-11-08 07:42:12,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [167316128] [2022-11-08 07:42:12,429 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:42:12,429 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-11-08 07:42:12,429 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:12,430 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-11-08 07:42:12,430 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=332, Unknown=0, NotChecked=0, Total=420 [2022-11-08 07:42:12,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:12,431 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:12,431 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 6.285714285714286) internal successors, (132), 21 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:12,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:12,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:12,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:12,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:12,431 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:14,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:14,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:14,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:14,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:14,333 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:42:14,333 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-11-08 07:42:14,333 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:42:14,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:42:14,334 INFO L85 PathProgramCache]: Analyzing trace with hash -620967369, now seen corresponding path program 1 times [2022-11-08 07:42:14,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:42:14,334 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534519850] [2022-11-08 07:42:14,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:14,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:14,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:19,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:19,715 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:19,715 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534519850] [2022-11-08 07:42:19,716 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [534519850] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:42:19,716 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-08 07:42:19,716 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2022-11-08 07:42:19,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136941145] [2022-11-08 07:42:19,717 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:42:19,717 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-11-08 07:42:19,717 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:19,718 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-11-08 07:42:19,718 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2022-11-08 07:42:19,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:19,719 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:19,719 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 19 states have (on average 5.631578947368421) internal successors, (107), 20 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:19,719 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:19,719 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:19,720 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:19,720 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:19,720 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:42:19,720 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:21,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:21,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:21,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:21,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:21,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:42:21,379 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:42:21,379 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-11-08 07:42:21,380 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:42:21,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:42:21,380 INFO L85 PathProgramCache]: Analyzing trace with hash -1992671018, now seen corresponding path program 1 times [2022-11-08 07:42:21,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:42:21,381 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [976291138] [2022-11-08 07:42:21,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:21,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:21,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:25,957 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:25,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:25,958 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [976291138] [2022-11-08 07:42:25,958 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [976291138] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:42:25,959 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1256671184] [2022-11-08 07:42:25,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:25,959 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:42:25,959 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:42:25,970 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:42:25,992 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-11-08 07:42:26,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:26,144 INFO L263 TraceCheckSpWp]: Trace formula consists of 331 conjuncts, 72 conjunts are in the unsatisfiable core [2022-11-08 07:42:26,161 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:42:26,454 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-08 07:42:26,455 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-08 07:42:26,528 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-08 07:42:26,528 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-08 07:42:26,845 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:42:26,957 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:42:27,555 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:42:27,831 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:42:28,385 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:42:28,406 INFO L356 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2022-11-08 07:42:28,406 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 43 treesize of output 39 [2022-11-08 07:42:28,730 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:42:28,731 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:42:28,733 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 30 [2022-11-08 07:42:29,178 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 30 [2022-11-08 07:42:29,342 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:42:29,343 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:42:29,680 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:42:29,681 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:42:29,701 INFO L356 Elim1Store]: treesize reduction 46, result has 27.0 percent of original size [2022-11-08 07:42:29,701 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 37 [2022-11-08 07:42:29,754 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-08 07:42:29,761 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:29,761 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-08 07:42:30,277 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_226 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (v_ArrVal_227 Int)) (let ((.cse0 (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) (+ 88 |c_~#queue~0.offset|)) 2147483647)))) is different from false [2022-11-08 07:42:30,666 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (v_ArrVal_227 Int)) (let ((.cse1 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse1 .cse2 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse1 .cse2) 1) v_ArrVal_225) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) (+ 88 |c_~#queue~0.offset|)) 2147483647))))) is different from false [2022-11-08 07:42:30,781 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_223 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (v_ArrVal_227 Int)) (let ((.cse1 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse1 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_223) .cse2 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= v_ArrVal_223 (+ |c_t1Thread1of1ForFork0_enqueue_#t~post38#1| 1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse1 .cse2) 1) v_ArrVal_225))))) is different from false [2022-11-08 07:42:31,059 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_223 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (v_ArrVal_227 Int)) (let ((.cse1 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse1 .cse3 v_ArrVal_223) .cse2 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse1 .cse2) 1) v_ArrVal_225) (< (+ (select .cse1 .cse3) 1) v_ArrVal_223))))) is different from false [2022-11-08 07:42:32,000 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| Int)) (let ((.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| (select .cse0 .cse1))) (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_223 Int) (v_ArrVal_220 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (v_ArrVal_227 Int)) (let ((.cse3 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15|) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_220)) (.cse4 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse3 .cse4 v_ArrVal_223) .cse1 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse2 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse3 .cse1) 1) v_ArrVal_225) (< (select (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) (+ 88 |c_~#queue~0.offset|)) 2147483647) (< (+ (select .cse3 .cse4) 1) v_ArrVal_223)))))))) is different from false [2022-11-08 07:42:32,099 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_223 Int) (v_ArrVal_220 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| Int) (v_ArrVal_227 Int)) (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (let ((.cse3 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_220)) (.cse4 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|)) (.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse3 .cse4 v_ArrVal_223) .cse1 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| (select .cse0 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse2 (+ 84 |c_~#queue~0.offset|)))) (< (select (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) (+ 88 |c_~#queue~0.offset|)) 2147483647) (< (+ (select .cse3 .cse1) 1) v_ArrVal_225) (< (+ (select .cse3 .cse4) 1) v_ArrVal_223)))))) is different from false [2022-11-08 07:42:32,232 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_223 Int) (v_ArrVal_220 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| Int) (v_ArrVal_227 Int)) (let ((.cse4 (select |c_#memory_int| |c_~#queue~0.base|))) (let ((.cse0 (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15|) |c_~#queue~0.offset|) v_ArrVal_220)) (.cse1 (+ 88 |c_~#queue~0.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_~#queue~0.base| (store (store .cse0 .cse1 v_ArrVal_223) .cse3 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_223) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse2 .cse3))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| (select .cse4 .cse3))) (< (+ (select .cse0 .cse3) 1) v_ArrVal_225) (< (select (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) .cse1) 2147483647)))))) is different from false [2022-11-08 07:42:32,594 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_223 Int) (v_ArrVal_219 (Array Int Int)) (v_ArrVal_220 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| Int) (v_ArrVal_227 Int)) (let ((.cse5 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_219))) (let ((.cse2 (select .cse5 |c_~#queue~0.base|))) (let ((.cse0 (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15|) |c_~#queue~0.offset|) v_ArrVal_220)) (.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse3 (select (store (store .cse5 |c_~#queue~0.base| (store (store .cse0 .cse4 v_ArrVal_223) .cse1 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_225) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| (select .cse2 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse3 .cse1))) (< (select (store .cse3 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) .cse4) 2147483647) (< (+ (select .cse0 .cse4) 1) v_ArrVal_223))))))) is different from false [2022-11-08 07:42:33,013 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_218 (Array Int Int)) (v_ArrVal_223 Int) (v_ArrVal_219 (Array Int Int)) (v_ArrVal_220 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| Int) (v_ArrVal_227 Int)) (let ((.cse5 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id1~0#1.base| v_ArrVal_218) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_219))) (let ((.cse0 (select .cse5 |c_~#queue~0.base|))) (let ((.cse4 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15|) |c_~#queue~0.offset|) v_ArrVal_220)) (.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse5 |c_~#queue~0.base| (store (store .cse4 .cse3 v_ArrVal_223) .cse1 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| (select .cse0 .cse1))) (< (select (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) .cse3) 2147483647) (< (+ (select .cse4 .cse3) 1) v_ArrVal_223) (< (+ (select .cse4 .cse1) 1) v_ArrVal_225) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse2 .cse1))))))))) is different from false [2022-11-08 07:42:33,775 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_225 Int) (v_ArrVal_226 (Array Int Int)) (v_ArrVal_218 (Array Int Int)) (v_ArrVal_223 Int) (v_ArrVal_219 (Array Int Int)) (v_ArrVal_220 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| Int) (v_ArrVal_217 Int) (v_ArrVal_227 Int)) (let ((.cse5 (store (store (store |c_#memory_int| |c_ULTIMATE.start_init_~q#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_init_~q#1.base|) (+ 88 |c_ULTIMATE.start_init_~q#1.offset|) v_ArrVal_217)) |c_ULTIMATE.start_main_~#id1~0#1.base| v_ArrVal_218) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_219))) (let ((.cse2 (select .cse5 |c_~#queue~0.base|))) (let ((.cse0 (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15|) |c_~#queue~0.offset|) v_ArrVal_220)) (.cse1 (+ 88 |c_~#queue~0.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (let ((.cse4 (select (store (store .cse5 |c_~#queue~0.base| (store (store .cse0 .cse1 v_ArrVal_223) .cse3 v_ArrVal_225)) |c_~#stored_elements~0.base| v_ArrVal_226) |c_~#queue~0.base|))) (or (not (<= v_ArrVal_217 0)) (< (+ (select .cse0 .cse1) 1) v_ArrVal_223) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_15| (select .cse2 .cse3))) (< (+ (select .cse0 .cse3) 1) v_ArrVal_225) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12| (select .cse4 .cse3))) (< (select (store .cse4 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_12|)) v_ArrVal_227) .cse1) 2147483647))))))) is different from false [2022-11-08 07:42:33,809 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:33,809 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 270 treesize of output 185 [2022-11-08 07:42:33,835 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:33,835 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 644 treesize of output 640 [2022-11-08 07:42:33,853 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 524 treesize of output 500 [2022-11-08 07:42:33,879 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 289 treesize of output 277 [2022-11-08 07:42:33,900 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 375 treesize of output 343 [2022-11-08 07:42:34,000 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:34,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 9 [2022-11-08 07:42:35,174 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:35,175 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 131 treesize of output 135 [2022-11-08 07:42:35,980 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:35,980 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 45 treesize of output 85 [2022-11-08 07:42:36,159 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 14 not checked. [2022-11-08 07:42:36,159 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1256671184] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-08 07:42:36,160 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-08 07:42:36,160 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 28, 29] total 82 [2022-11-08 07:42:36,160 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1974783954] [2022-11-08 07:42:36,160 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-08 07:42:36,161 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 83 states [2022-11-08 07:42:36,161 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:36,162 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2022-11-08 07:42:36,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=548, Invalid=4717, Unknown=31, NotChecked=1510, Total=6806 [2022-11-08 07:42:36,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:36,166 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:36,167 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 83 states, 82 states have (on average 4.548780487804878) internal successors, (373), 83 states have internal predecessors, (373), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:36,167 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:36,167 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:36,167 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:36,167 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:36,167 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:42:36,168 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:42:36,168 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:42,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:42,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:42,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:42,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:42,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:42:42,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:42:42,033 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-11-08 07:42:42,060 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-11-08 07:42:42,234 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:42:42,234 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:42:42,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:42:42,235 INFO L85 PathProgramCache]: Analyzing trace with hash -1643258789, now seen corresponding path program 1 times [2022-11-08 07:42:42,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:42:42,235 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810243760] [2022-11-08 07:42:42,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:42,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:42:42,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:43,903 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:43,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:42:43,904 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810243760] [2022-11-08 07:42:43,904 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1810243760] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:42:43,905 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1355115723] [2022-11-08 07:42:43,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:42:43,905 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:42:43,905 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:42:43,906 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:42:43,911 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-11-08 07:42:44,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:42:44,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 332 conjuncts, 46 conjunts are in the unsatisfiable core [2022-11-08 07:42:44,074 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:42:44,775 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:42:44,958 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2022-11-08 07:42:45,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:42:45,080 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-08 07:42:45,453 INFO L356 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-08 07:42:45,454 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 32 [2022-11-08 07:42:45,542 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-11-08 07:42:45,572 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:45,572 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-08 07:42:46,094 WARN L833 $PredicateComparison]: unable to prove that (forall ((|t1Thread1of1ForFork0_enqueue_#t~mem36#1| Int) (v_ArrVal_293 (Array Int Int)) (v_ArrVal_294 Int)) (or (< 0 (+ 2147483650 (select (store (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_293) |c_~#queue~0.base|) (+ |c_~#queue~0.offset| (* |t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4)) v_ArrVal_294) (+ 88 |c_~#queue~0.offset|)))) (< (+ v_ArrVal_294 2147483648) 0))) is different from false [2022-11-08 07:42:46,369 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:46,369 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 42 [2022-11-08 07:42:46,380 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:46,380 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 60 [2022-11-08 07:42:46,391 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 28 [2022-11-08 07:42:46,413 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 6 [2022-11-08 07:42:46,424 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:42:46,425 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 48 [2022-11-08 07:42:46,847 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:42:46,847 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1355115723] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-08 07:42:46,847 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-08 07:42:46,847 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 19, 17] total 53 [2022-11-08 07:42:46,848 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133579764] [2022-11-08 07:42:46,848 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-08 07:42:46,848 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 54 states [2022-11-08 07:42:46,849 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:42:46,849 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2022-11-08 07:42:46,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=2486, Unknown=11, NotChecked=102, Total=2862 [2022-11-08 07:42:46,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:46,851 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:42:46,851 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 54 states, 53 states have (on average 7.09433962264151) internal successors, (376), 54 states have internal predecessors, (376), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:42:46,851 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:42:46,851 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:42:46,851 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:42:46,851 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:42:46,851 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:42:46,852 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:42:46,852 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 31 states. [2022-11-08 07:42:46,852 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:05,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:05,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:43:05,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:43:05,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:05,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:43:05,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:43:05,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-11-08 07:43:05,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-11-08 07:43:05,970 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-11-08 07:43:06,143 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:43:06,144 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting t1Err4ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:43:06,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:43:06,144 INFO L85 PathProgramCache]: Analyzing trace with hash 1656792740, now seen corresponding path program 1 times [2022-11-08 07:43:06,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:43:06,145 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881359203] [2022-11-08 07:43:06,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:43:06,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:43:06,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:43:06,261 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-08 07:43:06,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:43:06,261 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881359203] [2022-11-08 07:43:06,261 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [881359203] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:43:06,262 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-08 07:43:06,262 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-08 07:43:06,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563960230] [2022-11-08 07:43:06,262 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:43:06,266 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-08 07:43:06,267 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:43:06,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-08 07:43:06,269 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-08 07:43:06,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:06,269 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:43:06,269 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 3 states have (on average 51.333333333333336) internal successors, (154), 4 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:43:06,270 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:06,270 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:43:06,270 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:43:06,270 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:06,270 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:43:06,270 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:43:06,270 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 36 states. [2022-11-08 07:43:06,271 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2022-11-08 07:43:06,271 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:06,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:06,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:43:06,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:43:06,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:06,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:43:06,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:43:06,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-11-08 07:43:06,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-11-08 07:43:06,323 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:06,324 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-11-08 07:43:06,324 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting t1Err5ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:43:06,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:43:06,325 INFO L85 PathProgramCache]: Analyzing trace with hash -179031958, now seen corresponding path program 1 times [2022-11-08 07:43:06,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:43:06,325 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2106581035] [2022-11-08 07:43:06,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:43:06,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:43:06,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:43:06,483 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:43:06,484 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:43:06,484 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2106581035] [2022-11-08 07:43:06,484 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2106581035] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:43:06,484 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [98601195] [2022-11-08 07:43:06,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:43:06,485 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:43:06,485 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:43:06,486 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:43:06,505 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-11-08 07:43:06,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:43:06,653 INFO L263 TraceCheckSpWp]: Trace formula consists of 363 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-08 07:43:06,661 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:43:06,844 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:43:06,844 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-08 07:43:06,845 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [98601195] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-08 07:43:06,845 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-11-08 07:43:06,845 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2022-11-08 07:43:06,845 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [651473859] [2022-11-08 07:43:06,845 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-08 07:43:06,845 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-08 07:43:06,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:43:06,846 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-08 07:43:06,846 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-08 07:43:06,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:06,846 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:43:06,847 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 31.0) internal successors, (155), 6 states have internal predecessors, (155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 36 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 26 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:06,847 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:07,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:07,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:43:07,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:43:07,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:07,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:43:07,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:43:07,482 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-11-08 07:43:07,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:43:07,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:07,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:43:07,509 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-11-08 07:43:07,683 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-11-08 07:43:07,684 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:43:07,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:43:07,684 INFO L85 PathProgramCache]: Analyzing trace with hash 742030550, now seen corresponding path program 1 times [2022-11-08 07:43:07,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:43:07,684 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [77128596] [2022-11-08 07:43:07,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:43:07,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:43:07,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:43:14,083 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:43:14,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:43:14,083 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [77128596] [2022-11-08 07:43:14,084 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [77128596] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:43:14,084 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1091301993] [2022-11-08 07:43:14,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:43:14,084 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:43:14,084 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:43:14,086 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:43:14,098 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-11-08 07:43:14,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:43:14,288 INFO L263 TraceCheckSpWp]: Trace formula consists of 399 conjuncts, 90 conjunts are in the unsatisfiable core [2022-11-08 07:43:14,299 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:43:14,530 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-08 07:43:14,530 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-08 07:43:14,634 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-08 07:43:14,634 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-08 07:43:15,019 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:43:15,464 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:43:15,727 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:43:16,300 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:43:16,325 INFO L356 Elim1Store]: treesize reduction 36, result has 49.3 percent of original size [2022-11-08 07:43:16,325 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 52 [2022-11-08 07:43:16,794 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:43:16,795 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:43:16,796 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 38 [2022-11-08 07:43:17,586 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 32 [2022-11-08 07:43:17,828 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:43:17,829 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 34 [2022-11-08 07:43:18,563 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:43:18,593 INFO L356 Elim1Store]: treesize reduction 38, result has 39.7 percent of original size [2022-11-08 07:43:18,593 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 51 treesize of output 50 [2022-11-08 07:43:19,219 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:43:19,220 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:43:19,221 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 44 [2022-11-08 07:43:19,742 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2022-11-08 07:43:19,916 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:43:19,917 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:43:20,334 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:43:20,334 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:43:20,354 INFO L356 Elim1Store]: treesize reduction 46, result has 27.0 percent of original size [2022-11-08 07:43:20,355 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 37 [2022-11-08 07:43:20,432 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-08 07:43:20,442 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:43:20,442 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-08 07:43:21,155 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse0 (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) (+ 88 |c_~#queue~0.offset|)) 2147483647)))) is different from false [2022-11-08 07:43:21,224 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= v_ArrVal_496 1)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 (+ 84 |c_~#queue~0.offset|))))))) is different from false [2022-11-08 07:43:22,191 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse1 (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_492)) (.cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse1 .cse3 v_ArrVal_494) .cse2 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (not (<= v_ArrVal_496 1)) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) (+ 88 |c_~#queue~0.offset|)) 2147483647) (< 20 (select .cse1 .cse2)) (< (+ (select .cse1 .cse3) 1) v_ArrVal_494))))) is different from false [2022-11-08 07:43:22,551 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse0 (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (store .cse4 (+ (* (select .cse4 .cse1) 4) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_492))) (.cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse0 .cse3 v_ArrVal_494) .cse1 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (< 20 (select .cse0 .cse1)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse2 (+ 84 |c_~#queue~0.offset|)))) (< (+ 1 (select .cse0 .cse3)) v_ArrVal_494) (< (select (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= v_ArrVal_496 1))))))) is different from false [2022-11-08 07:43:23,157 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse2 (+ 84 |c_~#queue~0.offset|)) (.cse4 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse0 (let ((.cse5 (select .cse4 |c_~#queue~0.base|))) (store .cse5 (+ |c_~#queue~0.offset| (* (select .cse5 .cse2) 4)) v_ArrVal_492))) (.cse1 (+ 88 |c_~#queue~0.offset|))) (let ((.cse3 (select (store (store .cse4 |c_~#queue~0.base| (store (store .cse0 .cse1 v_ArrVal_494) .cse2 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= v_ArrVal_496 1)) (< (+ (select .cse0 .cse1) 1) v_ArrVal_494) (< 20 (select .cse0 .cse2)) (< (select (store .cse3 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse3 .cse2)))))))) is different from false [2022-11-08 07:43:23,406 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse4 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) (+ 1 |c_t1Thread1of1ForFork0_enqueue_#t~post41#1|))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse3 (let ((.cse5 (select .cse4 |c_~#queue~0.base|))) (store .cse5 (+ (* (select .cse5 .cse1) 4) |c_~#queue~0.offset|) v_ArrVal_492))) (.cse2 (+ 88 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse4 |c_~#queue~0.base| (store (store .cse3 .cse2 v_ArrVal_494) .cse1 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 .cse1))) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse2) 2147483647) (not (<= v_ArrVal_496 1)) (< 20 (select .cse3 .cse1)) (< (+ (select .cse3 .cse2) 1) v_ArrVal_494)))))) is different from false [2022-11-08 07:43:23,528 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse2 (+ 84 |c_~#queue~0.offset|)) (.cse4 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) (+ |c_t1Thread1of1ForFork0_enqueue_#t~mem40#1| 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse3 (let ((.cse5 (select .cse4 |c_~#queue~0.base|))) (store .cse5 (+ (* 4 (select .cse5 .cse2)) |c_~#queue~0.offset|) v_ArrVal_492))) (.cse1 (+ 88 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse4 |c_~#queue~0.base| (store (store .cse3 .cse1 v_ArrVal_494) .cse2 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 .cse2))) (not (<= v_ArrVal_496 1)) (< 20 (select .cse3 .cse2)) (< (+ (select .cse3 .cse1) 1) v_ArrVal_494)))))) is different from false [2022-11-08 07:43:23,574 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse4 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (let ((.cse6 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse7 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (store .cse6 .cse7 (+ (select .cse6 .cse7) 1)))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse2 (let ((.cse5 (select .cse4 |c_~#queue~0.base|))) (store .cse5 (+ (* (select .cse5 .cse1) 4) |c_~#queue~0.offset|) v_ArrVal_492))) (.cse3 (+ 88 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse4 |c_~#queue~0.base| (store (store .cse2 .cse3 v_ArrVal_494) .cse1 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 .cse1))) (not (<= v_ArrVal_496 1)) (< 20 (select .cse2 .cse1)) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse3) 2147483647) (< (+ (select .cse2 .cse3) 1) v_ArrVal_494)))))) is different from false [2022-11-08 07:43:23,914 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse6 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse7 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse8 (select .cse6 .cse7))) (or (forall ((v_ArrVal_499 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse1 (+ 84 |c_~#queue~0.offset|)) (.cse4 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse6 .cse7 (+ .cse8 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse2 (let ((.cse5 (select .cse4 |c_~#queue~0.base|))) (store .cse5 (+ (* (select .cse5 .cse1) 4) |c_~#queue~0.offset|) v_ArrVal_492))) (.cse3 (+ 88 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse4 |c_~#queue~0.base| (store (store .cse2 .cse3 v_ArrVal_494) .cse1 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 .cse1))) (not (<= v_ArrVal_496 1)) (< 20 (select .cse2 .cse1)) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse3) 2147483647) (< (+ (select .cse2 .cse3) 1) v_ArrVal_494)))))) (= .cse8 20)))) is different from false [2022-11-08 07:43:24,069 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse7 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse8 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select .cse7 .cse8))) (or (= .cse0 20) (forall ((v_ArrVal_499 Int) (v_ArrVal_487 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse3 (+ 84 |c_~#queue~0.offset|)) (.cse5 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse7 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_487) .cse8 (+ .cse0 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse1 (let ((.cse6 (select .cse5 |c_~#queue~0.base|))) (store .cse6 (+ |c_~#queue~0.offset| (* 4 (select .cse6 .cse3))) v_ArrVal_492))) (.cse2 (+ 88 |c_~#queue~0.offset|))) (let ((.cse4 (select (store (store .cse5 |c_~#queue~0.base| (store (store .cse1 .cse2 v_ArrVal_494) .cse3 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= v_ArrVal_487 (+ |c_t1Thread1of1ForFork0_enqueue_#t~post38#1| 1))) (not (<= v_ArrVal_496 1)) (< (+ (select .cse1 .cse2) 1) v_ArrVal_494) (< 20 (select .cse1 .cse3)) (< (select (store .cse4 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse2) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse4 .cse3))))))))))) is different from false [2022-11-08 07:43:24,762 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse8 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse9 (select .cse0 .cse8))) (or (forall ((v_ArrVal_499 Int) (v_ArrVal_487 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse1 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse4 (+ 84 |c_~#queue~0.offset|)) (.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_487) .cse8 (+ .cse9 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse2 (let ((.cse7 (select .cse6 |c_~#queue~0.base|))) (store .cse7 (+ |c_~#queue~0.offset| (* 4 (select .cse7 .cse4))) v_ArrVal_492))) (.cse3 (+ 88 |c_~#queue~0.offset|))) (let ((.cse5 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse2 .cse3 v_ArrVal_494) .cse4 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_487) (not (<= v_ArrVal_496 1)) (< (+ (select .cse2 .cse3) 1) v_ArrVal_494) (< 20 (select .cse2 .cse4)) (< (select (store .cse5 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse3) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse5 .cse4))))))))) (= .cse9 20)))) is different from false [2022-11-08 07:43:24,901 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_487 Int) (v_ArrVal_485 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse5 (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_485)) (.cse9 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse6 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse0 (select .cse5 .cse9))) (let ((.cse2 (+ 84 |c_~#queue~0.offset|)) (.cse7 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse5 .cse6 v_ArrVal_487) .cse9 (+ .cse0 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse1 (let ((.cse8 (select .cse7 |c_~#queue~0.base|))) (store .cse8 (+ |c_~#queue~0.offset| (* (select .cse8 .cse2) 4)) v_ArrVal_492))) (.cse4 (+ 88 |c_~#queue~0.offset|))) (let ((.cse3 (select (store (store .cse7 |c_~#queue~0.base| (store (store .cse1 .cse4 v_ArrVal_494) .cse2 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (= 20 .cse0) (< 20 (select .cse1 .cse2)) (not (<= v_ArrVal_496 1)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse3 .cse2))) (< (select (store .cse3 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse4) 2147483647) (< (+ (select .cse5 .cse6) 1) v_ArrVal_487) (< (+ (select .cse1 .cse4) 1) v_ArrVal_494)))))))) is different from false [2022-11-08 07:43:24,993 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| Int)) (let ((.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| (select .cse0 .cse1))) (forall ((v_ArrVal_499 Int) (v_ArrVal_487 Int) (v_ArrVal_485 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse7 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32|) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_485))) (let ((.cse8 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse5 (select .cse7 .cse1))) (let ((.cse3 (+ 84 |c_~#queue~0.offset|)) (.cse9 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse7 .cse8 v_ArrVal_487) .cse1 (+ .cse5 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse4 (let ((.cse10 (select .cse9 |c_~#queue~0.base|))) (store .cse10 (+ (* (select .cse10 .cse3) 4) |c_~#queue~0.offset|) v_ArrVal_492))) (.cse6 (+ 88 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse4 .cse6 v_ArrVal_494) .cse3 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse2 .cse3))) (< 20 (select .cse4 .cse3)) (= .cse5 20) (not (<= v_ArrVal_496 1)) (< (+ 1 (select .cse4 .cse6)) v_ArrVal_494) (< (select (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse6) 2147483647) (< (+ (select .cse7 .cse8) 1) v_ArrVal_487))))))))))) is different from false [2022-11-08 07:43:25,176 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_487 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| Int) (v_ArrVal_485 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse7 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (let ((.cse2 (store .cse7 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_485)) (.cse8 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|)) (.cse6 (select .cse2 .cse8))) (let ((.cse4 (+ 84 |c_~#queue~0.offset|)) (.cse9 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse2 .cse3 v_ArrVal_487) .cse8 (+ .cse6 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse0 (let ((.cse10 (select .cse9 |c_~#queue~0.base|))) (store .cse10 (+ (* (select .cse10 .cse4) 4) |c_~#queue~0.offset|) v_ArrVal_492))) (.cse1 (+ 88 |c_~#queue~0.offset|))) (let ((.cse5 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse0 .cse1 v_ArrVal_494) .cse4 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_494) (not (<= v_ArrVal_496 1)) (< (+ (select .cse2 .cse3) 1) v_ArrVal_487) (< 20 (select .cse0 .cse4)) (< (select (store .cse5 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse1) 2147483647) (= 20 .cse6) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| (select .cse7 .cse8))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse5 .cse4))))))))))) is different from false [2022-11-08 07:43:28,230 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_499 Int) (v_ArrVal_487 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| Int) (v_ArrVal_485 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_492 Int) (v_ArrVal_484 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int) (v_ArrVal_498 (Array Int Int))) (let ((.cse9 (store |c_#memory_int| |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_484))) (let ((.cse5 (select .cse9 |c_~#queue~0.base|))) (let ((.cse6 (store .cse5 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32|) |c_~#queue~0.offset|) v_ArrVal_485)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse2 (select .cse6 .cse1))) (let ((.cse7 (store (store .cse9 |c_~#queue~0.base| (store (store .cse6 .cse4 v_ArrVal_487) .cse1 (+ .cse2 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse3 (let ((.cse8 (select .cse7 |c_~#queue~0.base|))) (store .cse8 (+ (* (select .cse8 .cse1) 4) |c_~#queue~0.offset|) v_ArrVal_492)))) (let ((.cse0 (select (store (store .cse7 |c_~#queue~0.base| (store (store .cse3 .cse4 v_ArrVal_494) .cse1 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse0 .cse1))) (= .cse2 20) (< (+ (select .cse3 .cse4) 1) v_ArrVal_494) (not (<= v_ArrVal_496 1)) (< 20 (select .cse3 .cse1)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| (select .cse5 .cse1))) (< (+ (select .cse6 .cse4) 1) v_ArrVal_487) (< (select (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse4) 2147483647)))))))))) is different from false [2022-11-08 07:43:28,964 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| Int) (v_ArrVal_491 (Array Int Int)) (v_ArrVal_483 (Array Int Int)) (v_ArrVal_484 (Array Int Int)) (v_ArrVal_498 (Array Int Int)) (v_ArrVal_499 Int) (v_ArrVal_487 Int) (v_ArrVal_485 Int) (v_ArrVal_496 Int) (v_ArrVal_494 Int) (v_ArrVal_492 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| Int)) (let ((.cse9 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id1~0#1.base| v_ArrVal_483) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_484))) (let ((.cse4 (select .cse9 |c_~#queue~0.base|))) (let ((.cse0 (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32|) |c_~#queue~0.offset|) v_ArrVal_485)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (let ((.cse1 (+ 88 |c_~#queue~0.offset|)) (.cse6 (select .cse0 .cse5))) (let ((.cse7 (store (store .cse9 |c_~#queue~0.base| (store (store .cse0 .cse1 v_ArrVal_487) .cse5 (+ .cse6 1))) |c_~#stored_elements~0.base| v_ArrVal_491))) (let ((.cse2 (let ((.cse8 (select .cse7 |c_~#queue~0.base|))) (store .cse8 (+ |c_~#queue~0.offset| (* (select .cse8 .cse5) 4)) v_ArrVal_492)))) (let ((.cse3 (select (store (store .cse7 |c_~#queue~0.base| (store (store .cse2 .cse1 v_ArrVal_494) .cse5 v_ArrVal_496)) |c_~#stored_elements~0.base| v_ArrVal_498) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_487) (< (+ (select .cse2 .cse1) 1) v_ArrVal_494) (not (<= v_ArrVal_496 1)) (< (select (store .cse3 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26|)) v_ArrVal_499) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_32| (select .cse4 .cse5))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_26| (select .cse3 .cse5))) (< 20 (select .cse2 .cse5)) (= 20 .cse6)))))))))) is different from false [2022-11-08 07:43:30,421 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:43:30,422 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 1107 treesize of output 787 [2022-11-08 07:43:30,490 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:43:30,491 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 3984 treesize of output 3942 [2022-11-08 07:43:30,551 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 3524 treesize of output 3396 [2022-11-08 07:43:30,620 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 1984 treesize of output 1856 [2022-11-08 07:43:30,715 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 3060 treesize of output 2868 [2022-11-08 07:43:30,800 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 1825 treesize of output 1761 [2022-11-08 07:43:30,899 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-11-08 07:43:48,144 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:43:48,145 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 1967 treesize of output 1905 [2022-11-08 07:43:52,735 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:43:52,736 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 45 treesize of output 85 [2022-11-08 07:43:52,934 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 33 not checked. [2022-11-08 07:43:52,935 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1091301993] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-08 07:43:52,935 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-08 07:43:52,935 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 39, 41] total 115 [2022-11-08 07:43:52,936 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1745045591] [2022-11-08 07:43:52,936 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-08 07:43:52,937 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 116 states [2022-11-08 07:43:52,937 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:43:52,937 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 116 interpolants. [2022-11-08 07:43:52,942 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=845, Invalid=9072, Unknown=47, NotChecked=3376, Total=13340 [2022-11-08 07:43:52,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:52,943 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:43:52,944 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 116 states, 115 states have (on average 4.156521739130435) internal successors, (478), 116 states have internal predecessors, (478), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:43:52,944 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:43:52,944 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:43:52,944 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 37 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:43:52,945 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:45:00,942 WARN L233 SmtUtils]: Spent 16.27s on a formula simplification. DAG size of input: 131 DAG size of output: 101 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:45:00,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:45:00,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:45:00,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:45:00,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:45:00,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:45:00,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:45:00,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-11-08 07:45:00,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:45:00,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:45:00,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:45:00,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-11-08 07:45:00,980 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-11-08 07:45:01,150 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-11-08 07:45:01,151 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:45:01,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:45:01,151 INFO L85 PathProgramCache]: Analyzing trace with hash -1462069249, now seen corresponding path program 1 times [2022-11-08 07:45:01,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:45:01,151 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52493414] [2022-11-08 07:45:01,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:45:01,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:45:01,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:45:03,596 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 66 proven. 91 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2022-11-08 07:45:03,597 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:45:03,597 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [52493414] [2022-11-08 07:45:03,597 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [52493414] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:45:03,597 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [965058642] [2022-11-08 07:45:03,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:45:03,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:45:03,598 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:45:03,602 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:45:03,618 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-11-08 07:45:03,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:45:03,793 INFO L263 TraceCheckSpWp]: Trace formula consists of 483 conjuncts, 43 conjunts are in the unsatisfiable core [2022-11-08 07:45:03,798 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:45:04,899 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:45:05,000 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:45:05,001 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:45:05,229 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:45:05,239 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-08 07:45:05,240 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 32 treesize of output 27 [2022-11-08 07:45:05,300 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:45:05,301 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-08 07:45:05,322 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-08 07:45:05,349 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 116 proven. 49 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-11-08 07:45:05,350 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-08 07:45:05,767 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_39| Int) (v_ArrVal_599 (Array Int Int)) (v_ArrVal_600 Int)) (let ((.cse0 (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_599) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (= (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_39|) |c_~#queue~0.offset|) v_ArrVal_600) .cse1) 20)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_39| (select .cse0 .cse1)))))) is different from false [2022-11-08 07:45:05,831 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:45:05,832 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 44 [2022-11-08 07:45:05,848 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:45:05,849 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 81 treesize of output 83 [2022-11-08 07:45:05,858 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 70 [2022-11-08 07:45:05,872 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-11-08 07:45:05,924 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:45:05,925 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 48 [2022-11-08 07:45:06,438 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 110 proven. 49 refuted. 0 times theorem prover too weak. 6 trivial. 6 not checked. [2022-11-08 07:45:06,439 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [965058642] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-08 07:45:06,439 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-08 07:45:06,439 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 14, 13] total 42 [2022-11-08 07:45:06,439 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963246014] [2022-11-08 07:45:06,439 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-08 07:45:06,440 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-11-08 07:45:06,441 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:45:06,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-11-08 07:45:06,442 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1449, Unknown=1, NotChecked=78, Total=1722 [2022-11-08 07:45:06,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:45:06,442 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:45:06,443 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 13.19047619047619) internal successors, (554), 42 states have internal predecessors, (554), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:45:06,443 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:45:06,443 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:45:06,443 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:45:06,443 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:45:06,443 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:45:06,444 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:45:06,444 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2022-11-08 07:45:06,444 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:45:06,444 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:45:06,444 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:45:06,444 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 69 states. [2022-11-08 07:45:06,444 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:45:21,006 WARN L233 SmtUtils]: Spent 12.42s on a formula simplification. DAG size of input: 176 DAG size of output: 124 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:45:34,254 WARN L233 SmtUtils]: Spent 12.42s on a formula simplification. DAG size of input: 177 DAG size of output: 124 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:45:48,217 WARN L233 SmtUtils]: Spent 12.36s on a formula simplification. DAG size of input: 149 DAG size of output: 126 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:46:19,840 WARN L233 SmtUtils]: Spent 7.71s on a formula simplification. DAG size of input: 163 DAG size of output: 122 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:46:56,982 WARN L233 SmtUtils]: Spent 20.37s on a formula simplification. DAG size of input: 102 DAG size of output: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:47:28,317 WARN L233 SmtUtils]: Spent 22.95s on a formula simplification. DAG size of input: 109 DAG size of output: 86 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2022-11-08 07:47:28,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-08 07:47:28,344 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-11-08 07:47:28,521 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:47:28,522 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:47:28,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:47:28,522 INFO L85 PathProgramCache]: Analyzing trace with hash -1074889202, now seen corresponding path program 2 times [2022-11-08 07:47:28,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:47:28,522 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741383119] [2022-11-08 07:47:28,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:47:28,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:47:28,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:47:31,937 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 106 proven. 22 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2022-11-08 07:47:31,937 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:47:31,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741383119] [2022-11-08 07:47:31,938 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [741383119] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:47:31,938 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [368593872] [2022-11-08 07:47:31,938 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-11-08 07:47:31,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:47:31,938 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:47:31,939 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:47:31,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-11-08 07:47:32,151 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-11-08 07:47:32,151 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-08 07:47:32,155 INFO L263 TraceCheckSpWp]: Trace formula consists of 474 conjuncts, 113 conjunts are in the unsatisfiable core [2022-11-08 07:47:32,165 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:47:32,318 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-08 07:47:32,319 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-08 07:47:32,380 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-08 07:47:32,381 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-08 07:47:32,661 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:47:32,741 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:47:33,328 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:47:33,607 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:47:34,219 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:47:34,244 INFO L356 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2022-11-08 07:47:34,244 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 43 treesize of output 39 [2022-11-08 07:47:34,632 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:34,632 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:47:34,633 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 30 [2022-11-08 07:47:34,965 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2022-11-08 07:47:35,135 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:35,136 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:47:35,682 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:35,715 INFO L356 Elim1Store]: treesize reduction 36, result has 49.3 percent of original size [2022-11-08 07:47:35,716 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 52 [2022-11-08 07:47:36,220 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:36,222 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:47:36,223 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 38 [2022-11-08 07:47:36,625 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 25 [2022-11-08 07:47:36,773 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:36,774 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:47:37,322 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:47:37,349 INFO L356 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2022-11-08 07:47:37,349 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 43 treesize of output 39 [2022-11-08 07:47:37,753 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:37,753 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:47:37,757 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 30 [2022-11-08 07:47:38,280 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 30 [2022-11-08 07:47:38,484 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:38,484 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2022-11-08 07:47:38,872 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:47:38,873 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:47:38,892 INFO L356 Elim1Store]: treesize reduction 46, result has 27.0 percent of original size [2022-11-08 07:47:38,893 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 39 treesize of output 37 [2022-11-08 07:47:38,957 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 10 [2022-11-08 07:47:39,034 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 155 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:47:39,035 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-08 07:47:39,606 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_723 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int)) (let ((.cse0 (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) (+ 88 |c_~#queue~0.offset|)) 2147483647)))) is different from false [2022-11-08 07:47:40,081 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_723 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse1 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse1 .cse2 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) (+ 88 |c_~#queue~0.offset|)) 2147483647) (< (+ (select .cse1 .cse2) 1) v_ArrVal_721) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 (+ 84 |c_~#queue~0.offset|)))))))) is different from false [2022-11-08 07:47:40,252 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse1 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse1 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_720) .cse2 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= v_ArrVal_720 (+ |c_t1Thread1of1ForFork0_enqueue_#t~post38#1| 1))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse1 .cse2) 1) v_ArrVal_721))))) is different from false [2022-11-08 07:47:42,617 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse1 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse1 .cse3 v_ArrVal_720) .cse2 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse1 .cse2) 1) v_ArrVal_721) (< (+ (select .cse1 .cse3) 1) v_ArrVal_720))))) is different from false [2022-11-08 07:47:42,681 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse1 (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_717)) (.cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse1 .cse3 v_ArrVal_720) .cse2 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse1 .cse2) 1) v_ArrVal_721) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) (+ 88 |c_~#queue~0.offset|)) 2147483647) (< (+ (select .cse1 .cse3) 1) v_ArrVal_720))))) is different from false [2022-11-08 07:47:42,735 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int)) (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (or (forall ((v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse1 (store .cse4 (+ |c_t1Thread1of1ForFork0_enqueue_~q#1.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse2 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse1 .cse2 v_ArrVal_720) .cse3 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse1 .cse2) 1) v_ArrVal_720) (< (+ (select .cse1 .cse3) 1) v_ArrVal_721))))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse4 .cse3)))))) is different from false [2022-11-08 07:47:42,834 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (let ((.cse3 (store .cse0 (+ |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse4 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|)) (.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse3 .cse4 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse0 .cse1))) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) (+ 88 |c_~#queue~0.offset|)) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse2 (+ 84 |c_~#queue~0.offset|)))) (< (+ (select .cse3 .cse4) 1) v_ArrVal_720) (< (+ (select .cse3 .cse1) 1) v_ArrVal_721)))))) is different from false [2022-11-08 07:47:42,947 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse0 (select |c_#memory_int| |c_~#queue~0.base|))) (let ((.cse4 (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_~#queue~0.base| (store (store .cse4 .cse3 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse0 .cse1))) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse3) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse2 .cse1))) (< (+ (select .cse4 .cse1) 1) v_ArrVal_721) (< (+ (select .cse4 .cse3) 1) v_ArrVal_720)))))) is different from false [2022-11-08 07:47:43,291 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse5 (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse2 (select .cse5 |c_~#queue~0.base|))) (let ((.cse0 (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse3 (select (store (store .cse5 |c_~#queue~0.base| (store (store .cse0 .cse4 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_721) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse2 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse3 .cse1))) (< (select (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse4) 2147483647) (< (+ (select .cse0 .cse4) 1) v_ArrVal_720))))))) is different from false [2022-11-08 07:47:43,523 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse5 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse3 (select .cse5 |c_~#queue~0.base|))) (let ((.cse4 (store .cse3 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse2 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse5 |c_~#queue~0.base| (store (store .cse4 .cse2 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 .cse1))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse2) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse3 .cse1))) (< (+ (select .cse4 .cse2) 1) v_ArrVal_720) (< (+ (select .cse4 .cse1) 1) v_ArrVal_721) (not (<= v_ArrVal_714 1)))))))) is different from false [2022-11-08 07:47:47,413 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_720 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int)) (let ((.cse2 (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_711)) (.cse7 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse8 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse2 .cse7 v_ArrVal_712) .cse3 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse6 (select .cse8 |c_~#queue~0.base|))) (let ((.cse4 (store .cse6 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse1 (+ 88 |c_~#queue~0.offset|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse8 |c_~#queue~0.base| (store (store .cse4 .cse1 v_ArrVal_720) .cse5 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse1) 2147483647) (< 20 (select .cse2 .cse3)) (< (+ (select .cse4 .cse5) 1) v_ArrVal_721) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse6 .cse5))) (< (+ (select .cse4 .cse1) 1) v_ArrVal_720) (< (+ (select .cse2 .cse7) 1) v_ArrVal_712) (not (<= v_ArrVal_714 1)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 .cse5)))))))))) is different from false [2022-11-08 07:47:47,503 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int)) (let ((.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse0 .cse1))) (forall ((v_ArrVal_720 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (v_ArrVal_717 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int)) (let ((.cse6 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_711)) (.cse7 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse9 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse6 .cse7 v_ArrVal_712) .cse1 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse8 (select .cse9 |c_~#queue~0.base|))) (let ((.cse5 (store .cse8 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse5 .cse3 v_ArrVal_720) .cse4 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse3) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse2 .cse4))) (< (+ (select .cse5 .cse4) 1) v_ArrVal_721) (< (+ (select .cse6 .cse7) 1) v_ArrVal_712) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse8 .cse4))) (< 20 (select .cse6 .cse1)) (< (+ (select .cse5 .cse3) 1) v_ArrVal_720) (not (<= v_ArrVal_714 1)))))))))))) is different from false [2022-11-08 07:47:47,707 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int)) (let ((.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (let ((.cse7 (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_711)) (.cse8 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|)) (.cse4 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse9 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse7 .cse8 v_ArrVal_712) .cse4 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse2 (select .cse9 |c_~#queue~0.base|))) (let ((.cse5 (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717)) (.cse6 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse5 .cse6 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse2 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse3 .cse4))) (< (+ (select .cse5 .cse6) 1) v_ArrVal_720) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse6) 2147483647) (< (+ (select .cse5 .cse1) 1) v_ArrVal_721) (< 20 (select .cse7 .cse4)) (< (+ (select .cse7 .cse8) 1) v_ArrVal_712) (not (<= v_ArrVal_714 1)))))))))) is different from false [2022-11-08 07:47:55,063 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_707 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_709 (Array Int Int))) (let ((.cse8 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_707)) |c_~#stored_elements~0.base| v_ArrVal_709))) (let ((.cse2 (select .cse8 |c_~#queue~0.base|))) (let ((.cse5 (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_~#queue~0.offset|) v_ArrVal_711)) (.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse7 (store (store .cse8 |c_~#queue~0.base| (store (store .cse5 .cse4 v_ArrVal_712) .cse1 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse0 (select .cse7 |c_~#queue~0.base|))) (let ((.cse6 (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717))) (let ((.cse3 (select (store (store .cse7 |c_~#queue~0.base| (store (store .cse6 .cse4 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse0 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse2 .cse1))) (< (select (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse4) 2147483647) (< 20 (select .cse5 .cse1)) (< (+ (select .cse6 .cse4) 1) v_ArrVal_720) (< (+ (select .cse5 .cse4) 1) v_ArrVal_712) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse3 .cse1))) (not (<= v_ArrVal_714 1)) (< (+ (select .cse6 .cse1) 1) v_ArrVal_721)))))))))) is different from false [2022-11-08 07:47:55,842 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_707 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_705 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_709 (Array Int Int))) (let ((.cse8 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_705) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_707)) |c_~#stored_elements~0.base| v_ArrVal_709))) (let ((.cse4 (select .cse8 |c_~#queue~0.base|))) (let ((.cse5 (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_~#queue~0.offset|) v_ArrVal_711)) (.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse7 (store (store .cse8 |c_~#queue~0.base| (store (store .cse5 .cse3 v_ArrVal_712) .cse1 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse6 (select .cse7 |c_~#queue~0.base|))) (let ((.cse0 (store .cse6 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717))) (let ((.cse2 (select (store (store .cse7 |c_~#queue~0.base| (store (store .cse0 .cse3 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_721) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse2 .cse1))) (not (<= v_ArrVal_705 (+ |c_t1Thread1of1ForFork0_enqueue_#t~post38#1| 1))) (< (+ (select .cse0 .cse3) 1) v_ArrVal_720) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse4 .cse1))) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse3) 2147483647) (< 20 (select .cse5 .cse1)) (< (+ (select .cse5 .cse3) 1) v_ArrVal_712) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse6 .cse1))) (not (<= v_ArrVal_714 1))))))))))) is different from false [2022-11-08 07:47:56,592 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_707 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_705 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_709 (Array Int Int))) (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse1 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse10 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse0 .cse1 v_ArrVal_705) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_707)) |c_~#stored_elements~0.base| v_ArrVal_709))) (let ((.cse6 (select .cse10 |c_~#queue~0.base|))) (let ((.cse7 (store .cse6 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_~#queue~0.offset|) v_ArrVal_711)) (.cse5 (+ 88 |c_~#queue~0.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (let ((.cse9 (store (store .cse10 |c_~#queue~0.base| (store (store .cse7 .cse5 v_ArrVal_712) .cse3 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse8 (select .cse9 |c_~#queue~0.base|))) (let ((.cse2 (store .cse8 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717))) (let ((.cse4 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse2 .cse5 v_ArrVal_720) .cse3 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_705) (< (+ (select .cse2 .cse3) 1) v_ArrVal_721) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse4 .cse3))) (< (+ (select .cse2 .cse5) 1) v_ArrVal_720) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse6 .cse3))) (< (select (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse5) 2147483647) (< 20 (select .cse7 .cse3)) (< (+ (select .cse7 .cse5) 1) v_ArrVal_712) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse8 .cse3))) (not (<= v_ArrVal_714 1)))))))))))) is different from false [2022-11-08 07:47:56,799 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_707 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_705 Int) (v_ArrVal_703 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_709 (Array Int Int))) (let ((.cse5 (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_703)) (.cse6 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse10 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse5 .cse6 v_ArrVal_705) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_707)) |c_~#stored_elements~0.base| v_ArrVal_709))) (let ((.cse0 (select .cse10 |c_~#queue~0.base|))) (let ((.cse7 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_~#queue~0.offset|) v_ArrVal_711)) (.cse3 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse9 (store (store .cse10 |c_~#queue~0.base| (store (store .cse7 .cse3 v_ArrVal_712) .cse1 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse8 (select .cse9 |c_~#queue~0.base|))) (let ((.cse4 (store .cse8 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717))) (let ((.cse2 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse4 .cse3 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse0 .cse1))) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse3) 2147483647) (< (+ (select .cse4 .cse1) 1) v_ArrVal_721) (< (+ (select .cse5 .cse6) 1) v_ArrVal_705) (< 20 (select .cse7 .cse1)) (< (+ (select .cse7 .cse3) 1) v_ArrVal_712) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse8 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse2 .cse1))) (< (+ (select .cse4 .cse3) 1) v_ArrVal_720) (not (<= v_ArrVal_714 1)))))))))))) is different from false [2022-11-08 07:47:56,931 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58| Int)) (let ((.cse12 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse11 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (or (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_707 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_705 Int) (v_ArrVal_703 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_709 (Array Int Int))) (let ((.cse5 (store .cse12 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58|) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_703)) (.cse6 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse10 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse5 .cse6 v_ArrVal_705) .cse11 v_ArrVal_707)) |c_~#stored_elements~0.base| v_ArrVal_709))) (let ((.cse7 (select .cse10 |c_~#queue~0.base|))) (let ((.cse3 (store .cse7 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_~#queue~0.offset|) v_ArrVal_711)) (.cse4 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse9 (store (store .cse10 |c_~#queue~0.base| (store (store .cse3 .cse4 v_ArrVal_712) .cse1 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse2 (select .cse9 |c_~#queue~0.base|))) (let ((.cse8 (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717))) (let ((.cse0 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse8 .cse4 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse2 .cse1))) (< (+ (select .cse3 .cse4) 1) v_ArrVal_712) (< (+ (select .cse5 .cse6) 1) v_ArrVal_705) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse7 .cse1))) (< (+ (select .cse8 .cse4) 1) v_ArrVal_720) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse4) 2147483647) (< 20 (select .cse3 .cse1)) (< (+ (select .cse8 .cse1) 1) v_ArrVal_721) (not (<= v_ArrVal_714 1)))))))))))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58| (select .cse12 .cse11)))))) is different from false [2022-11-08 07:47:57,182 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_707 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_705 Int) (v_ArrVal_703 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_709 (Array Int Int))) (let ((.cse7 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (let ((.cse5 (store .cse7 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_703)) (.cse6 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|)) (.cse8 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse12 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse5 .cse6 v_ArrVal_705) .cse8 v_ArrVal_707)) |c_~#stored_elements~0.base| v_ArrVal_709))) (let ((.cse2 (select .cse12 |c_~#queue~0.base|))) (let ((.cse9 (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_~#queue~0.offset|) v_ArrVal_711)) (.cse1 (+ 88 |c_~#queue~0.offset|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (let ((.cse11 (store (store .cse12 |c_~#queue~0.base| (store (store .cse9 .cse1 v_ArrVal_712) .cse3 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse4 (select .cse11 |c_~#queue~0.base|))) (let ((.cse0 (store .cse4 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717))) (let ((.cse10 (select (store (store .cse11 |c_~#queue~0.base| (store (store .cse0 .cse1 v_ArrVal_720) .cse3 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_720) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse2 .cse3))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse4 .cse3))) (< (+ (select .cse5 .cse6) 1) v_ArrVal_705) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58| (select .cse7 .cse8))) (< (+ (select .cse9 .cse1) 1) v_ArrVal_712) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse10 .cse3))) (< (+ (select .cse0 .cse3) 1) v_ArrVal_721) (< 20 (select .cse9 .cse3)) (< (select (store .cse10 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse1) 2147483647) (not (<= v_ArrVal_714 1))))))))))))) is different from false [2022-11-08 07:48:09,250 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| Int) (v_ArrVal_707 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| Int) (v_ArrVal_717 Int) (v_ArrVal_705 Int) (v_ArrVal_703 Int) (v_ArrVal_714 Int) (v_ArrVal_724 Int) (v_ArrVal_712 Int) (v_ArrVal_711 Int) (v_ArrVal_721 Int) (v_ArrVal_720 Int) (v_ArrVal_702 (Array Int Int)) (v_ArrVal_701 (Array Int Int)) (v_ArrVal_723 (Array Int Int)) (v_ArrVal_716 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_709 (Array Int Int))) (let ((.cse11 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id1~0#1.base| v_ArrVal_701) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_702))) (let ((.cse3 (select .cse11 |c_~#queue~0.base|))) (let ((.cse4 (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58|) |c_~#queue~0.offset|) v_ArrVal_703)) (.cse5 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse10 (store (store .cse11 |c_~#queue~0.base| (store (store .cse4 .cse5 v_ArrVal_705) .cse1 v_ArrVal_707)) |c_~#stored_elements~0.base| v_ArrVal_709))) (let ((.cse8 (select .cse10 |c_~#queue~0.base|))) (let ((.cse6 (store .cse8 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55|) |c_~#queue~0.offset|) v_ArrVal_711))) (let ((.cse9 (store (store .cse10 |c_~#queue~0.base| (store (store .cse6 .cse5 v_ArrVal_712) .cse1 v_ArrVal_714)) |c_~#stored_elements~0.base| v_ArrVal_716))) (let ((.cse2 (select .cse9 |c_~#queue~0.base|))) (let ((.cse7 (store .cse2 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52|)) v_ArrVal_717))) (let ((.cse0 (select (store (store .cse9 |c_~#queue~0.base| (store (store .cse7 .cse5 v_ArrVal_720) .cse1 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_52| (select .cse2 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_58| (select .cse3 .cse1))) (< (+ (select .cse4 .cse5) 1) v_ArrVal_705) (< 20 (select .cse6 .cse1)) (< (+ (select .cse7 .cse5) 1) v_ArrVal_720) (< (+ (select .cse7 .cse1) 1) v_ArrVal_721) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_55| (select .cse8 .cse1))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse5) 2147483647) (not (<= v_ArrVal_714 1)) (< (+ (select .cse6 .cse5) 1) v_ArrVal_712))))))))))))) is different from false [2022-11-08 07:48:14,284 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:48:14,285 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1551 treesize of output 1031 [2022-11-08 07:48:14,413 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:48:14,414 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 8127 treesize of output 8103 [2022-11-08 07:48:14,535 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 3019 treesize of output 3003 [2022-11-08 07:48:14,636 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 5671 treesize of output 5639 [2022-11-08 07:48:14,770 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 3542 treesize of output 3286 [2022-11-08 07:48:14,855 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 5256 treesize of output 5064 [2022-11-08 07:48:14,929 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 5610 treesize of output 5514 [2022-11-08 07:48:15,051 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2022-11-08 07:48:16,180 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:48:16,181 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 4629 treesize of output 4649 [2022-11-08 07:48:30,461 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:48:30,462 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 66 treesize of output 136 [2022-11-08 07:48:30,989 INFO L134 CoverageAnalysis]: Checked inductivity of 155 backedges. 0 proven. 30 refuted. 2 times theorem prover too weak. 0 trivial. 123 not checked. [2022-11-08 07:48:30,989 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [368593872] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-08 07:48:30,989 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-08 07:48:30,989 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 45, 49] total 118 [2022-11-08 07:48:30,990 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387855212] [2022-11-08 07:48:30,990 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-08 07:48:30,991 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 118 states [2022-11-08 07:48:30,991 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:48:30,992 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 118 interpolants. [2022-11-08 07:48:30,995 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=995, Invalid=8444, Unknown=147, NotChecked=4220, Total=13806 [2022-11-08 07:48:30,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:48:30,995 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:48:30,996 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 118 states, 118 states have (on average 4.889830508474576) internal successors, (577), 118 states have internal predecessors, (577), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:48:30,996 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:48:30,996 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:48:30,996 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:48:30,996 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:48:30,996 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:48:30,996 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:48:30,997 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2022-11-08 07:48:30,997 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:48:30,997 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:48:30,997 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:48:30,997 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 80 states. [2022-11-08 07:48:30,997 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2022-11-08 07:48:30,997 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:49:07,897 WARN L233 SmtUtils]: Spent 5.22s on a formula simplification. DAG size of input: 81 DAG size of output: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:49:08,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:49:08,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2022-11-08 07:49:08,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-08 07:49:08,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2022-11-08 07:49:08,986 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-11-08 07:49:09,156 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:49:09,157 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:49:09,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:49:09,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1321134692, now seen corresponding path program 1 times [2022-11-08 07:49:09,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:49:09,158 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153835463] [2022-11-08 07:49:09,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:49:09,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:49:09,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:49:10,619 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:49:10,620 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:49:10,620 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153835463] [2022-11-08 07:49:10,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1153835463] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:49:10,620 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1786889542] [2022-11-08 07:49:10,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:49:10,620 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:49:10,621 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:49:10,622 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:49:10,642 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-11-08 07:49:10,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:49:10,805 INFO L263 TraceCheckSpWp]: Trace formula consists of 348 conjuncts, 36 conjunts are in the unsatisfiable core [2022-11-08 07:49:10,809 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:49:11,475 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:49:11,572 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:49:11,573 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 20 [2022-11-08 07:49:11,923 INFO L356 Elim1Store]: treesize reduction 17, result has 46.9 percent of original size [2022-11-08 07:49:11,923 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 32 [2022-11-08 07:49:12,729 INFO L356 Elim1Store]: treesize reduction 29, result has 37.0 percent of original size [2022-11-08 07:49:12,730 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 38 treesize of output 46 [2022-11-08 07:49:12,813 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2022-11-08 07:49:12,854 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:49:12,854 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-08 07:49:13,764 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:49:13,764 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 32 [2022-11-08 07:49:13,778 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:49:13,779 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 60 [2022-11-08 07:49:13,787 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 28 [2022-11-08 07:49:13,801 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 6 [2022-11-08 07:49:13,819 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:49:13,819 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 48 treesize of output 48 [2022-11-08 07:49:14,410 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:49:14,411 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1786889542] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-08 07:49:14,411 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-08 07:49:14,411 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 16] total 47 [2022-11-08 07:49:14,411 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938780356] [2022-11-08 07:49:14,411 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-08 07:49:14,412 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 48 states [2022-11-08 07:49:14,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:49:14,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2022-11-08 07:49:14,414 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=191, Invalid=2056, Unknown=9, NotChecked=0, Total=2256 [2022-11-08 07:49:14,414 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:49:14,414 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:49:14,414 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 48 states, 47 states have (on average 8.638297872340425) internal successors, (406), 48 states have internal predecessors, (406), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:49:14,414 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:49:14,414 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:49:14,415 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:49:14,415 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:49:14,415 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:49:14,415 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:49:14,415 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2022-11-08 07:49:14,415 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:49:14,415 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:49:14,416 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:49:14,416 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 82 states. [2022-11-08 07:49:14,416 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2022-11-08 07:49:14,416 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 40 states. [2022-11-08 07:49:14,416 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:50:22,557 WARN L233 SmtUtils]: Spent 9.18s on a formula simplification. DAG size of input: 260 DAG size of output: 144 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:50:42,261 WARN L233 SmtUtils]: Spent 12.65s on a formula simplification. DAG size of input: 251 DAG size of output: 131 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:51:11,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:51:11,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:51:11,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:51:11,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:51:11,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 87 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2022-11-08 07:51:11,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-08 07:51:11,598 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-11-08 07:51:11,760 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-11-08 07:51:11,761 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:51:11,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:51:11,761 INFO L85 PathProgramCache]: Analyzing trace with hash 518581047, now seen corresponding path program 1 times [2022-11-08 07:51:11,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:51:11,761 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863858217] [2022-11-08 07:51:11,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:51:11,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:51:11,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:51:16,491 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:51:16,492 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:51:16,492 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863858217] [2022-11-08 07:51:16,492 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [863858217] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:51:16,492 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [477406947] [2022-11-08 07:51:16,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:51:16,492 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:51:16,492 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:51:16,493 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:51:16,494 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-11-08 07:51:16,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:51:16,668 INFO L263 TraceCheckSpWp]: Trace formula consists of 422 conjuncts, 89 conjunts are in the unsatisfiable core [2022-11-08 07:51:16,674 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:51:16,832 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-08 07:51:16,832 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-08 07:51:16,902 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-08 07:51:16,903 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-08 07:51:17,186 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:51:17,280 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:51:17,799 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:51:18,014 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:51:18,528 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:51:18,539 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-08 07:51:18,539 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-08 07:51:18,651 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:51:18,652 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:51:18,989 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2022-11-08 07:51:19,148 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:51:19,149 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:51:19,581 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:51:19,592 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-08 07:51:19,593 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-08 07:51:19,706 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:51:19,708 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:51:20,077 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2022-11-08 07:51:20,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:51:20,231 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:51:20,530 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:51:20,542 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-08 07:51:20,543 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 32 treesize of output 27 [2022-11-08 07:51:20,641 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:51:20,642 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 20 [2022-11-08 07:51:20,687 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2022-11-08 07:51:20,694 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:51:20,694 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-08 07:51:21,197 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_897 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse0 (select (store |c_#memory_int| |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1)))))) is different from false [2022-11-08 07:51:21,278 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= v_ArrVal_895 (+ 1 |c_t1Thread1of1ForFork0_enqueue_#t~post41#1|))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647)))) is different from false [2022-11-08 07:51:21,331 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (< (+ |c_t1Thread1of1ForFork0_enqueue_#t~mem40#1| 1) v_ArrVal_895) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647)))) is different from false [2022-11-08 07:51:21,353 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse2 .cse3 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< (+ (select .cse2 .cse3) 1) v_ArrVal_895) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647))))) is different from false [2022-11-08 07:51:21,456 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse2 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_894) .cse3 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< (+ (select .cse2 .cse3) 1) v_ArrVal_895) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647))))) is different from false [2022-11-08 07:51:21,588 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse2 (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_892)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_894) .cse3 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< (+ (select .cse2 .cse3) 1) v_ArrVal_895) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647))))) is different from false [2022-11-08 07:51:21,625 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int)) (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (or (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse2 (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_892))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_894) .cse3 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (< (+ (select .cse2 .cse3) 1) v_ArrVal_895))))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse4 .cse3)))))) is different from false [2022-11-08 07:51:21,694 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (let ((.cse0 (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_892)) (.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse2 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse0 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse3 (+ 84 |c_~#queue~0.offset|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_895) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse3) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse4 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse2 .cse3)))))))) is different from false [2022-11-08 07:51:24,527 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (v_ArrVal_890 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_888 Int) (v_ArrVal_898 Int)) (let ((.cse4 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse3 (select .cse4 |c_~#queue~0.base|))) (let ((.cse0 (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse4 |c_~#queue~0.base| (store (store .cse0 (+ 88 |c_~#queue~0.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_895) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse3 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse2 .cse1))) (not (<= v_ArrVal_888 (+ 1 |c_t1Thread1of1ForFork0_enqueue_#t~post41#1|))))))))) is different from false [2022-11-08 07:51:24,861 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (v_ArrVal_890 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_888 Int) (v_ArrVal_898 Int)) (let ((.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse4 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse3 .cse4 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse5 (select .cse6 |c_~#queue~0.base|))) (let ((.cse0 (store .cse5 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse0 (+ 88 |c_~#queue~0.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_895) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (< (+ (select .cse3 .cse4) 1) v_ArrVal_888) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse5 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse2 .cse1)))))))))) is different from false [2022-11-08 07:51:25,071 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (v_ArrVal_890 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_888 Int) (v_ArrVal_898 Int) (v_ArrVal_886 Int)) (let ((.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse4 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_886) .cse4 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse5 (select .cse6 |c_~#queue~0.base|))) (let ((.cse2 (store .cse5 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse0 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse2 (+ 88 |c_~#queue~0.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (< (+ 1 (select .cse2 .cse1)) v_ArrVal_895) (< (+ (select .cse3 .cse4) 1) v_ArrVal_888) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse5 .cse1)))))))))) is different from false [2022-11-08 07:51:25,310 WARN L833 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_885 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (v_ArrVal_890 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_888 Int) (v_ArrVal_898 Int) (v_ArrVal_886 Int)) (let ((.cse3 (store (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|) (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_885)) (.cse4 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse6 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_886) .cse4 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse5 (select .cse6 |c_~#queue~0.base|))) (let ((.cse0 (store .cse5 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse2 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse0 (+ 88 |c_~#queue~0.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_895) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse2 .cse1))) (< (+ (select .cse3 .cse4) 1) v_ArrVal_888) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse5 .cse1))) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647)))))))) is different from false [2022-11-08 07:51:26,870 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_75| Int) (v_ArrVal_890 (Array Int Int)) (v_ArrVal_888 Int) (v_ArrVal_898 Int) (v_ArrVal_886 Int) (v_ArrVal_885 Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int)) (let ((.cse6 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|))) (let ((.cse2 (store .cse6 (+ |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_75|)) v_ArrVal_885)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse7 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_886) .cse3 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse0 (select .cse7 |c_~#queue~0.base|))) (let ((.cse4 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse5 (select (store (store .cse7 |c_~#queue~0.base| (store (store .cse4 (+ 88 |c_~#queue~0.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse0 .cse1))) (< (+ (select .cse2 .cse3) 1) v_ArrVal_888) (< (+ (select .cse4 .cse1) 1) v_ArrVal_895) (< (select (store .cse5 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_75| (select .cse6 .cse3))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse5 .cse1))))))))))) is different from false [2022-11-08 07:51:33,046 WARN L833 $PredicateComparison]: unable to prove that (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_75| Int) (v_ArrVal_890 (Array Int Int)) (v_ArrVal_883 (Array Int Int)) (v_ArrVal_882 (Array Int Int)) (v_ArrVal_888 Int) (v_ArrVal_898 Int) (v_ArrVal_886 Int) (v_ArrVal_885 Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int)) (let ((.cse8 (store (store |c_#memory_int| |c_ULTIMATE.start_main_~#id1~0#1.base| v_ArrVal_882) |c_ULTIMATE.start_main_~#id2~0#1.base| v_ArrVal_883))) (let ((.cse0 (select .cse8 |c_~#queue~0.base|))) (let ((.cse2 (store .cse0 (+ |c_~#queue~0.offset| (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_75|)) v_ArrVal_885)) (.cse7 (+ 88 |c_~#queue~0.offset|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (let ((.cse6 (store (store .cse8 |c_~#queue~0.base| (store (store .cse2 .cse7 v_ArrVal_886) .cse1 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse4 (select .cse6 |c_~#queue~0.base|))) (let ((.cse5 (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892))) (let ((.cse3 (select (store (store .cse6 |c_~#queue~0.base| (store (store .cse5 .cse7 v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_75| (select .cse0 .cse1))) (< (+ (select .cse2 .cse1) 1) v_ArrVal_888) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse3 .cse1))) (< (select (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse4 .cse1))) (< (+ (select .cse5 .cse1) 1) v_ArrVal_895)))))))))) is different from false [2022-11-08 07:51:35,138 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:51:35,138 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 577 treesize of output 387 [2022-11-08 07:51:35,175 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:51:35,176 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2812 treesize of output 2802 [2022-11-08 07:51:35,206 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1828 treesize of output 1700 [2022-11-08 07:51:35,237 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2057 treesize of output 1993 [2022-11-08 07:51:35,305 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 2060 treesize of output 2044 [2022-11-08 07:51:35,343 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1944 treesize of output 1912 [2022-11-08 07:51:35,400 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2022-11-08 07:51:36,285 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:51:36,285 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 897 treesize of output 885 [2022-11-08 07:51:41,745 INFO L356 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-11-08 07:51:41,745 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 5 new quantified variables, introduced 10 case distinctions, treesize of input 66 treesize of output 136 [2022-11-08 07:51:42,154 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 67 not checked. [2022-11-08 07:51:42,155 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [477406947] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-08 07:51:42,155 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-11-08 07:51:42,155 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31, 36] total 94 [2022-11-08 07:51:42,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685695073] [2022-11-08 07:51:42,155 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-11-08 07:51:42,156 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 95 states [2022-11-08 07:51:42,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-11-08 07:51:42,157 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2022-11-08 07:51:42,159 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=817, Invalid=5654, Unknown=65, NotChecked=2394, Total=8930 [2022-11-08 07:51:42,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:51:42,159 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-11-08 07:51:42,159 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 95 states, 94 states have (on average 5.595744680851064) internal successors, (526), 95 states have internal predecessors, (526), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-08 07:51:42,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:51:42,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 48 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 87 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 56 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2022-11-08 07:51:42,160 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:52:39,902 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse4 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse2 (+ (select .cse3 .cse4) 1)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse3 .cse4 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< .cse2 v_ArrVal_895) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647)))) (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (v_ArrVal_890 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_888 Int) (v_ArrVal_898 Int)) (let ((.cse8 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse3 .cse4 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse7 (select .cse8 |c_~#queue~0.base|))) (let ((.cse5 (store .cse7 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892))) (let ((.cse6 (select (store (store .cse8 |c_~#queue~0.base| (store (store .cse5 (+ 88 |c_~#queue~0.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse5 .cse1) 1) v_ArrVal_895) (< (select (store .cse6 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (< .cse2 v_ArrVal_888) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse7 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse6 .cse1))))))))) (<= (select (select |c_#memory_int| 7) 84) 2) (= |c_t1Thread1of1ForFork0_enqueue_~q#1.offset| 0) (= 7 |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)))) is different from false [2022-11-08 07:52:40,212 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (+ 1 |c_t1Thread1of1ForFork0_enqueue_#t~post41#1|)) (.cse9 (+ 88 |c_~#queue~0.offset|)) (.cse2 (+ 84 |c_~#queue~0.offset|)) (.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse4 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (and (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse1 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse3 .cse4 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (not (<= v_ArrVal_895 .cse0)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse1 .cse2))) (< (select (store .cse1 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse2) 2147483647)))) (<= |c_t1Thread1of1ForFork0_enqueue_#t~post41#1| 2) (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (v_ArrVal_890 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_888 Int) (v_ArrVal_898 Int)) (let ((.cse8 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse3 .cse4 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse7 (select .cse8 |c_~#queue~0.base|))) (let ((.cse5 (store .cse7 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892))) (let ((.cse6 (select (store (store .cse8 |c_~#queue~0.base| (store (store .cse5 .cse9 v_ArrVal_894) .cse2 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse5 .cse2) 1) v_ArrVal_895) (< (select (store .cse6 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse2) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse7 .cse2))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse6 .cse2))) (< (+ |c_t1Thread1of1ForFork0_enqueue_#t~mem40#1| 1) v_ArrVal_888))))))) (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (v_ArrVal_890 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_888 Int) (v_ArrVal_898 Int)) (let ((.cse13 (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store .cse3 .cse4 v_ArrVal_888)) |c_~#stored_elements~0.base| v_ArrVal_890))) (let ((.cse12 (select .cse13 |c_~#queue~0.base|))) (let ((.cse10 (store .cse12 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892))) (let ((.cse11 (select (store (store .cse13 |c_~#queue~0.base| (store (store .cse10 .cse9 v_ArrVal_894) .cse2 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse10 .cse2) 1) v_ArrVal_895) (< (select (store .cse11 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse2) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse12 .cse2))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse11 .cse2))) (not (<= v_ArrVal_888 .cse0)))))))))) is different from false [2022-11-08 07:53:51,968 WARN L233 SmtUtils]: Spent 5.14s on a formula simplification. DAG size of input: 173 DAG size of output: 133 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:53:51,983 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|)) (.cse5 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse6 (select .cse4 .cse5)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (and (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse3 (select |c_#memory_int| |c_~#queue~0.base|))) (let ((.cse0 (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_~#queue~0.offset|) v_ArrVal_892))) (let ((.cse2 (select (store (store |c_#memory_int| |c_~#queue~0.base| (store (store .cse0 (+ 88 |c_~#queue~0.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse0 .cse1) 1) v_ArrVal_895) (< (select (store .cse2 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| (select .cse3 .cse1))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse2 .cse1)))))))) (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (or (< (select (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_898) .cse5) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| .cse6)))) (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse7 (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_892))) (let ((.cse8 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse7 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_894) .cse5 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|))) (or (< (+ (select .cse7 .cse5) 1) v_ArrVal_895) (< (select (store .cse8 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| .cse6)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse8 .cse1)))))))))) is different from false [2022-11-08 07:53:52,016 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse0 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base|)) (.cse1 (+ 84 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|))) (let ((.cse2 (select .cse0 .cse1))) (and (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (or (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_898) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| .cse2)))) (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int) (v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse3 (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_892))) (let ((.cse4 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_#in~q#1.base| (store (store .cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_#in~q#1.offset|) v_ArrVal_894) .cse1 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse5 (+ 84 |c_~#queue~0.offset|))) (or (< (+ (select .cse3 .cse1) 1) v_ArrVal_895) (< (select (store .cse4 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse5) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| .cse2)) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse4 .cse5)))))))))) is different from false [2022-11-08 07:54:11,132 WARN L233 SmtUtils]: Spent 5.39s on a formula simplification. DAG size of input: 190 DAG size of output: 150 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:54:11,143 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse1 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse2 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select .cse1 .cse2))) (and (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int)) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| .cse0)) (forall ((v_ArrVal_898 Int)) (< (select (store .cse1 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_898) .cse2) 2147483647)))) (forall ((|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| Int)) (or (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse5 (store .cse1 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72|) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_892))) (let ((.cse3 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse5 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_894) .cse2 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse4 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse3 .cse4))) (< (select (store .cse3 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse4) 2147483647) (< (+ (select .cse5 .cse2) 1) v_ArrVal_895))))) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_72| .cse0))))))) is different from false [2022-11-08 07:54:29,878 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse5 (+ (* |c_t1Thread1of1ForFork0_enqueue_#t~mem36#1| 4) |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|)) (.cse3 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (and (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (v_ArrVal_892 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse2 (store .cse4 .cse5 v_ArrVal_892))) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse2 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_894) .cse3 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse1 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse0 .cse1))) (< (+ (select .cse2 .cse3) 1) v_ArrVal_895) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse1) 2147483647))))) (forall ((v_ArrVal_898 Int)) (< (select (store .cse4 .cse5 v_ArrVal_898) .cse3) 2147483647)))) is different from false [2022-11-08 07:54:41,472 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse3 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse4 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse0 (select .cse3 .cse4))) (and (< .cse0 2147483647) (forall ((v_ArrVal_895 Int) (v_ArrVal_897 (Array Int Int)) (v_ArrVal_894 Int) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| Int) (v_ArrVal_898 Int)) (let ((.cse1 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse3 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|) v_ArrVal_894) .cse4 v_ArrVal_895)) |c_~#stored_elements~0.base| v_ArrVal_897) |c_~#queue~0.base|)) (.cse2 (+ 84 |c_~#queue~0.offset|))) (or (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69| (select .cse1 .cse2))) (< (+ .cse0 1) v_ArrVal_895) (< (select (store .cse1 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_69|) |c_~#queue~0.offset|) v_ArrVal_898) .cse2) 2147483647))))))) is different from false [2022-11-08 07:54:51,003 WARN L233 SmtUtils]: Spent 5.13s on a formula simplification that was a NOOP. DAG size: 80 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:55:10,484 WARN L233 SmtUtils]: Spent 10.92s on a formula simplification that was a NOOP. DAG size: 89 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-08 07:55:45,669 WARN L833 $PredicateComparison]: unable to prove that (let ((.cse4 (select |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base|)) (.cse6 (+ 84 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (let ((.cse1 (+ 88 |c_~#queue~0.offset|)) (.cse2 (+ 84 |c_~#queue~0.offset|)) (.cse3 (+ (select .cse4 .cse6) 1)) (.cse5 (+ 88 |c_t1Thread1of1ForFork0_enqueue_~q#1.offset|))) (and (forall ((v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse0 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse4 .cse5 v_ArrVal_720) .cse6 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (not (<= v_ArrVal_720 (+ |c_t1Thread1of1ForFork0_enqueue_#t~post38#1| 1))) (< (select (store .cse0 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse0 .cse2))) (< .cse3 v_ArrVal_721)))) (forall ((v_ArrVal_720 Int) (v_ArrVal_723 (Array Int Int)) (|v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| Int) (v_ArrVal_724 Int) (v_ArrVal_721 Int)) (let ((.cse7 (select (store (store |c_#memory_int| |c_t1Thread1of1ForFork0_enqueue_~q#1.base| (store (store .cse4 .cse5 v_ArrVal_720) .cse6 v_ArrVal_721)) |c_~#stored_elements~0.base| v_ArrVal_723) |c_~#queue~0.base|))) (or (< (select (store .cse7 (+ (* 4 |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49|) |c_~#queue~0.offset|) v_ArrVal_724) .cse1) 2147483647) (not (<= |v_t1Thread1of1ForFork0_enqueue_#t~mem36#1_49| (select .cse7 .cse2))) (< .cse3 v_ArrVal_721) (< (+ |c_t1Thread1of1ForFork0_enqueue_#t~mem37#1| 1) v_ArrVal_720))))))) is different from false [2022-11-08 07:55:45,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-11-08 07:55:45,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-11-08 07:55:45,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-11-08 07:55:45,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:55:45,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-11-08 07:55:45,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-08 07:55:45,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-11-08 07:55:45,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-11-08 07:55:45,715 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-11-08 07:55:45,877 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:55:45,877 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW === [t1Err0ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err1ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err2ASSERT_VIOLATIONINTEGER_OVERFLOW, t1Err3ASSERT_VIOLATIONINTEGER_OVERFLOW (and 2 more)] === [2022-11-08 07:55:45,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-08 07:55:45,878 INFO L85 PathProgramCache]: Analyzing trace with hash -1239786026, now seen corresponding path program 3 times [2022-11-08 07:55:45,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-11-08 07:55:45,878 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32726147] [2022-11-08 07:55:45,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-08 07:55:45,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-08 07:55:45,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-08 07:55:54,667 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 97 proven. 189 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:55:54,667 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-11-08 07:55:54,667 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [32726147] [2022-11-08 07:55:54,667 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [32726147] provided 0 perfect and 1 imperfect interpolant sequences [2022-11-08 07:55:54,668 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2105515453] [2022-11-08 07:55:54,668 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-11-08 07:55:54,668 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-08 07:55:54,668 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 [2022-11-08 07:55:54,675 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-08 07:55:54,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_e1f51b96-4b25-4b56-b2bc-456be4f7fcc4/bin/ugemcutter-QpsTfqS70U/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-11-08 07:55:55,530 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-11-08 07:55:55,530 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-11-08 07:55:55,536 INFO L263 TraceCheckSpWp]: Trace formula consists of 549 conjuncts, 137 conjunts are in the unsatisfiable core [2022-11-08 07:55:55,548 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-08 07:55:55,773 INFO L356 Elim1Store]: treesize reduction 18, result has 35.7 percent of original size [2022-11-08 07:55:55,774 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 21 [2022-11-08 07:55:55,873 INFO L356 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2022-11-08 07:55:55,873 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 11 [2022-11-08 07:55:56,241 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2022-11-08 07:55:56,346 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:55:57,012 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:55:57,417 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:55:58,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:55:58,177 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-08 07:55:58,177 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-08 07:55:58,358 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:55:58,359 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:55:58,901 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2022-11-08 07:55:59,158 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:55:59,159 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:56:00,051 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:56:00,065 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-08 07:56:00,065 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 27 [2022-11-08 07:56:00,219 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:56:00,220 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:56:00,729 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2022-11-08 07:56:00,959 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:56:00,960 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:56:01,852 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:56:01,867 INFO L356 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2022-11-08 07:56:01,868 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 34 treesize of output 27 [2022-11-08 07:56:02,047 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:56:02,048 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:56:02,728 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 15 [2022-11-08 07:56:02,974 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:56:02,975 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 18 [2022-11-08 07:56:03,816 INFO L173 IndexEqualityManager]: detected equality via solver [2022-11-08 07:56:03,831 INFO L356 Elim1Store]: treesize reduction 23, result has 28.1 percent of original size [2022-11-08 07:56:03,831 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 31 treesize of output 27 [2022-11-08 07:56:03,984 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-11-08 07:56:03,985 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2022-11-08 07:56:04,048 INFO L390 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2022-11-08 07:56:04,148 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 97 proven. 189 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-08 07:56:04,148 INFO L328 TraceCheckSpWp]: Computing backward predicates...