./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version e04fb08f Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/config/svcomp-Reach-64bit-Kojak_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 07:53:05,650 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 07:53:05,652 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 07:53:05,689 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 07:53:05,689 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 07:53:05,690 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 07:53:05,692 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 07:53:05,694 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 07:53:05,698 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 07:53:05,704 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 07:53:05,706 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 07:53:05,714 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 07:53:05,715 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 07:53:05,716 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 07:53:05,717 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 07:53:05,718 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 07:53:05,719 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 07:53:05,720 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 07:53:05,722 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 07:53:05,734 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 07:53:05,736 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 07:53:05,740 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 07:53:05,741 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 07:53:05,742 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 07:53:05,746 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 07:53:05,746 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 07:53:05,746 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 07:53:05,747 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 07:53:05,748 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 07:53:05,748 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 07:53:05,749 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 07:53:05,750 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 07:53:05,750 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 07:53:05,751 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 07:53:05,758 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 07:53:05,760 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 07:53:05,760 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 07:53:05,761 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 07:53:05,761 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 07:53:05,762 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 07:53:05,762 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 07:53:05,763 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/config/svcomp-Reach-64bit-Kojak_Default.epf [2022-11-16 07:53:05,799 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 07:53:05,799 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 07:53:05,802 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 07:53:05,803 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ALWAYS [2022-11-16 07:53:05,803 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 07:53:05,804 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 07:53:05,804 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 07:53:05,804 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-16 07:53:05,804 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 07:53:05,805 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 07:53:05,806 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 07:53:05,806 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 07:53:05,806 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 07:53:05,807 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 07:53:05,807 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 07:53:05,807 INFO L136 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2022-11-16 07:53:05,807 INFO L138 SettingsManager]: * Timeout in seconds=1000000 [2022-11-16 07:53:05,807 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 07:53:05,808 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2022-11-16 07:53:05,808 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 07:53:05,808 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 07:53:05,808 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 07:53:05,809 INFO L138 SettingsManager]: * Trace refinement strategy=PENGUIN [2022-11-16 07:53:05,809 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-16 07:53:05,811 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 07:53:05,811 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 [2022-11-16 07:53:06,088 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 07:53:06,119 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 07:53:06,122 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 07:53:06,124 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 07:53:06,125 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 07:53:06,126 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-16 07:53:06,202 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/f2f668be6/fad44ab8bcc947d4add8f485f399d0bd/FLAG50170035d [2022-11-16 07:53:07,085 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 07:53:07,086 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-16 07:53:07,131 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/f2f668be6/fad44ab8bcc947d4add8f485f399d0bd/FLAG50170035d [2022-11-16 07:53:07,555 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/f2f668be6/fad44ab8bcc947d4add8f485f399d0bd [2022-11-16 07:53:07,558 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 07:53:07,560 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 07:53:07,562 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 07:53:07,562 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 07:53:07,566 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 07:53:07,567 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:53:07" (1/1) ... [2022-11-16 07:53:07,568 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1f0551ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:07, skipping insertion in model container [2022-11-16 07:53:07,568 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:53:07" (1/1) ... [2022-11-16 07:53:07,576 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 07:53:07,709 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 07:53:09,266 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-16 07:53:09,324 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 07:53:09,363 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 07:53:09,810 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-16 07:53:09,830 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 07:53:10,145 INFO L208 MainTranslator]: Completed translation [2022-11-16 07:53:10,146 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10 WrapperNode [2022-11-16 07:53:10,146 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 07:53:10,148 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 07:53:10,149 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 07:53:10,149 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 07:53:10,158 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,285 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,476 INFO L138 Inliner]: procedures = 200, calls = 1513, calls flagged for inlining = 98, calls inlined = 84, statements flattened = 3366 [2022-11-16 07:53:10,478 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 07:53:10,479 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 07:53:10,480 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 07:53:10,480 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 07:53:10,491 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,491 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,528 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,529 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,658 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,715 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,738 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,751 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,790 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 07:53:10,791 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 07:53:10,791 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 07:53:10,792 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 07:53:10,793 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:53:10" (1/1) ... [2022-11-16 07:53:10,800 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2022-11-16 07:53:10,817 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 [2022-11-16 07:53:10,837 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) [2022-11-16 07:53:10,868 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Waiting until timeout for monitored process [2022-11-16 07:53:10,890 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-11-16 07:53:10,891 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-11-16 07:53:10,891 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-11-16 07:53:10,891 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-11-16 07:53:10,892 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-11-16 07:53:10,892 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-11-16 07:53:10,893 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2022-11-16 07:53:10,893 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2022-11-16 07:53:10,893 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-11-16 07:53:10,893 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-11-16 07:53:10,893 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2022-11-16 07:53:10,893 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2022-11-16 07:53:10,894 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-11-16 07:53:10,894 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-11-16 07:53:10,894 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2022-11-16 07:53:10,894 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2022-11-16 07:53:10,894 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2022-11-16 07:53:10,894 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_return_value [2022-11-16 07:53:10,895 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2022-11-16 07:53:10,895 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_on [2022-11-16 07:53:10,895 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2022-11-16 07:53:10,895 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2022-11-16 07:53:10,895 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-11-16 07:53:10,895 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-11-16 07:53:10,896 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-11-16 07:53:10,896 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-11-16 07:53:10,896 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-11-16 07:53:10,896 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-11-16 07:53:10,896 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-16 07:53:10,896 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-16 07:53:10,897 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2022-11-16 07:53:10,897 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2022-11-16 07:53:10,897 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2022-11-16 07:53:10,898 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2022-11-16 07:53:10,898 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-11-16 07:53:10,898 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-11-16 07:53:10,898 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_blast_assert [2022-11-16 07:53:10,898 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_blast_assert [2022-11-16 07:53:10,898 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 07:53:10,899 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-11-16 07:53:10,899 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-11-16 07:53:10,899 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-16 07:53:10,899 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2022-11-16 07:53:10,900 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2022-11-16 07:53:10,900 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-11-16 07:53:10,900 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-11-16 07:53:10,900 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2022-11-16 07:53:10,900 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2022-11-16 07:53:10,900 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-11-16 07:53:10,901 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-11-16 07:53:10,901 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_type_trans [2022-11-16 07:53:10,901 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_type_trans [2022-11-16 07:53:10,902 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-11-16 07:53:10,902 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-11-16 07:53:10,902 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2022-11-16 07:53:10,902 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2022-11-16 07:53:10,902 INFO L130 BoogieDeclarations]: Found specification of procedure farsync_type_trans [2022-11-16 07:53:10,902 INFO L138 BoogieDeclarations]: Found implementation of procedure farsync_type_trans [2022-11-16 07:53:10,903 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-11-16 07:53:10,903 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2022-11-16 07:53:10,904 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2022-11-16 07:53:10,904 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-11-16 07:53:10,905 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-11-16 07:53:10,906 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2022-11-16 07:53:10,906 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2022-11-16 07:53:10,906 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-11-16 07:53:10,906 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-11-16 07:53:10,906 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-11-16 07:53:10,907 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-11-16 07:53:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_hdlc [2022-11-16 07:53:10,907 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_hdlc [2022-11-16 07:53:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-11-16 07:53:10,907 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-11-16 07:53:10,907 INFO L130 BoogieDeclarations]: Found specification of procedure fst_issue_cmd [2022-11-16 07:53:10,908 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_issue_cmd [2022-11-16 07:53:10,909 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-11-16 07:53:10,909 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-11-16 07:53:10,909 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-11-16 07:53:10,909 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-11-16 07:53:10,910 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-11-16 07:53:10,910 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2022-11-16 07:53:10,910 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2022-11-16 07:53:10,910 INFO L130 BoogieDeclarations]: Found specification of procedure fst_disable_intr [2022-11-16 07:53:10,910 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_disable_intr [2022-11-16 07:53:10,911 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-16 07:53:10,911 INFO L130 BoogieDeclarations]: Found specification of procedure copy_from_user [2022-11-16 07:53:10,911 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_from_user [2022-11-16 07:53:10,911 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 07:53:10,911 INFO L130 BoogieDeclarations]: Found specification of procedure fst_cpureset [2022-11-16 07:53:10,911 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_cpureset [2022-11-16 07:53:10,912 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-16 07:53:10,912 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_schedule [2022-11-16 07:53:10,912 INFO L138 BoogieDeclarations]: Found implementation of procedure tasklet_schedule [2022-11-16 07:53:10,912 INFO L130 BoogieDeclarations]: Found specification of procedure fst_process_rx_status [2022-11-16 07:53:10,912 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_process_rx_status [2022-11-16 07:53:10,913 INFO L130 BoogieDeclarations]: Found specification of procedure fst_q_work_item [2022-11-16 07:53:10,913 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_q_work_item [2022-11-16 07:53:10,913 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-11-16 07:53:10,913 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-11-16 07:53:10,914 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-11-16 07:53:10,914 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-11-16 07:53:10,915 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2022-11-16 07:53:10,915 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2022-11-16 07:53:10,915 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_ioctl [2022-11-16 07:53:10,916 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_ioctl [2022-11-16 07:53:10,916 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-11-16 07:53:10,916 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-11-16 07:53:10,917 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-11-16 07:53:10,917 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-11-16 07:53:10,917 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-11-16 07:53:10,917 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-11-16 07:53:10,917 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2022-11-16 07:53:10,918 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2022-11-16 07:53:10,918 INFO L130 BoogieDeclarations]: Found specification of procedure fst_clear_intr [2022-11-16 07:53:10,918 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_clear_intr [2022-11-16 07:53:10,918 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-11-16 07:53:10,919 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2022-11-16 07:53:10,919 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2022-11-16 07:53:10,920 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2022-11-16 07:53:10,920 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2022-11-16 07:53:10,920 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2022-11-16 07:53:10,920 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2022-11-16 07:53:10,921 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2022-11-16 07:53:10,922 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2022-11-16 07:53:10,925 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 07:53:10,925 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 07:53:10,925 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-11-16 07:53:10,925 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-11-16 07:53:11,660 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 07:53:11,668 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 07:53:12,555 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:53:12,565 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:53:12,579 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:53:12,584 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:53:12,587 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:53:12,590 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:53:12,602 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:53:15,372 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##415: assume !false; [2022-11-16 07:53:15,373 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##414: assume false; [2022-11-16 07:53:15,373 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##271: assume !false; [2022-11-16 07:53:15,373 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##270: assume false; [2022-11-16 07:53:15,373 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##276: assume false; [2022-11-16 07:53:15,374 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##277: assume !false; [2022-11-16 07:53:15,374 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##225: assume false; [2022-11-16 07:53:15,374 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##226: assume !false; [2022-11-16 07:53:15,374 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##239: assume false; [2022-11-16 07:53:15,374 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##240: assume !false; [2022-11-16 07:53:15,375 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-11-16 07:53:15,375 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-11-16 07:53:15,375 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##104: assume !false;call ULTIMATE.dealloc(fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset);havoc fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset;call ULTIMATE.dealloc(fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset);havoc fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset; [2022-11-16 07:53:15,375 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##103: assume false; [2022-11-16 07:53:15,460 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 07:53:16,420 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 07:53:16,420 INFO L300 CfgBuilder]: Removed 0 assume(true) statements. [2022-11-16 07:53:16,424 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:53:16 BoogieIcfgContainer [2022-11-16 07:53:16,424 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 07:53:16,425 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2022-11-16 07:53:16,425 INFO L271 PluginConnector]: Initializing CodeCheck... [2022-11-16 07:53:16,436 INFO L275 PluginConnector]: CodeCheck initialized [2022-11-16 07:53:16,436 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:53:16" (1/1) ... [2022-11-16 07:53:16,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 07:53:16,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:16,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1176 states to 821 states and 1176 transitions. [2022-11-16 07:53:16,545 INFO L276 IsEmpty]: Start isEmpty. Operand 821 states and 1176 transitions. [2022-11-16 07:53:16,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 07:53:16,550 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:16,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:16,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:17,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:17,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:17,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1175 states to 821 states and 1175 transitions. [2022-11-16 07:53:17,355 INFO L276 IsEmpty]: Start isEmpty. Operand 821 states and 1175 transitions. [2022-11-16 07:53:17,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-11-16 07:53:17,356 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:17,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:17,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:17,630 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:17,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:17,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1177 states to 822 states and 1177 transitions. [2022-11-16 07:53:17,713 INFO L276 IsEmpty]: Start isEmpty. Operand 822 states and 1177 transitions. [2022-11-16 07:53:17,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-11-16 07:53:17,714 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:17,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:17,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:17,922 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:18,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:18,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1186 states to 824 states and 1179 transitions. [2022-11-16 07:53:18,277 INFO L276 IsEmpty]: Start isEmpty. Operand 824 states and 1179 transitions. [2022-11-16 07:53:18,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-11-16 07:53:18,278 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:18,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:18,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:18,478 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:18,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:18,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1206 states to 829 states and 1199 transitions. [2022-11-16 07:53:18,513 INFO L276 IsEmpty]: Start isEmpty. Operand 829 states and 1199 transitions. [2022-11-16 07:53:18,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-11-16 07:53:18,519 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:18,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:18,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:18,704 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:19,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:19,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1230 states to 834 states and 1216 transitions. [2022-11-16 07:53:19,270 INFO L276 IsEmpty]: Start isEmpty. Operand 834 states and 1216 transitions. [2022-11-16 07:53:19,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-16 07:53:19,278 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:19,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:19,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:19,481 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-16 07:53:19,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:19,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1237 states to 838 states and 1223 transitions. [2022-11-16 07:53:19,540 INFO L276 IsEmpty]: Start isEmpty. Operand 838 states and 1223 transitions. [2022-11-16 07:53:19,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-11-16 07:53:19,542 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:19,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:19,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:19,720 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:19,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:19,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1237 states to 839 states and 1223 transitions. [2022-11-16 07:53:19,747 INFO L276 IsEmpty]: Start isEmpty. Operand 839 states and 1223 transitions. [2022-11-16 07:53:19,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-16 07:53:19,754 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:19,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:19,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:20,357 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:20,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:20,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1253 states to 849 states and 1239 transitions. [2022-11-16 07:53:20,491 INFO L276 IsEmpty]: Start isEmpty. Operand 849 states and 1239 transitions. [2022-11-16 07:53:20,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-11-16 07:53:20,494 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:20,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:20,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:20,704 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:21,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:21,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1271 states to 853 states and 1250 transitions. [2022-11-16 07:53:21,511 INFO L276 IsEmpty]: Start isEmpty. Operand 853 states and 1250 transitions. [2022-11-16 07:53:21,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-11-16 07:53:21,513 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:21,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:21,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:22,031 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:22,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:22,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1278 states to 857 states and 1257 transitions. [2022-11-16 07:53:22,212 INFO L276 IsEmpty]: Start isEmpty. Operand 857 states and 1257 transitions. [2022-11-16 07:53:22,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-16 07:53:22,214 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:22,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:22,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:22,359 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-16 07:53:22,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:22,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1285 states to 861 states and 1264 transitions. [2022-11-16 07:53:22,402 INFO L276 IsEmpty]: Start isEmpty. Operand 861 states and 1264 transitions. [2022-11-16 07:53:22,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-11-16 07:53:22,405 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:22,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:22,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:22,514 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:22,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:22,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1298 states to 868 states and 1277 transitions. [2022-11-16 07:53:22,548 INFO L276 IsEmpty]: Start isEmpty. Operand 868 states and 1277 transitions. [2022-11-16 07:53:22,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-11-16 07:53:22,550 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:22,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:22,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:22,640 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-16 07:53:22,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:22,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1301 states to 870 states and 1280 transitions. [2022-11-16 07:53:22,723 INFO L276 IsEmpty]: Start isEmpty. Operand 870 states and 1280 transitions. [2022-11-16 07:53:22,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-11-16 07:53:22,724 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:22,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:22,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:22,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-16 07:53:22,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:22,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1327 states to 874 states and 1306 transitions. [2022-11-16 07:53:22,896 INFO L276 IsEmpty]: Start isEmpty. Operand 874 states and 1306 transitions. [2022-11-16 07:53:22,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-11-16 07:53:22,897 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:22,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:22,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:23,055 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-16 07:53:24,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:24,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1359 states to 884 states and 1331 transitions. [2022-11-16 07:53:24,447 INFO L276 IsEmpty]: Start isEmpty. Operand 884 states and 1331 transitions. [2022-11-16 07:53:24,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-11-16 07:53:24,449 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:24,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:24,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:24,588 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-16 07:53:24,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:24,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1359 states to 885 states and 1331 transitions. [2022-11-16 07:53:24,633 INFO L276 IsEmpty]: Start isEmpty. Operand 885 states and 1331 transitions. [2022-11-16 07:53:24,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-11-16 07:53:24,638 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:24,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:24,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:24,771 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-11-16 07:53:24,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:24,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1368 states to 889 states and 1340 transitions. [2022-11-16 07:53:24,924 INFO L276 IsEmpty]: Start isEmpty. Operand 889 states and 1340 transitions. [2022-11-16 07:53:24,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-11-16 07:53:24,926 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:24,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:24,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:25,078 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2022-11-16 07:53:25,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:25,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1375 states to 893 states and 1347 transitions. [2022-11-16 07:53:25,107 INFO L276 IsEmpty]: Start isEmpty. Operand 893 states and 1347 transitions. [2022-11-16 07:53:25,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-11-16 07:53:25,109 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:25,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:25,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:25,321 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:25,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:25,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1376 states to 894 states and 1348 transitions. [2022-11-16 07:53:25,641 INFO L276 IsEmpty]: Start isEmpty. Operand 894 states and 1348 transitions. [2022-11-16 07:53:25,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-11-16 07:53:25,643 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:25,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:25,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:25,969 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:26,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:26,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1377 states to 895 states and 1349 transitions. [2022-11-16 07:53:26,302 INFO L276 IsEmpty]: Start isEmpty. Operand 895 states and 1349 transitions. [2022-11-16 07:53:26,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-11-16 07:53:26,303 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:26,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:26,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:26,625 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:26,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:26,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1378 states to 896 states and 1350 transitions. [2022-11-16 07:53:26,976 INFO L276 IsEmpty]: Start isEmpty. Operand 896 states and 1350 transitions. [2022-11-16 07:53:26,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-11-16 07:53:26,977 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:26,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:27,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:27,281 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:27,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:27,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1379 states to 897 states and 1351 transitions. [2022-11-16 07:53:27,643 INFO L276 IsEmpty]: Start isEmpty. Operand 897 states and 1351 transitions. [2022-11-16 07:53:27,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-11-16 07:53:27,645 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:27,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:27,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:27,996 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:28,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:28,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1380 states to 898 states and 1352 transitions. [2022-11-16 07:53:28,434 INFO L276 IsEmpty]: Start isEmpty. Operand 898 states and 1352 transitions. [2022-11-16 07:53:28,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-11-16 07:53:28,435 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:28,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:28,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:28,795 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:29,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:29,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1381 states to 899 states and 1353 transitions. [2022-11-16 07:53:29,138 INFO L276 IsEmpty]: Start isEmpty. Operand 899 states and 1353 transitions. [2022-11-16 07:53:29,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-11-16 07:53:29,140 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:29,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:29,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:29,482 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:29,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:29,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1382 states to 900 states and 1354 transitions. [2022-11-16 07:53:29,838 INFO L276 IsEmpty]: Start isEmpty. Operand 900 states and 1354 transitions. [2022-11-16 07:53:29,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-11-16 07:53:29,839 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:29,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:29,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:30,264 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:30,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:30,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1383 states to 901 states and 1355 transitions. [2022-11-16 07:53:30,623 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1355 transitions. [2022-11-16 07:53:30,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-11-16 07:53:30,630 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:30,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:30,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:31,067 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:31,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:31,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1384 states to 902 states and 1356 transitions. [2022-11-16 07:53:31,517 INFO L276 IsEmpty]: Start isEmpty. Operand 902 states and 1356 transitions. [2022-11-16 07:53:31,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-11-16 07:53:31,519 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:31,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:31,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:32,083 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:32,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:32,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1385 states to 903 states and 1357 transitions. [2022-11-16 07:53:32,600 INFO L276 IsEmpty]: Start isEmpty. Operand 903 states and 1357 transitions. [2022-11-16 07:53:32,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-11-16 07:53:32,605 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:32,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:32,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:33,142 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:33,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:33,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1386 states to 904 states and 1358 transitions. [2022-11-16 07:53:33,684 INFO L276 IsEmpty]: Start isEmpty. Operand 904 states and 1358 transitions. [2022-11-16 07:53:33,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-11-16 07:53:33,686 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:33,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:33,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:34,294 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:34,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:34,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1387 states to 905 states and 1359 transitions. [2022-11-16 07:53:34,848 INFO L276 IsEmpty]: Start isEmpty. Operand 905 states and 1359 transitions. [2022-11-16 07:53:34,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-11-16 07:53:34,849 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:34,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:34,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:35,393 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:35,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:35,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1388 states to 906 states and 1360 transitions. [2022-11-16 07:53:35,914 INFO L276 IsEmpty]: Start isEmpty. Operand 906 states and 1360 transitions. [2022-11-16 07:53:35,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-11-16 07:53:35,916 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:35,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:35,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:36,522 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:37,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:37,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1389 states to 907 states and 1361 transitions. [2022-11-16 07:53:37,108 INFO L276 IsEmpty]: Start isEmpty. Operand 907 states and 1361 transitions. [2022-11-16 07:53:37,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-11-16 07:53:37,110 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:37,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:37,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:37,717 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:38,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:38,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1390 states to 908 states and 1362 transitions. [2022-11-16 07:53:38,281 INFO L276 IsEmpty]: Start isEmpty. Operand 908 states and 1362 transitions. [2022-11-16 07:53:38,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-11-16 07:53:38,282 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:38,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:38,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:38,994 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:39,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:39,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1391 states to 909 states and 1363 transitions. [2022-11-16 07:53:39,583 INFO L276 IsEmpty]: Start isEmpty. Operand 909 states and 1363 transitions. [2022-11-16 07:53:39,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-11-16 07:53:39,585 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:39,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:39,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:40,333 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:40,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:40,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1392 states to 910 states and 1364 transitions. [2022-11-16 07:53:40,932 INFO L276 IsEmpty]: Start isEmpty. Operand 910 states and 1364 transitions. [2022-11-16 07:53:40,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-11-16 07:53:40,933 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:40,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:41,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:41,806 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:42,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:42,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1393 states to 911 states and 1365 transitions. [2022-11-16 07:53:42,451 INFO L276 IsEmpty]: Start isEmpty. Operand 911 states and 1365 transitions. [2022-11-16 07:53:42,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-11-16 07:53:42,453 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:42,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:42,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:43,178 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:43,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:43,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1394 states to 912 states and 1366 transitions. [2022-11-16 07:53:43,770 INFO L276 IsEmpty]: Start isEmpty. Operand 912 states and 1366 transitions. [2022-11-16 07:53:43,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-11-16 07:53:43,776 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:43,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:43,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:44,563 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:45,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:45,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1395 states to 913 states and 1367 transitions. [2022-11-16 07:53:45,216 INFO L276 IsEmpty]: Start isEmpty. Operand 913 states and 1367 transitions. [2022-11-16 07:53:45,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-11-16 07:53:45,217 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:45,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:45,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:45,979 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:46,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:46,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1396 states to 914 states and 1368 transitions. [2022-11-16 07:53:46,600 INFO L276 IsEmpty]: Start isEmpty. Operand 914 states and 1368 transitions. [2022-11-16 07:53:46,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-11-16 07:53:46,602 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:46,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:46,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:47,345 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:47,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:47,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1397 states to 915 states and 1369 transitions. [2022-11-16 07:53:47,946 INFO L276 IsEmpty]: Start isEmpty. Operand 915 states and 1369 transitions. [2022-11-16 07:53:47,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2022-11-16 07:53:47,947 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:47,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:48,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:48,745 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:49,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:49,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1398 states to 916 states and 1370 transitions. [2022-11-16 07:53:49,336 INFO L276 IsEmpty]: Start isEmpty. Operand 916 states and 1370 transitions. [2022-11-16 07:53:49,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-11-16 07:53:49,338 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:49,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:49,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:50,110 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:50,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:50,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1399 states to 917 states and 1371 transitions. [2022-11-16 07:53:50,705 INFO L276 IsEmpty]: Start isEmpty. Operand 917 states and 1371 transitions. [2022-11-16 07:53:50,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-11-16 07:53:50,707 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:50,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:50,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:51,553 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:52,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:52,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1400 states to 918 states and 1372 transitions. [2022-11-16 07:53:52,132 INFO L276 IsEmpty]: Start isEmpty. Operand 918 states and 1372 transitions. [2022-11-16 07:53:52,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-11-16 07:53:52,134 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:52,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:52,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:52,822 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:53,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:53,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1401 states to 919 states and 1373 transitions. [2022-11-16 07:53:53,405 INFO L276 IsEmpty]: Start isEmpty. Operand 919 states and 1373 transitions. [2022-11-16 07:53:53,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2022-11-16 07:53:53,407 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:53,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:53,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:54,169 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:54,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:54,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1402 states to 920 states and 1374 transitions. [2022-11-16 07:53:54,779 INFO L276 IsEmpty]: Start isEmpty. Operand 920 states and 1374 transitions. [2022-11-16 07:53:54,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-11-16 07:53:54,781 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:54,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:54,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:55,530 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:56,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:56,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1403 states to 921 states and 1375 transitions. [2022-11-16 07:53:56,141 INFO L276 IsEmpty]: Start isEmpty. Operand 921 states and 1375 transitions. [2022-11-16 07:53:56,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-11-16 07:53:56,143 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:56,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:56,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:56,930 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:57,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:57,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1404 states to 922 states and 1376 transitions. [2022-11-16 07:53:57,584 INFO L276 IsEmpty]: Start isEmpty. Operand 922 states and 1376 transitions. [2022-11-16 07:53:57,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-11-16 07:53:57,586 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:57,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:57,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:53:58,465 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-16 07:53:59,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:53:59,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1404 states to 923 states and 1376 transitions. [2022-11-16 07:53:59,120 INFO L276 IsEmpty]: Start isEmpty. Operand 923 states and 1376 transitions. [2022-11-16 07:53:59,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-16 07:53:59,122 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:53:59,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:53:59,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:01,457 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:04,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:04,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1415 states to 926 states and 1384 transitions. [2022-11-16 07:54:04,838 INFO L276 IsEmpty]: Start isEmpty. Operand 926 states and 1384 transitions. [2022-11-16 07:54:04,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-11-16 07:54:04,840 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:04,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:04,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:05,037 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:05,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:05,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1443 states to 930 states and 1412 transitions. [2022-11-16 07:54:05,101 INFO L276 IsEmpty]: Start isEmpty. Operand 930 states and 1412 transitions. [2022-11-16 07:54:05,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-11-16 07:54:05,103 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:05,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:05,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:05,245 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:05,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:05,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 931 states and 1413 transitions. [2022-11-16 07:54:05,274 INFO L276 IsEmpty]: Start isEmpty. Operand 931 states and 1413 transitions. [2022-11-16 07:54:05,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-11-16 07:54:05,276 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:05,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:05,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:05,436 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:05,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:05,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1449 states to 934 states and 1418 transitions. [2022-11-16 07:54:05,467 INFO L276 IsEmpty]: Start isEmpty. Operand 934 states and 1418 transitions. [2022-11-16 07:54:05,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-16 07:54:05,468 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:05,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:05,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:05,652 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:06,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:06,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1471 states to 943 states and 1440 transitions. [2022-11-16 07:54:06,294 INFO L276 IsEmpty]: Start isEmpty. Operand 943 states and 1440 transitions. [2022-11-16 07:54:06,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2022-11-16 07:54:06,296 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:06,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:06,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:06,856 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:08,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:08,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1476 states to 946 states and 1445 transitions. [2022-11-16 07:54:08,405 INFO L276 IsEmpty]: Start isEmpty. Operand 946 states and 1445 transitions. [2022-11-16 07:54:08,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-11-16 07:54:08,407 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:08,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:08,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:09,464 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:12,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:12,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1489 states to 952 states and 1455 transitions. [2022-11-16 07:54:12,398 INFO L276 IsEmpty]: Start isEmpty. Operand 952 states and 1455 transitions. [2022-11-16 07:54:12,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-16 07:54:12,400 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:12,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:12,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:12,556 INFO L134 CoverageAnalysis]: Checked inductivity of 533 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 533 trivial. 0 not checked. [2022-11-16 07:54:12,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:12,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1489 states to 953 states and 1455 transitions. [2022-11-16 07:54:12,586 INFO L276 IsEmpty]: Start isEmpty. Operand 953 states and 1455 transitions. [2022-11-16 07:54:12,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-16 07:54:12,588 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:12,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:12,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:12,745 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:12,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:12,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1515 states to 957 states and 1481 transitions. [2022-11-16 07:54:12,807 INFO L276 IsEmpty]: Start isEmpty. Operand 957 states and 1481 transitions. [2022-11-16 07:54:12,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2022-11-16 07:54:12,810 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:12,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:12,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:12,974 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:13,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:13,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1521 states to 961 states and 1487 transitions. [2022-11-16 07:54:13,014 INFO L276 IsEmpty]: Start isEmpty. Operand 961 states and 1487 transitions. [2022-11-16 07:54:13,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-11-16 07:54:13,016 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:13,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:13,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:13,182 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:13,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:13,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1527 states to 964 states and 1493 transitions. [2022-11-16 07:54:13,214 INFO L276 IsEmpty]: Start isEmpty. Operand 964 states and 1493 transitions. [2022-11-16 07:54:13,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-16 07:54:13,216 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:13,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:13,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:13,945 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:15,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:15,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1532 states to 967 states and 1498 transitions. [2022-11-16 07:54:15,172 INFO L276 IsEmpty]: Start isEmpty. Operand 967 states and 1498 transitions. [2022-11-16 07:54:15,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-11-16 07:54:15,174 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:15,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:15,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:15,349 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:15,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:15,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1539 states to 971 states and 1505 transitions. [2022-11-16 07:54:15,385 INFO L276 IsEmpty]: Start isEmpty. Operand 971 states and 1505 transitions. [2022-11-16 07:54:15,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-16 07:54:15,387 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:15,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:15,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:15,544 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:15,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:15,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1543 states to 974 states and 1509 transitions. [2022-11-16 07:54:15,579 INFO L276 IsEmpty]: Start isEmpty. Operand 974 states and 1509 transitions. [2022-11-16 07:54:15,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-11-16 07:54:15,580 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:15,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:15,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:15,750 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:15,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:15,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1549 states to 977 states and 1515 transitions. [2022-11-16 07:54:15,804 INFO L276 IsEmpty]: Start isEmpty. Operand 977 states and 1515 transitions. [2022-11-16 07:54:15,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-11-16 07:54:15,806 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:15,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:15,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:15,964 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:15,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:16,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1556 states to 981 states and 1522 transitions. [2022-11-16 07:54:16,000 INFO L276 IsEmpty]: Start isEmpty. Operand 981 states and 1522 transitions. [2022-11-16 07:54:16,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-16 07:54:16,002 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:16,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:16,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:16,168 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:16,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:16,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1557 states to 982 states and 1523 transitions. [2022-11-16 07:54:16,197 INFO L276 IsEmpty]: Start isEmpty. Operand 982 states and 1523 transitions. [2022-11-16 07:54:16,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-16 07:54:16,199 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:16,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:16,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:16,355 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:54:16,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:16,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1558 states to 983 states and 1524 transitions. [2022-11-16 07:54:16,437 INFO L276 IsEmpty]: Start isEmpty. Operand 983 states and 1524 transitions. [2022-11-16 07:54:16,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-11-16 07:54:16,440 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:16,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:16,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:16,641 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:16,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:16,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1562 states to 986 states and 1528 transitions. [2022-11-16 07:54:16,688 INFO L276 IsEmpty]: Start isEmpty. Operand 986 states and 1528 transitions. [2022-11-16 07:54:16,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-16 07:54:16,690 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:16,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:16,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:16,889 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:16,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:16,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1567 states to 989 states and 1533 transitions. [2022-11-16 07:54:16,938 INFO L276 IsEmpty]: Start isEmpty. Operand 989 states and 1533 transitions. [2022-11-16 07:54:16,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-16 07:54:16,941 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:16,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:17,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:17,146 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:17,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:17,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1583 states to 993 states and 1549 transitions. [2022-11-16 07:54:17,185 INFO L276 IsEmpty]: Start isEmpty. Operand 993 states and 1549 transitions. [2022-11-16 07:54:17,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2022-11-16 07:54:17,187 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:17,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:17,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:17,337 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:17,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:17,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1590 states to 997 states and 1556 transitions. [2022-11-16 07:54:17,375 INFO L276 IsEmpty]: Start isEmpty. Operand 997 states and 1556 transitions. [2022-11-16 07:54:17,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-16 07:54:17,377 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:17,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:17,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:17,760 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:20,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:20,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1630 states to 1008 states and 1589 transitions. [2022-11-16 07:54:20,715 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 1589 transitions. [2022-11-16 07:54:20,717 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-11-16 07:54:20,718 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:20,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:20,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:20,998 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:21,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:21,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1631 states to 1008 states and 1588 transitions. [2022-11-16 07:54:21,040 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 1588 transitions. [2022-11-16 07:54:21,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-11-16 07:54:21,042 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:21,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:21,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:21,201 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:21,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:21,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1657 states to 1012 states and 1614 transitions. [2022-11-16 07:54:21,267 INFO L276 IsEmpty]: Start isEmpty. Operand 1012 states and 1614 transitions. [2022-11-16 07:54:21,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-11-16 07:54:21,269 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:21,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:21,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:21,424 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:21,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:21,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1663 states to 1016 states and 1620 transitions. [2022-11-16 07:54:21,468 INFO L276 IsEmpty]: Start isEmpty. Operand 1016 states and 1620 transitions. [2022-11-16 07:54:21,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-11-16 07:54:21,471 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:21,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:21,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:21,629 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:21,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:21,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1664 states to 1017 states and 1621 transitions. [2022-11-16 07:54:21,660 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 1621 transitions. [2022-11-16 07:54:21,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2022-11-16 07:54:21,662 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:21,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:21,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:21,812 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:21,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:21,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1670 states to 1020 states and 1627 transitions. [2022-11-16 07:54:21,847 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1627 transitions. [2022-11-16 07:54:21,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-11-16 07:54:21,850 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:21,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:21,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:22,011 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:22,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:22,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1678 states to 1026 states and 1635 transitions. [2022-11-16 07:54:22,065 INFO L276 IsEmpty]: Start isEmpty. Operand 1026 states and 1635 transitions. [2022-11-16 07:54:22,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-11-16 07:54:22,067 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:22,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:22,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:22,215 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:22,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:22,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1683 states to 1029 states and 1640 transitions. [2022-11-16 07:54:22,253 INFO L276 IsEmpty]: Start isEmpty. Operand 1029 states and 1640 transitions. [2022-11-16 07:54:22,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2022-11-16 07:54:22,256 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:22,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:22,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:22,415 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:22,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:22,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1684 states to 1030 states and 1641 transitions. [2022-11-16 07:54:22,444 INFO L276 IsEmpty]: Start isEmpty. Operand 1030 states and 1641 transitions. [2022-11-16 07:54:22,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-11-16 07:54:22,446 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:22,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:22,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:22,588 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:22,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:22,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1691 states to 1034 states and 1648 transitions. [2022-11-16 07:54:22,633 INFO L276 IsEmpty]: Start isEmpty. Operand 1034 states and 1648 transitions. [2022-11-16 07:54:22,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-11-16 07:54:22,635 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:22,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:22,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:22,788 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 528 trivial. 0 not checked. [2022-11-16 07:54:22,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:22,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1697 states to 1038 states and 1654 transitions. [2022-11-16 07:54:22,826 INFO L276 IsEmpty]: Start isEmpty. Operand 1038 states and 1654 transitions. [2022-11-16 07:54:22,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-16 07:54:22,828 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:22,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:22,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:23,062 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:23,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:23,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1703 states to 1042 states and 1660 transitions. [2022-11-16 07:54:23,107 INFO L276 IsEmpty]: Start isEmpty. Operand 1042 states and 1660 transitions. [2022-11-16 07:54:23,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-16 07:54:23,109 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:23,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:23,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:23,264 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:23,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:23,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1707 states to 1045 states and 1664 transitions. [2022-11-16 07:54:23,305 INFO L276 IsEmpty]: Start isEmpty. Operand 1045 states and 1664 transitions. [2022-11-16 07:54:23,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-11-16 07:54:23,307 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:23,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:23,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:23,476 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:23,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:23,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1708 states to 1046 states and 1665 transitions. [2022-11-16 07:54:23,508 INFO L276 IsEmpty]: Start isEmpty. Operand 1046 states and 1665 transitions. [2022-11-16 07:54:23,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-11-16 07:54:23,510 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:23,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:23,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:23,675 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:23,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:23,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1714 states to 1049 states and 1671 transitions. [2022-11-16 07:54:23,730 INFO L276 IsEmpty]: Start isEmpty. Operand 1049 states and 1671 transitions. [2022-11-16 07:54:23,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2022-11-16 07:54:23,732 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:23,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:23,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:23,879 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:23,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:23,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1720 states to 1052 states and 1677 transitions. [2022-11-16 07:54:23,914 INFO L276 IsEmpty]: Start isEmpty. Operand 1052 states and 1677 transitions. [2022-11-16 07:54:23,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-11-16 07:54:23,916 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:23,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:23,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:24,073 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:24,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:24,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1724 states to 1055 states and 1681 transitions. [2022-11-16 07:54:24,120 INFO L276 IsEmpty]: Start isEmpty. Operand 1055 states and 1681 transitions. [2022-11-16 07:54:24,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-11-16 07:54:24,122 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:24,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:24,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:24,275 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:24,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:24,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1728 states to 1058 states and 1685 transitions. [2022-11-16 07:54:24,307 INFO L276 IsEmpty]: Start isEmpty. Operand 1058 states and 1685 transitions. [2022-11-16 07:54:24,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-11-16 07:54:24,309 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:24,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:24,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:24,465 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:24,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:24,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1730 states to 1060 states and 1687 transitions. [2022-11-16 07:54:24,506 INFO L276 IsEmpty]: Start isEmpty. Operand 1060 states and 1687 transitions. [2022-11-16 07:54:24,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-16 07:54:24,507 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:24,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:24,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:24,662 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:24,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:24,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1731 states to 1061 states and 1688 transitions. [2022-11-16 07:54:24,694 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1688 transitions. [2022-11-16 07:54:24,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-16 07:54:24,696 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:24,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:24,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:24,930 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:24,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:24,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1734 states to 1064 states and 1691 transitions. [2022-11-16 07:54:24,968 INFO L276 IsEmpty]: Start isEmpty. Operand 1064 states and 1691 transitions. [2022-11-16 07:54:24,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2022-11-16 07:54:24,970 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:24,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:25,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:25,135 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:25,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:25,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1735 states to 1065 states and 1692 transitions. [2022-11-16 07:54:25,167 INFO L276 IsEmpty]: Start isEmpty. Operand 1065 states and 1692 transitions. [2022-11-16 07:54:25,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2022-11-16 07:54:25,169 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:25,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:25,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:25,314 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:25,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:25,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1736 states to 1066 states and 1693 transitions. [2022-11-16 07:54:25,347 INFO L276 IsEmpty]: Start isEmpty. Operand 1066 states and 1693 transitions. [2022-11-16 07:54:25,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-11-16 07:54:25,349 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:25,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:25,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:25,495 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:25,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:25,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1743 states to 1070 states and 1700 transitions. [2022-11-16 07:54:25,536 INFO L276 IsEmpty]: Start isEmpty. Operand 1070 states and 1700 transitions. [2022-11-16 07:54:25,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2022-11-16 07:54:25,538 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:25,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:25,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:26,149 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:27,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:27,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1073 states and 1706 transitions. [2022-11-16 07:54:27,801 INFO L276 IsEmpty]: Start isEmpty. Operand 1073 states and 1706 transitions. [2022-11-16 07:54:27,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-11-16 07:54:27,803 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:27,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:27,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:27,917 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 533 trivial. 0 not checked. [2022-11-16 07:54:28,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:28,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1761 states to 1076 states and 1717 transitions. [2022-11-16 07:54:28,218 INFO L276 IsEmpty]: Start isEmpty. Operand 1076 states and 1717 transitions. [2022-11-16 07:54:28,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-11-16 07:54:28,220 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:28,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:28,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:28,378 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:28,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:28,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1776 states to 1083 states and 1732 transitions. [2022-11-16 07:54:28,415 INFO L276 IsEmpty]: Start isEmpty. Operand 1083 states and 1732 transitions. [2022-11-16 07:54:28,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-11-16 07:54:28,417 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:28,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:28,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:28,645 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:28,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:28,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1777 states to 1084 states and 1733 transitions. [2022-11-16 07:54:28,677 INFO L276 IsEmpty]: Start isEmpty. Operand 1084 states and 1733 transitions. [2022-11-16 07:54:28,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2022-11-16 07:54:28,679 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:28,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:28,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:28,842 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:28,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:28,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1784 states to 1088 states and 1740 transitions. [2022-11-16 07:54:28,884 INFO L276 IsEmpty]: Start isEmpty. Operand 1088 states and 1740 transitions. [2022-11-16 07:54:28,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-11-16 07:54:28,888 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:28,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:28,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:29,072 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:31,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:31,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1822 states to 1098 states and 1773 transitions. [2022-11-16 07:54:31,784 INFO L276 IsEmpty]: Start isEmpty. Operand 1098 states and 1773 transitions. [2022-11-16 07:54:31,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-11-16 07:54:31,785 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:31,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:31,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:31,935 INFO L134 CoverageAnalysis]: Checked inductivity of 539 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:31,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:31,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1826 states to 1101 states and 1777 transitions. [2022-11-16 07:54:31,968 INFO L276 IsEmpty]: Start isEmpty. Operand 1101 states and 1777 transitions. [2022-11-16 07:54:31,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2022-11-16 07:54:31,970 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:31,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:32,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:32,108 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 537 trivial. 0 not checked. [2022-11-16 07:54:32,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:32,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1828 states to 1103 states and 1779 transitions. [2022-11-16 07:54:32,146 INFO L276 IsEmpty]: Start isEmpty. Operand 1103 states and 1779 transitions. [2022-11-16 07:54:32,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2022-11-16 07:54:32,147 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:32,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:32,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:32,319 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:32,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:32,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1831 states to 1105 states and 1782 transitions. [2022-11-16 07:54:32,357 INFO L276 IsEmpty]: Start isEmpty. Operand 1105 states and 1782 transitions. [2022-11-16 07:54:32,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-11-16 07:54:32,359 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:32,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:32,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:32,636 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:32,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:32,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1835 states to 1108 states and 1786 transitions. [2022-11-16 07:54:32,684 INFO L276 IsEmpty]: Start isEmpty. Operand 1108 states and 1786 transitions. [2022-11-16 07:54:32,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-11-16 07:54:32,687 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:32,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:32,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:32,899 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:32,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:32,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1836 states to 1109 states and 1787 transitions. [2022-11-16 07:54:32,945 INFO L276 IsEmpty]: Start isEmpty. Operand 1109 states and 1787 transitions. [2022-11-16 07:54:32,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-11-16 07:54:32,948 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:32,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:33,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:33,162 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:33,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:33,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1841 states to 1112 states and 1792 transitions. [2022-11-16 07:54:33,218 INFO L276 IsEmpty]: Start isEmpty. Operand 1112 states and 1792 transitions. [2022-11-16 07:54:33,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2022-11-16 07:54:33,221 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:33,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:33,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:33,432 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:33,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:33,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1847 states to 1115 states and 1798 transitions. [2022-11-16 07:54:33,484 INFO L276 IsEmpty]: Start isEmpty. Operand 1115 states and 1798 transitions. [2022-11-16 07:54:33,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2022-11-16 07:54:33,485 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:33,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:33,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:33,647 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:33,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:33,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1853 states to 1119 states and 1804 transitions. [2022-11-16 07:54:33,697 INFO L276 IsEmpty]: Start isEmpty. Operand 1119 states and 1804 transitions. [2022-11-16 07:54:33,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2022-11-16 07:54:33,699 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:33,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:33,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:33,867 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:33,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:33,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1855 states to 1121 states and 1806 transitions. [2022-11-16 07:54:33,897 INFO L276 IsEmpty]: Start isEmpty. Operand 1121 states and 1806 transitions. [2022-11-16 07:54:33,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2022-11-16 07:54:33,898 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:33,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:33,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:34,031 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:34,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:34,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1856 states to 1122 states and 1807 transitions. [2022-11-16 07:54:34,054 INFO L276 IsEmpty]: Start isEmpty. Operand 1122 states and 1807 transitions. [2022-11-16 07:54:34,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2022-11-16 07:54:34,056 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:34,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:34,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:34,177 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:34,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:34,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1862 states to 1125 states and 1813 transitions. [2022-11-16 07:54:34,207 INFO L276 IsEmpty]: Start isEmpty. Operand 1125 states and 1813 transitions. [2022-11-16 07:54:34,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-11-16 07:54:34,209 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:34,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:34,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:34,369 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:34,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:34,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1871 states to 1129 states and 1822 transitions. [2022-11-16 07:54:34,408 INFO L276 IsEmpty]: Start isEmpty. Operand 1129 states and 1822 transitions. [2022-11-16 07:54:34,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-11-16 07:54:34,410 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:34,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:34,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:34,559 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:39,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:39,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1921 states to 1148 states and 1869 transitions. [2022-11-16 07:54:39,929 INFO L276 IsEmpty]: Start isEmpty. Operand 1148 states and 1869 transitions. [2022-11-16 07:54:39,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2022-11-16 07:54:39,930 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:39,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:40,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:40,090 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:40,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:40,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1974 states to 1157 states and 1921 transitions. [2022-11-16 07:54:40,911 INFO L276 IsEmpty]: Start isEmpty. Operand 1157 states and 1921 transitions. [2022-11-16 07:54:40,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2022-11-16 07:54:40,913 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:40,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:40,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:41,074 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:41,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:41,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1978 states to 1160 states and 1925 transitions. [2022-11-16 07:54:41,111 INFO L276 IsEmpty]: Start isEmpty. Operand 1160 states and 1925 transitions. [2022-11-16 07:54:41,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2022-11-16 07:54:41,113 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:41,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:41,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:41,275 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:41,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:41,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1980 states to 1162 states and 1927 transitions. [2022-11-16 07:54:41,309 INFO L276 IsEmpty]: Start isEmpty. Operand 1162 states and 1927 transitions. [2022-11-16 07:54:41,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-11-16 07:54:41,311 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:41,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:41,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:41,449 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:41,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:41,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1991 states to 1168 states and 1938 transitions. [2022-11-16 07:54:41,487 INFO L276 IsEmpty]: Start isEmpty. Operand 1168 states and 1938 transitions. [2022-11-16 07:54:41,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-11-16 07:54:41,489 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:41,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:41,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:41,605 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:54:41,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:41,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1998 states to 1172 states and 1945 transitions. [2022-11-16 07:54:41,641 INFO L276 IsEmpty]: Start isEmpty. Operand 1172 states and 1945 transitions. [2022-11-16 07:54:41,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2022-11-16 07:54:41,643 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:41,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:41,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:41,768 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:41,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:41,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2020 states to 1184 states and 1967 transitions. [2022-11-16 07:54:41,899 INFO L276 IsEmpty]: Start isEmpty. Operand 1184 states and 1967 transitions. [2022-11-16 07:54:41,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-11-16 07:54:41,901 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:41,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:41,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:42,061 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:43,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:43,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2048 states to 1194 states and 1994 transitions. [2022-11-16 07:54:43,778 INFO L276 IsEmpty]: Start isEmpty. Operand 1194 states and 1994 transitions. [2022-11-16 07:54:43,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2022-11-16 07:54:43,779 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:43,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:43,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:43,930 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:43,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:43,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2048 states to 1195 states and 1994 transitions. [2022-11-16 07:54:43,975 INFO L276 IsEmpty]: Start isEmpty. Operand 1195 states and 1994 transitions. [2022-11-16 07:54:43,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2022-11-16 07:54:43,977 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:43,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:44,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:44,138 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:44,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:44,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2052 states to 1198 states and 1998 transitions. [2022-11-16 07:54:44,187 INFO L276 IsEmpty]: Start isEmpty. Operand 1198 states and 1998 transitions. [2022-11-16 07:54:44,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-11-16 07:54:44,189 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:44,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:44,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:44,351 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:44,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:44,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2053 states to 1199 states and 1999 transitions. [2022-11-16 07:54:44,386 INFO L276 IsEmpty]: Start isEmpty. Operand 1199 states and 1999 transitions. [2022-11-16 07:54:44,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2022-11-16 07:54:44,388 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:44,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:44,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:44,538 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:44,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:44,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2054 states to 1200 states and 2000 transitions. [2022-11-16 07:54:44,569 INFO L276 IsEmpty]: Start isEmpty. Operand 1200 states and 2000 transitions. [2022-11-16 07:54:44,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-11-16 07:54:44,571 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:44,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:44,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:44,745 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:44,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:44,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2060 states to 1203 states and 2006 transitions. [2022-11-16 07:54:44,808 INFO L276 IsEmpty]: Start isEmpty. Operand 1203 states and 2006 transitions. [2022-11-16 07:54:44,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-16 07:54:44,809 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:44,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:44,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:44,973 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:45,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:45,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2060 states to 1204 states and 2006 transitions. [2022-11-16 07:54:45,012 INFO L276 IsEmpty]: Start isEmpty. Operand 1204 states and 2006 transitions. [2022-11-16 07:54:45,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-11-16 07:54:45,014 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:45,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:45,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:45,174 INFO L134 CoverageAnalysis]: Checked inductivity of 547 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 535 trivial. 0 not checked. [2022-11-16 07:54:45,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:45,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2062 states to 1206 states and 2008 transitions. [2022-11-16 07:54:45,223 INFO L276 IsEmpty]: Start isEmpty. Operand 1206 states and 2008 transitions. [2022-11-16 07:54:45,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-16 07:54:45,225 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:45,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:45,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:45,511 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:45,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:45,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2088 states to 1210 states and 2034 transitions. [2022-11-16 07:54:45,579 INFO L276 IsEmpty]: Start isEmpty. Operand 1210 states and 2034 transitions. [2022-11-16 07:54:45,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-16 07:54:45,581 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:45,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:45,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:45,737 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:54:45,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:45,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2098 states to 1216 states and 2044 transitions. [2022-11-16 07:54:45,794 INFO L276 IsEmpty]: Start isEmpty. Operand 1216 states and 2044 transitions. [2022-11-16 07:54:45,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-16 07:54:45,796 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:45,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:45,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:45,952 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:54:45,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:45,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2099 states to 1217 states and 2045 transitions. [2022-11-16 07:54:45,988 INFO L276 IsEmpty]: Start isEmpty. Operand 1217 states and 2045 transitions. [2022-11-16 07:54:45,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2022-11-16 07:54:45,990 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:45,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:46,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:46,148 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:46,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:46,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2100 states to 1218 states and 2046 transitions. [2022-11-16 07:54:46,186 INFO L276 IsEmpty]: Start isEmpty. Operand 1218 states and 2046 transitions. [2022-11-16 07:54:46,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2022-11-16 07:54:46,188 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:46,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:46,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:46,356 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:46,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:46,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2101 states to 1219 states and 2047 transitions. [2022-11-16 07:54:46,394 INFO L276 IsEmpty]: Start isEmpty. Operand 1219 states and 2047 transitions. [2022-11-16 07:54:46,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-11-16 07:54:46,396 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:46,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:46,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:46,566 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:46,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:46,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2109 states to 1225 states and 2055 transitions. [2022-11-16 07:54:46,632 INFO L276 IsEmpty]: Start isEmpty. Operand 1225 states and 2055 transitions. [2022-11-16 07:54:46,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-16 07:54:46,633 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:46,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:46,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:46,775 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:46,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:46,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2115 states to 1229 states and 2061 transitions. [2022-11-16 07:54:46,805 INFO L276 IsEmpty]: Start isEmpty. Operand 1229 states and 2061 transitions. [2022-11-16 07:54:46,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-11-16 07:54:46,806 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:46,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:46,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:46,955 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:52,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:52,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2162 states to 1245 states and 2105 transitions. [2022-11-16 07:54:52,358 INFO L276 IsEmpty]: Start isEmpty. Operand 1245 states and 2105 transitions. [2022-11-16 07:54:52,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-11-16 07:54:52,360 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:52,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:52,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:52,518 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:53,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:53,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2169 states to 1249 states and 2112 transitions. [2022-11-16 07:54:53,111 INFO L276 IsEmpty]: Start isEmpty. Operand 1249 states and 2112 transitions. [2022-11-16 07:54:53,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-11-16 07:54:53,113 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:53,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:53,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:53,235 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:53,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:53,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2223 states to 1258 states and 2165 transitions. [2022-11-16 07:54:53,854 INFO L276 IsEmpty]: Start isEmpty. Operand 1258 states and 2165 transitions. [2022-11-16 07:54:53,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2022-11-16 07:54:53,856 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:53,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:53,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:54,002 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:54,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:54,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2224 states to 1259 states and 2166 transitions. [2022-11-16 07:54:54,039 INFO L276 IsEmpty]: Start isEmpty. Operand 1259 states and 2166 transitions. [2022-11-16 07:54:54,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-11-16 07:54:54,041 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:54,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:54,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:54,200 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:54,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:54,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2225 states to 1260 states and 2167 transitions. [2022-11-16 07:54:54,238 INFO L276 IsEmpty]: Start isEmpty. Operand 1260 states and 2167 transitions. [2022-11-16 07:54:54,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-16 07:54:54,239 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:54,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:54,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:54,394 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:54,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:54,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2230 states to 1263 states and 2172 transitions. [2022-11-16 07:54:54,441 INFO L276 IsEmpty]: Start isEmpty. Operand 1263 states and 2172 transitions. [2022-11-16 07:54:54,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:54:54,443 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:54,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:54,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:54,593 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:54,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:54,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2235 states to 1266 states and 2177 transitions. [2022-11-16 07:54:54,725 INFO L276 IsEmpty]: Start isEmpty. Operand 1266 states and 2177 transitions. [2022-11-16 07:54:54,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:54:54,727 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:54,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:54,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:54,906 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:54,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:54,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2237 states to 1268 states and 2179 transitions. [2022-11-16 07:54:54,949 INFO L276 IsEmpty]: Start isEmpty. Operand 1268 states and 2179 transitions. [2022-11-16 07:54:54,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:54:54,952 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:54,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:55,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:55,189 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:54:55,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:55,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2239 states to 1270 states and 2181 transitions. [2022-11-16 07:54:55,245 INFO L276 IsEmpty]: Start isEmpty. Operand 1270 states and 2181 transitions. [2022-11-16 07:54:55,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:54:55,248 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:55,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:55,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:55,456 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:55,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:55,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2241 states to 1272 states and 2183 transitions. [2022-11-16 07:54:55,509 INFO L276 IsEmpty]: Start isEmpty. Operand 1272 states and 2183 transitions. [2022-11-16 07:54:55,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:54:55,512 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:55,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:55,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:55,684 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:55,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:55,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2243 states to 1274 states and 2185 transitions. [2022-11-16 07:54:55,727 INFO L276 IsEmpty]: Start isEmpty. Operand 1274 states and 2185 transitions. [2022-11-16 07:54:55,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:54:55,729 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:55,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:55,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:55,889 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:57,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:57,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2272 states to 1284 states and 2213 transitions. [2022-11-16 07:54:57,819 INFO L276 IsEmpty]: Start isEmpty. Operand 1284 states and 2213 transitions. [2022-11-16 07:54:57,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:54:57,821 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:57,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:57,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:57,943 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:57,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:57,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2272 states to 1285 states and 2213 transitions. [2022-11-16 07:54:57,977 INFO L276 IsEmpty]: Start isEmpty. Operand 1285 states and 2213 transitions. [2022-11-16 07:54:57,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:54:57,978 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:57,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:58,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:58,109 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:54:58,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:58,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2275 states to 1287 states and 2216 transitions. [2022-11-16 07:54:58,147 INFO L276 IsEmpty]: Start isEmpty. Operand 1287 states and 2216 transitions. [2022-11-16 07:54:58,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2022-11-16 07:54:58,148 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:58,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:58,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:58,270 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:58,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:58,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2276 states to 1288 states and 2217 transitions. [2022-11-16 07:54:58,310 INFO L276 IsEmpty]: Start isEmpty. Operand 1288 states and 2217 transitions. [2022-11-16 07:54:58,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-11-16 07:54:58,312 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:58,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:58,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:58,432 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:58,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:58,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2277 states to 1289 states and 2218 transitions. [2022-11-16 07:54:58,459 INFO L276 IsEmpty]: Start isEmpty. Operand 1289 states and 2218 transitions. [2022-11-16 07:54:58,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2022-11-16 07:54:58,460 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:58,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:58,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:58,579 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:58,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:58,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2280 states to 1292 states and 2221 transitions. [2022-11-16 07:54:58,694 INFO L276 IsEmpty]: Start isEmpty. Operand 1292 states and 2221 transitions. [2022-11-16 07:54:58,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-11-16 07:54:58,695 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:58,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:58,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:58,813 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:58,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:58,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2281 states to 1293 states and 2222 transitions. [2022-11-16 07:54:58,836 INFO L276 IsEmpty]: Start isEmpty. Operand 1293 states and 2222 transitions. [2022-11-16 07:54:58,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2022-11-16 07:54:58,837 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:58,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:58,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:58,976 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:59,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:59,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2289 states to 1299 states and 2230 transitions. [2022-11-16 07:54:59,049 INFO L276 IsEmpty]: Start isEmpty. Operand 1299 states and 2230 transitions. [2022-11-16 07:54:59,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-16 07:54:59,050 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:59,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:59,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:59,193 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:54:59,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:59,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2300 states to 1306 states and 2241 transitions. [2022-11-16 07:54:59,237 INFO L276 IsEmpty]: Start isEmpty. Operand 1306 states and 2241 transitions. [2022-11-16 07:54:59,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:54:59,239 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:59,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:59,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:59,411 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:54:59,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:54:59,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2300 states to 1307 states and 2241 transitions. [2022-11-16 07:54:59,452 INFO L276 IsEmpty]: Start isEmpty. Operand 1307 states and 2241 transitions. [2022-11-16 07:54:59,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:54:59,454 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:54:59,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:54:59,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:54:59,612 INFO L134 CoverageAnalysis]: Checked inductivity of 547 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 541 trivial. 0 not checked. [2022-11-16 07:55:00,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:00,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2302 states to 1308 states and 2243 transitions. [2022-11-16 07:55:00,219 INFO L276 IsEmpty]: Start isEmpty. Operand 1308 states and 2243 transitions. [2022-11-16 07:55:00,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:55:00,220 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:00,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:00,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:00,329 INFO L134 CoverageAnalysis]: Checked inductivity of 547 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 535 trivial. 0 not checked. [2022-11-16 07:55:00,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:00,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2311 states to 1312 states and 2252 transitions. [2022-11-16 07:55:00,390 INFO L276 IsEmpty]: Start isEmpty. Operand 1312 states and 2252 transitions. [2022-11-16 07:55:00,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:55:00,391 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:00,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:00,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:00,502 INFO L134 CoverageAnalysis]: Checked inductivity of 547 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 541 trivial. 0 not checked. [2022-11-16 07:55:01,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:01,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2332 states to 1320 states and 2272 transitions. [2022-11-16 07:55:01,136 INFO L276 IsEmpty]: Start isEmpty. Operand 1320 states and 2272 transitions. [2022-11-16 07:55:01,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:55:01,138 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:01,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:01,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:01,304 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:55:01,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:01,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2342 states to 1326 states and 2282 transitions. [2022-11-16 07:55:01,369 INFO L276 IsEmpty]: Start isEmpty. Operand 1326 states and 2282 transitions. [2022-11-16 07:55:01,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:55:01,371 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:01,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:01,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:01,533 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:55:01,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:01,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2343 states to 1327 states and 2283 transitions. [2022-11-16 07:55:01,575 INFO L276 IsEmpty]: Start isEmpty. Operand 1327 states and 2283 transitions. [2022-11-16 07:55:01,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-11-16 07:55:01,577 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:01,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:01,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:01,740 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:01,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:01,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2344 states to 1328 states and 2284 transitions. [2022-11-16 07:55:01,859 INFO L276 IsEmpty]: Start isEmpty. Operand 1328 states and 2284 transitions. [2022-11-16 07:55:01,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:55:01,860 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:01,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:01,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:01,985 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:55:02,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:02,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2361 states to 1335 states and 2301 transitions. [2022-11-16 07:55:02,025 INFO L276 IsEmpty]: Start isEmpty. Operand 1335 states and 2301 transitions. [2022-11-16 07:55:02,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:55:02,026 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:02,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:02,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:02,142 INFO L134 CoverageAnalysis]: Checked inductivity of 540 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:55:02,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:02,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2365 states to 1337 states and 2305 transitions. [2022-11-16 07:55:02,168 INFO L276 IsEmpty]: Start isEmpty. Operand 1337 states and 2305 transitions. [2022-11-16 07:55:02,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:55:02,169 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:02,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:02,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:02,286 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:02,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:02,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2366 states to 1338 states and 2306 transitions. [2022-11-16 07:55:02,313 INFO L276 IsEmpty]: Start isEmpty. Operand 1338 states and 2306 transitions. [2022-11-16 07:55:02,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:55:02,315 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:02,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:02,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:02,434 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:55:02,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:02,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2373 states to 1342 states and 2313 transitions. [2022-11-16 07:55:02,479 INFO L276 IsEmpty]: Start isEmpty. Operand 1342 states and 2313 transitions. [2022-11-16 07:55:02,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:55:02,481 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:02,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:02,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:02,601 INFO L134 CoverageAnalysis]: Checked inductivity of 548 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 541 trivial. 0 not checked. [2022-11-16 07:55:02,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:02,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2373 states to 1343 states and 2313 transitions. [2022-11-16 07:55:02,650 INFO L276 IsEmpty]: Start isEmpty. Operand 1343 states and 2313 transitions. [2022-11-16 07:55:02,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:55:02,653 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:02,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:02,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:02,782 INFO L134 CoverageAnalysis]: Checked inductivity of 547 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 541 trivial. 0 not checked. [2022-11-16 07:55:02,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:02,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2374 states to 1344 states and 2314 transitions. [2022-11-16 07:55:02,820 INFO L276 IsEmpty]: Start isEmpty. Operand 1344 states and 2314 transitions. [2022-11-16 07:55:02,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:55:02,821 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:02,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:02,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:02,937 INFO L134 CoverageAnalysis]: Checked inductivity of 547 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 541 trivial. 0 not checked. [2022-11-16 07:55:02,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:02,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2375 states to 1345 states and 2315 transitions. [2022-11-16 07:55:02,972 INFO L276 IsEmpty]: Start isEmpty. Operand 1345 states and 2315 transitions. [2022-11-16 07:55:02,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:55:02,973 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:02,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:03,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:03,167 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:55:03,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:03,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2382 states to 1349 states and 2322 transitions. [2022-11-16 07:55:03,219 INFO L276 IsEmpty]: Start isEmpty. Operand 1349 states and 2322 transitions. [2022-11-16 07:55:03,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2022-11-16 07:55:03,221 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:03,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:03,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:03,396 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:03,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:03,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2383 states to 1350 states and 2323 transitions. [2022-11-16 07:55:03,438 INFO L276 IsEmpty]: Start isEmpty. Operand 1350 states and 2323 transitions. [2022-11-16 07:55:03,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2022-11-16 07:55:03,440 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:03,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:03,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:03,610 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:03,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:03,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2386 states to 1352 states and 2326 transitions. [2022-11-16 07:55:03,657 INFO L276 IsEmpty]: Start isEmpty. Operand 1352 states and 2326 transitions. [2022-11-16 07:55:03,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:55:03,660 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:03,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:03,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:03,945 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:03,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:03,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2390 states to 1355 states and 2330 transitions. [2022-11-16 07:55:03,992 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2330 transitions. [2022-11-16 07:55:03,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-16 07:55:03,994 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:03,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:04,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:04,118 INFO L134 CoverageAnalysis]: Checked inductivity of 532 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:55:04,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:04,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2395 states to 1359 states and 2335 transitions. [2022-11-16 07:55:04,148 INFO L276 IsEmpty]: Start isEmpty. Operand 1359 states and 2335 transitions. [2022-11-16 07:55:04,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-11-16 07:55:04,149 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:04,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:04,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:04,266 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:04,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:04,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2400 states to 1362 states and 2340 transitions. [2022-11-16 07:55:04,312 INFO L276 IsEmpty]: Start isEmpty. Operand 1362 states and 2340 transitions. [2022-11-16 07:55:04,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:55:04,314 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:04,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:04,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:04,461 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:04,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:04,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2405 states to 1365 states and 2345 transitions. [2022-11-16 07:55:04,502 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 2345 transitions. [2022-11-16 07:55:04,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:55:04,504 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:04,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:04,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:04,630 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:04,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:04,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 1366 states and 2346 transitions. [2022-11-16 07:55:04,656 INFO L276 IsEmpty]: Start isEmpty. Operand 1366 states and 2346 transitions. [2022-11-16 07:55:04,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-16 07:55:04,658 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:04,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:04,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:04,785 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:55:04,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:04,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2413 states to 1371 states and 2353 transitions. [2022-11-16 07:55:04,844 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2353 transitions. [2022-11-16 07:55:04,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:55:04,846 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:04,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:04,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:04,996 INFO L134 CoverageAnalysis]: Checked inductivity of 543 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2022-11-16 07:55:06,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:06,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2432 states to 1381 states and 2372 transitions. [2022-11-16 07:55:06,659 INFO L276 IsEmpty]: Start isEmpty. Operand 1381 states and 2372 transitions. [2022-11-16 07:55:06,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-16 07:55:06,660 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:06,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:06,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:06,776 INFO L134 CoverageAnalysis]: Checked inductivity of 549 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 537 trivial. 0 not checked. [2022-11-16 07:55:06,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:06,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2458 states to 1385 states and 2398 transitions. [2022-11-16 07:55:06,878 INFO L276 IsEmpty]: Start isEmpty. Operand 1385 states and 2398 transitions. [2022-11-16 07:55:06,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2022-11-16 07:55:06,880 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:06,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:06,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:07,013 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:55:07,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:07,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2461 states to 1387 states and 2401 transitions. [2022-11-16 07:55:07,052 INFO L276 IsEmpty]: Start isEmpty. Operand 1387 states and 2401 transitions. [2022-11-16 07:55:07,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:55:07,055 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:07,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:07,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:07,314 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:07,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:07,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2462 states to 1388 states and 2402 transitions. [2022-11-16 07:55:07,368 INFO L276 IsEmpty]: Start isEmpty. Operand 1388 states and 2402 transitions. [2022-11-16 07:55:07,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2022-11-16 07:55:07,371 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:07,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:07,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:07,606 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:07,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:07,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2465 states to 1391 states and 2405 transitions. [2022-11-16 07:55:07,672 INFO L276 IsEmpty]: Start isEmpty. Operand 1391 states and 2405 transitions. [2022-11-16 07:55:07,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2022-11-16 07:55:07,675 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:07,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:07,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:07,896 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:07,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:07,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2466 states to 1392 states and 2406 transitions. [2022-11-16 07:55:07,950 INFO L276 IsEmpty]: Start isEmpty. Operand 1392 states and 2406 transitions. [2022-11-16 07:55:07,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-11-16 07:55:07,952 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:07,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:08,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:08,169 INFO L134 CoverageAnalysis]: Checked inductivity of 543 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 543 trivial. 0 not checked. [2022-11-16 07:55:08,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:08,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2468 states to 1393 states and 2408 transitions. [2022-11-16 07:55:08,854 INFO L276 IsEmpty]: Start isEmpty. Operand 1393 states and 2408 transitions. [2022-11-16 07:55:08,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-11-16 07:55:08,856 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:08,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:08,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:08,985 INFO L134 CoverageAnalysis]: Checked inductivity of 543 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 543 trivial. 0 not checked. [2022-11-16 07:55:09,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:09,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2490 states to 1401 states and 2429 transitions. [2022-11-16 07:55:09,662 INFO L276 IsEmpty]: Start isEmpty. Operand 1401 states and 2429 transitions. [2022-11-16 07:55:09,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-11-16 07:55:09,664 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:09,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:09,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:09,873 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 532 trivial. 0 not checked. [2022-11-16 07:55:09,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:09,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2495 states to 1404 states and 2434 transitions. [2022-11-16 07:55:09,921 INFO L276 IsEmpty]: Start isEmpty. Operand 1404 states and 2434 transitions. [2022-11-16 07:55:09,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2022-11-16 07:55:09,922 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:09,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:10,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:11,050 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:11,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:11,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2497 states to 1406 states and 2436 transitions. [2022-11-16 07:55:11,549 INFO L276 IsEmpty]: Start isEmpty. Operand 1406 states and 2436 transitions. [2022-11-16 07:55:11,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-11-16 07:55:11,550 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:11,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:11,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:11,726 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:55:11,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:11,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2510 states to 1413 states and 2449 transitions. [2022-11-16 07:55:11,771 INFO L276 IsEmpty]: Start isEmpty. Operand 1413 states and 2449 transitions. [2022-11-16 07:55:11,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2022-11-16 07:55:11,773 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:11,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:11,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:11,996 INFO L134 CoverageAnalysis]: Checked inductivity of 530 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 530 trivial. 0 not checked. [2022-11-16 07:55:12,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:12,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2522 states to 1418 states and 2461 transitions. [2022-11-16 07:55:12,042 INFO L276 IsEmpty]: Start isEmpty. Operand 1418 states and 2461 transitions. [2022-11-16 07:55:12,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2022-11-16 07:55:12,044 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:12,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:12,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:12,195 INFO L134 CoverageAnalysis]: Checked inductivity of 538 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:12,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:12,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2524 states to 1420 states and 2463 transitions. [2022-11-16 07:55:12,232 INFO L276 IsEmpty]: Start isEmpty. Operand 1420 states and 2463 transitions. [2022-11-16 07:55:12,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-11-16 07:55:12,233 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:12,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:12,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:12,365 INFO L134 CoverageAnalysis]: Checked inductivity of 536 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 536 trivial. 0 not checked. [2022-11-16 07:55:12,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:12,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2545 states to 1429 states and 2484 transitions. [2022-11-16 07:55:12,410 INFO L276 IsEmpty]: Start isEmpty. Operand 1429 states and 2484 transitions. [2022-11-16 07:55:12,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2022-11-16 07:55:12,412 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:12,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:12,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-16 07:55:12,581 INFO L134 CoverageAnalysis]: Checked inductivity of 534 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 534 trivial. 0 not checked. [2022-11-16 07:55:12,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:55:12,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2546 states to 1430 states and 2485 transitions. [2022-11-16 07:55:12,625 INFO L276 IsEmpty]: Start isEmpty. Operand 1430 states and 2485 transitions. [2022-11-16 07:55:12,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2022-11-16 07:55:12,626 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:55:12,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:55:12,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 07:55:12,889 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 07:55:13,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 07:55:19,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 07:55:19,545 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-16 07:55:25,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-16 07:55:25,261 WARN L475 CodeCheckObserver]: This program is UNSAFE, Check terminated with 193 iterations. [2022-11-16 07:55:25,520 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck CFG 16.11 07:55:25 ImpRootNode [2022-11-16 07:55:25,521 INFO L132 PluginConnector]: ------------------------ END CodeCheck---------------------------- [2022-11-16 07:55:25,521 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-16 07:55:25,521 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-16 07:55:25,521 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-16 07:55:25,522 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:53:16" (3/4) ... [2022-11-16 07:55:25,525 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-16 07:55:25,525 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-16 07:55:25,526 INFO L158 Benchmark]: Toolchain (without parser) took 137966.57ms. Allocated memory was 132.1MB in the beginning and 2.4GB in the end (delta: 2.3GB). Free memory was 95.5MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 815.4MB. Max. memory is 16.1GB. [2022-11-16 07:55:25,526 INFO L158 Benchmark]: CDTParser took 0.29ms. Allocated memory is still 92.3MB. Free memory is still 49.6MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 07:55:25,527 INFO L158 Benchmark]: CACSL2BoogieTranslator took 2585.79ms. Allocated memory was 132.1MB in the beginning and 184.5MB in the end (delta: 52.4MB). Free memory was 95.1MB in the beginning and 109.0MB in the end (delta: -13.9MB). Peak memory consumption was 77.1MB. Max. memory is 16.1GB. [2022-11-16 07:55:25,527 INFO L158 Benchmark]: Boogie Procedure Inliner took 329.88ms. Allocated memory is still 184.5MB. Free memory was 109.0MB in the beginning and 87.0MB in the end (delta: 22.0MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. [2022-11-16 07:55:25,528 INFO L158 Benchmark]: Boogie Preprocessor took 310.55ms. Allocated memory is still 184.5MB. Free memory was 87.0MB in the beginning and 116.4MB in the end (delta: -29.4MB). Peak memory consumption was 30.1MB. Max. memory is 16.1GB. [2022-11-16 07:55:25,528 INFO L158 Benchmark]: RCFGBuilder took 5633.65ms. Allocated memory was 184.5MB in the beginning and 289.4MB in the end (delta: 104.9MB). Free memory was 116.4MB in the beginning and 160.5MB in the end (delta: -44.0MB). Peak memory consumption was 150.2MB. Max. memory is 16.1GB. [2022-11-16 07:55:25,529 INFO L158 Benchmark]: CodeCheck took 129095.38ms. Allocated memory was 289.4MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 160.5MB in the beginning and 1.6GB in the end (delta: -1.4GB). Peak memory consumption was 723.8MB. Max. memory is 16.1GB. [2022-11-16 07:55:25,529 INFO L158 Benchmark]: Witness Printer took 4.49ms. Allocated memory is still 2.4GB. Free memory is still 1.6GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 07:55:25,531 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - StatisticsResult: Ultimate CodeCheck benchmark data CFG has 57 procedures, 821 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 128.8s, OverallIterations: 193, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 250180 SdHoareTripleChecker+Valid, 413.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 133538 mSDsluCounter, 323676 SdHoareTripleChecker+Invalid, 360.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 212142 mSDsCounter, 51422 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 178855 IncrementalHoareTripleChecker+Invalid, 230277 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 51422 mSolverCounterUnsat, 111534 mSDtfsCounter, 178855 mSolverCounterSat, 7.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 145297 GetRequests, 144720 SyntacticMatches, 35 SemanticMatches, 542 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134598 ImplicationChecksByTransitivity, 60.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=-1occurred in iteration=-1, InterpolantAutomatonStates: 0, traceCheckStatistics: 2.0s SsaConstructionTime, 11.2s SatisfiabilityAnalysisTime, 36.2s InterpolantComputationTime, 14523 NumberOfCodeBlocks, 14523 NumberOfCodeBlocksAsserted, 193 NumberOfCheckSat, 14233 ConstructedInterpolants, 0 QuantifiedInterpolants, 34220 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 192 InterpolantComputations, 154 PerfectInterpolantSequences, 77086/82576 InterpolantCoveringCapability, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - UnprovableResult [Line: 7949]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of large string literal at line 7341, overapproximation of bitwiseOr at line 4779. Possible FailurePath: [L5243-L5251] static struct pci_device_id const fst_pci_dev_id[8U] = { {5657U, 1024U, 4294967295U, 4294967295U, 0U, 0U, 1UL}, {5657U, 1088U, 4294967295U, 4294967295U, 0U, 0U, 2UL}, {5657U, 1552U, 4294967295U, 4294967295U, 0U, 0U, 3UL}, {5657U, 1568U, 4294967295U, 4294967295U, 0U, 0U, 4UL}, {5657U, 1600U, 4294967295U, 4294967295U, 0U, 0U, 5UL}, {5657U, 5648U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {5657U, 5650U, 4294967295U, 4294967295U, 0U, 0U, 6UL}, {0U, 0U, 0U, 0U, 0U, 0U, 0UL}}; [L7341-L7342] static char *type_strings[7U] = { (char *)"no hardware", (char *)"FarSync T2P", (char *)"FarSync T4P", (char *)"FarSync T1U", (char *)"FarSync T2U", (char *)"FarSync T4U", (char *)"FarSync TE1"}; [L5238] static int fst_txq_low = 8; [L5262] static u64 fst_work_intq ; [L5260] static spinlock_t fst_work_q_lock ; [L5259] static struct fst_card_info *fst_card_array[32U] ; [L7800] int LDV_IN_INTERRUPT ; [L5242] static int fst_excluded_list[32U] ; [L5239] static int fst_txq_high = 12; [L5257] static struct tasklet_struct fst_tx_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_tx_work_q, 0UL}; [L5258] static struct tasklet_struct fst_int_task = {(struct tasklet_struct *)0, 0UL, {0}, & fst_process_int_work_q, 0UL}; [L7394-L7427] static struct net_device_ops const fst_ops = {(int (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, & fst_open, & fst_close, & hdlc_start_xmit, (u16 (*)(struct net_device * , struct sk_buff * ))0, (void (*)(struct net_device * , int ))0, (void (*)(struct net_device * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , void * ))0, (int (*)(struct net_device * ))0, & fst_ioctl, (int (*)(struct net_device * , struct ifmap * ))0, & hdlc_change_mtu, (int (*)(struct net_device * , struct neigh_parms * ))0, & fst_tx_timeout, (struct rtnl_link_stats64 *(*)(struct net_device * , struct rtnl_link_stats64 * ))0, (struct net_device_stats *(*)(struct net_device * ))0, (void (*)(struct net_device * , struct vlan_group * ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * , unsigned short ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , struct netpoll_info * ))0, (void (*)(struct net_device * ))0, (int (*)(struct net_device * , int , u8 * ))0, (int (*)(struct net_device * , int , u16 , u8 ))0, (int (*)(struct net_device * , int , int ))0, (int (*)(struct net_device * , int , struct ifla_vf_info * ))0, (int (*)(struct net_device * , int , struct nlattr ** ))0, (int (*)(struct net_device * , int , struct sk_buff * ))0, (int (*)(struct net_device * , u8 ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u16 ))0, (int (*)(struct net_device * , u16 , struct scatterlist * , unsigned int ))0, (int (*)(struct net_device * , u64 * , int ))0, (int (*)(struct net_device * , struct sk_buff const * , u16 , u32 ))0, (int (*)(struct net_device * , struct net_device * ))0, (int (*)(struct net_device * , struct net_device * ))0, (u32 (*)(struct net_device * , u32 ))0, (int (*)(struct net_device * , u32 ))0}; [L7953] int ldv_module_refcounter = 1; [L7745-L7759] static struct pci_driver fst_driver = {{(struct list_head *)0, (struct list_head *)0}, "fst", (struct pci_device_id const *)(& fst_pci_dev_id), & fst_add_one, & fst_remove_one, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * , pm_message_t ))0, (int (*)(struct pci_dev * ))0, (int (*)(struct pci_dev * ))0, (void (*)(struct pci_dev * ))0, (struct pci_error_handlers *)0, {(char const *)0, (struct bus_type *)0, (struct module *)0, (char const *)0, (_Bool)0, (struct of_device_id const *)0, (int (*)(struct device * ))0, (int (*)(struct device * ))0, (void (*)(struct device * ))0, (int (*)(struct device * , pm_message_t ))0, (int (*)(struct device * ))0, (struct attribute_group const **)0, (struct dev_pm_ops const *)0, (struct driver_private *)0}, {{{{{0U}, 0U, 0U, (void *)0, {(struct lock_class_key *)0, {(struct lock_class *)0, (struct lock_class *)0}, (char const *)0, 0, 0UL}}}}, {(struct list_head *)0, (struct list_head *)0}}}; [L5241] static int fst_excluded_cards = 0; [L5240] static int fst_max_reads = 7; [L5252] struct pci_device_id const __mod_pci_device_table ; [L5261] static u64 fst_work_txq ; [L7802] struct net_device *var_group1 ; [L7803] int res_fst_open_36 ; [L7804] int res_fst_close_37 ; [L7805] struct ifreq *var_group2 ; [L7806] int var_fst_ioctl_33_p2 ; [L7807] struct pci_dev *var_group3 ; [L7808] struct pci_device_id const *var_fst_add_one_42_p1 ; [L7809] int res_fst_add_one_42 ; [L7810] int var_fst_intr_27_p0 ; [L7811] void *var_fst_intr_27_p1 ; [L7812] int ldv_s_fst_ops_net_device_ops ; [L7813] int ldv_s_fst_driver_pci_driver ; [L7814] int tmp ; [L7815] int tmp___0 ; [L7816] int tmp___1 ; [L7819] ldv_s_fst_ops_net_device_ops = 0 [L7820] ldv_s_fst_driver_pci_driver = 0 [L7821] LDV_IN_INTERRUPT = 1 [L7822] FCALL ldv_initialize() [L7823] CALL, EXPR fst_init() [L7761] int i ; [L7762] struct lock_class_key __key ; [L7763] int tmp ; [L7765] i = 0 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=0, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=1, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=2, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=3, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=4, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=5, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=6, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=7, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=8, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=9, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=10, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=11, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=12, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=13, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=14, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=15, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=16, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=17, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=18, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=19, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=20, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=21, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=22, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=23, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=24, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=25, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=26, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=27, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=28, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=29, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=30, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=31, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND TRUE i <= 31 [L7768] fst_card_array[i] = (struct fst_card_info *)0 [L7769] i = i + 1 VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7771] COND FALSE !(i <= 31) VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7778] CALL spinlock_check(& fst_work_q_lock) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, lock={48:0}, type_strings={46:0}] [L4600] return (& lock->ldv_6060.rlock); [L7778] RET spinlock_check(& fst_work_q_lock) VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, spinlock_check(& fst_work_q_lock)={48:0}, type_strings={46:0}] [L7779-L7780] FCALL __raw_spin_lock_init(& fst_work_q_lock.ldv_6060.rlock, "&(&fst_work_q_lock)->rlock", & __key) VAL [__key={51082:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, i=32, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7781] CALL, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L8074] return __VERIFIER_nondet_int(); [L7781] RET, EXPR __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7781] tmp = __pci_register_driver(& fst_driver, & __this_module, "farsync") [L7783] return (tmp); [L7783] return (tmp); [L7823] RET, EXPR fst_init() [L7823] tmp = fst_init() [L7825] COND FALSE !(tmp != 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, type_strings={46:0}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___1=-2147483648, type_strings={46:0}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND TRUE tmp___0 == 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, tmp=0, tmp___0=0, tmp___1=-2147483648, type_strings={46:0}] [L7855] COND TRUE ldv_s_fst_ops_net_device_ops == 0 [L7857] CALL, EXPR fst_open(var_group1) [L7167] int err ; [L7168] struct fst_port_info *port ; [L7169] struct hdlc_device *tmp ; [L7170] int tmp___0 ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, dev={431:-2435}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7173] CALL, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L5204] void *tmp ; [L5207] CALL, EXPR netdev_priv((struct net_device const *)dev) [L5064] return ((void *)dev + 2560U); [L5207] RET, EXPR netdev_priv((struct net_device const *)dev) [L5207] tmp = netdev_priv((struct net_device const *)dev) [L5209] return ((struct hdlc_device *)tmp); [L7173] RET, EXPR dev_to_hdlc(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, dev={431:-2435}, dev_to_hdlc(dev)={431:125}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=1, type_strings={46:0}] [L7173] tmp = dev_to_hdlc(dev) [L7174] EXPR tmp->priv [L7174] port = (struct fst_port_info *)tmp->priv [L7175] CALL, EXPR ldv_try_module_get_1(& __this_module) [L8027] int tmp ; [L8030] CALL, EXPR ldv_try_module_get(module) [L7965] int module_get_succeeded ; [L7967] COND TRUE (unsigned long )module != (unsigned long )((struct module *)0) [L7969] CALL, EXPR ldv_undefined_int() [L8154] return __VERIFIER_nondet_int(); [L7969] RET, EXPR ldv_undefined_int() [L7969] module_get_succeeded = ldv_undefined_int() [L7971] COND TRUE module_get_succeeded == 1 [L7972] ldv_module_refcounter = ldv_module_refcounter + 1 [L7973] return (1); [L8030] RET, EXPR ldv_try_module_get(module) [L8030] tmp = ldv_try_module_get(module) [L8032] return (tmp); [L7175] RET, EXPR ldv_try_module_get_1(& __this_module) [L7175] tmp___0 = ldv_try_module_get_1(& __this_module) [L7177] COND FALSE !(tmp___0 == 0) [L7181] EXPR port->mode VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, dev={431:-2435}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={85:90}, port->mode=4, tmp={431:125}, tmp___0=1, type_strings={46:0}] [L7181] COND FALSE !(port->mode != 4) [L7195] CALL fst_openport(port) [L7102] int signals ; [L7103] int txq_length ; [L7104] unsigned int tmp ; [L7105] int tmp___0 ; [L7107] EXPR port->card [L7107] EXPR (port->card)->state VAL [(port->card)->state=-124536871714817, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={85:90}, port={85:90}, port->card={69:-7690}, type_strings={46:0}] [L7107] COND FALSE !((port->card)->state == 4U) [L7195] RET fst_openport(port) [L7196] CALL netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5137] struct netdev_queue *tmp ; VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, dev={431:-2435}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5140] CALL, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [\old(index)=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L5058] EXPR dev->_tx [L5058] return ((struct netdev_queue *)dev->_tx + (unsigned long )index); [L5140] RET, EXPR netdev_get_tx_queue((struct net_device const *)dev, 0U) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, dev={431:-2435}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, netdev_get_tx_queue((struct net_device const *)dev, 0U)={89:-21571}, type_strings={46:0}] [L5140] tmp = netdev_get_tx_queue((struct net_device const *)dev, 0U) [L5141] CALL netif_tx_wake_queue(tmp) [L5111] int tmp ; [L5112] int tmp___0 ; [L5115] CALL, EXPR netpoll_trap() [L8174] return __VERIFIER_nondet_int(); [L5115] RET, EXPR netpoll_trap() [L5115] tmp = netpoll_trap() [L5117] COND TRUE tmp != 0 [L5119] CALL netif_tx_start_queue(dev_queue) [L5105] FCALL clear_bit(0, (unsigned long volatile *)(& dev_queue->state)) [L5119] RET netif_tx_start_queue(dev_queue) [L5141] RET netif_tx_wake_queue(tmp) [L7196] RET netif_wake_queue(dev) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, dev={431:-2435}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={85:90}, tmp={431:125}, tmp___0=1, type_strings={46:0}] [L7198] return (0); VAL [\result=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, dev={431:-2435}, dev={431:-2435}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, port={85:90}, tmp={431:125}, tmp___0=1, type_strings={46:0}] [L7857] RET, EXPR fst_open(var_group1) [L7857] res_fst_open_36 = fst_open(var_group1) [L7858] FCALL ldv_check_return_value(res_fst_open_36) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=0, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=-2147483648, type_strings={46:0}, var_group1={431:-2435}] [L7860] COND FALSE !(res_fst_open_36 < 0) [L7864] ldv_s_fst_ops_net_device_ops = ldv_s_fst_ops_net_device_ops + 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=-2147483648, type_strings={46:0}, var_group1={431:-2435}] [L7921] tmp___1 = __VERIFIER_nondet_int() [L7923] COND TRUE tmp___1 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=0, tmp___1=2147483647, type_strings={46:0}, var_group1={431:-2435}] [L7832] tmp___0 = __VERIFIER_nondet_int() [L7834] COND FALSE !(tmp___0 == 0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483647, type_strings={46:0}, var_group1={431:-2435}] [L7837] COND FALSE !(tmp___0 == 1) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483647, type_strings={46:0}, var_group1={431:-2435}] [L7840] COND FALSE !(tmp___0 == 2) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483647, type_strings={46:0}, var_group1={431:-2435}] [L7843] COND FALSE !(tmp___0 == 3) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483647, type_strings={46:0}, var_group1={431:-2435}] [L7846] COND TRUE tmp___0 == 4 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483647, type_strings={46:0}, var_group1={431:-2435}] [L7893] COND TRUE ldv_s_fst_driver_pci_driver == 0 [L7895] CALL, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7429] int no_of_cards_added ; [L7430] struct fst_card_info *card ; [L7431] int err ; [L7432] int i ; [L7433] bool __print_once ; [L7434] void *tmp ; [L7435] char *tmp___0 ; [L7436] void *tmp___1 ; [L7437] char *tmp___2 ; [L7438] void *tmp___3 ; [L7439] int tmp___4 ; [L7440] int tmp___5 ; [L7441] struct lock_class_key __key ; [L7442] struct net_device *dev ; [L7443] struct net_device *tmp___6 ; [L7444] hdlc_device *hdlc ; [L7445] int tmp___7 ; [L7446] struct hdlc_device *tmp___8 ; [L7447] int tmp___9 ; [L7449] no_of_cards_added = 0 [L7450] err = 0 [L7451] COND FALSE !(! __print_once) VAL [__key={51081:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=2, __this_module={18446744073709551615:0}, ent={459:458}, ent={459:458}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={456:457}, pdev={456:457}, printk("<6>farsync: FarSync WAN driver 1.04 (c) 2001-2004 FarSite Communications Ltd.\n")=460, type_strings={46:0}] [L7458] COND FALSE !(fst_excluded_cards != 0) VAL [__key={51081:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=2, __this_module={18446744073709551615:0}, ent={459:458}, ent={459:458}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={456:457}, pdev={456:457}, printk("<6>farsync: FarSync WAN driver 1.04 (c) 2001-2004 FarSite Communications Ltd.\n")=460, type_strings={46:0}] [L7480] CALL, EXPR kzalloc(1000UL, 208U) [L4776] void *tmp ; [L4779] CALL, EXPR kmalloc(size, flags | 32768U) [L4766] void *tmp___2 ; [L4769] CALL, EXPR __kmalloc(size, flags) [L8067] CALL, EXPR ldv_malloc(arg0) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L8061] COND TRUE __VERIFIER_nondet_bool() [L8061] return 0; VAL [\old(size)=1000, \result={0:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, size=1000, type_strings={46:0}] [L8067] RET, EXPR ldv_malloc(arg0) VAL [\old(arg0)=1000, \old(arg1)=461, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, arg0=1000, arg1=461, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_malloc(arg0)={0:0}, ldv_module_refcounter=2, type_strings={46:0}] [L8067] return ldv_malloc(arg0); [L4769] RET, EXPR __kmalloc(size, flags) [L4769] tmp___2 = __kmalloc(size, flags) [L4771] return (tmp___2); [L4779] RET, EXPR kmalloc(size, flags | 32768U) [L4779] tmp = kmalloc(size, flags | 32768U) [L4781] return (tmp); [L7480] RET, EXPR kzalloc(1000UL, 208U) [L7480] tmp = kzalloc(1000UL, 208U) [L7481] card = (struct fst_card_info *)tmp VAL [__key={51081:0}, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=2, __this_module={18446744073709551615:0}, card={0:0}, ent={459:458}, ent={459:458}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={456:457}, pdev={456:457}, printk("<6>farsync: FarSync WAN driver 1.04 (c) 2001-2004 FarSite Communications Ltd.\n")=460, tmp={0:0}, type_strings={46:0}] [L7483] COND TRUE (unsigned long )card == (unsigned long )((struct fst_card_info *)0) [L7487] return (-12); [L7487] return (-12); VAL [\result=-12, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __print_once=2, __this_module={18446744073709551615:0}, card={0:0}, ent={459:458}, ent={459:458}, err=0, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, no_of_cards_added=0, pdev={456:457}, pdev={456:457}, printk("<6>farsync: FarSync WAN driver 1.04 (c) 2001-2004 FarSite Communications Ltd.\n")=460, tmp={0:0}, type_strings={46:0}] [L7895] RET, EXPR fst_add_one(var_group3, var_fst_add_one_42_p1) [L7895] res_fst_add_one_42 = fst_add_one(var_group3, var_fst_add_one_42_p1) [L7896] FCALL ldv_check_return_value(res_fst_add_one_42) VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=-12, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483647, type_strings={46:0}, var_fst_add_one_42_p1={459:458}, var_group1={431:-2435}, var_group3={456:457}] [L7898] COND TRUE res_fst_add_one_42 != 0 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, ldv_s_fst_driver_pci_driver=0, ldv_s_fst_ops_net_device_ops=1, res_fst_add_one_42=-12, res_fst_open_36=0, tmp=0, tmp___0=4, tmp___1=2147483647, type_strings={46:0}, var_fst_add_one_42_p1={459:458}, var_group1={431:-2435}, var_group3={456:457}] [L7937] CALL fst_cleanup_module() [L7791] FCALL pci_unregister_driver(& fst_driver) [L7937] RET fst_cleanup_module() [L7941] CALL ldv_check_final_state() [L8017] COND TRUE ldv_module_refcounter != 1 VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L8019] CALL ldv_blast_assert() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] [L7949] reach_error() VAL [__mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __mod_pci_device_table=0, __this_module={18446744073709551615:0}, fst_card_array={49:0}, fst_driver={54:0}, fst_excluded_cards=0, fst_excluded_list={50:0}, fst_int_task={52:0}, fst_max_reads=7, fst_ops={53:0}, fst_pci_dev_id={45:0}, fst_tx_task={51:0}, fst_txq_high=12, fst_txq_low=8, fst_work_intq={47:0}, fst_work_q_lock={48:0}, fst_work_txq={55:0}, LDV_IN_INTERRUPT=1, ldv_module_refcounter=2, type_strings={46:0}] * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29ms. Allocated memory is still 92.3MB. Free memory is still 49.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 2585.79ms. Allocated memory was 132.1MB in the beginning and 184.5MB in the end (delta: 52.4MB). Free memory was 95.1MB in the beginning and 109.0MB in the end (delta: -13.9MB). Peak memory consumption was 77.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 329.88ms. Allocated memory is still 184.5MB. Free memory was 109.0MB in the beginning and 87.0MB in the end (delta: 22.0MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 310.55ms. Allocated memory is still 184.5MB. Free memory was 87.0MB in the beginning and 116.4MB in the end (delta: -29.4MB). Peak memory consumption was 30.1MB. Max. memory is 16.1GB. * RCFGBuilder took 5633.65ms. Allocated memory was 184.5MB in the beginning and 289.4MB in the end (delta: 104.9MB). Free memory was 116.4MB in the beginning and 160.5MB in the end (delta: -44.0MB). Peak memory consumption was 150.2MB. Max. memory is 16.1GB. * CodeCheck took 129095.38ms. Allocated memory was 289.4MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 160.5MB in the beginning and 1.6GB in the end (delta: -1.4GB). Peak memory consumption was 723.8MB. Max. memory is 16.1GB. * Witness Printer took 4.49ms. Allocated memory is still 2.4GB. Free memory is still 1.6GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-16 07:55:25,583 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/config/KojakReach.xml -i ../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/config/svcomp-Reach-64bit-Kojak_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Kojak --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-e04fb08 [2022-11-16 07:55:27,930 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-16 07:55:27,933 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-16 07:55:27,972 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-16 07:55:27,972 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-16 07:55:27,976 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-16 07:55:27,979 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-16 07:55:27,983 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-16 07:55:27,986 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-16 07:55:27,991 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-16 07:55:27,995 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-16 07:55:27,997 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-16 07:55:27,998 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-16 07:55:28,000 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-16 07:55:28,001 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-16 07:55:28,003 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-16 07:55:28,004 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-16 07:55:28,006 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-16 07:55:28,011 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-16 07:55:28,016 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-16 07:55:28,020 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-16 07:55:28,021 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-16 07:55:28,023 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-16 07:55:28,024 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-16 07:55:28,031 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-16 07:55:28,035 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-16 07:55:28,035 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-16 07:55:28,036 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-16 07:55:28,037 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-16 07:55:28,038 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-16 07:55:28,039 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-16 07:55:28,040 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-16 07:55:28,041 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-16 07:55:28,042 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-16 07:55:28,043 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-16 07:55:28,043 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-16 07:55:28,044 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-16 07:55:28,045 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-16 07:55:28,045 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-16 07:55:28,046 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-16 07:55:28,047 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-16 07:55:28,052 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/config/svcomp-Reach-64bit-Kojak_Bitvector.epf [2022-11-16 07:55:28,082 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-16 07:55:28,082 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-16 07:55:28,084 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-16 07:55:28,084 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ALWAYS [2022-11-16 07:55:28,086 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-11-16 07:55:28,086 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-11-16 07:55:28,086 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-16 07:55:28,086 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-16 07:55:28,086 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-16 07:55:28,087 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-16 07:55:28,088 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-16 07:55:28,088 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-16 07:55:28,088 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-16 07:55:28,088 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-16 07:55:28,089 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-16 07:55:28,089 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-16 07:55:28,097 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-16 07:55:28,097 INFO L136 SettingsManager]: Preferences of CodeCheck differ from their defaults: [2022-11-16 07:55:28,097 INFO L138 SettingsManager]: * Timeout in seconds=1000000 [2022-11-16 07:55:28,098 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-16 07:55:28,098 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2022-11-16 07:55:28,098 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-16 07:55:28,098 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-16 07:55:28,099 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-16 07:55:28,099 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-16 07:55:28,099 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-16 07:55:28,099 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-16 07:55:28,099 INFO L138 SettingsManager]: * Use separate solver for trace checks=false [2022-11-16 07:55:28,100 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-16 07:55:28,100 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Kojak Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f51fd7a7e803b337407ebecb084bc416ae9c8b7a3d33ff72a0e0702d21471e83 [2022-11-16 07:55:28,494 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-16 07:55:28,530 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-16 07:55:28,532 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-16 07:55:28,534 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-16 07:55:28,535 INFO L275 PluginConnector]: CDTParser initialized [2022-11-16 07:55:28,537 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/../../sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-16 07:55:28,606 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/14d111760/cafef448f31644949cd0e02e86e1b06b/FLAG53f324425 [2022-11-16 07:55:29,491 INFO L306 CDTParser]: Found 1 translation units. [2022-11-16 07:55:29,492 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i [2022-11-16 07:55:29,542 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/14d111760/cafef448f31644949cd0e02e86e1b06b/FLAG53f324425 [2022-11-16 07:55:29,591 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/data/14d111760/cafef448f31644949cd0e02e86e1b06b [2022-11-16 07:55:29,593 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-16 07:55:29,595 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-16 07:55:29,599 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-16 07:55:29,599 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-16 07:55:29,603 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-16 07:55:29,603 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:55:29" (1/1) ... [2022-11-16 07:55:29,604 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5b0935b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:29, skipping insertion in model container [2022-11-16 07:55:29,605 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 16.11 07:55:29" (1/1) ... [2022-11-16 07:55:29,611 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-16 07:55:29,751 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 07:55:31,308 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-16 07:55:31,352 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 07:55:31,425 INFO L200 MainTranslator]: Restarting translation with changed settings: SettingsChange [mNewPreferredMemoryModel=HoenickeLindenmann_1ByteResolution] [2022-11-16 07:55:31,481 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-16 07:55:31,835 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-16 07:55:31,844 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 07:55:31,873 INFO L203 MainTranslator]: Completed pre-run [2022-11-16 07:55:32,218 WARN L229 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/sv-benchmarks/c/ldv-linux-3.0/module_get_put-drivers-net-wan-farsync.ko.cil.out.i[221005,221018] [2022-11-16 07:55:32,229 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-16 07:55:32,543 INFO L208 MainTranslator]: Completed translation [2022-11-16 07:55:32,544 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32 WrapperNode [2022-11-16 07:55:32,544 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-16 07:55:32,545 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-16 07:55:32,546 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-16 07:55:32,546 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-16 07:55:32,553 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:32,678 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:32,804 INFO L138 Inliner]: procedures = 214, calls = 1513, calls flagged for inlining = 98, calls inlined = 84, statements flattened = 3260 [2022-11-16 07:55:32,805 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-16 07:55:32,806 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-16 07:55:32,806 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-16 07:55:32,806 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-16 07:55:32,815 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:32,816 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:32,837 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:32,837 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:33,020 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:33,032 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:33,045 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:33,056 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:33,098 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-16 07:55:33,099 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-16 07:55:33,100 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-16 07:55:33,100 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-16 07:55:33,101 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 16.11 07:55:32" (1/1) ... [2022-11-16 07:55:33,107 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 [2022-11-16 07:55:33,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 [2022-11-16 07:55:33,137 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (exit command is (exit), workingDir is null) [2022-11-16 07:55:33,152 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Waiting until timeout for monitored process [2022-11-16 07:55:33,180 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1 [2022-11-16 07:55:33,180 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE8 [2022-11-16 07:55:33,181 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE4 [2022-11-16 07:55:33,181 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-11-16 07:55:33,181 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE2 [2022-11-16 07:55:33,181 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-11-16 07:55:33,181 INFO L130 BoogieDeclarations]: Found specification of procedure pci_release_regions [2022-11-16 07:55:33,181 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_release_regions [2022-11-16 07:55:33,182 INFO L130 BoogieDeclarations]: Found specification of procedure netif_wake_queue [2022-11-16 07:55:33,182 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_wake_queue [2022-11-16 07:55:33,182 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_off [2022-11-16 07:55:33,182 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_off [2022-11-16 07:55:33,182 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_malloc [2022-11-16 07:55:33,182 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2022-11-16 07:55:33,182 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_module_put [2022-11-16 07:55:33,183 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_module_put [2022-11-16 07:55:33,183 INFO L130 BoogieDeclarations]: Found specification of procedure free_irq [2022-11-16 07:55:33,183 INFO L138 BoogieDeclarations]: Found implementation of procedure free_irq [2022-11-16 07:55:33,183 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_ok [2022-11-16 07:55:33,183 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_ok [2022-11-16 07:55:33,183 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_check_return_value [2022-11-16 07:55:33,184 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_check_return_value [2022-11-16 07:55:33,184 INFO L130 BoogieDeclarations]: Found specification of procedure netif_carrier_on [2022-11-16 07:55:33,184 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_carrier_on [2022-11-16 07:55:33,184 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_toio [2022-11-16 07:55:33,184 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_toio [2022-11-16 07:55:33,184 INFO L130 BoogieDeclarations]: Found specification of procedure netif_stop_queue [2022-11-16 07:55:33,184 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_stop_queue [2022-11-16 07:55:33,185 INFO L130 BoogieDeclarations]: Found specification of procedure pci_alloc_consistent [2022-11-16 07:55:33,185 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_alloc_consistent [2022-11-16 07:55:33,185 INFO L130 BoogieDeclarations]: Found specification of procedure spinlock_check [2022-11-16 07:55:33,185 INFO L138 BoogieDeclarations]: Found implementation of procedure spinlock_check [2022-11-16 07:55:33,185 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-11-16 07:55:33,185 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-11-16 07:55:33,186 INFO L130 BoogieDeclarations]: Found specification of procedure netif_rx [2022-11-16 07:55:33,186 INFO L138 BoogieDeclarations]: Found implementation of procedure netif_rx [2022-11-16 07:55:33,186 INFO L130 BoogieDeclarations]: Found specification of procedure ioremap [2022-11-16 07:55:33,186 INFO L138 BoogieDeclarations]: Found implementation of procedure ioremap [2022-11-16 07:55:33,186 INFO L130 BoogieDeclarations]: Found specification of procedure spin_unlock_irqrestore [2022-11-16 07:55:33,186 INFO L138 BoogieDeclarations]: Found implementation of procedure spin_unlock_irqrestore [2022-11-16 07:55:33,186 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE8 [2022-11-16 07:55:33,187 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1 [2022-11-16 07:55:33,187 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE2 [2022-11-16 07:55:33,187 INFO L130 BoogieDeclarations]: Found specification of procedure ldv_blast_assert [2022-11-16 07:55:33,187 INFO L138 BoogieDeclarations]: Found implementation of procedure ldv_blast_assert [2022-11-16 07:55:33,187 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-11-16 07:55:33,187 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE4 [2022-11-16 07:55:33,188 INFO L130 BoogieDeclarations]: Found specification of procedure iounmap [2022-11-16 07:55:33,188 INFO L138 BoogieDeclarations]: Found implementation of procedure iounmap [2022-11-16 07:55:33,188 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-11-16 07:55:33,188 INFO L130 BoogieDeclarations]: Found specification of procedure might_fault [2022-11-16 07:55:33,188 INFO L138 BoogieDeclarations]: Found implementation of procedure might_fault [2022-11-16 07:55:33,188 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2022-11-16 07:55:33,189 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE4 [2022-11-16 07:55:33,189 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE8 [2022-11-16 07:55:33,189 INFO L130 BoogieDeclarations]: Found specification of procedure _raw_spin_lock_irqsave [2022-11-16 07:55:33,189 INFO L138 BoogieDeclarations]: Found implementation of procedure _raw_spin_lock_irqsave [2022-11-16 07:55:33,189 INFO L130 BoogieDeclarations]: Found specification of procedure outw [2022-11-16 07:55:33,189 INFO L138 BoogieDeclarations]: Found implementation of procedure outw [2022-11-16 07:55:33,190 INFO L130 BoogieDeclarations]: Found specification of procedure outb [2022-11-16 07:55:33,190 INFO L138 BoogieDeclarations]: Found implementation of procedure outb [2022-11-16 07:55:33,190 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_type_trans [2022-11-16 07:55:33,190 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_type_trans [2022-11-16 07:55:33,190 INFO L130 BoogieDeclarations]: Found specification of procedure netdev_get_tx_queue [2022-11-16 07:55:33,190 INFO L138 BoogieDeclarations]: Found implementation of procedure netdev_get_tx_queue [2022-11-16 07:55:33,191 INFO L130 BoogieDeclarations]: Found specification of procedure outl [2022-11-16 07:55:33,191 INFO L138 BoogieDeclarations]: Found implementation of procedure outl [2022-11-16 07:55:33,191 INFO L130 BoogieDeclarations]: Found specification of procedure farsync_type_trans [2022-11-16 07:55:33,191 INFO L138 BoogieDeclarations]: Found implementation of procedure farsync_type_trans [2022-11-16 07:55:33,191 INFO L130 BoogieDeclarations]: Found specification of procedure _copy_from_user [2022-11-16 07:55:33,191 INFO L138 BoogieDeclarations]: Found implementation of procedure _copy_from_user [2022-11-16 07:55:33,191 INFO L130 BoogieDeclarations]: Found specification of procedure get_dma_ops [2022-11-16 07:55:33,192 INFO L138 BoogieDeclarations]: Found implementation of procedure get_dma_ops [2022-11-16 07:55:33,192 INFO L130 BoogieDeclarations]: Found specification of procedure __raw_spin_lock_init [2022-11-16 07:55:33,192 INFO L138 BoogieDeclarations]: Found implementation of procedure __raw_spin_lock_init [2022-11-16 07:55:33,192 INFO L130 BoogieDeclarations]: Found specification of procedure free_netdev [2022-11-16 07:55:33,192 INFO L138 BoogieDeclarations]: Found implementation of procedure free_netdev [2022-11-16 07:55:33,192 INFO L130 BoogieDeclarations]: Found specification of procedure dev_to_hdlc [2022-11-16 07:55:33,192 INFO L138 BoogieDeclarations]: Found implementation of procedure dev_to_hdlc [2022-11-16 07:55:33,193 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-11-16 07:55:33,193 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-11-16 07:55:33,193 INFO L130 BoogieDeclarations]: Found specification of procedure fst_issue_cmd [2022-11-16 07:55:33,193 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_issue_cmd [2022-11-16 07:55:33,193 INFO L130 BoogieDeclarations]: Found specification of procedure kfree [2022-11-16 07:55:33,193 INFO L138 BoogieDeclarations]: Found implementation of procedure kfree [2022-11-16 07:55:33,194 INFO L130 BoogieDeclarations]: Found specification of procedure pci_disable_device [2022-11-16 07:55:33,194 INFO L138 BoogieDeclarations]: Found implementation of procedure pci_disable_device [2022-11-16 07:55:33,194 INFO L130 BoogieDeclarations]: Found specification of procedure copy_to_user [2022-11-16 07:55:33,194 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_to_user [2022-11-16 07:55:33,194 INFO L130 BoogieDeclarations]: Found specification of procedure fst_disable_intr [2022-11-16 07:55:33,194 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_disable_intr [2022-11-16 07:55:33,194 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE4 [2022-11-16 07:55:33,195 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE2 [2022-11-16 07:55:33,195 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE1 [2022-11-16 07:55:33,195 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~intINTTYPE8 [2022-11-16 07:55:33,195 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-11-16 07:55:33,195 INFO L130 BoogieDeclarations]: Found specification of procedure copy_from_user [2022-11-16 07:55:33,195 INFO L138 BoogieDeclarations]: Found implementation of procedure copy_from_user [2022-11-16 07:55:33,196 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-11-16 07:55:33,196 INFO L130 BoogieDeclarations]: Found specification of procedure fst_cpureset [2022-11-16 07:55:33,196 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_cpureset [2022-11-16 07:55:33,196 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-11-16 07:55:33,196 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE8 [2022-11-16 07:55:33,196 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE2 [2022-11-16 07:55:33,196 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE4 [2022-11-16 07:55:33,197 INFO L130 BoogieDeclarations]: Found specification of procedure tasklet_schedule [2022-11-16 07:55:33,197 INFO L138 BoogieDeclarations]: Found implementation of procedure tasklet_schedule [2022-11-16 07:55:33,197 INFO L130 BoogieDeclarations]: Found specification of procedure fst_process_rx_status [2022-11-16 07:55:33,197 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_process_rx_status [2022-11-16 07:55:33,197 INFO L130 BoogieDeclarations]: Found specification of procedure fst_q_work_item [2022-11-16 07:55:33,197 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_q_work_item [2022-11-16 07:55:33,198 INFO L130 BoogieDeclarations]: Found specification of procedure warn_slowpath_null [2022-11-16 07:55:33,198 INFO L138 BoogieDeclarations]: Found implementation of procedure warn_slowpath_null [2022-11-16 07:55:33,198 INFO L130 BoogieDeclarations]: Found specification of procedure skb_put [2022-11-16 07:55:33,198 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_put [2022-11-16 07:55:33,198 INFO L130 BoogieDeclarations]: Found specification of procedure readw [2022-11-16 07:55:33,198 INFO L138 BoogieDeclarations]: Found implementation of procedure readw [2022-11-16 07:55:33,198 INFO L130 BoogieDeclarations]: Found specification of procedure hdlc_ioctl [2022-11-16 07:55:33,199 INFO L138 BoogieDeclarations]: Found implementation of procedure hdlc_ioctl [2022-11-16 07:55:33,199 INFO L130 BoogieDeclarations]: Found specification of procedure inb [2022-11-16 07:55:33,199 INFO L138 BoogieDeclarations]: Found implementation of procedure inb [2022-11-16 07:55:33,199 INFO L130 BoogieDeclarations]: Found specification of procedure readl [2022-11-16 07:55:33,199 INFO L138 BoogieDeclarations]: Found implementation of procedure readl [2022-11-16 07:55:33,199 INFO L130 BoogieDeclarations]: Found specification of procedure writel [2022-11-16 07:55:33,200 INFO L138 BoogieDeclarations]: Found implementation of procedure writel [2022-11-16 07:55:33,200 INFO L130 BoogieDeclarations]: Found specification of procedure inl [2022-11-16 07:55:33,200 INFO L138 BoogieDeclarations]: Found implementation of procedure inl [2022-11-16 07:55:33,200 INFO L130 BoogieDeclarations]: Found specification of procedure fst_clear_intr [2022-11-16 07:55:33,200 INFO L138 BoogieDeclarations]: Found implementation of procedure fst_clear_intr [2022-11-16 07:55:33,200 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~intINTTYPE1 [2022-11-16 07:55:33,201 INFO L130 BoogieDeclarations]: Found specification of procedure writeb [2022-11-16 07:55:33,201 INFO L138 BoogieDeclarations]: Found implementation of procedure writeb [2022-11-16 07:55:33,201 INFO L130 BoogieDeclarations]: Found specification of procedure skb_reset_mac_header [2022-11-16 07:55:33,201 INFO L138 BoogieDeclarations]: Found implementation of procedure skb_reset_mac_header [2022-11-16 07:55:33,201 INFO L130 BoogieDeclarations]: Found specification of procedure writew [2022-11-16 07:55:33,201 INFO L138 BoogieDeclarations]: Found implementation of procedure writew [2022-11-16 07:55:33,201 INFO L130 BoogieDeclarations]: Found specification of procedure readb [2022-11-16 07:55:33,202 INFO L138 BoogieDeclarations]: Found implementation of procedure readb [2022-11-16 07:55:33,202 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-16 07:55:33,202 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-16 07:55:33,202 INFO L130 BoogieDeclarations]: Found specification of procedure IS_ERR [2022-11-16 07:55:33,202 INFO L138 BoogieDeclarations]: Found implementation of procedure IS_ERR [2022-11-16 07:55:33,937 INFO L235 CfgBuilder]: Building ICFG [2022-11-16 07:55:33,943 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-16 07:55:47,219 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:55:47,224 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:55:47,231 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:55:47,232 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:55:47,234 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:55:47,235 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:55:47,242 WARN L816 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-11-16 07:56:24,176 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##258: assume false; [2022-11-16 07:56:24,177 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##259: assume !false; [2022-11-16 07:56:24,177 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##265: assume !false; [2022-11-16 07:56:24,177 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##264: assume false; [2022-11-16 07:56:24,177 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##214: assume !false; [2022-11-16 07:56:24,177 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##213: assume false; [2022-11-16 07:56:24,177 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##228: assume !false; [2022-11-16 07:56:24,177 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##227: assume false; [2022-11-16 07:56:24,178 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##92: assume !false;call ULTIMATE.dealloc(fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset);havoc fst_ioctl_~#wrthdr~0#1.base, fst_ioctl_~#wrthdr~0#1.offset;call ULTIMATE.dealloc(fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset);havoc fst_ioctl_~#info~0#1.base, fst_ioctl_~#info~0#1.offset; [2022-11-16 07:56:24,178 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##91: assume false; [2022-11-16 07:56:24,178 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-11-16 07:56:24,178 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-11-16 07:56:24,178 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##391: assume !false; [2022-11-16 07:56:24,178 INFO L769 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##390: assume false; [2022-11-16 07:56:24,278 INFO L276 CfgBuilder]: Performing block encoding [2022-11-16 07:56:25,275 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-16 07:56:25,276 INFO L300 CfgBuilder]: Removed 0 assume(true) statements. [2022-11-16 07:56:25,281 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:56:25 BoogieIcfgContainer [2022-11-16 07:56:25,281 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-16 07:56:25,283 INFO L113 PluginConnector]: ------------------------CodeCheck---------------------------- [2022-11-16 07:56:25,283 INFO L271 PluginConnector]: Initializing CodeCheck... [2022-11-16 07:56:25,293 INFO L275 PluginConnector]: CodeCheck initialized [2022-11-16 07:56:25,293 INFO L185 PluginConnector]: Executing the observer CodeCheckObserver from plugin CodeCheck for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.11 07:56:25" (1/1) ... [2022-11-16 07:56:25,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-16 07:56:25,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand no size info available [2022-11-16 07:56:25,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1176 states to 821 states and 1176 transitions. [2022-11-16 07:56:25,409 INFO L276 IsEmpty]: Start isEmpty. Operand 821 states and 1176 transitions. [2022-11-16 07:56:25,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-11-16 07:56:25,415 INFO L422 CodeCheckObserver]: Error Path is FOUND. [2022-11-16 07:56:25,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-16 07:56:25,463 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Sort BitVec not declared at de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:385) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.sort(WrapperScript.java:228) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.sort(WrapperScript.java:228) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.NonDeclaringTermTransferrer.transferSort(NonDeclaringTermTransferrer.java:111) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.DeclarableSortSymbol.defineOrDeclare(DeclarableSortSymbol.java:79) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.transferHistoryFromRecord(HistoryRecordingScript.java:171) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.transferHistoryFromRecord(HistoryRecordingScript.java:196) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.SmtFunctionsAndAxioms.transferAllSymbols(SmtFunctionsAndAxioms.java:156) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.CfgSmtToolkit.createFreshManagedScript(CfgSmtToolkit.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck.CodeCheckObserver.process(CodeCheckObserver.java:439) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.CFGWalker.runObserver(CFGWalker.java:57) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.runObserver(BaseWalker.java:93) at de.uni_freiburg.informatik.ultimate.core.coreplugin.modelwalker.BaseWalker.run(BaseWalker.java:86) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2022-11-16 07:56:25,469 INFO L158 Benchmark]: Toolchain (without parser) took 55873.03ms. Allocated memory was 62.9MB in the beginning and 398.5MB in the end (delta: 335.5MB). Free memory was 32.6MB in the beginning and 213.9MB in the end (delta: -181.2MB). Peak memory consumption was 155.0MB. Max. memory is 16.1GB. [2022-11-16 07:56:25,470 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 62.9MB. Free memory is still 44.4MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-16 07:56:25,471 INFO L158 Benchmark]: CACSL2BoogieTranslator took 2945.26ms. Allocated memory was 62.9MB in the beginning and 209.7MB in the end (delta: 146.8MB). Free memory was 32.5MB in the beginning and 111.3MB in the end (delta: -78.8MB). Peak memory consumption was 72.0MB. Max. memory is 16.1GB. [2022-11-16 07:56:25,472 INFO L158 Benchmark]: Boogie Procedure Inliner took 259.74ms. Allocated memory is still 209.7MB. Free memory was 111.3MB in the beginning and 92.4MB in the end (delta: 18.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2022-11-16 07:56:25,473 INFO L158 Benchmark]: Boogie Preprocessor took 292.86ms. Allocated memory is still 209.7MB. Free memory was 92.4MB in the beginning and 129.6MB in the end (delta: -37.2MB). Peak memory consumption was 17.4MB. Max. memory is 16.1GB. [2022-11-16 07:56:25,476 INFO L158 Benchmark]: RCFGBuilder took 52182.60ms. Allocated memory was 209.7MB in the beginning and 398.5MB in the end (delta: 188.7MB). Free memory was 129.6MB in the beginning and 223.4MB in the end (delta: -93.8MB). Peak memory consumption was 227.1MB. Max. memory is 16.1GB. [2022-11-16 07:56:25,481 INFO L158 Benchmark]: CodeCheck took 184.69ms. Allocated memory is still 398.5MB. Free memory was 223.4MB in the beginning and 213.9MB in the end (delta: 9.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2022-11-16 07:56:25,486 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: - ExceptionOrErrorResult: SMTLIBException: Sort BitVec not declared de.uni_freiburg.informatik.ultimate.plugins.generator.codecheck: SMTLIBException: Sort BitVec not declared: de.uni_freiburg.informatik.ultimate.logic.NoopScript.sort(NoopScript.java:385) * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 62.9MB. Free memory is still 44.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 2945.26ms. Allocated memory was 62.9MB in the beginning and 209.7MB in the end (delta: 146.8MB). Free memory was 32.5MB in the beginning and 111.3MB in the end (delta: -78.8MB). Peak memory consumption was 72.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 259.74ms. Allocated memory is still 209.7MB. Free memory was 111.3MB in the beginning and 92.4MB in the end (delta: 18.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 292.86ms. Allocated memory is still 209.7MB. Free memory was 92.4MB in the beginning and 129.6MB in the end (delta: -37.2MB). Peak memory consumption was 17.4MB. Max. memory is 16.1GB. * RCFGBuilder took 52182.60ms. Allocated memory was 209.7MB in the beginning and 398.5MB in the end (delta: 188.7MB). Free memory was 129.6MB in the beginning and 223.4MB in the end (delta: -93.8MB). Peak memory consumption was 227.1MB. Max. memory is 16.1GB. * CodeCheck took 184.69ms. Allocated memory is still 398.5MB. Free memory was 223.4MB in the beginning and 213.9MB in the end (delta: 9.5MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. RESULT: Ultimate could not prove your program: Toolchain returned no result. [2022-11-16 07:56:25,545 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e4d9760-4c4f-4856-8632-4a58224a0810/bin/ukojak-CydTVMUXoH/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:10000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: Sort BitVec not declared