./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d33cf51ae449ba0bb3b2aed15ba1d81575fd99e6f7bcd0260e48d36a1c4d14c9 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 01:58:56,156 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 01:58:56,158 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 01:58:56,211 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 01:58:56,212 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 01:58:56,216 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 01:58:56,219 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 01:58:56,222 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 01:58:56,225 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 01:58:56,232 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 01:58:56,233 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 01:58:56,236 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 01:58:56,237 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 01:58:56,241 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 01:58:56,244 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 01:58:56,246 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 01:58:56,248 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 01:58:56,249 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 01:58:56,251 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 01:58:56,258 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 01:58:56,260 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 01:58:56,263 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 01:58:56,267 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 01:58:56,268 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 01:58:56,276 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 01:58:56,276 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 01:58:56,277 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 01:58:56,278 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 01:58:56,278 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 01:58:56,280 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 01:58:56,280 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 01:58:56,281 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 01:58:56,282 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 01:58:56,283 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 01:58:56,284 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 01:58:56,284 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 01:58:56,285 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 01:58:56,285 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 01:58:56,286 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 01:58:56,295 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 01:58:56,297 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 01:58:56,299 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 01:58:56,326 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 01:58:56,326 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 01:58:56,327 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 01:58:56,327 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 01:58:56,328 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 01:58:56,328 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 01:58:56,328 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 01:58:56,329 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 01:58:56,329 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 01:58:56,329 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 01:58:56,329 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 01:58:56,330 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 01:58:56,330 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 01:58:56,330 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 01:58:56,330 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 01:58:56,331 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 01:58:56,331 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 01:58:56,331 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 01:58:56,332 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 01:58:56,332 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 01:58:56,333 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 01:58:56,333 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 01:58:56,333 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 01:58:56,333 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 01:58:56,334 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 01:58:56,334 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 01:58:56,334 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 01:58:56,334 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 01:58:56,335 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 01:58:56,335 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:58:56,335 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 01:58:56,335 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 01:58:56,336 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 01:58:56,336 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 01:58:56,336 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 01:58:56,336 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 01:58:56,337 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 01:58:56,337 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 01:58:56,337 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d33cf51ae449ba0bb3b2aed15ba1d81575fd99e6f7bcd0260e48d36a1c4d14c9 [2022-11-03 01:58:56,726 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 01:58:56,771 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 01:58:56,775 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 01:58:56,776 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 01:58:56,777 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 01:58:56,779 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c [2022-11-03 01:58:56,867 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/cc4669885/3512d35fd85b4cf09d6eeb49cba9f6ce/FLAG0197e4c72 [2022-11-03 01:58:57,683 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 01:58:57,684 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c [2022-11-03 01:58:57,697 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/cc4669885/3512d35fd85b4cf09d6eeb49cba9f6ce/FLAG0197e4c72 [2022-11-03 01:58:57,855 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/cc4669885/3512d35fd85b4cf09d6eeb49cba9f6ce [2022-11-03 01:58:57,858 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 01:58:57,860 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 01:58:57,861 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 01:58:57,862 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 01:58:57,866 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 01:58:57,867 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:58:57" (1/1) ... [2022-11-03 01:58:57,868 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ca1cd1f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:57, skipping insertion in model container [2022-11-03 01:58:57,869 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 01:58:57" (1/1) ... [2022-11-03 01:58:57,877 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 01:58:57,938 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 01:58:58,146 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c[1014,1027] [2022-11-03 01:58:58,488 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:58:58,492 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 01:58:58,504 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c[1014,1027] [2022-11-03 01:58:58,831 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 01:58:58,845 INFO L208 MainTranslator]: Completed translation [2022-11-03 01:58:58,845 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58 WrapperNode [2022-11-03 01:58:58,846 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 01:58:58,847 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 01:58:58,847 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 01:58:58,847 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 01:58:58,856 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:58,906 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,148 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1493 [2022-11-03 01:58:59,148 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 01:58:59,149 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 01:58:59,149 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 01:58:59,149 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 01:58:59,160 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,160 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,204 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,205 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,276 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,282 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,305 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,371 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,407 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 01:58:59,409 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 01:58:59,409 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 01:58:59,409 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 01:58:59,410 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (1/1) ... [2022-11-03 01:58:59,417 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 01:58:59,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 01:58:59,445 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 01:58:59,455 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 01:58:59,495 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 01:58:59,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 01:58:59,865 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 01:58:59,876 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 01:59:12,510 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 01:59:20,464 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 01:59:20,465 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 01:59:20,467 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:59:20 BoogieIcfgContainer [2022-11-03 01:59:20,467 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 01:59:20,471 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 01:59:20,471 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 01:59:20,481 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 01:59:20,481 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 01:58:57" (1/3) ... [2022-11-03 01:59:20,482 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2287b93b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:59:20, skipping insertion in model container [2022-11-03 01:59:20,482 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 01:58:58" (2/3) ... [2022-11-03 01:59:20,482 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2287b93b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 01:59:20, skipping insertion in model container [2022-11-03 01:59:20,483 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:59:20" (3/3) ... [2022-11-03 01:59:20,484 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.bakery.2.prop1-back-serstep.c [2022-11-03 01:59:20,512 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 01:59:20,512 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 01:59:20,568 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 01:59:20,576 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@57026cd3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 01:59:20,577 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 01:59:20,582 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:59:20,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 01:59:20,595 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:59:20,596 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 01:59:20,597 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:59:20,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:59:20,606 INFO L85 PathProgramCache]: Analyzing trace with hash 8709000, now seen corresponding path program 1 times [2022-11-03 01:59:20,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 01:59:20,618 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156887239] [2022-11-03 01:59:20,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:59:20,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 01:59:21,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 01:59:25,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 01:59:25,350 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 01:59:25,352 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156887239] [2022-11-03 01:59:25,353 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156887239] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 01:59:25,353 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 01:59:25,353 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 01:59:25,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1530593864] [2022-11-03 01:59:25,358 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 01:59:25,363 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 01:59:25,364 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 01:59:25,406 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 01:59:25,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 01:59:25,410 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:59:28,289 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.18s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 01:59:30,088 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.07s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 01:59:30,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 01:59:30,112 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-03 01:59:30,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 01:59:30,114 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-03 01:59:30,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 01:59:30,121 INFO L225 Difference]: With dead ends: 15 [2022-11-03 01:59:30,122 INFO L226 Difference]: Without dead ends: 9 [2022-11-03 01:59:30,124 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 01:59:30,128 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-11-03 01:59:30,129 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 4.6s Time] [2022-11-03 01:59:30,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-03 01:59:30,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-03 01:59:30,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:59:30,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-03 01:59:30,163 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-03 01:59:30,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 01:59:30,164 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-03 01:59:30,164 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 01:59:30,165 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-03 01:59:30,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 01:59:30,165 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 01:59:30,166 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-03 01:59:30,166 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 01:59:30,166 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 01:59:30,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 01:59:30,167 INFO L85 PathProgramCache]: Analyzing trace with hash 1766776141, now seen corresponding path program 1 times [2022-11-03 01:59:30,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 01:59:30,168 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [819350577] [2022-11-03 01:59:30,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 01:59:30,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:01:42,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:01:42,935 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 02:03:59,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:03:59,981 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 02:03:59,982 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 02:03:59,985 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:03:59,987 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 02:03:59,999 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-03 02:04:00,004 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:04:00,136 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:00,137 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:04:00,222 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:04:00 BoogieIcfgContainer [2022-11-03 02:04:00,222 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:04:00,223 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:04:00,223 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:04:00,223 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:04:00,228 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 01:59:20" (3/4) ... [2022-11-03 02:04:00,232 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 02:04:00,232 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:04:00,233 INFO L158 Benchmark]: Toolchain (without parser) took 302372.94ms. Allocated memory was 88.1MB in the beginning and 3.3GB in the end (delta: 3.2GB). Free memory was 48.2MB in the beginning and 2.1GB in the end (delta: -2.1GB). Peak memory consumption was 1.2GB. Max. memory is 16.1GB. [2022-11-03 02:04:00,234 INFO L158 Benchmark]: CDTParser took 0.41ms. Allocated memory is still 88.1MB. Free memory is still 66.4MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:04:00,235 INFO L158 Benchmark]: CACSL2BoogieTranslator took 984.62ms. Allocated memory is still 88.1MB. Free memory was 48.0MB in the beginning and 49.4MB in the end (delta: -1.4MB). Peak memory consumption was 16.7MB. Max. memory is 16.1GB. [2022-11-03 02:04:00,239 INFO L158 Benchmark]: Boogie Procedure Inliner took 301.55ms. Allocated memory was 88.1MB in the beginning and 107.0MB in the end (delta: 18.9MB). Free memory was 49.4MB in the beginning and 53.4MB in the end (delta: -4.0MB). Peak memory consumption was 29.6MB. Max. memory is 16.1GB. [2022-11-03 02:04:00,239 INFO L158 Benchmark]: Boogie Preprocessor took 258.91ms. Allocated memory is still 107.0MB. Free memory was 53.4MB in the beginning and 52.3MB in the end (delta: 1.1MB). Peak memory consumption was 26.1MB. Max. memory is 16.1GB. [2022-11-03 02:04:00,245 INFO L158 Benchmark]: RCFGBuilder took 21059.05ms. Allocated memory was 107.0MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 52.3MB in the beginning and 1.4GB in the end (delta: -1.3GB). Peak memory consumption was 593.3MB. Max. memory is 16.1GB. [2022-11-03 02:04:00,246 INFO L158 Benchmark]: TraceAbstraction took 279751.60ms. Allocated memory was 1.7GB in the beginning and 3.3GB in the end (delta: 1.6GB). Free memory was 1.4GB in the beginning and 2.1GB in the end (delta: -733.5MB). Peak memory consumption was 1.8GB. Max. memory is 16.1GB. [2022-11-03 02:04:00,247 INFO L158 Benchmark]: Witness Printer took 9.17ms. Allocated memory is still 3.3GB. Free memory is still 2.1GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:04:00,249 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.41ms. Allocated memory is still 88.1MB. Free memory is still 66.4MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 984.62ms. Allocated memory is still 88.1MB. Free memory was 48.0MB in the beginning and 49.4MB in the end (delta: -1.4MB). Peak memory consumption was 16.7MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 301.55ms. Allocated memory was 88.1MB in the beginning and 107.0MB in the end (delta: 18.9MB). Free memory was 49.4MB in the beginning and 53.4MB in the end (delta: -4.0MB). Peak memory consumption was 29.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 258.91ms. Allocated memory is still 107.0MB. Free memory was 53.4MB in the beginning and 52.3MB in the end (delta: 1.1MB). Peak memory consumption was 26.1MB. Max. memory is 16.1GB. * RCFGBuilder took 21059.05ms. Allocated memory was 107.0MB in the beginning and 1.7GB in the end (delta: 1.6GB). Free memory was 52.3MB in the beginning and 1.4GB in the end (delta: -1.3GB). Peak memory consumption was 593.3MB. Max. memory is 16.1GB. * TraceAbstraction took 279751.60ms. Allocated memory was 1.7GB in the beginning and 3.3GB in the end (delta: 1.6GB). Free memory was 1.4GB in the beginning and 2.1GB in the end (delta: -733.5MB). Peak memory consumption was 1.8GB. Max. memory is 16.1GB. * Witness Printer took 9.17ms. Allocated memory is still 3.3GB. Free memory is still 2.1GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseComplement at line 214, overapproximation of bitwiseOr at line 325, overapproximation of bitwiseAnd at line 148. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 8); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (8 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 24); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (24 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_2 var_5 = 0; [L38] const SORT_1 var_22 = 0; [L39] const SORT_2 var_56 = 0; [L40] const SORT_1 var_111 = 1; [L41] const SORT_4 var_117 = 2; [L42] const SORT_3 var_118 = 0; [L43] const SORT_4 var_133 = 1; [L44] const SORT_2 var_150 = 2; [L45] const SORT_4 var_155 = 6; [L46] const SORT_2 var_167 = 1; [L47] const SORT_4 var_188 = 0; [L49] SORT_2 input_75; [L50] SORT_2 input_77; [L51] SORT_2 input_79; [L52] SORT_2 input_81; [L53] SORT_2 input_83; [L54] SORT_2 input_85; [L55] SORT_2 input_87; [L56] SORT_2 input_89; [L57] SORT_1 input_91; [L58] SORT_1 input_93; [L59] SORT_1 input_95; [L60] SORT_1 input_97; [L61] SORT_1 input_99; [L62] SORT_1 input_101; [L63] SORT_1 input_103; [L64] SORT_1 input_105; [L65] SORT_1 input_107; [L66] SORT_1 input_109; [L67] SORT_1 input_113; [L68] SORT_1 input_115; [L69] SORT_1 input_132; [L70] SORT_1 input_149; [L71] SORT_1 input_161; [L72] SORT_1 input_176; [L73] SORT_1 input_195; [L74] SORT_1 input_206; [L75] SORT_1 input_209; [L76] SORT_1 input_212; [L77] SORT_1 input_228; [L78] SORT_1 input_244; [L79] SORT_1 input_254; [L80] SORT_1 input_268; [L81] SORT_1 input_286; [L82] SORT_1 input_297; [L84] SORT_2 state_6 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L85] SORT_2 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L86] SORT_2 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L87] SORT_2 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L88] SORT_2 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L89] SORT_2 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L90] SORT_2 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L91] SORT_2 state_20 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L92] SORT_1 state_23 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] SORT_1 state_25 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] SORT_1 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] SORT_1 state_29 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] SORT_1 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] SORT_1 state_33 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] SORT_1 state_35 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] SORT_1 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L100] SORT_1 state_39 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 state_41 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L102] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L103] SORT_1 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L105] SORT_2 init_7_arg_1 = var_5; [L106] state_6 = init_7_arg_1 [L107] SORT_2 init_9_arg_1 = var_5; [L108] state_8 = init_9_arg_1 [L109] SORT_2 init_11_arg_1 = var_5; [L110] state_10 = init_11_arg_1 [L111] SORT_2 init_13_arg_1 = var_5; [L112] state_12 = init_13_arg_1 [L113] SORT_2 init_15_arg_1 = var_5; [L114] state_14 = init_15_arg_1 [L115] SORT_2 init_17_arg_1 = var_5; [L116] state_16 = init_17_arg_1 [L117] SORT_2 init_19_arg_1 = var_5; [L118] state_18 = init_19_arg_1 [L119] SORT_2 init_21_arg_1 = var_5; [L120] state_20 = init_21_arg_1 [L121] SORT_1 init_24_arg_1 = var_22; [L122] state_23 = init_24_arg_1 [L123] SORT_1 init_26_arg_1 = var_22; [L124] state_25 = init_26_arg_1 [L125] SORT_1 init_28_arg_1 = var_22; [L126] state_27 = init_28_arg_1 [L127] SORT_1 init_30_arg_1 = var_22; [L128] state_29 = init_30_arg_1 [L129] SORT_1 init_32_arg_1 = var_22; [L130] state_31 = init_32_arg_1 [L131] SORT_1 init_34_arg_1 = var_22; [L132] state_33 = init_34_arg_1 [L133] SORT_1 init_36_arg_1 = var_22; [L134] state_35 = init_36_arg_1 [L135] SORT_1 init_38_arg_1 = var_22; [L136] state_37 = init_38_arg_1 [L137] SORT_1 init_40_arg_1 = var_22; [L138] state_39 = init_40_arg_1 [L139] SORT_1 init_42_arg_1 = var_22; [L140] state_41 = init_42_arg_1 [L141] SORT_1 init_44_arg_1 = var_22; [L142] state_43 = init_44_arg_1 [L143] SORT_1 init_46_arg_1 = var_22; [L144] state_45 = init_46_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_23=0, state_25=0, state_27=0, state_29=0, state_31=0, state_33=0, state_35=0, state_37=0, state_39=0, state_41=0, state_43=0, state_45=0, state_6=0, state_8=0, var_111=1, var_117=2, var_118=0, var_133=1, var_150=2, var_155=6, var_167=1, var_188=0, var_22=0, var_5=0, var_56=0] [L147] input_75 = __VERIFIER_nondet_uchar() [L148] input_75 = input_75 & mask_SORT_2 [L149] input_77 = __VERIFIER_nondet_uchar() [L150] input_77 = input_77 & mask_SORT_2 [L151] input_79 = __VERIFIER_nondet_uchar() [L152] input_79 = input_79 & mask_SORT_2 [L153] input_81 = __VERIFIER_nondet_uchar() [L154] input_81 = input_81 & mask_SORT_2 [L155] input_83 = __VERIFIER_nondet_uchar() [L156] input_83 = input_83 & mask_SORT_2 [L157] input_85 = __VERIFIER_nondet_uchar() [L158] input_85 = input_85 & mask_SORT_2 [L159] input_87 = __VERIFIER_nondet_uchar() [L160] input_87 = input_87 & mask_SORT_2 [L161] input_89 = __VERIFIER_nondet_uchar() [L162] input_89 = input_89 & mask_SORT_2 [L163] input_91 = __VERIFIER_nondet_uchar() [L164] input_91 = input_91 & mask_SORT_1 [L165] input_93 = __VERIFIER_nondet_uchar() [L166] input_93 = input_93 & mask_SORT_1 [L167] input_95 = __VERIFIER_nondet_uchar() [L168] input_95 = input_95 & mask_SORT_1 [L169] input_97 = __VERIFIER_nondet_uchar() [L170] input_97 = input_97 & mask_SORT_1 [L171] input_99 = __VERIFIER_nondet_uchar() [L172] input_99 = input_99 & mask_SORT_1 [L173] input_101 = __VERIFIER_nondet_uchar() [L174] input_101 = input_101 & mask_SORT_1 [L175] input_103 = __VERIFIER_nondet_uchar() [L176] input_103 = input_103 & mask_SORT_1 [L177] input_105 = __VERIFIER_nondet_uchar() [L178] input_105 = input_105 & mask_SORT_1 [L179] input_107 = __VERIFIER_nondet_uchar() [L180] input_107 = input_107 & mask_SORT_1 [L181] input_109 = __VERIFIER_nondet_uchar() [L182] input_109 = input_109 & mask_SORT_1 [L183] input_113 = __VERIFIER_nondet_uchar() [L184] input_113 = input_113 & mask_SORT_1 [L185] input_115 = __VERIFIER_nondet_uchar() [L186] input_115 = input_115 & mask_SORT_1 [L187] input_132 = __VERIFIER_nondet_uchar() [L188] input_132 = input_132 & mask_SORT_1 [L189] input_149 = __VERIFIER_nondet_uchar() [L190] input_149 = input_149 & mask_SORT_1 [L191] input_161 = __VERIFIER_nondet_uchar() [L192] input_176 = __VERIFIER_nondet_uchar() [L193] input_176 = input_176 & mask_SORT_1 [L194] input_195 = __VERIFIER_nondet_uchar() [L195] input_206 = __VERIFIER_nondet_uchar() [L196] input_206 = input_206 & mask_SORT_1 [L197] input_209 = __VERIFIER_nondet_uchar() [L198] input_209 = input_209 & mask_SORT_1 [L199] input_212 = __VERIFIER_nondet_uchar() [L200] input_212 = input_212 & mask_SORT_1 [L201] input_228 = __VERIFIER_nondet_uchar() [L202] input_228 = input_228 & mask_SORT_1 [L203] input_244 = __VERIFIER_nondet_uchar() [L204] input_244 = input_244 & mask_SORT_1 [L205] input_254 = __VERIFIER_nondet_uchar() [L206] input_268 = __VERIFIER_nondet_uchar() [L207] input_268 = input_268 & mask_SORT_1 [L208] input_286 = __VERIFIER_nondet_uchar() [L209] input_297 = __VERIFIER_nondet_uchar() [L210] input_297 = input_297 & mask_SORT_1 [L213] SORT_1 var_47_arg_0 = state_23; [L214] SORT_1 var_47_arg_1 = ~state_25; [L215] var_47_arg_1 = var_47_arg_1 & mask_SORT_1 [L216] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L217] SORT_1 var_48_arg_0 = var_47; [L218] SORT_1 var_48_arg_1 = ~state_27; [L219] var_48_arg_1 = var_48_arg_1 & mask_SORT_1 [L220] SORT_1 var_48 = var_48_arg_0 & var_48_arg_1; [L221] SORT_1 var_49_arg_0 = var_48; [L222] SORT_1 var_49_arg_1 = ~state_29; [L223] var_49_arg_1 = var_49_arg_1 & mask_SORT_1 [L224] SORT_1 var_49 = var_49_arg_0 & var_49_arg_1; [L225] SORT_1 var_50_arg_0 = var_49; [L226] SORT_1 var_50_arg_1 = ~state_31; [L227] var_50_arg_1 = var_50_arg_1 & mask_SORT_1 [L228] SORT_1 var_50 = var_50_arg_0 & var_50_arg_1; [L229] SORT_1 var_51_arg_0 = var_50; [L230] SORT_1 var_51_arg_1 = state_33; [L231] SORT_1 var_51 = var_51_arg_0 & var_51_arg_1; [L232] SORT_1 var_52_arg_0 = var_51; [L233] SORT_1 var_52_arg_1 = ~state_35; [L234] var_52_arg_1 = var_52_arg_1 & mask_SORT_1 [L235] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L236] SORT_1 var_53_arg_0 = var_52; [L237] SORT_1 var_53_arg_1 = ~state_37; [L238] var_53_arg_1 = var_53_arg_1 & mask_SORT_1 [L239] SORT_1 var_53 = var_53_arg_0 & var_53_arg_1; [L240] SORT_1 var_54_arg_0 = var_53; [L241] SORT_1 var_54_arg_1 = ~state_39; [L242] var_54_arg_1 = var_54_arg_1 & mask_SORT_1 [L243] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L244] SORT_1 var_55_arg_0 = var_54; [L245] SORT_1 var_55_arg_1 = ~state_41; [L246] var_55_arg_1 = var_55_arg_1 & mask_SORT_1 [L247] SORT_1 var_55 = var_55_arg_0 & var_55_arg_1; [L248] SORT_2 var_57_arg_0 = var_56; [L249] SORT_2 var_57_arg_1 = state_6; [L250] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L251] SORT_1 var_58_arg_0 = var_55; [L252] SORT_1 var_58_arg_1 = var_57; [L253] SORT_1 var_58 = var_58_arg_0 & var_58_arg_1; [L254] SORT_2 var_59_arg_0 = var_56; [L255] SORT_2 var_59_arg_1 = state_8; [L256] SORT_1 var_59 = var_59_arg_0 == var_59_arg_1; [L257] SORT_1 var_60_arg_0 = var_58; [L258] SORT_1 var_60_arg_1 = var_59; [L259] SORT_1 var_60 = var_60_arg_0 & var_60_arg_1; [L260] SORT_2 var_61_arg_0 = var_56; [L261] SORT_2 var_61_arg_1 = state_10; [L262] SORT_1 var_61 = var_61_arg_0 == var_61_arg_1; [L263] SORT_1 var_62_arg_0 = var_60; [L264] SORT_1 var_62_arg_1 = var_61; [L265] SORT_1 var_62 = var_62_arg_0 & var_62_arg_1; [L266] SORT_2 var_63_arg_0 = var_56; [L267] SORT_2 var_63_arg_1 = state_12; [L268] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L269] SORT_1 var_64_arg_0 = var_62; [L270] SORT_1 var_64_arg_1 = var_63; [L271] SORT_1 var_64 = var_64_arg_0 & var_64_arg_1; [L272] SORT_2 var_65_arg_0 = var_56; [L273] SORT_2 var_65_arg_1 = state_14; [L274] SORT_1 var_65 = var_65_arg_0 == var_65_arg_1; [L275] SORT_1 var_66_arg_0 = var_64; [L276] SORT_1 var_66_arg_1 = var_65; [L277] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L278] SORT_2 var_67_arg_0 = var_56; [L279] SORT_2 var_67_arg_1 = state_16; [L280] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L281] SORT_1 var_68_arg_0 = var_66; [L282] SORT_1 var_68_arg_1 = var_67; [L283] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L284] SORT_2 var_69_arg_0 = var_56; [L285] SORT_2 var_69_arg_1 = state_18; [L286] SORT_1 var_69 = var_69_arg_0 == var_69_arg_1; [L287] SORT_1 var_70_arg_0 = var_68; [L288] SORT_1 var_70_arg_1 = var_69; [L289] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L290] SORT_2 var_71_arg_0 = var_56; [L291] SORT_2 var_71_arg_1 = state_20; [L292] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L293] SORT_1 var_72_arg_0 = var_70; [L294] SORT_1 var_72_arg_1 = var_71; [L295] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L296] SORT_1 var_73_arg_0 = state_45; [L297] SORT_1 var_73_arg_1 = var_72; [L298] SORT_1 var_73 = var_73_arg_0 & var_73_arg_1; [L299] var_73 = var_73 & mask_SORT_1 [L300] SORT_1 bad_74_arg_0 = var_73; [L301] CALL __VERIFIER_assert(!(bad_74_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L301] RET __VERIFIER_assert(!(bad_74_arg_0)) [L303] SORT_2 next_76_arg_1 = input_75; [L304] SORT_2 next_78_arg_1 = input_77; [L305] SORT_2 next_80_arg_1 = input_79; [L306] SORT_2 next_82_arg_1 = input_81; [L307] SORT_2 next_84_arg_1 = input_83; [L308] SORT_2 next_86_arg_1 = input_85; [L309] SORT_2 next_88_arg_1 = input_87; [L310] SORT_2 next_90_arg_1 = input_89; [L311] SORT_1 next_92_arg_1 = input_91; [L312] SORT_1 next_94_arg_1 = input_93; [L313] SORT_1 next_96_arg_1 = input_95; [L314] SORT_1 next_98_arg_1 = input_97; [L315] SORT_1 next_100_arg_1 = input_99; [L316] SORT_1 next_102_arg_1 = input_101; [L317] SORT_1 next_104_arg_1 = input_103; [L318] SORT_1 next_106_arg_1 = input_105; [L319] SORT_1 next_108_arg_1 = input_107; [L320] SORT_1 next_110_arg_1 = input_109; [L321] SORT_1 next_112_arg_1 = var_111; [L322] SORT_1 var_114_arg_0 = input_91; [L323] SORT_1 var_114_arg_1 = ~input_113; [L324] var_114_arg_1 = var_114_arg_1 & mask_SORT_1 [L325] SORT_1 var_114 = var_114_arg_0 | var_114_arg_1; [L326] SORT_1 var_116_arg_0 = input_93; [L327] SORT_1 var_116_arg_1 = input_113; [L328] SORT_1 var_116 = var_116_arg_0 | var_116_arg_1; [L329] SORT_1 var_119_arg_0 = input_113; [L330] SORT_2 var_119_arg_1 = var_56; [L331] SORT_2 var_119_arg_2 = input_83; [L332] EXPR var_119_arg_0 ? var_119_arg_1 : var_119_arg_2 [L332] SORT_2 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L333] var_119 = var_119 & mask_SORT_2 [L334] SORT_3 var_120_arg_0 = var_118; [L335] SORT_2 var_120_arg_1 = var_119; [L336] SORT_4 var_120 = ((SORT_4)var_120_arg_0 << 8) | var_120_arg_1; [L337] var_120 = var_120 & mask_SORT_4 [L338] SORT_4 var_121_arg_0 = var_117; [L339] SORT_4 var_121_arg_1 = var_120; [L340] SORT_1 var_121 = var_121_arg_0 <= var_121_arg_1; [L341] SORT_2 var_122_arg_0 = var_56; [L342] SORT_2 var_122_arg_1 = var_119; [L343] SORT_1 var_122 = var_122_arg_0 == var_122_arg_1; [L344] SORT_1 var_123_arg_0 = var_122; [L345] SORT_2 var_123_arg_1 = input_79; [L346] SORT_2 var_123_arg_2 = input_81; [L347] EXPR var_123_arg_0 ? var_123_arg_1 : var_123_arg_2 [L347] SORT_2 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L348] var_123 = var_123 & mask_SORT_2 [L349] SORT_3 var_124_arg_0 = var_118; [L350] SORT_2 var_124_arg_1 = var_123; [L351] SORT_4 var_124 = ((SORT_4)var_124_arg_0 << 8) | var_124_arg_1; [L352] var_124 = var_124 & mask_SORT_4 [L353] SORT_1 var_125_arg_0 = input_113; [L354] SORT_2 var_125_arg_1 = var_56; [L355] SORT_2 var_125_arg_2 = input_85; [L356] EXPR var_125_arg_0 ? var_125_arg_1 : var_125_arg_2 [L356] SORT_2 var_125 = var_125_arg_0 ? var_125_arg_1 : var_125_arg_2; [L357] var_125 = var_125 & mask_SORT_2 [L358] SORT_3 var_126_arg_0 = var_118; [L359] SORT_2 var_126_arg_1 = var_125; [L360] SORT_4 var_126 = ((SORT_4)var_126_arg_0 << 8) | var_126_arg_1; [L361] var_126 = var_126 & mask_SORT_4 [L362] SORT_4 var_127_arg_0 = var_124; [L363] SORT_4 var_127_arg_1 = var_126; [L364] SORT_1 var_127 = var_127_arg_0 <= var_127_arg_1; [L365] SORT_1 var_128_arg_0 = ~var_121; [L366] var_128_arg_0 = var_128_arg_0 & mask_SORT_1 [L367] SORT_1 var_128_arg_1 = ~var_127; [L368] var_128_arg_1 = var_128_arg_1 & mask_SORT_1 [L369] SORT_1 var_128 = var_128_arg_0 & var_128_arg_1; [L370] SORT_1 var_129_arg_0 = var_116; [L371] SORT_1 var_129_arg_1 = var_128; [L372] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L373] SORT_1 var_130_arg_0 = ~input_115; [L374] var_130_arg_0 = var_130_arg_0 & mask_SORT_1 [L375] SORT_1 var_130_arg_1 = var_129; [L376] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L377] SORT_1 var_131_arg_0 = var_114; [L378] SORT_1 var_131_arg_1 = var_130; [L379] SORT_1 var_131 = var_131_arg_0 & var_131_arg_1; [L380] SORT_4 var_134_arg_0 = var_133; [L381] SORT_4 var_134_arg_1 = var_120; [L382] SORT_4 var_134 = var_134_arg_0 + var_134_arg_1; [L383] SORT_4 var_135_arg_0 = var_134; [L384] SORT_2 var_135 = var_135_arg_0 >> 0; [L385] SORT_1 var_136_arg_0 = input_115; [L386] SORT_2 var_136_arg_1 = var_135; [L387] SORT_2 var_136_arg_2 = var_119; [L388] EXPR var_136_arg_0 ? var_136_arg_1 : var_136_arg_2 [L388] SORT_2 var_136 = var_136_arg_0 ? var_136_arg_1 : var_136_arg_2; [L389] var_136 = var_136 & mask_SORT_2 [L390] SORT_3 var_137_arg_0 = var_118; [L391] SORT_2 var_137_arg_1 = var_136; [L392] SORT_4 var_137 = ((SORT_4)var_137_arg_0 << 8) | var_137_arg_1; [L393] var_137 = var_137 & mask_SORT_4 [L394] SORT_4 var_138_arg_0 = var_117; [L395] SORT_4 var_138_arg_1 = var_137; [L396] SORT_1 var_138 = var_138_arg_0 <= var_138_arg_1; [L397] SORT_2 var_139_arg_0 = var_56; [L398] SORT_2 var_139_arg_1 = var_136; [L399] SORT_1 var_139 = var_139_arg_0 == var_139_arg_1; [L400] SORT_1 var_140_arg_0 = var_139; [L401] SORT_2 var_140_arg_1 = input_79; [L402] SORT_2 var_140_arg_2 = input_81; [L403] EXPR var_140_arg_0 ? var_140_arg_1 : var_140_arg_2 [L403] SORT_2 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L404] var_140 = var_140 & mask_SORT_2 [L405] SORT_3 var_141_arg_0 = var_118; [L406] SORT_2 var_141_arg_1 = var_140; [L407] SORT_4 var_141 = ((SORT_4)var_141_arg_0 << 8) | var_141_arg_1; [L408] var_141 = var_141 & mask_SORT_4 [L409] SORT_1 var_142_arg_0 = input_115; [L410] SORT_2 var_142_arg_1 = var_123; [L411] SORT_2 var_142_arg_2 = var_125; [L412] EXPR var_142_arg_0 ? var_142_arg_1 : var_142_arg_2 [L412] SORT_2 var_142 = var_142_arg_0 ? var_142_arg_1 : var_142_arg_2; [L413] var_142 = var_142 & mask_SORT_2 [L414] SORT_3 var_143_arg_0 = var_118; [L415] SORT_2 var_143_arg_1 = var_142; [L416] SORT_4 var_143 = ((SORT_4)var_143_arg_0 << 8) | var_143_arg_1; [L417] var_143 = var_143 & mask_SORT_4 [L418] SORT_4 var_144_arg_0 = var_141; [L419] SORT_4 var_144_arg_1 = var_143; [L420] SORT_1 var_144 = var_144_arg_0 <= var_144_arg_1; [L421] SORT_1 var_145_arg_0 = ~var_138; [L422] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L423] SORT_1 var_145_arg_1 = var_144; [L424] SORT_1 var_145 = var_145_arg_0 & var_145_arg_1; [L425] SORT_1 var_146_arg_0 = var_116; [L426] SORT_1 var_146_arg_1 = var_145; [L427] SORT_1 var_146 = var_146_arg_0 & var_146_arg_1; [L428] SORT_1 var_147_arg_0 = ~input_132; [L429] var_147_arg_0 = var_147_arg_0 & mask_SORT_1 [L430] SORT_1 var_147_arg_1 = var_146; [L431] SORT_1 var_147 = var_147_arg_0 | var_147_arg_1; [L432] SORT_1 var_148_arg_0 = var_131; [L433] SORT_1 var_148_arg_1 = var_147; [L434] SORT_1 var_148 = var_148_arg_0 & var_148_arg_1; [L435] SORT_4 var_151_arg_0 = var_133; [L436] SORT_4 var_151_arg_1 = var_137; [L437] SORT_4 var_151 = var_151_arg_0 + var_151_arg_1; [L438] SORT_4 var_152_arg_0 = var_151; [L439] SORT_2 var_152 = var_152_arg_0 >> 0; [L440] SORT_1 var_153_arg_0 = input_132; [L441] SORT_2 var_153_arg_1 = var_152; [L442] SORT_2 var_153_arg_2 = var_136; [L443] EXPR var_153_arg_0 ? var_153_arg_1 : var_153_arg_2 [L443] SORT_2 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L444] var_153 = var_153 & mask_SORT_2 [L445] SORT_2 var_154_arg_0 = var_150; [L446] SORT_2 var_154_arg_1 = var_153; [L447] SORT_1 var_154 = var_154_arg_0 == var_154_arg_1; [L448] SORT_4 var_156_arg_0 = var_155; [L449] SORT_4 var_156_arg_1 = var_143; [L450] SORT_1 var_156 = var_156_arg_0 <= var_156_arg_1; [L451] SORT_1 var_157_arg_0 = var_154; [L452] SORT_1 var_157_arg_1 = ~var_156; [L453] var_157_arg_1 = var_157_arg_1 & mask_SORT_1 [L454] SORT_1 var_157 = var_157_arg_0 & var_157_arg_1; [L455] SORT_1 var_158_arg_0 = var_116; [L456] SORT_1 var_158_arg_1 = var_157; [L457] SORT_1 var_158 = var_158_arg_0 & var_158_arg_1; [L458] SORT_1 var_159_arg_0 = ~input_149; [L459] var_159_arg_0 = var_159_arg_0 & mask_SORT_1 [L460] SORT_1 var_159_arg_1 = var_158; [L461] SORT_1 var_159 = var_159_arg_0 | var_159_arg_1; [L462] SORT_1 var_160_arg_0 = var_148; [L463] SORT_1 var_160_arg_1 = var_159; [L464] SORT_1 var_160 = var_160_arg_0 & var_160_arg_1; [L465] SORT_1 var_162_arg_0 = input_95; [L466] SORT_1 var_162_arg_1 = input_149; [L467] SORT_1 var_162 = var_162_arg_0 | var_162_arg_1; [L468] SORT_1 var_163_arg_0 = input_149; [L469] SORT_2 var_163_arg_1 = var_56; [L470] SORT_2 var_163_arg_2 = var_153; [L471] EXPR var_163_arg_0 ? var_163_arg_1 : var_163_arg_2 [L471] SORT_2 var_163 = var_163_arg_0 ? var_163_arg_1 : var_163_arg_2; [L472] var_163 = var_163 & mask_SORT_2 [L473] SORT_3 var_164_arg_0 = var_118; [L474] SORT_2 var_164_arg_1 = var_163; [L475] SORT_4 var_164 = ((SORT_4)var_164_arg_0 << 8) | var_164_arg_1; [L476] var_164 = var_164 & mask_SORT_4 [L477] SORT_4 var_165_arg_0 = var_117; [L478] SORT_4 var_165_arg_1 = var_164; [L479] SORT_1 var_165 = var_165_arg_0 <= var_165_arg_1; [L480] SORT_2 var_166_arg_0 = var_56; [L481] SORT_2 var_166_arg_1 = var_163; [L482] SORT_1 var_166 = var_166_arg_0 == var_166_arg_1; [L483] SORT_1 var_168_arg_0 = input_113; [L484] SORT_2 var_168_arg_1 = var_167; [L485] SORT_2 var_168_arg_2 = input_75; [L486] EXPR var_168_arg_0 ? var_168_arg_1 : var_168_arg_2 [L486] SORT_2 var_168 = var_168_arg_0 ? var_168_arg_1 : var_168_arg_2; [L487] SORT_1 var_169_arg_0 = input_149; [L488] SORT_2 var_169_arg_1 = var_56; [L489] SORT_2 var_169_arg_2 = var_168; [L490] EXPR var_169_arg_0 ? var_169_arg_1 : var_169_arg_2 [L490] SORT_2 var_169 = var_169_arg_0 ? var_169_arg_1 : var_169_arg_2; [L491] var_169 = var_169 & mask_SORT_2 [L492] SORT_1 var_170_arg_0 = var_166; [L493] SORT_2 var_170_arg_1 = var_169; [L494] SORT_2 var_170_arg_2 = input_77; [L495] EXPR var_170_arg_0 ? var_170_arg_1 : var_170_arg_2 [L495] SORT_2 var_170 = var_170_arg_0 ? var_170_arg_1 : var_170_arg_2; [L496] var_170 = var_170 & mask_SORT_2 [L497] SORT_2 var_171_arg_0 = var_56; [L498] SORT_2 var_171_arg_1 = var_170; [L499] SORT_1 var_171 = var_171_arg_0 == var_171_arg_1; [L500] SORT_1 var_172_arg_0 = ~var_165; [L501] var_172_arg_0 = var_172_arg_0 & mask_SORT_1 [L502] SORT_1 var_172_arg_1 = var_171; [L503] SORT_1 var_172 = var_172_arg_0 & var_172_arg_1; [L504] SORT_1 var_173_arg_0 = var_162; [L505] SORT_1 var_173_arg_1 = var_172; [L506] SORT_1 var_173 = var_173_arg_0 & var_173_arg_1; [L507] SORT_1 var_174_arg_0 = ~input_161; [L508] var_174_arg_0 = var_174_arg_0 & mask_SORT_1 [L509] SORT_1 var_174_arg_1 = var_173; [L510] SORT_1 var_174 = var_174_arg_0 | var_174_arg_1; [L511] SORT_1 var_175_arg_0 = var_160; [L512] SORT_1 var_175_arg_1 = var_174; [L513] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L514] SORT_1 var_177_arg_0 = input_97; [L515] SORT_1 var_177_arg_1 = input_161; [L516] SORT_1 var_177 = var_177_arg_0 | var_177_arg_1; [L517] SORT_4 var_178_arg_0 = var_133; [L518] SORT_4 var_178_arg_1 = var_143; [L519] SORT_4 var_178 = var_178_arg_0 + var_178_arg_1; [L520] SORT_4 var_179_arg_0 = var_178; [L521] SORT_2 var_179 = var_179_arg_0 >> 0; [L522] SORT_1 var_180_arg_0 = input_149; [L523] SORT_2 var_180_arg_1 = var_179; [L524] SORT_2 var_180_arg_2 = input_79; [L525] EXPR var_180_arg_0 ? var_180_arg_1 : var_180_arg_2 [L525] SORT_2 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; [L526] var_180 = var_180 & mask_SORT_2 [L527] SORT_1 var_181_arg_0 = var_166; [L528] SORT_2 var_181_arg_1 = var_180; [L529] SORT_2 var_181_arg_2 = input_81; [L530] EXPR var_181_arg_0 ? var_181_arg_1 : var_181_arg_2 [L530] SORT_2 var_181 = var_181_arg_0 ? var_181_arg_1 : var_181_arg_2; [L531] var_181 = var_181 & mask_SORT_2 [L532] SORT_2 var_182_arg_0 = var_56; [L533] SORT_2 var_182_arg_1 = var_181; [L534] SORT_1 var_182 = var_182_arg_0 == var_182_arg_1; [L535] SORT_3 var_183_arg_0 = var_118; [L536] SORT_2 var_183_arg_1 = var_180; [L537] SORT_4 var_183 = ((SORT_4)var_183_arg_0 << 8) | var_183_arg_1; [L538] var_183 = var_183 & mask_SORT_4 [L539] SORT_3 var_184_arg_0 = var_118; [L540] SORT_2 var_184_arg_1 = var_181; [L541] SORT_4 var_184 = ((SORT_4)var_184_arg_0 << 8) | var_184_arg_1; [L542] var_184 = var_184 & mask_SORT_4 [L543] SORT_4 var_185_arg_0 = var_183; [L544] SORT_4 var_185_arg_1 = var_184; [L545] SORT_1 var_185 = var_185_arg_0 <= var_185_arg_1; [L546] SORT_1 var_186_arg_0 = var_182; [L547] SORT_1 var_186_arg_1 = ~var_185; [L548] var_186_arg_1 = var_186_arg_1 & mask_SORT_1 [L549] SORT_1 var_186 = var_186_arg_0 | var_186_arg_1; [L550] SORT_2 var_187_arg_0 = var_180; [L551] SORT_2 var_187_arg_1 = var_181; [L552] SORT_1 var_187 = var_187_arg_0 == var_187_arg_1; [L553] SORT_4 var_189_arg_0 = var_188; [L554] SORT_4 var_189_arg_1 = var_164; [L555] SORT_1 var_189 = var_189_arg_0 <= var_189_arg_1; [L556] SORT_1 var_190_arg_0 = var_187; [L557] SORT_1 var_190_arg_1 = var_189; [L558] SORT_1 var_190 = var_190_arg_0 & var_190_arg_1; [L559] SORT_1 var_191_arg_0 = var_186; [L560] SORT_1 var_191_arg_1 = var_190; [L561] SORT_1 var_191 = var_191_arg_0 | var_191_arg_1; [L562] SORT_1 var_192_arg_0 = var_177; [L563] SORT_1 var_192_arg_1 = var_191; [L564] SORT_1 var_192 = var_192_arg_0 & var_192_arg_1; [L565] SORT_1 var_193_arg_0 = ~input_176; [L566] var_193_arg_0 = var_193_arg_0 & mask_SORT_1 [L567] SORT_1 var_193_arg_1 = var_192; [L568] SORT_1 var_193 = var_193_arg_0 | var_193_arg_1; [L569] SORT_1 var_194_arg_0 = var_175; [L570] SORT_1 var_194_arg_1 = var_193; [L571] SORT_1 var_194 = var_194_arg_0 & var_194_arg_1; [L572] SORT_1 var_196_arg_0 = var_162; [L573] SORT_1 var_196_arg_1 = ~input_161; [L574] var_196_arg_1 = var_196_arg_1 & mask_SORT_1 [L575] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L576] SORT_1 var_197_arg_0 = var_196; [L577] SORT_1 var_197_arg_1 = input_176; [L578] SORT_1 var_197 = var_197_arg_0 | var_197_arg_1; [L579] SORT_4 var_198_arg_0 = var_133; [L580] SORT_4 var_198_arg_1 = var_164; [L581] SORT_4 var_198 = var_198_arg_0 + var_198_arg_1; [L582] SORT_4 var_199_arg_0 = var_198; [L583] SORT_2 var_199 = var_199_arg_0 >> 0; [L584] SORT_1 var_200_arg_0 = input_176; [L585] SORT_2 var_200_arg_1 = var_199; [L586] SORT_2 var_200_arg_2 = var_163; [L587] EXPR var_200_arg_0 ? var_200_arg_1 : var_200_arg_2 [L587] SORT_2 var_200 = var_200_arg_0 ? var_200_arg_1 : var_200_arg_2; [L588] var_200 = var_200 & mask_SORT_2 [L589] SORT_2 var_201_arg_0 = var_150; [L590] SORT_2 var_201_arg_1 = var_200; [L591] SORT_1 var_201 = var_201_arg_0 == var_201_arg_1; [L592] SORT_1 var_202_arg_0 = var_197; [L593] SORT_1 var_202_arg_1 = var_201; [L594] SORT_1 var_202 = var_202_arg_0 & var_202_arg_1; [L595] SORT_1 var_203_arg_0 = ~input_195; [L596] var_203_arg_0 = var_203_arg_0 & mask_SORT_1 [L597] SORT_1 var_203_arg_1 = var_202; [L598] SORT_1 var_203 = var_203_arg_0 | var_203_arg_1; [L599] SORT_1 var_204_arg_0 = var_194; [L600] SORT_1 var_204_arg_1 = var_203; [L601] SORT_1 var_204 = var_204_arg_0 & var_204_arg_1; [L602] SORT_1 var_205_arg_0 = input_99; [L603] SORT_1 var_205_arg_1 = input_195; [L604] SORT_1 var_205 = var_205_arg_0 | var_205_arg_1; [L605] SORT_1 var_207_arg_0 = var_205; [L606] SORT_1 var_207_arg_1 = ~input_206; [L607] var_207_arg_1 = var_207_arg_1 & mask_SORT_1 [L608] SORT_1 var_207 = var_207_arg_0 | var_207_arg_1; [L609] SORT_1 var_208_arg_0 = var_204; [L610] SORT_1 var_208_arg_1 = var_207; [L611] SORT_1 var_208 = var_208_arg_0 & var_208_arg_1; [L612] SORT_1 var_210_arg_0 = input_101; [L613] SORT_1 var_210_arg_1 = ~input_209; [L614] var_210_arg_1 = var_210_arg_1 & mask_SORT_1 [L615] SORT_1 var_210 = var_210_arg_0 | var_210_arg_1; [L616] SORT_1 var_211_arg_0 = var_208; [L617] SORT_1 var_211_arg_1 = var_210; [L618] SORT_1 var_211 = var_211_arg_0 & var_211_arg_1; [L619] SORT_1 var_213_arg_0 = input_103; [L620] SORT_1 var_213_arg_1 = input_209; [L621] SORT_1 var_213 = var_213_arg_0 | var_213_arg_1; [L622] SORT_1 var_214_arg_0 = input_209; [L623] SORT_2 var_214_arg_1 = var_56; [L624] SORT_2 var_214_arg_2 = input_87; [L625] EXPR var_214_arg_0 ? var_214_arg_1 : var_214_arg_2 [L625] SORT_2 var_214 = var_214_arg_0 ? var_214_arg_1 : var_214_arg_2; [L626] var_214 = var_214 & mask_SORT_2 [L627] SORT_3 var_215_arg_0 = var_118; [L628] SORT_2 var_215_arg_1 = var_214; [L629] SORT_4 var_215 = ((SORT_4)var_215_arg_0 << 8) | var_215_arg_1; [L630] var_215 = var_215 & mask_SORT_4 [L631] SORT_4 var_216_arg_0 = var_117; [L632] SORT_4 var_216_arg_1 = var_215; [L633] SORT_1 var_216 = var_216_arg_0 <= var_216_arg_1; [L634] SORT_2 var_217_arg_0 = var_56; [L635] SORT_2 var_217_arg_1 = var_214; [L636] SORT_1 var_217 = var_217_arg_0 == var_217_arg_1; [L637] SORT_1 var_218_arg_0 = input_206; [L638] SORT_2 var_218_arg_1 = var_56; [L639] SORT_2 var_218_arg_2 = var_180; [L640] EXPR var_218_arg_0 ? var_218_arg_1 : var_218_arg_2 [L640] SORT_2 var_218 = var_218_arg_0 ? var_218_arg_1 : var_218_arg_2; [L641] var_218 = var_218 & mask_SORT_2 [L642] SORT_1 var_219_arg_0 = var_217; [L643] SORT_2 var_219_arg_1 = var_218; [L644] SORT_2 var_219_arg_2 = input_81; [L645] EXPR var_219_arg_0 ? var_219_arg_1 : var_219_arg_2 [L645] SORT_2 var_219 = var_219_arg_0 ? var_219_arg_1 : var_219_arg_2; [L646] var_219 = var_219 & mask_SORT_2 [L647] SORT_3 var_220_arg_0 = var_118; [L648] SORT_2 var_220_arg_1 = var_219; [L649] SORT_4 var_220 = ((SORT_4)var_220_arg_0 << 8) | var_220_arg_1; [L650] var_220 = var_220 & mask_SORT_4 [L651] SORT_1 var_221_arg_0 = input_209; [L652] SORT_2 var_221_arg_1 = var_56; [L653] SORT_2 var_221_arg_2 = input_89; [L654] EXPR var_221_arg_0 ? var_221_arg_1 : var_221_arg_2 [L654] SORT_2 var_221 = var_221_arg_0 ? var_221_arg_1 : var_221_arg_2; [L655] var_221 = var_221 & mask_SORT_2 [L656] SORT_3 var_222_arg_0 = var_118; [L657] SORT_2 var_222_arg_1 = var_221; [L658] SORT_4 var_222 = ((SORT_4)var_222_arg_0 << 8) | var_222_arg_1; [L659] var_222 = var_222 & mask_SORT_4 [L660] SORT_4 var_223_arg_0 = var_220; [L661] SORT_4 var_223_arg_1 = var_222; [L662] SORT_1 var_223 = var_223_arg_0 <= var_223_arg_1; [L663] SORT_1 var_224_arg_0 = ~var_216; [L664] var_224_arg_0 = var_224_arg_0 & mask_SORT_1 [L665] SORT_1 var_224_arg_1 = ~var_223; [L666] var_224_arg_1 = var_224_arg_1 & mask_SORT_1 [L667] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L668] SORT_1 var_225_arg_0 = var_213; [L669] SORT_1 var_225_arg_1 = var_224; [L670] SORT_1 var_225 = var_225_arg_0 & var_225_arg_1; [L671] SORT_1 var_226_arg_0 = ~input_212; [L672] var_226_arg_0 = var_226_arg_0 & mask_SORT_1 [L673] SORT_1 var_226_arg_1 = var_225; [L674] SORT_1 var_226 = var_226_arg_0 | var_226_arg_1; [L675] SORT_1 var_227_arg_0 = var_211; [L676] SORT_1 var_227_arg_1 = var_226; [L677] SORT_1 var_227 = var_227_arg_0 & var_227_arg_1; [L678] SORT_4 var_229_arg_0 = var_133; [L679] SORT_4 var_229_arg_1 = var_215; [L680] SORT_4 var_229 = var_229_arg_0 + var_229_arg_1; [L681] SORT_4 var_230_arg_0 = var_229; [L682] SORT_2 var_230 = var_230_arg_0 >> 0; [L683] SORT_1 var_231_arg_0 = input_212; [L684] SORT_2 var_231_arg_1 = var_230; [L685] SORT_2 var_231_arg_2 = var_214; [L686] EXPR var_231_arg_0 ? var_231_arg_1 : var_231_arg_2 [L686] SORT_2 var_231 = var_231_arg_0 ? var_231_arg_1 : var_231_arg_2; [L687] var_231 = var_231 & mask_SORT_2 [L688] SORT_3 var_232_arg_0 = var_118; [L689] SORT_2 var_232_arg_1 = var_231; [L690] SORT_4 var_232 = ((SORT_4)var_232_arg_0 << 8) | var_232_arg_1; [L691] var_232 = var_232 & mask_SORT_4 [L692] SORT_4 var_233_arg_0 = var_117; [L693] SORT_4 var_233_arg_1 = var_232; [L694] SORT_1 var_233 = var_233_arg_0 <= var_233_arg_1; [L695] SORT_2 var_234_arg_0 = var_56; [L696] SORT_2 var_234_arg_1 = var_231; [L697] SORT_1 var_234 = var_234_arg_0 == var_234_arg_1; [L698] SORT_1 var_235_arg_0 = var_234; [L699] SORT_2 var_235_arg_1 = var_218; [L700] SORT_2 var_235_arg_2 = input_81; [L701] EXPR var_235_arg_0 ? var_235_arg_1 : var_235_arg_2 [L701] SORT_2 var_235 = var_235_arg_0 ? var_235_arg_1 : var_235_arg_2; [L702] var_235 = var_235 & mask_SORT_2 [L703] SORT_3 var_236_arg_0 = var_118; [L704] SORT_2 var_236_arg_1 = var_235; [L705] SORT_4 var_236 = ((SORT_4)var_236_arg_0 << 8) | var_236_arg_1; [L706] var_236 = var_236 & mask_SORT_4 [L707] SORT_1 var_237_arg_0 = input_212; [L708] SORT_2 var_237_arg_1 = var_219; [L709] SORT_2 var_237_arg_2 = var_221; [L710] EXPR var_237_arg_0 ? var_237_arg_1 : var_237_arg_2 [L710] SORT_2 var_237 = var_237_arg_0 ? var_237_arg_1 : var_237_arg_2; [L711] var_237 = var_237 & mask_SORT_2 [L712] SORT_3 var_238_arg_0 = var_118; [L713] SORT_2 var_238_arg_1 = var_237; [L714] SORT_4 var_238 = ((SORT_4)var_238_arg_0 << 8) | var_238_arg_1; [L715] var_238 = var_238 & mask_SORT_4 [L716] SORT_4 var_239_arg_0 = var_236; [L717] SORT_4 var_239_arg_1 = var_238; [L718] SORT_1 var_239 = var_239_arg_0 <= var_239_arg_1; [L719] SORT_1 var_240_arg_0 = ~var_233; [L720] var_240_arg_0 = var_240_arg_0 & mask_SORT_1 [L721] SORT_1 var_240_arg_1 = var_239; [L722] SORT_1 var_240 = var_240_arg_0 & var_240_arg_1; [L723] SORT_1 var_241_arg_0 = var_213; [L724] SORT_1 var_241_arg_1 = var_240; [L725] SORT_1 var_241 = var_241_arg_0 & var_241_arg_1; [L726] SORT_1 var_242_arg_0 = ~input_228; [L727] var_242_arg_0 = var_242_arg_0 & mask_SORT_1 [L728] SORT_1 var_242_arg_1 = var_241; [L729] SORT_1 var_242 = var_242_arg_0 | var_242_arg_1; [L730] SORT_1 var_243_arg_0 = var_227; [L731] SORT_1 var_243_arg_1 = var_242; [L732] SORT_1 var_243 = var_243_arg_0 & var_243_arg_1; [L733] SORT_4 var_245_arg_0 = var_133; [L734] SORT_4 var_245_arg_1 = var_232; [L735] SORT_4 var_245 = var_245_arg_0 + var_245_arg_1; [L736] SORT_4 var_246_arg_0 = var_245; [L737] SORT_2 var_246 = var_246_arg_0 >> 0; [L738] SORT_1 var_247_arg_0 = input_228; [L739] SORT_2 var_247_arg_1 = var_246; [L740] SORT_2 var_247_arg_2 = var_231; [L741] EXPR var_247_arg_0 ? var_247_arg_1 : var_247_arg_2 [L741] SORT_2 var_247 = var_247_arg_0 ? var_247_arg_1 : var_247_arg_2; [L742] var_247 = var_247 & mask_SORT_2 [L743] SORT_2 var_248_arg_0 = var_150; [L744] SORT_2 var_248_arg_1 = var_247; [L745] SORT_1 var_248 = var_248_arg_0 == var_248_arg_1; [L746] SORT_4 var_249_arg_0 = var_155; [L747] SORT_4 var_249_arg_1 = var_238; [L748] SORT_1 var_249 = var_249_arg_0 <= var_249_arg_1; [L749] SORT_1 var_250_arg_0 = var_248; [L750] SORT_1 var_250_arg_1 = ~var_249; [L751] var_250_arg_1 = var_250_arg_1 & mask_SORT_1 [L752] SORT_1 var_250 = var_250_arg_0 & var_250_arg_1; [L753] SORT_1 var_251_arg_0 = var_213; [L754] SORT_1 var_251_arg_1 = var_250; [L755] SORT_1 var_251 = var_251_arg_0 & var_251_arg_1; [L756] SORT_1 var_252_arg_0 = ~input_244; [L757] var_252_arg_0 = var_252_arg_0 & mask_SORT_1 [L758] SORT_1 var_252_arg_1 = var_251; [L759] SORT_1 var_252 = var_252_arg_0 | var_252_arg_1; [L760] SORT_1 var_253_arg_0 = var_243; [L761] SORT_1 var_253_arg_1 = var_252; [L762] SORT_1 var_253 = var_253_arg_0 & var_253_arg_1; [L763] SORT_1 var_255_arg_0 = input_105; [L764] SORT_1 var_255_arg_1 = input_244; [L765] SORT_1 var_255 = var_255_arg_0 | var_255_arg_1; [L766] SORT_1 var_256_arg_0 = input_244; [L767] SORT_2 var_256_arg_1 = var_56; [L768] SORT_2 var_256_arg_2 = var_247; [L769] EXPR var_256_arg_0 ? var_256_arg_1 : var_256_arg_2 [L769] SORT_2 var_256 = var_256_arg_0 ? var_256_arg_1 : var_256_arg_2; [L770] var_256 = var_256 & mask_SORT_2 [L771] SORT_3 var_257_arg_0 = var_118; [L772] SORT_2 var_257_arg_1 = var_256; [L773] SORT_4 var_257 = ((SORT_4)var_257_arg_0 << 8) | var_257_arg_1; [L774] var_257 = var_257 & mask_SORT_4 [L775] SORT_4 var_258_arg_0 = var_117; [L776] SORT_4 var_258_arg_1 = var_257; [L777] SORT_1 var_258 = var_258_arg_0 <= var_258_arg_1; [L778] SORT_2 var_259_arg_0 = var_56; [L779] SORT_2 var_259_arg_1 = var_256; [L780] SORT_1 var_259 = var_259_arg_0 == var_259_arg_1; [L781] SORT_1 var_260_arg_0 = input_209; [L782] SORT_2 var_260_arg_1 = var_167; [L783] SORT_2 var_260_arg_2 = input_77; [L784] EXPR var_260_arg_0 ? var_260_arg_1 : var_260_arg_2 [L784] SORT_2 var_260 = var_260_arg_0 ? var_260_arg_1 : var_260_arg_2; [L785] SORT_1 var_261_arg_0 = input_244; [L786] SORT_2 var_261_arg_1 = var_56; [L787] SORT_2 var_261_arg_2 = var_260; [L788] EXPR var_261_arg_0 ? var_261_arg_1 : var_261_arg_2 [L788] SORT_2 var_261 = var_261_arg_0 ? var_261_arg_1 : var_261_arg_2; [L789] var_261 = var_261 & mask_SORT_2 [L790] SORT_1 var_262_arg_0 = var_259; [L791] SORT_2 var_262_arg_1 = var_169; [L792] SORT_2 var_262_arg_2 = var_261; [L793] EXPR var_262_arg_0 ? var_262_arg_1 : var_262_arg_2 [L793] SORT_2 var_262 = var_262_arg_0 ? var_262_arg_1 : var_262_arg_2; [L794] var_262 = var_262 & mask_SORT_2 [L795] SORT_2 var_263_arg_0 = var_56; [L796] SORT_2 var_263_arg_1 = var_262; [L797] SORT_1 var_263 = var_263_arg_0 == var_263_arg_1; [L798] SORT_1 var_264_arg_0 = ~var_258; [L799] var_264_arg_0 = var_264_arg_0 & mask_SORT_1 [L800] SORT_1 var_264_arg_1 = var_263; [L801] SORT_1 var_264 = var_264_arg_0 & var_264_arg_1; [L802] SORT_1 var_265_arg_0 = var_255; [L803] SORT_1 var_265_arg_1 = var_264; [L804] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L805] SORT_1 var_266_arg_0 = ~input_254; [L806] var_266_arg_0 = var_266_arg_0 & mask_SORT_1 [L807] SORT_1 var_266_arg_1 = var_265; [L808] SORT_1 var_266 = var_266_arg_0 | var_266_arg_1; [L809] SORT_1 var_267_arg_0 = var_253; [L810] SORT_1 var_267_arg_1 = var_266; [L811] SORT_1 var_267 = var_267_arg_0 & var_267_arg_1; [L812] SORT_1 var_269_arg_0 = input_107; [L813] SORT_1 var_269_arg_1 = input_254; [L814] SORT_1 var_269 = var_269_arg_0 | var_269_arg_1; [L815] SORT_4 var_270_arg_0 = var_133; [L816] SORT_4 var_270_arg_1 = var_238; [L817] SORT_4 var_270 = var_270_arg_0 + var_270_arg_1; [L818] SORT_4 var_271_arg_0 = var_270; [L819] SORT_2 var_271 = var_271_arg_0 >> 0; [L820] SORT_1 var_272_arg_0 = input_244; [L821] SORT_2 var_272_arg_1 = var_271; [L822] SORT_2 var_272_arg_2 = input_81; [L823] EXPR var_272_arg_0 ? var_272_arg_1 : var_272_arg_2 [L823] SORT_2 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L824] var_272 = var_272 & mask_SORT_2 [L825] SORT_1 var_273_arg_0 = var_259; [L826] SORT_2 var_273_arg_1 = var_218; [L827] SORT_2 var_273_arg_2 = var_272; [L828] EXPR var_273_arg_0 ? var_273_arg_1 : var_273_arg_2 [L828] SORT_2 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L829] var_273 = var_273 & mask_SORT_2 [L830] SORT_2 var_274_arg_0 = var_56; [L831] SORT_2 var_274_arg_1 = var_273; [L832] SORT_1 var_274 = var_274_arg_0 == var_274_arg_1; [L833] SORT_3 var_275_arg_0 = var_118; [L834] SORT_2 var_275_arg_1 = var_272; [L835] SORT_4 var_275 = ((SORT_4)var_275_arg_0 << 8) | var_275_arg_1; [L836] var_275 = var_275 & mask_SORT_4 [L837] SORT_3 var_276_arg_0 = var_118; [L838] SORT_2 var_276_arg_1 = var_273; [L839] SORT_4 var_276 = ((SORT_4)var_276_arg_0 << 8) | var_276_arg_1; [L840] var_276 = var_276 & mask_SORT_4 [L841] SORT_4 var_277_arg_0 = var_275; [L842] SORT_4 var_277_arg_1 = var_276; [L843] SORT_1 var_277 = var_277_arg_0 <= var_277_arg_1; [L844] SORT_1 var_278_arg_0 = var_274; [L845] SORT_1 var_278_arg_1 = ~var_277; [L846] var_278_arg_1 = var_278_arg_1 & mask_SORT_1 [L847] SORT_1 var_278 = var_278_arg_0 | var_278_arg_1; [L848] SORT_2 var_279_arg_0 = var_272; [L849] SORT_2 var_279_arg_1 = var_273; [L850] SORT_1 var_279 = var_279_arg_0 == var_279_arg_1; [L851] SORT_4 var_280_arg_0 = var_133; [L852] SORT_4 var_280_arg_1 = var_257; [L853] SORT_1 var_280 = var_280_arg_0 <= var_280_arg_1; [L854] SORT_1 var_281_arg_0 = var_279; [L855] SORT_1 var_281_arg_1 = var_280; [L856] SORT_1 var_281 = var_281_arg_0 & var_281_arg_1; [L857] SORT_1 var_282_arg_0 = var_278; [L858] SORT_1 var_282_arg_1 = var_281; [L859] SORT_1 var_282 = var_282_arg_0 | var_282_arg_1; [L860] SORT_1 var_283_arg_0 = var_269; [L861] SORT_1 var_283_arg_1 = var_282; [L862] SORT_1 var_283 = var_283_arg_0 & var_283_arg_1; [L863] SORT_1 var_284_arg_0 = ~input_268; [L864] var_284_arg_0 = var_284_arg_0 & mask_SORT_1 [L865] SORT_1 var_284_arg_1 = var_283; [L866] SORT_1 var_284 = var_284_arg_0 | var_284_arg_1; [L867] SORT_1 var_285_arg_0 = var_267; [L868] SORT_1 var_285_arg_1 = var_284; [L869] SORT_1 var_285 = var_285_arg_0 & var_285_arg_1; [L870] SORT_1 var_287_arg_0 = var_255; [L871] SORT_1 var_287_arg_1 = ~input_254; [L872] var_287_arg_1 = var_287_arg_1 & mask_SORT_1 [L873] SORT_1 var_287 = var_287_arg_0 & var_287_arg_1; [L874] SORT_1 var_288_arg_0 = var_287; [L875] SORT_1 var_288_arg_1 = input_268; [L876] SORT_1 var_288 = var_288_arg_0 | var_288_arg_1; [L877] SORT_4 var_289_arg_0 = var_133; [L878] SORT_4 var_289_arg_1 = var_257; [L879] SORT_4 var_289 = var_289_arg_0 + var_289_arg_1; [L880] SORT_4 var_290_arg_0 = var_289; [L881] SORT_2 var_290 = var_290_arg_0 >> 0; [L882] SORT_1 var_291_arg_0 = input_268; [L883] SORT_2 var_291_arg_1 = var_290; [L884] SORT_2 var_291_arg_2 = var_256; [L885] EXPR var_291_arg_0 ? var_291_arg_1 : var_291_arg_2 [L885] SORT_2 var_291 = var_291_arg_0 ? var_291_arg_1 : var_291_arg_2; [L886] var_291 = var_291 & mask_SORT_2 [L887] SORT_2 var_292_arg_0 = var_150; [L888] SORT_2 var_292_arg_1 = var_291; [L889] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L890] SORT_1 var_293_arg_0 = var_288; [L891] SORT_1 var_293_arg_1 = var_292; [L892] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L893] SORT_1 var_294_arg_0 = ~input_286; [L894] var_294_arg_0 = var_294_arg_0 & mask_SORT_1 [L895] SORT_1 var_294_arg_1 = var_293; [L896] SORT_1 var_294 = var_294_arg_0 | var_294_arg_1; [L897] SORT_1 var_295_arg_0 = var_285; [L898] SORT_1 var_295_arg_1 = var_294; [L899] SORT_1 var_295 = var_295_arg_0 & var_295_arg_1; [L900] SORT_1 var_296_arg_0 = input_109; [L901] SORT_1 var_296_arg_1 = input_286; [L902] SORT_1 var_296 = var_296_arg_0 | var_296_arg_1; [L903] SORT_1 var_298_arg_0 = var_296; [L904] SORT_1 var_298_arg_1 = ~input_297; [L905] var_298_arg_1 = var_298_arg_1 & mask_SORT_1 [L906] SORT_1 var_298 = var_298_arg_0 | var_298_arg_1; [L907] SORT_1 var_299_arg_0 = var_295; [L908] SORT_1 var_299_arg_1 = var_298; [L909] SORT_1 var_299 = var_299_arg_0 & var_299_arg_1; [L910] SORT_1 var_300_arg_0 = input_113; [L911] SORT_1 var_300_arg_1 = input_115; [L912] SORT_1 var_300 = var_300_arg_0 | var_300_arg_1; [L913] SORT_1 var_301_arg_0 = input_132; [L914] SORT_1 var_301_arg_1 = var_300; [L915] SORT_1 var_301 = var_301_arg_0 | var_301_arg_1; [L916] SORT_1 var_302_arg_0 = input_149; [L917] SORT_1 var_302_arg_1 = var_301; [L918] SORT_1 var_302 = var_302_arg_0 | var_302_arg_1; [L919] SORT_1 var_303_arg_0 = input_161; [L920] SORT_1 var_303_arg_1 = var_302; [L921] SORT_1 var_303 = var_303_arg_0 | var_303_arg_1; [L922] SORT_1 var_304_arg_0 = input_176; [L923] SORT_1 var_304_arg_1 = var_303; [L924] SORT_1 var_304 = var_304_arg_0 | var_304_arg_1; [L925] SORT_1 var_305_arg_0 = input_195; [L926] SORT_1 var_305_arg_1 = var_304; [L927] SORT_1 var_305 = var_305_arg_0 | var_305_arg_1; [L928] SORT_1 var_306_arg_0 = input_206; [L929] SORT_1 var_306_arg_1 = var_305; [L930] SORT_1 var_306 = var_306_arg_0 | var_306_arg_1; [L931] SORT_1 var_307_arg_0 = input_209; [L932] SORT_1 var_307_arg_1 = var_306; [L933] SORT_1 var_307 = var_307_arg_0 | var_307_arg_1; [L934] SORT_1 var_308_arg_0 = input_212; [L935] SORT_1 var_308_arg_1 = var_307; [L936] SORT_1 var_308 = var_308_arg_0 | var_308_arg_1; [L937] SORT_1 var_309_arg_0 = input_228; [L938] SORT_1 var_309_arg_1 = var_308; [L939] SORT_1 var_309 = var_309_arg_0 | var_309_arg_1; [L940] SORT_1 var_310_arg_0 = input_244; [L941] SORT_1 var_310_arg_1 = var_309; [L942] SORT_1 var_310 = var_310_arg_0 | var_310_arg_1; [L943] SORT_1 var_311_arg_0 = input_254; [L944] SORT_1 var_311_arg_1 = var_310; [L945] SORT_1 var_311 = var_311_arg_0 | var_311_arg_1; [L946] SORT_1 var_312_arg_0 = input_268; [L947] SORT_1 var_312_arg_1 = var_311; [L948] SORT_1 var_312 = var_312_arg_0 | var_312_arg_1; [L949] SORT_1 var_313_arg_0 = input_286; [L950] SORT_1 var_313_arg_1 = var_312; [L951] SORT_1 var_313 = var_313_arg_0 | var_313_arg_1; [L952] SORT_1 var_314_arg_0 = input_297; [L953] SORT_1 var_314_arg_1 = var_313; [L954] SORT_1 var_314 = var_314_arg_0 | var_314_arg_1; [L955] SORT_1 var_315_arg_0 = var_299; [L956] SORT_1 var_315_arg_1 = var_314; [L957] SORT_1 var_315 = var_315_arg_0 & var_315_arg_1; [L958] SORT_1 var_316_arg_0 = input_91; [L959] SORT_1 var_316_arg_1 = input_93; [L960] SORT_1 var_316 = var_316_arg_0 & var_316_arg_1; [L961] SORT_1 var_317_arg_0 = input_91; [L962] SORT_1 var_317_arg_1 = input_93; [L963] SORT_1 var_317 = var_317_arg_0 | var_317_arg_1; [L964] SORT_1 var_318_arg_0 = input_95; [L965] SORT_1 var_318_arg_1 = var_317; [L966] SORT_1 var_318 = var_318_arg_0 & var_318_arg_1; [L967] SORT_1 var_319_arg_0 = var_316; [L968] SORT_1 var_319_arg_1 = var_318; [L969] SORT_1 var_319 = var_319_arg_0 | var_319_arg_1; [L970] SORT_1 var_320_arg_0 = input_95; [L971] SORT_1 var_320_arg_1 = var_317; [L972] SORT_1 var_320 = var_320_arg_0 | var_320_arg_1; [L973] SORT_1 var_321_arg_0 = input_97; [L974] SORT_1 var_321_arg_1 = var_320; [L975] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L976] SORT_1 var_322_arg_0 = var_319; [L977] SORT_1 var_322_arg_1 = var_321; [L978] SORT_1 var_322 = var_322_arg_0 | var_322_arg_1; [L979] SORT_1 var_323_arg_0 = input_97; [L980] SORT_1 var_323_arg_1 = var_320; [L981] SORT_1 var_323 = var_323_arg_0 | var_323_arg_1; [L982] SORT_1 var_324_arg_0 = input_99; [L983] SORT_1 var_324_arg_1 = var_323; [L984] SORT_1 var_324 = var_324_arg_0 & var_324_arg_1; [L985] SORT_1 var_325_arg_0 = var_322; [L986] SORT_1 var_325_arg_1 = var_324; [L987] SORT_1 var_325 = var_325_arg_0 | var_325_arg_1; [L988] SORT_1 var_326_arg_0 = input_99; [L989] SORT_1 var_326_arg_1 = var_323; [L990] SORT_1 var_326 = var_326_arg_0 | var_326_arg_1; [L991] SORT_1 var_327_arg_0 = ~var_325; [L992] var_327_arg_0 = var_327_arg_0 & mask_SORT_1 [L993] SORT_1 var_327_arg_1 = var_326; [L994] SORT_1 var_327 = var_327_arg_0 & var_327_arg_1; [L995] SORT_1 var_328_arg_0 = input_101; [L996] SORT_1 var_328_arg_1 = input_103; [L997] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L998] SORT_1 var_329_arg_0 = input_101; [L999] SORT_1 var_329_arg_1 = input_103; [L1000] SORT_1 var_329 = var_329_arg_0 | var_329_arg_1; [L1001] SORT_1 var_330_arg_0 = input_105; [L1002] SORT_1 var_330_arg_1 = var_329; [L1003] SORT_1 var_330 = var_330_arg_0 & var_330_arg_1; [L1004] SORT_1 var_331_arg_0 = var_328; [L1005] SORT_1 var_331_arg_1 = var_330; [L1006] SORT_1 var_331 = var_331_arg_0 | var_331_arg_1; [L1007] SORT_1 var_332_arg_0 = input_105; [L1008] SORT_1 var_332_arg_1 = var_329; [L1009] SORT_1 var_332 = var_332_arg_0 | var_332_arg_1; [L1010] SORT_1 var_333_arg_0 = input_107; [L1011] SORT_1 var_333_arg_1 = var_332; [L1012] SORT_1 var_333 = var_333_arg_0 & var_333_arg_1; [L1013] SORT_1 var_334_arg_0 = var_331; [L1014] SORT_1 var_334_arg_1 = var_333; [L1015] SORT_1 var_334 = var_334_arg_0 | var_334_arg_1; [L1016] SORT_1 var_335_arg_0 = input_107; [L1017] SORT_1 var_335_arg_1 = var_332; [L1018] SORT_1 var_335 = var_335_arg_0 | var_335_arg_1; [L1019] SORT_1 var_336_arg_0 = input_109; [L1020] SORT_1 var_336_arg_1 = var_335; [L1021] SORT_1 var_336 = var_336_arg_0 & var_336_arg_1; [L1022] SORT_1 var_337_arg_0 = var_334; [L1023] SORT_1 var_337_arg_1 = var_336; [L1024] SORT_1 var_337 = var_337_arg_0 | var_337_arg_1; [L1025] SORT_1 var_338_arg_0 = var_327; [L1026] SORT_1 var_338_arg_1 = ~var_337; [L1027] var_338_arg_1 = var_338_arg_1 & mask_SORT_1 [L1028] SORT_1 var_338 = var_338_arg_0 & var_338_arg_1; [L1029] SORT_1 var_339_arg_0 = input_109; [L1030] SORT_1 var_339_arg_1 = var_335; [L1031] SORT_1 var_339 = var_339_arg_0 | var_339_arg_1; [L1032] SORT_1 var_340_arg_0 = var_338; [L1033] SORT_1 var_340_arg_1 = var_339; [L1034] SORT_1 var_340 = var_340_arg_0 & var_340_arg_1; [L1035] SORT_1 var_341_arg_0 = var_315; [L1036] SORT_1 var_341_arg_1 = var_340; [L1037] SORT_1 var_341 = var_341_arg_0 & var_341_arg_1; [L1038] SORT_1 var_342_arg_0 = var_116; [L1039] SORT_1 var_342_arg_1 = ~input_149; [L1040] var_342_arg_1 = var_342_arg_1 & mask_SORT_1 [L1041] SORT_1 var_342 = var_342_arg_0 & var_342_arg_1; [L1042] var_342 = var_342 & mask_SORT_1 [L1043] SORT_1 var_343_arg_0 = input_91; [L1044] SORT_1 var_343_arg_1 = ~input_113; [L1045] var_343_arg_1 = var_343_arg_1 & mask_SORT_1 [L1046] SORT_1 var_343 = var_343_arg_0 & var_343_arg_1; [L1047] SORT_1 var_344_arg_0 = var_343; [L1048] SORT_1 var_344_arg_1 = input_206; [L1049] SORT_1 var_344 = var_344_arg_0 | var_344_arg_1; [L1050] var_344 = var_344 & mask_SORT_1 [L1051] SORT_1 var_345_arg_0 = var_342; [L1052] SORT_1 var_345_arg_1 = var_344; [L1053] SORT_1 var_345 = var_345_arg_0 & var_345_arg_1; [L1054] SORT_1 var_346_arg_0 = var_197; [L1055] SORT_1 var_346_arg_1 = ~input_195; [L1056] var_346_arg_1 = var_346_arg_1 & mask_SORT_1 [L1057] SORT_1 var_346 = var_346_arg_0 & var_346_arg_1; [L1058] var_346 = var_346 & mask_SORT_1 [L1059] SORT_1 var_347_arg_0 = var_342; [L1060] SORT_1 var_347_arg_1 = var_344; [L1061] SORT_1 var_347 = var_347_arg_0 | var_347_arg_1; [L1062] SORT_1 var_348_arg_0 = var_346; [L1063] SORT_1 var_348_arg_1 = var_347; [L1064] SORT_1 var_348 = var_348_arg_0 & var_348_arg_1; [L1065] SORT_1 var_349_arg_0 = var_345; [L1066] SORT_1 var_349_arg_1 = var_348; [L1067] SORT_1 var_349 = var_349_arg_0 | var_349_arg_1; [L1068] SORT_1 var_350_arg_0 = var_177; [L1069] SORT_1 var_350_arg_1 = ~input_176; [L1070] var_350_arg_1 = var_350_arg_1 & mask_SORT_1 [L1071] SORT_1 var_350 = var_350_arg_0 & var_350_arg_1; [L1072] var_350 = var_350 & mask_SORT_1 [L1073] SORT_1 var_351_arg_0 = var_346; [L1074] SORT_1 var_351_arg_1 = var_347; [L1075] SORT_1 var_351 = var_351_arg_0 | var_351_arg_1; [L1076] SORT_1 var_352_arg_0 = var_350; [L1077] SORT_1 var_352_arg_1 = var_351; [L1078] SORT_1 var_352 = var_352_arg_0 & var_352_arg_1; [L1079] SORT_1 var_353_arg_0 = var_349; [L1080] SORT_1 var_353_arg_1 = var_352; [L1081] SORT_1 var_353 = var_353_arg_0 | var_353_arg_1; [L1082] SORT_1 var_354_arg_0 = var_205; [L1083] SORT_1 var_354_arg_1 = ~input_206; [L1084] var_354_arg_1 = var_354_arg_1 & mask_SORT_1 [L1085] SORT_1 var_354 = var_354_arg_0 & var_354_arg_1; [L1086] var_354 = var_354 & mask_SORT_1 [L1087] SORT_1 var_355_arg_0 = var_350; [L1088] SORT_1 var_355_arg_1 = var_351; [L1089] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L1090] SORT_1 var_356_arg_0 = var_354; [L1091] SORT_1 var_356_arg_1 = var_355; [L1092] SORT_1 var_356 = var_356_arg_0 & var_356_arg_1; [L1093] SORT_1 var_357_arg_0 = var_353; [L1094] SORT_1 var_357_arg_1 = var_356; [L1095] SORT_1 var_357 = var_357_arg_0 | var_357_arg_1; [L1096] SORT_1 var_358_arg_0 = var_354; [L1097] SORT_1 var_358_arg_1 = var_355; [L1098] SORT_1 var_358 = var_358_arg_0 | var_358_arg_1; [L1099] SORT_1 var_359_arg_0 = ~var_357; [L1100] var_359_arg_0 = var_359_arg_0 & mask_SORT_1 [L1101] SORT_1 var_359_arg_1 = var_358; [L1102] SORT_1 var_359 = var_359_arg_0 & var_359_arg_1; [L1103] SORT_1 var_360_arg_0 = var_213; [L1104] SORT_1 var_360_arg_1 = ~input_244; [L1105] var_360_arg_1 = var_360_arg_1 & mask_SORT_1 [L1106] SORT_1 var_360 = var_360_arg_0 & var_360_arg_1; [L1107] var_360 = var_360 & mask_SORT_1 [L1108] SORT_1 var_361_arg_0 = input_101; [L1109] SORT_1 var_361_arg_1 = ~input_209; [L1110] var_361_arg_1 = var_361_arg_1 & mask_SORT_1 [L1111] SORT_1 var_361 = var_361_arg_0 & var_361_arg_1; [L1112] SORT_1 var_362_arg_0 = var_361; [L1113] SORT_1 var_362_arg_1 = input_297; [L1114] SORT_1 var_362 = var_362_arg_0 | var_362_arg_1; [L1115] var_362 = var_362 & mask_SORT_1 [L1116] SORT_1 var_363_arg_0 = var_360; [L1117] SORT_1 var_363_arg_1 = var_362; [L1118] SORT_1 var_363 = var_363_arg_0 & var_363_arg_1; [L1119] SORT_1 var_364_arg_0 = var_288; [L1120] SORT_1 var_364_arg_1 = ~input_286; [L1121] var_364_arg_1 = var_364_arg_1 & mask_SORT_1 [L1122] SORT_1 var_364 = var_364_arg_0 & var_364_arg_1; [L1123] var_364 = var_364 & mask_SORT_1 [L1124] SORT_1 var_365_arg_0 = var_360; [L1125] SORT_1 var_365_arg_1 = var_362; [L1126] SORT_1 var_365 = var_365_arg_0 | var_365_arg_1; [L1127] SORT_1 var_366_arg_0 = var_364; [L1128] SORT_1 var_366_arg_1 = var_365; [L1129] SORT_1 var_366 = var_366_arg_0 & var_366_arg_1; [L1130] SORT_1 var_367_arg_0 = var_363; [L1131] SORT_1 var_367_arg_1 = var_366; [L1132] SORT_1 var_367 = var_367_arg_0 | var_367_arg_1; [L1133] SORT_1 var_368_arg_0 = var_269; [L1134] SORT_1 var_368_arg_1 = ~input_268; [L1135] var_368_arg_1 = var_368_arg_1 & mask_SORT_1 [L1136] SORT_1 var_368 = var_368_arg_0 & var_368_arg_1; [L1137] var_368 = var_368 & mask_SORT_1 [L1138] SORT_1 var_369_arg_0 = var_364; [L1139] SORT_1 var_369_arg_1 = var_365; [L1140] SORT_1 var_369 = var_369_arg_0 | var_369_arg_1; [L1141] SORT_1 var_370_arg_0 = var_368; [L1142] SORT_1 var_370_arg_1 = var_369; [L1143] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L1144] SORT_1 var_371_arg_0 = var_367; [L1145] SORT_1 var_371_arg_1 = var_370; [L1146] SORT_1 var_371 = var_371_arg_0 | var_371_arg_1; [L1147] SORT_1 var_372_arg_0 = var_296; [L1148] SORT_1 var_372_arg_1 = ~input_297; [L1149] var_372_arg_1 = var_372_arg_1 & mask_SORT_1 [L1150] SORT_1 var_372 = var_372_arg_0 & var_372_arg_1; [L1151] var_372 = var_372 & mask_SORT_1 [L1152] SORT_1 var_373_arg_0 = var_368; [L1153] SORT_1 var_373_arg_1 = var_369; [L1154] SORT_1 var_373 = var_373_arg_0 | var_373_arg_1; [L1155] SORT_1 var_374_arg_0 = var_372; [L1156] SORT_1 var_374_arg_1 = var_373; [L1157] SORT_1 var_374 = var_374_arg_0 & var_374_arg_1; [L1158] SORT_1 var_375_arg_0 = var_371; [L1159] SORT_1 var_375_arg_1 = var_374; [L1160] SORT_1 var_375 = var_375_arg_0 | var_375_arg_1; [L1161] SORT_1 var_376_arg_0 = var_359; [L1162] SORT_1 var_376_arg_1 = ~var_375; [L1163] var_376_arg_1 = var_376_arg_1 & mask_SORT_1 [L1164] SORT_1 var_376 = var_376_arg_0 & var_376_arg_1; [L1165] SORT_1 var_377_arg_0 = var_372; [L1166] SORT_1 var_377_arg_1 = var_373; [L1167] SORT_1 var_377 = var_377_arg_0 | var_377_arg_1; [L1168] SORT_1 var_378_arg_0 = var_376; [L1169] SORT_1 var_378_arg_1 = var_377; [L1170] SORT_1 var_378 = var_378_arg_0 & var_378_arg_1; [L1171] SORT_1 var_379_arg_0 = var_341; [L1172] SORT_1 var_379_arg_1 = var_378; [L1173] SORT_1 var_379 = var_379_arg_0 & var_379_arg_1; [L1174] SORT_2 var_380_arg_0 = var_169; [L1175] SORT_2 var_380_arg_1 = state_6; [L1176] SORT_1 var_380 = var_380_arg_0 == var_380_arg_1; [L1177] SORT_1 var_381_arg_0 = var_379; [L1178] SORT_1 var_381_arg_1 = var_380; [L1179] SORT_1 var_381 = var_381_arg_0 & var_381_arg_1; [L1180] SORT_2 var_382_arg_0 = var_261; [L1181] SORT_2 var_382_arg_1 = state_8; [L1182] SORT_1 var_382 = var_382_arg_0 == var_382_arg_1; [L1183] SORT_1 var_383_arg_0 = var_381; [L1184] SORT_1 var_383_arg_1 = var_382; [L1185] SORT_1 var_383 = var_383_arg_0 & var_383_arg_1; [L1186] SORT_2 var_384_arg_0 = var_218; [L1187] SORT_2 var_384_arg_1 = state_10; [L1188] SORT_1 var_384 = var_384_arg_0 == var_384_arg_1; [L1189] SORT_1 var_385_arg_0 = var_383; [L1190] SORT_1 var_385_arg_1 = var_384; [L1191] SORT_1 var_385 = var_385_arg_0 & var_385_arg_1; [L1192] SORT_1 var_386_arg_0 = input_297; [L1193] SORT_2 var_386_arg_1 = var_56; [L1194] SORT_2 var_386_arg_2 = var_272; [L1195] EXPR var_386_arg_0 ? var_386_arg_1 : var_386_arg_2 [L1195] SORT_2 var_386 = var_386_arg_0 ? var_386_arg_1 : var_386_arg_2; [L1196] var_386 = var_386 & mask_SORT_2 [L1197] SORT_2 var_387_arg_0 = var_386; [L1198] SORT_2 var_387_arg_1 = state_12; [L1199] SORT_1 var_387 = var_387_arg_0 == var_387_arg_1; [L1200] SORT_1 var_388_arg_0 = var_385; [L1201] SORT_1 var_388_arg_1 = var_387; [L1202] SORT_1 var_388 = var_388_arg_0 & var_388_arg_1; [L1203] SORT_2 var_389_arg_0 = var_200; [L1204] SORT_2 var_389_arg_1 = state_14; [L1205] SORT_1 var_389 = var_389_arg_0 == var_389_arg_1; [L1206] SORT_1 var_390_arg_0 = var_388; [L1207] SORT_1 var_390_arg_1 = var_389; [L1208] SORT_1 var_390 = var_390_arg_0 & var_390_arg_1; [L1209] SORT_2 var_391_arg_0 = var_142; [L1210] SORT_2 var_391_arg_1 = state_16; [L1211] SORT_1 var_391 = var_391_arg_0 == var_391_arg_1; [L1212] SORT_1 var_392_arg_0 = var_390; [L1213] SORT_1 var_392_arg_1 = var_391; [L1214] SORT_1 var_392 = var_392_arg_0 & var_392_arg_1; [L1215] SORT_2 var_393_arg_0 = var_291; [L1216] SORT_2 var_393_arg_1 = state_18; [L1217] SORT_1 var_393 = var_393_arg_0 == var_393_arg_1; [L1218] SORT_1 var_394_arg_0 = var_392; [L1219] SORT_1 var_394_arg_1 = var_393; [L1220] SORT_1 var_394 = var_394_arg_0 & var_394_arg_1; [L1221] SORT_2 var_395_arg_0 = var_237; [L1222] SORT_2 var_395_arg_1 = state_20; [L1223] SORT_1 var_395 = var_395_arg_0 == var_395_arg_1; [L1224] SORT_1 var_396_arg_0 = var_394; [L1225] SORT_1 var_396_arg_1 = var_395; [L1226] SORT_1 var_396 = var_396_arg_0 & var_396_arg_1; [L1227] SORT_1 var_397_arg_0 = var_344; [L1228] SORT_1 var_397_arg_1 = state_23; [L1229] SORT_1 var_397 = var_397_arg_0 == var_397_arg_1; [L1230] SORT_1 var_398_arg_0 = var_396; [L1231] SORT_1 var_398_arg_1 = var_397; [L1232] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L1233] SORT_1 var_399_arg_0 = var_342; [L1234] SORT_1 var_399_arg_1 = state_25; [L1235] SORT_1 var_399 = var_399_arg_0 == var_399_arg_1; [L1236] SORT_1 var_400_arg_0 = var_398; [L1237] SORT_1 var_400_arg_1 = var_399; [L1238] SORT_1 var_400 = var_400_arg_0 & var_400_arg_1; [L1239] SORT_1 var_401_arg_0 = var_346; [L1240] SORT_1 var_401_arg_1 = state_27; [L1241] SORT_1 var_401 = var_401_arg_0 == var_401_arg_1; [L1242] SORT_1 var_402_arg_0 = var_400; [L1243] SORT_1 var_402_arg_1 = var_401; [L1244] SORT_1 var_402 = var_402_arg_0 & var_402_arg_1; [L1245] SORT_1 var_403_arg_0 = var_350; [L1246] SORT_1 var_403_arg_1 = state_29; [L1247] SORT_1 var_403 = var_403_arg_0 == var_403_arg_1; [L1248] SORT_1 var_404_arg_0 = var_402; [L1249] SORT_1 var_404_arg_1 = var_403; [L1250] SORT_1 var_404 = var_404_arg_0 & var_404_arg_1; [L1251] SORT_1 var_405_arg_0 = var_354; [L1252] SORT_1 var_405_arg_1 = state_31; [L1253] SORT_1 var_405 = var_405_arg_0 == var_405_arg_1; [L1254] SORT_1 var_406_arg_0 = var_404; [L1255] SORT_1 var_406_arg_1 = var_405; [L1256] SORT_1 var_406 = var_406_arg_0 & var_406_arg_1; [L1257] SORT_1 var_407_arg_0 = var_362; [L1258] SORT_1 var_407_arg_1 = state_33; [L1259] SORT_1 var_407 = var_407_arg_0 == var_407_arg_1; [L1260] SORT_1 var_408_arg_0 = var_406; [L1261] SORT_1 var_408_arg_1 = var_407; [L1262] SORT_1 var_408 = var_408_arg_0 & var_408_arg_1; [L1263] SORT_1 var_409_arg_0 = var_360; [L1264] SORT_1 var_409_arg_1 = state_35; [L1265] SORT_1 var_409 = var_409_arg_0 == var_409_arg_1; [L1266] SORT_1 var_410_arg_0 = var_408; [L1267] SORT_1 var_410_arg_1 = var_409; [L1268] SORT_1 var_410 = var_410_arg_0 & var_410_arg_1; [L1269] SORT_1 var_411_arg_0 = var_364; [L1270] SORT_1 var_411_arg_1 = state_37; [L1271] SORT_1 var_411 = var_411_arg_0 == var_411_arg_1; [L1272] SORT_1 var_412_arg_0 = var_410; [L1273] SORT_1 var_412_arg_1 = var_411; [L1274] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L1275] SORT_1 var_413_arg_0 = var_368; [L1276] SORT_1 var_413_arg_1 = state_39; [L1277] SORT_1 var_413 = var_413_arg_0 == var_413_arg_1; [L1278] SORT_1 var_414_arg_0 = var_412; [L1279] SORT_1 var_414_arg_1 = var_413; [L1280] SORT_1 var_414 = var_414_arg_0 & var_414_arg_1; [L1281] SORT_1 var_415_arg_0 = var_372; [L1282] SORT_1 var_415_arg_1 = state_41; [L1283] SORT_1 var_415 = var_415_arg_0 == var_415_arg_1; [L1284] SORT_1 var_416_arg_0 = var_414; [L1285] SORT_1 var_416_arg_1 = var_415; [L1286] SORT_1 var_416 = var_416_arg_0 & var_416_arg_1; [L1287] SORT_1 var_417_arg_0 = var_416; [L1288] SORT_1 var_417_arg_1 = state_45; [L1289] SORT_1 var_417 = var_417_arg_0 & var_417_arg_1; [L1290] SORT_1 var_418_arg_0 = input_99; [L1291] SORT_4 var_418_arg_1 = var_133; [L1292] SORT_4 var_418_arg_2 = var_188; [L1293] EXPR var_418_arg_0 ? var_418_arg_1 : var_418_arg_2 [L1293] SORT_4 var_418 = var_418_arg_0 ? var_418_arg_1 : var_418_arg_2; [L1294] SORT_1 var_419_arg_0 = input_109; [L1295] SORT_4 var_419_arg_1 = var_133; [L1296] SORT_4 var_419_arg_2 = var_188; [L1297] EXPR var_419_arg_0 ? var_419_arg_1 : var_419_arg_2 [L1297] SORT_4 var_419 = var_419_arg_0 ? var_419_arg_1 : var_419_arg_2; [L1298] SORT_4 var_420_arg_0 = var_418; [L1299] SORT_4 var_420_arg_1 = var_419; [L1300] SORT_4 var_420 = var_420_arg_0 + var_420_arg_1; [L1301] var_420 = var_420 & mask_SORT_4 [L1302] SORT_4 var_421_arg_0 = var_420; [L1303] SORT_4 var_421_arg_1 = var_133; [L1304] SORT_1 var_421 = var_421_arg_0 <= var_421_arg_1; [L1305] SORT_1 var_422_arg_0 = state_43; [L1306] SORT_1 var_422_arg_1 = var_417; [L1307] SORT_1 var_422_arg_2 = ~var_421; [L1308] var_422_arg_2 = var_422_arg_2 & mask_SORT_1 [L1309] EXPR var_422_arg_0 ? var_422_arg_1 : var_422_arg_2 [L1309] SORT_1 var_422 = var_422_arg_0 ? var_422_arg_1 : var_422_arg_2; [L1310] SORT_1 next_423_arg_1 = var_422; [L1312] state_6 = next_76_arg_1 [L1313] state_8 = next_78_arg_1 [L1314] state_10 = next_80_arg_1 [L1315] state_12 = next_82_arg_1 [L1316] state_14 = next_84_arg_1 [L1317] state_16 = next_86_arg_1 [L1318] state_18 = next_88_arg_1 [L1319] state_20 = next_90_arg_1 [L1320] state_23 = next_92_arg_1 [L1321] state_25 = next_94_arg_1 [L1322] state_27 = next_96_arg_1 [L1323] state_29 = next_98_arg_1 [L1324] state_31 = next_100_arg_1 [L1325] state_33 = next_102_arg_1 [L1326] state_35 = next_104_arg_1 [L1327] state_37 = next_106_arg_1 [L1328] state_39 = next_108_arg_1 [L1329] state_41 = next_110_arg_1 [L1330] state_43 = next_112_arg_1 [L1331] state_45 = next_423_arg_1 VAL [bad_74_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_24_arg_1=0, init_26_arg_1=0, init_28_arg_1=0, init_30_arg_1=0, init_32_arg_1=0, init_34_arg_1=0, init_36_arg_1=0, init_38_arg_1=0, init_40_arg_1=0, init_42_arg_1=0, init_44_arg_1=0, init_46_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_101=1, input_103=1, input_105=0, input_107=0, input_109=0, input_113=1, input_115=0, input_132=1, input_149=1, input_161=49, input_176=1, input_195=7, input_206=1, input_209=0, input_212=0, input_228=1, input_244=0, input_254=53, input_268=1, input_286=54, input_297=0, input_75=0, input_77=0, input_79=0, input_81=0, input_83=0, input_85=0, input_87=0, input_89=0, input_91=1, input_93=0, input_95=0, input_97=0, input_99=1, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, next_100_arg_1=1, next_102_arg_1=1, next_104_arg_1=1, next_106_arg_1=0, next_108_arg_1=0, next_110_arg_1=0, next_112_arg_1=1, next_423_arg_1=1, next_76_arg_1=0, next_78_arg_1=0, next_80_arg_1=0, next_82_arg_1=0, next_84_arg_1=0, next_86_arg_1=0, next_88_arg_1=0, next_90_arg_1=0, next_92_arg_1=1, next_94_arg_1=0, next_96_arg_1=0, next_98_arg_1=0, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_23=1, state_25=0, state_27=0, state_29=0, state_31=1, state_33=1, state_35=1, state_37=0, state_39=0, state_41=0, state_43=1, state_45=1, state_6=0, state_8=0, var_111=1, var_114=1, var_114_arg_0=1, var_114_arg_1=0, var_116=1, var_116_arg_0=0, var_116_arg_1=1, var_117=2, var_118=0, var_119=0, var_119_arg_0=1, var_119_arg_1=0, var_119_arg_2=0, var_120=0, var_120_arg_0=0, var_120_arg_1=0, var_121=0, var_121_arg_0=2, var_121_arg_1=0, var_122=1, var_122_arg_0=0, var_122_arg_1=0, var_123=0, var_123_arg_0=1, var_123_arg_1=0, var_123_arg_2=0, var_124=0, var_124_arg_0=0, var_124_arg_1=0, var_125=0, var_125_arg_0=1, var_125_arg_1=0, var_125_arg_2=0, var_126=0, var_126_arg_0=0, var_126_arg_1=0, var_127=1, var_127_arg_0=0, var_127_arg_1=0, var_128=0, var_128_arg_0=0, var_128_arg_1=1, var_129=0, var_129_arg_0=1, var_129_arg_1=0, var_130=1, var_130_arg_0=1, var_130_arg_1=0, var_131=1, var_131_arg_0=1, var_131_arg_1=1, var_133=1, var_134=1, var_134_arg_0=1, var_134_arg_1=0, var_135=1, var_135_arg_0=1, var_136=0, var_136_arg_0=0, var_136_arg_1=1, var_136_arg_2=0, var_137=0, var_137_arg_0=0, var_137_arg_1=0, var_138=0, var_138_arg_0=2, var_138_arg_1=0, var_139=1, var_139_arg_0=0, var_139_arg_1=0, var_140=0, var_140_arg_0=1, var_140_arg_1=0, var_140_arg_2=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_142=0, var_142_arg_0=0, var_142_arg_1=0, var_142_arg_2=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_144=1, var_144_arg_0=0, var_144_arg_1=0, var_145=1, var_145_arg_0=1, var_145_arg_1=1, var_146=1, var_146_arg_0=1, var_146_arg_1=1, var_147=1, var_147_arg_0=1, var_147_arg_1=1, var_148=1, var_148_arg_0=1, var_148_arg_1=1, var_150=2, var_151=1, var_151_arg_0=1, var_151_arg_1=0, var_152=1, var_152_arg_0=1, var_153=1, var_153_arg_0=1, var_153_arg_1=1, var_153_arg_2=0, var_154=0, var_154_arg_0=2, var_154_arg_1=1, var_155=6, var_156=0, var_156_arg_0=6, var_156_arg_1=0, var_157=0, var_157_arg_0=0, var_157_arg_1=0, var_158=0, var_158_arg_0=1, var_158_arg_1=0, var_159=1, var_159_arg_0=1, var_159_arg_1=0, var_160=1, var_160_arg_0=1, var_160_arg_1=1, var_162=1, var_162_arg_0=0, var_162_arg_1=1, var_163=0, var_163_arg_0=1, var_163_arg_1=0, var_163_arg_2=1, var_164=0, var_164_arg_0=0, var_164_arg_1=0, var_165=0, var_165_arg_0=2, var_165_arg_1=0, var_166=1, var_166_arg_0=0, var_166_arg_1=0, var_167=1, var_168=1, var_168_arg_0=1, var_168_arg_1=1, var_168_arg_2=0, var_169=0, var_169_arg_0=1, var_169_arg_1=0, var_169_arg_2=1, var_170=0, var_170_arg_0=1, var_170_arg_1=0, var_170_arg_2=0, var_171=1, var_171_arg_0=0, var_171_arg_1=0, var_172=0, var_172_arg_0=0, var_172_arg_1=1, var_173=0, var_173_arg_0=1, var_173_arg_1=0, var_174=0, var_174_arg_0=0, var_174_arg_1=0, var_175=0, var_175_arg_0=1, var_175_arg_1=0, var_177=4, var_177_arg_0=0, var_177_arg_1=49, var_178=1, var_178_arg_0=1, var_178_arg_1=0, var_179=1, var_179_arg_0=1, var_180=1, var_180_arg_0=1, var_180_arg_1=1, var_180_arg_2=0, var_181=1, var_181_arg_0=1, var_181_arg_1=1, var_181_arg_2=0, var_182=0, var_182_arg_0=0, var_182_arg_1=1, var_183=0, var_183_arg_0=0, var_183_arg_1=1, var_184=0, var_184_arg_0=0, var_184_arg_1=1, var_185=1, var_185_arg_0=0, var_185_arg_1=0, var_186=0, var_186_arg_0=0, var_186_arg_1=0, var_187=1, var_187_arg_0=1, var_187_arg_1=1, var_188=0, var_189=1, var_189_arg_0=0, var_189_arg_1=0, var_190=1, var_190_arg_0=1, var_190_arg_1=1, var_191=1, var_191_arg_0=0, var_191_arg_1=1, var_192=0, var_192_arg_0=4, var_192_arg_1=1, var_193=0, var_193_arg_0=0, var_193_arg_1=0, var_194=0, var_194_arg_0=0, var_194_arg_1=0, var_196=1, var_196_arg_0=1, var_196_arg_1=1, var_197=1, var_197_arg_0=1, var_197_arg_1=1, var_198=1, var_198_arg_0=1, var_198_arg_1=0, var_199=1, var_199_arg_0=1, var_200=1, var_200_arg_0=1, var_200_arg_1=1, var_200_arg_2=0, var_201=0, var_201_arg_0=2, var_201_arg_1=1, var_202=0, var_202_arg_0=1, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_203_arg_1=0, var_204=0, var_204_arg_0=0, var_204_arg_1=0, var_205=1, var_205_arg_0=1, var_205_arg_1=7, var_207=1, var_207_arg_0=1, var_207_arg_1=1, var_208=0, var_208_arg_0=0, var_208_arg_1=1, var_210=1, var_210_arg_0=1, var_210_arg_1=0, var_211=0, var_211_arg_0=0, var_211_arg_1=1, var_213=1, var_213_arg_0=1, var_213_arg_1=0, var_214=0, var_214_arg_0=0, var_214_arg_1=0, var_214_arg_2=0, var_215=0, var_215_arg_0=0, var_215_arg_1=0, var_216=0, var_216_arg_0=2, var_216_arg_1=0, var_217=1, var_217_arg_0=0, var_217_arg_1=0, var_218=0, var_218_arg_0=1, var_218_arg_1=0, var_218_arg_2=1, var_219=0, var_219_arg_0=1, var_219_arg_1=0, var_219_arg_2=0, var_22=0, var_220=0, var_220_arg_0=0, var_220_arg_1=0, var_221=0, var_221_arg_0=0, var_221_arg_1=0, var_221_arg_2=0, var_222=0, var_222_arg_0=0, var_222_arg_1=0, var_223=1, var_223_arg_0=0, var_223_arg_1=0, var_224=0, var_224_arg_0=1, var_224_arg_1=0, var_225=0, var_225_arg_0=1, var_225_arg_1=0, var_226=0, var_226_arg_0=0, var_226_arg_1=0, var_227=0, var_227_arg_0=0, var_227_arg_1=0, var_229=1, var_229_arg_0=1, var_229_arg_1=0, var_230=1, var_230_arg_0=1, var_231=0, var_231_arg_0=0, var_231_arg_1=1, var_231_arg_2=0, var_232=0, var_232_arg_0=0, var_232_arg_1=0, var_233=0, var_233_arg_0=2, var_233_arg_1=0, var_234=1, var_234_arg_0=0, var_234_arg_1=0, var_235=0, var_235_arg_0=1, var_235_arg_1=0, var_235_arg_2=0, var_236=0, var_236_arg_0=0, var_236_arg_1=0, var_237=0, var_237_arg_0=0, var_237_arg_1=0, var_237_arg_2=0, var_238=0, var_238_arg_0=0, var_238_arg_1=0, var_239=1, var_239_arg_0=0, var_239_arg_1=0, var_240=1, var_240_arg_0=1, var_240_arg_1=1, var_241=1, var_241_arg_0=1, var_241_arg_1=1, var_242=1, var_242_arg_0=1, var_242_arg_1=1, var_243=0, var_243_arg_0=0, var_243_arg_1=1, var_245=1, var_245_arg_0=1, var_245_arg_1=0, var_246=1, var_246_arg_0=1, var_247=1, var_247_arg_0=1, var_247_arg_1=1, var_247_arg_2=0, var_248=0, var_248_arg_0=2, var_248_arg_1=1, var_249=0, var_249_arg_0=6, var_249_arg_1=0, var_250=0, var_250_arg_0=0, var_250_arg_1=1, var_251=0, var_251_arg_0=1, var_251_arg_1=0, var_252=1, var_252_arg_0=1, var_252_arg_1=0, var_253=0, var_253_arg_0=0, var_253_arg_1=1, var_255=0, var_255_arg_0=0, var_255_arg_1=0, var_256=1, var_256_arg_0=0, var_256_arg_1=0, var_256_arg_2=1, var_257=0, var_257_arg_0=0, var_257_arg_1=1, var_258=0, var_258_arg_0=2, var_258_arg_1=0, var_259=0, var_259_arg_0=0, var_259_arg_1=1, var_260=0, var_260_arg_0=0, var_260_arg_1=1, var_260_arg_2=0, var_261=0, var_261_arg_0=0, var_261_arg_1=0, var_261_arg_2=0, var_262=0, var_262_arg_0=0, var_262_arg_1=0, var_262_arg_2=0, var_263=1, var_263_arg_0=0, var_263_arg_1=0, var_264=1, var_264_arg_0=1, var_264_arg_1=1, var_265=0, var_265_arg_0=0, var_265_arg_1=1, var_266=1, var_266_arg_0=1, var_266_arg_1=0, var_267=0, var_267_arg_0=0, var_267_arg_1=1, var_269=1, var_269_arg_0=0, var_269_arg_1=53, var_270=1, var_270_arg_0=1, var_270_arg_1=0, var_271=1, var_271_arg_0=1, var_272=0, var_272_arg_0=0, var_272_arg_1=1, var_272_arg_2=0, var_273=0, var_273_arg_0=0, var_273_arg_1=0, var_273_arg_2=0, var_274=1, var_274_arg_0=0, var_274_arg_1=0, var_275=0, var_275_arg_0=0, var_275_arg_1=0, var_276=0, var_276_arg_0=0, var_276_arg_1=0, var_277=1, var_277_arg_0=0, var_277_arg_1=0, var_278=1, var_278_arg_0=1, var_278_arg_1=1, var_279=1, var_279_arg_0=0, var_279_arg_1=0, var_280=0, var_280_arg_0=1, var_280_arg_1=0, var_281=0, var_281_arg_0=1, var_281_arg_1=0, var_282=1, var_282_arg_0=1, var_282_arg_1=0, var_283=1, var_283_arg_0=1, var_283_arg_1=1, var_284=1, var_284_arg_0=0, var_284_arg_1=1, var_285=0, var_285_arg_0=0, var_285_arg_1=1, var_287=0, var_287_arg_0=0, var_287_arg_1=1, var_288=1, var_288_arg_0=0, var_288_arg_1=1, var_289=1, var_289_arg_0=1, var_289_arg_1=0, var_290=1, var_290_arg_0=1, var_291=1, var_291_arg_0=1, var_291_arg_1=1, var_291_arg_2=1, var_292=0, var_292_arg_0=2, var_292_arg_1=1, var_293=0, var_293_arg_0=1, var_293_arg_1=0, var_294=1, var_294_arg_0=1, var_294_arg_1=0, var_295=0, var_295_arg_0=0, var_295_arg_1=1, var_296=54, var_296_arg_0=0, var_296_arg_1=54, var_298=1, var_298_arg_0=54, var_298_arg_1=1, var_299=0, var_299_arg_0=0, var_299_arg_1=1, var_300=1, var_300_arg_0=1, var_300_arg_1=0, var_301=1, var_301_arg_0=1, var_301_arg_1=1, var_302=1, var_302_arg_0=1, var_302_arg_1=1, var_303=5, var_303_arg_0=49, var_303_arg_1=1, var_304=9, var_304_arg_0=1, var_304_arg_1=5, var_305=9, var_305_arg_0=7, var_305_arg_1=9, var_306=251, var_306_arg_0=1, var_306_arg_1=9, var_307=51, var_307_arg_0=0, var_307_arg_1=251, var_308=0, var_308_arg_0=0, var_308_arg_1=51, var_309=1, var_309_arg_0=1, var_309_arg_1=0, var_310=1, var_310_arg_0=0, var_310_arg_1=1, var_311=53, var_311_arg_0=53, var_311_arg_1=1, var_312=2, var_312_arg_0=1, var_312_arg_1=53, var_313=2, var_313_arg_0=54, var_313_arg_1=2, var_314=1, var_314_arg_0=0, var_314_arg_1=2, var_315=0, var_315_arg_0=0, var_315_arg_1=1, var_316=0, var_316_arg_0=1, var_316_arg_1=0, var_317=1, var_317_arg_0=1, var_317_arg_1=0, var_318=0, var_318_arg_0=0, var_318_arg_1=1, var_319=0, var_319_arg_0=0, var_319_arg_1=0, var_320=1, var_320_arg_0=0, var_320_arg_1=1, var_321=0, var_321_arg_0=0, var_321_arg_1=1, var_322=0, var_322_arg_0=0, var_322_arg_1=0, var_323=1, var_323_arg_0=0, var_323_arg_1=1, var_324=1, var_324_arg_0=1, var_324_arg_1=1, var_325=1, var_325_arg_0=0, var_325_arg_1=1, var_326=1, var_326_arg_0=1, var_326_arg_1=1, var_327=0, var_327_arg_0=0, var_327_arg_1=1, var_328=1, var_328_arg_0=1, var_328_arg_1=1, var_329=1, var_329_arg_0=1, var_329_arg_1=1, var_330=0, var_330_arg_0=0, var_330_arg_1=1, var_331=1, var_331_arg_0=1, var_331_arg_1=0, var_332=1, var_332_arg_0=0, var_332_arg_1=1, var_333=0, var_333_arg_0=0, var_333_arg_1=1, var_334=1, var_334_arg_0=1, var_334_arg_1=0, var_335=1, var_335_arg_0=0, var_335_arg_1=1, var_336=0, var_336_arg_0=0, var_336_arg_1=1, var_337=1, var_337_arg_0=1, var_337_arg_1=0, var_338=0, var_338_arg_0=0, var_338_arg_1=1, var_339=1, var_339_arg_0=0, var_339_arg_1=1, var_340=0, var_340_arg_0=0, var_340_arg_1=1, var_341=0, var_341_arg_0=0, var_341_arg_1=0, var_342=0, var_342_arg_0=1, var_342_arg_1=0, var_343=1, var_343_arg_0=1, var_343_arg_1=1, var_344=1, var_344_arg_0=1, var_344_arg_1=1, var_345=0, var_345_arg_0=0, var_345_arg_1=1, var_346=0, var_346_arg_0=1, var_346_arg_1=0, var_347=1, var_347_arg_0=0, var_347_arg_1=1, var_348=0, var_348_arg_0=0, var_348_arg_1=1, var_349=0, var_349_arg_0=0, var_349_arg_1=0, var_350=0, var_350_arg_0=4, var_350_arg_1=0, var_351=1, var_351_arg_0=0, var_351_arg_1=1, var_352=0, var_352_arg_0=0, var_352_arg_1=1, var_353=0, var_353_arg_0=0, var_353_arg_1=0, var_354=1, var_354_arg_0=1, var_354_arg_1=1, var_355=1, var_355_arg_0=0, var_355_arg_1=1, var_356=1, var_356_arg_0=1, var_356_arg_1=1, var_357=1, var_357_arg_0=0, var_357_arg_1=1, var_358=1, var_358_arg_0=1, var_358_arg_1=1, var_359=0, var_359_arg_0=0, var_359_arg_1=1, var_360=0, var_360_arg_0=1, var_360_arg_1=0, var_361=0, var_361_arg_0=1, var_361_arg_1=0, var_362=0, var_362_arg_0=0, var_362_arg_1=0, var_363=0, var_363_arg_0=0, var_363_arg_1=0, var_364=0, var_364_arg_0=1, var_364_arg_1=0, var_365=0, var_365_arg_0=0, var_365_arg_1=0, var_366=0, var_366_arg_0=0, var_366_arg_1=0, var_367=0, var_367_arg_0=0, var_367_arg_1=0, var_368=1, var_368_arg_0=1, var_368_arg_1=1, var_369=0, var_369_arg_0=0, var_369_arg_1=0, var_370=0, var_370_arg_0=1, var_370_arg_1=0, var_371=0, var_371_arg_0=0, var_371_arg_1=0, var_372=0, var_372_arg_0=54, var_372_arg_1=1, var_373=1, var_373_arg_0=1, var_373_arg_1=0, var_374=0, var_374_arg_0=0, var_374_arg_1=1, var_375=0, var_375_arg_0=0, var_375_arg_1=0, var_376=0, var_376_arg_0=0, var_376_arg_1=1, var_377=1, var_377_arg_0=0, var_377_arg_1=1, var_378=0, var_378_arg_0=0, var_378_arg_1=1, var_379=0, var_379_arg_0=0, var_379_arg_1=0, var_380=1, var_380_arg_0=0, var_380_arg_1=0, var_381=0, var_381_arg_0=0, var_381_arg_1=1, var_382=1, var_382_arg_0=0, var_382_arg_1=0, var_383=0, var_383_arg_0=0, var_383_arg_1=1, var_384=1, var_384_arg_0=0, var_384_arg_1=0, var_385=0, var_385_arg_0=0, var_385_arg_1=1, var_386=0, var_386_arg_0=0, var_386_arg_1=0, var_386_arg_2=0, var_387=1, var_387_arg_0=0, var_387_arg_1=0, var_388=0, var_388_arg_0=0, var_388_arg_1=1, var_389=0, var_389_arg_0=1, var_389_arg_1=0, var_390=0, var_390_arg_0=0, var_390_arg_1=0, var_391=1, var_391_arg_0=0, var_391_arg_1=0, var_392=0, var_392_arg_0=0, var_392_arg_1=1, var_393=0, var_393_arg_0=1, var_393_arg_1=0, var_394=0, var_394_arg_0=0, var_394_arg_1=0, var_395=1, var_395_arg_0=0, var_395_arg_1=0, var_396=0, var_396_arg_0=0, var_396_arg_1=1, var_397=0, var_397_arg_0=1, var_397_arg_1=0, var_398=0, var_398_arg_0=0, var_398_arg_1=0, var_399=1, var_399_arg_0=0, var_399_arg_1=0, var_400=0, var_400_arg_0=0, var_400_arg_1=1, var_401=1, var_401_arg_0=0, var_401_arg_1=0, var_402=0, var_402_arg_0=0, var_402_arg_1=1, var_403=1, var_403_arg_0=0, var_403_arg_1=0, var_404=0, var_404_arg_0=0, var_404_arg_1=1, var_405=0, var_405_arg_0=1, var_405_arg_1=0, var_406=0, var_406_arg_0=0, var_406_arg_1=0, var_407=1, var_407_arg_0=0, var_407_arg_1=0, var_408=0, var_408_arg_0=0, var_408_arg_1=1, var_409=1, var_409_arg_0=0, var_409_arg_1=0, var_410=0, var_410_arg_0=0, var_410_arg_1=1, var_411=1, var_411_arg_0=0, var_411_arg_1=0, var_412=0, var_412_arg_0=0, var_412_arg_1=1, var_413=0, var_413_arg_0=1, var_413_arg_1=0, var_414=0, var_414_arg_0=0, var_414_arg_1=0, var_415=1, var_415_arg_0=0, var_415_arg_1=0, var_416=0, var_416_arg_0=0, var_416_arg_1=1, var_417=0, var_417_arg_0=0, var_417_arg_1=0, var_418=1, var_418_arg_0=1, var_418_arg_1=1, var_418_arg_2=0, var_419=0, var_419_arg_0=0, var_419_arg_1=1, var_419_arg_2=0, var_420=0, var_420_arg_0=1, var_420_arg_1=0, var_421=1, var_421_arg_0=0, var_421_arg_1=1, var_422=1, var_422_arg_0=0, var_422_arg_1=0, var_422_arg_2=1, var_47=0, var_47_arg_0=0, var_47_arg_1=0, var_48=0, var_48_arg_0=0, var_48_arg_1=0, var_49=0, var_49_arg_0=0, var_49_arg_1=1, var_5=0, var_50=0, var_50_arg_0=0, var_50_arg_1=1, var_51=0, var_51_arg_0=0, var_51_arg_1=0, var_52=0, var_52_arg_0=0, var_52_arg_1=1, var_53=0, var_53_arg_0=0, var_53_arg_1=0, var_54=0, var_54_arg_0=0, var_54_arg_1=0, var_55=0, var_55_arg_0=0, var_55_arg_1=1, var_56=0, var_57=1, var_57_arg_0=0, var_57_arg_1=0, var_58=0, var_58_arg_0=0, var_58_arg_1=1, var_59=1, var_59_arg_0=0, var_59_arg_1=0, var_60=0, var_60_arg_0=0, var_60_arg_1=1, var_61=1, var_61_arg_0=0, var_61_arg_1=0, var_62=0, var_62_arg_0=0, var_62_arg_1=1, var_63=1, var_63_arg_0=0, var_63_arg_1=0, var_64=0, var_64_arg_0=0, var_64_arg_1=1, var_65=1, var_65_arg_0=0, var_65_arg_1=0, var_66=0, var_66_arg_0=0, var_66_arg_1=1, var_67=1, var_67_arg_0=0, var_67_arg_1=0, var_68=0, var_68_arg_0=0, var_68_arg_1=1, var_69=1, var_69_arg_0=0, var_69_arg_1=0, var_70=0, var_70_arg_0=0, var_70_arg_1=1, var_71=1, var_71_arg_0=0, var_71_arg_1=0, var_72=0, var_72_arg_0=0, var_72_arg_1=1, var_73=0, var_73_arg_0=0, var_73_arg_1=0] [L147] input_75 = __VERIFIER_nondet_uchar() [L148] input_75 = input_75 & mask_SORT_2 [L149] input_77 = __VERIFIER_nondet_uchar() [L150] input_77 = input_77 & mask_SORT_2 [L151] input_79 = __VERIFIER_nondet_uchar() [L152] input_79 = input_79 & mask_SORT_2 [L153] input_81 = __VERIFIER_nondet_uchar() [L154] input_81 = input_81 & mask_SORT_2 [L155] input_83 = __VERIFIER_nondet_uchar() [L156] input_83 = input_83 & mask_SORT_2 [L157] input_85 = __VERIFIER_nondet_uchar() [L158] input_85 = input_85 & mask_SORT_2 [L159] input_87 = __VERIFIER_nondet_uchar() [L160] input_87 = input_87 & mask_SORT_2 [L161] input_89 = __VERIFIER_nondet_uchar() [L162] input_89 = input_89 & mask_SORT_2 [L163] input_91 = __VERIFIER_nondet_uchar() [L164] input_91 = input_91 & mask_SORT_1 [L165] input_93 = __VERIFIER_nondet_uchar() [L166] input_93 = input_93 & mask_SORT_1 [L167] input_95 = __VERIFIER_nondet_uchar() [L168] input_95 = input_95 & mask_SORT_1 [L169] input_97 = __VERIFIER_nondet_uchar() [L170] input_97 = input_97 & mask_SORT_1 [L171] input_99 = __VERIFIER_nondet_uchar() [L172] input_99 = input_99 & mask_SORT_1 [L173] input_101 = __VERIFIER_nondet_uchar() [L174] input_101 = input_101 & mask_SORT_1 [L175] input_103 = __VERIFIER_nondet_uchar() [L176] input_103 = input_103 & mask_SORT_1 [L177] input_105 = __VERIFIER_nondet_uchar() [L178] input_105 = input_105 & mask_SORT_1 [L179] input_107 = __VERIFIER_nondet_uchar() [L180] input_107 = input_107 & mask_SORT_1 [L181] input_109 = __VERIFIER_nondet_uchar() [L182] input_109 = input_109 & mask_SORT_1 [L183] input_113 = __VERIFIER_nondet_uchar() [L184] input_113 = input_113 & mask_SORT_1 [L185] input_115 = __VERIFIER_nondet_uchar() [L186] input_115 = input_115 & mask_SORT_1 [L187] input_132 = __VERIFIER_nondet_uchar() [L188] input_132 = input_132 & mask_SORT_1 [L189] input_149 = __VERIFIER_nondet_uchar() [L190] input_149 = input_149 & mask_SORT_1 [L191] input_161 = __VERIFIER_nondet_uchar() [L192] input_176 = __VERIFIER_nondet_uchar() [L193] input_176 = input_176 & mask_SORT_1 [L194] input_195 = __VERIFIER_nondet_uchar() [L195] input_206 = __VERIFIER_nondet_uchar() [L196] input_206 = input_206 & mask_SORT_1 [L197] input_209 = __VERIFIER_nondet_uchar() [L198] input_209 = input_209 & mask_SORT_1 [L199] input_212 = __VERIFIER_nondet_uchar() [L200] input_212 = input_212 & mask_SORT_1 [L201] input_228 = __VERIFIER_nondet_uchar() [L202] input_228 = input_228 & mask_SORT_1 [L203] input_244 = __VERIFIER_nondet_uchar() [L204] input_244 = input_244 & mask_SORT_1 [L205] input_254 = __VERIFIER_nondet_uchar() [L206] input_268 = __VERIFIER_nondet_uchar() [L207] input_268 = input_268 & mask_SORT_1 [L208] input_286 = __VERIFIER_nondet_uchar() [L209] input_297 = __VERIFIER_nondet_uchar() [L210] input_297 = input_297 & mask_SORT_1 [L213] SORT_1 var_47_arg_0 = state_23; [L214] SORT_1 var_47_arg_1 = ~state_25; [L215] var_47_arg_1 = var_47_arg_1 & mask_SORT_1 [L216] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L217] SORT_1 var_48_arg_0 = var_47; [L218] SORT_1 var_48_arg_1 = ~state_27; [L219] var_48_arg_1 = var_48_arg_1 & mask_SORT_1 [L220] SORT_1 var_48 = var_48_arg_0 & var_48_arg_1; [L221] SORT_1 var_49_arg_0 = var_48; [L222] SORT_1 var_49_arg_1 = ~state_29; [L223] var_49_arg_1 = var_49_arg_1 & mask_SORT_1 [L224] SORT_1 var_49 = var_49_arg_0 & var_49_arg_1; [L225] SORT_1 var_50_arg_0 = var_49; [L226] SORT_1 var_50_arg_1 = ~state_31; [L227] var_50_arg_1 = var_50_arg_1 & mask_SORT_1 [L228] SORT_1 var_50 = var_50_arg_0 & var_50_arg_1; [L229] SORT_1 var_51_arg_0 = var_50; [L230] SORT_1 var_51_arg_1 = state_33; [L231] SORT_1 var_51 = var_51_arg_0 & var_51_arg_1; [L232] SORT_1 var_52_arg_0 = var_51; [L233] SORT_1 var_52_arg_1 = ~state_35; [L234] var_52_arg_1 = var_52_arg_1 & mask_SORT_1 [L235] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L236] SORT_1 var_53_arg_0 = var_52; [L237] SORT_1 var_53_arg_1 = ~state_37; [L238] var_53_arg_1 = var_53_arg_1 & mask_SORT_1 [L239] SORT_1 var_53 = var_53_arg_0 & var_53_arg_1; [L240] SORT_1 var_54_arg_0 = var_53; [L241] SORT_1 var_54_arg_1 = ~state_39; [L242] var_54_arg_1 = var_54_arg_1 & mask_SORT_1 [L243] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L244] SORT_1 var_55_arg_0 = var_54; [L245] SORT_1 var_55_arg_1 = ~state_41; [L246] var_55_arg_1 = var_55_arg_1 & mask_SORT_1 [L247] SORT_1 var_55 = var_55_arg_0 & var_55_arg_1; [L248] SORT_2 var_57_arg_0 = var_56; [L249] SORT_2 var_57_arg_1 = state_6; [L250] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L251] SORT_1 var_58_arg_0 = var_55; [L252] SORT_1 var_58_arg_1 = var_57; [L253] SORT_1 var_58 = var_58_arg_0 & var_58_arg_1; [L254] SORT_2 var_59_arg_0 = var_56; [L255] SORT_2 var_59_arg_1 = state_8; [L256] SORT_1 var_59 = var_59_arg_0 == var_59_arg_1; [L257] SORT_1 var_60_arg_0 = var_58; [L258] SORT_1 var_60_arg_1 = var_59; [L259] SORT_1 var_60 = var_60_arg_0 & var_60_arg_1; [L260] SORT_2 var_61_arg_0 = var_56; [L261] SORT_2 var_61_arg_1 = state_10; [L262] SORT_1 var_61 = var_61_arg_0 == var_61_arg_1; [L263] SORT_1 var_62_arg_0 = var_60; [L264] SORT_1 var_62_arg_1 = var_61; [L265] SORT_1 var_62 = var_62_arg_0 & var_62_arg_1; [L266] SORT_2 var_63_arg_0 = var_56; [L267] SORT_2 var_63_arg_1 = state_12; [L268] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L269] SORT_1 var_64_arg_0 = var_62; [L270] SORT_1 var_64_arg_1 = var_63; [L271] SORT_1 var_64 = var_64_arg_0 & var_64_arg_1; [L272] SORT_2 var_65_arg_0 = var_56; [L273] SORT_2 var_65_arg_1 = state_14; [L274] SORT_1 var_65 = var_65_arg_0 == var_65_arg_1; [L275] SORT_1 var_66_arg_0 = var_64; [L276] SORT_1 var_66_arg_1 = var_65; [L277] SORT_1 var_66 = var_66_arg_0 & var_66_arg_1; [L278] SORT_2 var_67_arg_0 = var_56; [L279] SORT_2 var_67_arg_1 = state_16; [L280] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L281] SORT_1 var_68_arg_0 = var_66; [L282] SORT_1 var_68_arg_1 = var_67; [L283] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L284] SORT_2 var_69_arg_0 = var_56; [L285] SORT_2 var_69_arg_1 = state_18; [L286] SORT_1 var_69 = var_69_arg_0 == var_69_arg_1; [L287] SORT_1 var_70_arg_0 = var_68; [L288] SORT_1 var_70_arg_1 = var_69; [L289] SORT_1 var_70 = var_70_arg_0 & var_70_arg_1; [L290] SORT_2 var_71_arg_0 = var_56; [L291] SORT_2 var_71_arg_1 = state_20; [L292] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L293] SORT_1 var_72_arg_0 = var_70; [L294] SORT_1 var_72_arg_1 = var_71; [L295] SORT_1 var_72 = var_72_arg_0 & var_72_arg_1; [L296] SORT_1 var_73_arg_0 = state_45; [L297] SORT_1 var_73_arg_1 = var_72; [L298] SORT_1 var_73 = var_73_arg_0 & var_73_arg_1; [L299] var_73 = var_73 & mask_SORT_1 [L300] SORT_1 bad_74_arg_0 = var_73; [L301] CALL __VERIFIER_assert(!(bad_74_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 279.4s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 4.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 4.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 4.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 132.9s SatisfiabilityAnalysisTime, 4.2s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 8 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 02:04:00,310 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash d33cf51ae449ba0bb3b2aed15ba1d81575fd99e6f7bcd0260e48d36a1c4d14c9 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:04:03,137 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:04:03,140 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:04:03,183 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:04:03,183 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:04:03,189 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:04:03,192 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:04:03,198 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:04:03,206 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:04:03,210 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:04:03,212 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:04:03,215 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:04:03,216 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:04:03,225 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:04:03,227 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:04:03,230 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:04:03,232 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:04:03,234 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:04:03,240 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:04:03,248 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:04:03,250 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:04:03,252 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:04:03,254 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:04:03,255 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:04:03,260 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:04:03,260 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:04:03,261 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:04:03,262 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:04:03,263 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:04:03,264 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:04:03,264 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:04:03,266 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:04:03,267 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:04:03,268 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:04:03,270 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:04:03,270 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:04:03,271 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:04:03,272 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:04:03,272 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:04:03,273 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:04:03,274 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:04:03,276 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 02:04:03,308 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:04:03,308 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:04:03,309 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:04:03,309 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:04:03,310 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:04:03,310 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:04:03,310 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:04:03,311 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:04:03,311 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:04:03,311 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:04:03,312 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:04:03,312 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:04:03,313 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:04:03,313 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:04:03,313 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:04:03,314 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:04:03,314 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:04:03,314 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 02:04:03,315 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 02:04:03,315 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 02:04:03,315 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:04:03,315 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:04:03,316 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:04:03,316 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:04:03,316 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 02:04:03,316 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:04:03,316 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:04:03,317 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:04:03,317 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:04:03,317 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:04:03,317 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 02:04:03,317 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:03,318 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:04:03,318 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:04:03,318 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 02:04:03,318 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d33cf51ae449ba0bb3b2aed15ba1d81575fd99e6f7bcd0260e48d36a1c4d14c9 [2022-11-03 02:04:03,801 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:04:03,836 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:04:03,841 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:04:03,842 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:04:03,843 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:04:03,845 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c [2022-11-03 02:04:03,932 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/5cc03001c/8fea403637934ec59767698a1ee191d5/FLAG481245e56 [2022-11-03 02:04:04,688 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:04:04,689 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c [2022-11-03 02:04:04,704 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/5cc03001c/8fea403637934ec59767698a1ee191d5/FLAG481245e56 [2022-11-03 02:04:04,917 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/data/5cc03001c/8fea403637934ec59767698a1ee191d5 [2022-11-03 02:04:04,923 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:04:04,924 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:04:04,926 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:04:04,926 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:04:04,930 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:04:04,931 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:04:04" (1/1) ... [2022-11-03 02:04:04,932 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2d1adad2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:04, skipping insertion in model container [2022-11-03 02:04:04,933 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:04:04" (1/1) ... [2022-11-03 02:04:04,940 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:04:04,995 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:04:05,192 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c[1014,1027] [2022-11-03 02:04:05,625 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:04:05,635 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:04:05,646 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.bakery.2.prop1-back-serstep.c[1014,1027] [2022-11-03 02:04:05,790 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:04:05,803 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:04:05,805 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05 WrapperNode [2022-11-03 02:04:05,805 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:04:05,806 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:04:05,806 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:04:05,807 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:04:05,814 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:05,871 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:05,996 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1493 [2022-11-03 02:04:05,997 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:04:05,998 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:04:05,998 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:04:05,998 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:04:06,009 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,009 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,052 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,053 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,104 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,120 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,140 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,146 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,171 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:04:06,174 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:04:06,175 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:04:06,175 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:04:06,176 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (1/1) ... [2022-11-03 02:04:06,188 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:04:06,200 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:04:06,213 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:04:06,240 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:04:06,267 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:04:06,268 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:04:06,644 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:04:06,647 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:04:08,033 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:04:08,049 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:04:08,049 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:04:08,052 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:04:08 BoogieIcfgContainer [2022-11-03 02:04:08,052 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:04:08,056 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:04:08,057 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:04:08,060 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:04:08,061 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:04:04" (1/3) ... [2022-11-03 02:04:08,062 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a0a6488 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:04:08, skipping insertion in model container [2022-11-03 02:04:08,062 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:04:05" (2/3) ... [2022-11-03 02:04:08,063 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a0a6488 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:04:08, skipping insertion in model container [2022-11-03 02:04:08,063 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:04:08" (3/3) ... [2022-11-03 02:04:08,065 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.bakery.2.prop1-back-serstep.c [2022-11-03 02:04:08,094 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:04:08,095 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:04:08,182 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:04:08,195 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3622f2d4, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:04:08,195 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:04:08,201 INFO L276 IsEmpty]: Start isEmpty. Operand has 77 states, 75 states have (on average 1.4933333333333334) internal successors, (112), 76 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:08,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 02:04:08,210 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:08,211 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 02:04:08,212 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:08,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:08,222 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 02:04:08,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:08,243 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [440967923] [2022-11-03 02:04:08,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:08,244 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:08,244 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:08,251 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:08,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 02:04:08,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:08,766 INFO L263 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:04:08,776 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:08,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:08,872 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:08,873 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:08,873 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [440967923] [2022-11-03 02:04:08,874 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [440967923] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:08,874 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:08,875 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:04:08,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1355498129] [2022-11-03 02:04:08,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:08,882 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:04:08,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:08,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:04:08,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:04:08,920 INFO L87 Difference]: Start difference. First operand has 77 states, 75 states have (on average 1.4933333333333334) internal successors, (112), 76 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:09,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:09,408 INFO L93 Difference]: Finished difference Result 218 states and 327 transitions. [2022-11-03 02:04:09,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:04:09,411 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 02:04:09,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:09,427 INFO L225 Difference]: With dead ends: 218 [2022-11-03 02:04:09,427 INFO L226 Difference]: Without dead ends: 143 [2022-11-03 02:04:09,437 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:04:09,454 INFO L413 NwaCegarLoop]: 90 mSDtfsCounter, 202 mSDsluCounter, 191 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 281 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:09,455 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 281 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-11-03 02:04:09,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2022-11-03 02:04:09,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 75. [2022-11-03 02:04:09,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 74 states have (on average 1.4594594594594594) internal successors, (108), 74 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:09,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 108 transitions. [2022-11-03 02:04:09,534 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 108 transitions. Word has length 5 [2022-11-03 02:04:09,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:09,535 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 108 transitions. [2022-11-03 02:04:09,535 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:09,535 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 108 transitions. [2022-11-03 02:04:09,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:09,541 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:09,541 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:09,563 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:09,756 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:09,756 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:09,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:09,757 INFO L85 PathProgramCache]: Analyzing trace with hash -1917627193, now seen corresponding path program 1 times [2022-11-03 02:04:09,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:09,760 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [982730471] [2022-11-03 02:04:09,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:09,761 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:09,761 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:09,763 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:09,768 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 02:04:10,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:10,766 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 9 conjunts are in the unsatisfiable core [2022-11-03 02:04:10,777 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:10,853 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:10,854 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:10,854 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:10,855 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [982730471] [2022-11-03 02:04:10,855 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [982730471] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:10,855 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:10,855 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-11-03 02:04:10,856 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572294800] [2022-11-03 02:04:10,856 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:10,857 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-11-03 02:04:10,858 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:10,858 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-11-03 02:04:10,859 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2022-11-03 02:04:10,859 INFO L87 Difference]: Start difference. First operand 75 states and 108 transitions. Second operand has 6 states, 6 states have (on average 12.333333333333334) internal successors, (74), 6 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:11,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:11,225 INFO L93 Difference]: Finished difference Result 220 states and 319 transitions. [2022-11-03 02:04:11,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:04:11,226 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.333333333333334) internal successors, (74), 6 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:11,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:11,228 INFO L225 Difference]: With dead ends: 220 [2022-11-03 02:04:11,228 INFO L226 Difference]: Without dead ends: 149 [2022-11-03 02:04:11,229 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:04:11,230 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 502 mSDsluCounter, 167 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 502 SdHoareTripleChecker+Valid, 253 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:11,231 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [502 Valid, 253 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-11-03 02:04:11,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2022-11-03 02:04:11,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 77. [2022-11-03 02:04:11,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 76 states have (on average 1.4473684210526316) internal successors, (110), 76 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:11,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 110 transitions. [2022-11-03 02:04:11,239 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 110 transitions. Word has length 74 [2022-11-03 02:04:11,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:11,240 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 110 transitions. [2022-11-03 02:04:11,240 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.333333333333334) internal successors, (74), 6 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:11,240 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 110 transitions. [2022-11-03 02:04:11,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:11,242 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:11,242 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:11,274 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:11,455 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:11,456 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:11,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:11,456 INFO L85 PathProgramCache]: Analyzing trace with hash -701473467, now seen corresponding path program 1 times [2022-11-03 02:04:11,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:11,458 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2024324078] [2022-11-03 02:04:11,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:11,458 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:11,459 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:11,463 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:11,487 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 02:04:12,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:12,345 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:04:12,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:12,728 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:12,729 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:12,729 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:12,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2024324078] [2022-11-03 02:04:12,730 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2024324078] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:12,730 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:12,730 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-03 02:04:12,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636557527] [2022-11-03 02:04:12,731 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:12,731 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-03 02:04:12,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:12,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-03 02:04:12,733 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:04:12,733 INFO L87 Difference]: Start difference. First operand 77 states and 110 transitions. Second operand has 9 states, 9 states have (on average 8.222222222222221) internal successors, (74), 9 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:13,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:13,301 INFO L93 Difference]: Finished difference Result 234 states and 336 transitions. [2022-11-03 02:04:13,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:04:13,302 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 8.222222222222221) internal successors, (74), 9 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:13,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:13,303 INFO L225 Difference]: With dead ends: 234 [2022-11-03 02:04:13,304 INFO L226 Difference]: Without dead ends: 161 [2022-11-03 02:04:13,304 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:04:13,306 INFO L413 NwaCegarLoop]: 108 mSDtfsCounter, 110 mSDsluCounter, 468 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 576 SdHoareTripleChecker+Invalid, 257 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 135 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:13,306 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [110 Valid, 576 Invalid, 257 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 120 Invalid, 0 Unknown, 135 Unchecked, 0.5s Time] [2022-11-03 02:04:13,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2022-11-03 02:04:13,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 87. [2022-11-03 02:04:13,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 86 states have (on average 1.430232558139535) internal successors, (123), 86 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:13,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 123 transitions. [2022-11-03 02:04:13,316 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 123 transitions. Word has length 74 [2022-11-03 02:04:13,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:13,317 INFO L495 AbstractCegarLoop]: Abstraction has 87 states and 123 transitions. [2022-11-03 02:04:13,317 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 8.222222222222221) internal successors, (74), 9 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:13,318 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 123 transitions. [2022-11-03 02:04:13,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:13,320 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:13,320 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:13,354 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:13,545 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:13,546 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:13,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:13,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1260101191, now seen corresponding path program 1 times [2022-11-03 02:04:13,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:13,548 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [504300375] [2022-11-03 02:04:13,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:13,549 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:13,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:13,550 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:13,566 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 02:04:14,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:14,308 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:04:14,319 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:14,527 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:14,527 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:14,528 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:14,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [504300375] [2022-11-03 02:04:14,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [504300375] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:14,529 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:14,529 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:04:14,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833276411] [2022-11-03 02:04:14,529 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:14,530 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:04:14,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:14,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:04:14,531 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:04:14,532 INFO L87 Difference]: Start difference. First operand 87 states and 123 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:14,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:14,712 INFO L93 Difference]: Finished difference Result 170 states and 244 transitions. [2022-11-03 02:04:14,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:04:14,714 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:14,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:14,715 INFO L225 Difference]: With dead ends: 170 [2022-11-03 02:04:14,715 INFO L226 Difference]: Without dead ends: 97 [2022-11-03 02:04:14,716 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:04:14,717 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 21 mSDsluCounter, 473 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 572 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 18 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:14,718 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 572 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 12 Invalid, 0 Unknown, 18 Unchecked, 0.2s Time] [2022-11-03 02:04:14,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-11-03 02:04:14,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2022-11-03 02:04:14,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 96 states have (on average 1.4270833333333333) internal successors, (137), 96 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:14,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 137 transitions. [2022-11-03 02:04:14,726 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 137 transitions. Word has length 74 [2022-11-03 02:04:14,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:14,727 INFO L495 AbstractCegarLoop]: Abstraction has 97 states and 137 transitions. [2022-11-03 02:04:14,727 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:14,728 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 137 transitions. [2022-11-03 02:04:14,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:14,729 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:14,729 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:14,757 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:14,943 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:14,944 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:14,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:14,944 INFO L85 PathProgramCache]: Analyzing trace with hash 816200517, now seen corresponding path program 1 times [2022-11-03 02:04:14,946 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:14,946 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [306675305] [2022-11-03 02:04:14,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:14,946 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:14,947 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:14,948 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:14,949 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-03 02:04:15,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:15,716 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:04:15,724 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:16,015 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:16,015 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:16,015 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:16,015 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [306675305] [2022-11-03 02:04:16,016 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [306675305] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:16,016 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:16,016 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:04:16,016 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1688446822] [2022-11-03 02:04:16,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:16,017 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:04:16,017 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:16,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:04:16,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:04:16,018 INFO L87 Difference]: Start difference. First operand 97 states and 137 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:16,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:16,184 INFO L93 Difference]: Finished difference Result 204 states and 294 transitions. [2022-11-03 02:04:16,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:04:16,187 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:16,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:16,188 INFO L225 Difference]: With dead ends: 204 [2022-11-03 02:04:16,188 INFO L226 Difference]: Without dead ends: 131 [2022-11-03 02:04:16,189 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:04:16,190 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 22 mSDsluCounter, 471 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 570 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 22 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:16,191 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [22 Valid, 570 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 22 Unchecked, 0.1s Time] [2022-11-03 02:04:16,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-11-03 02:04:16,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2022-11-03 02:04:16,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 131 states, 130 states have (on average 1.4384615384615385) internal successors, (187), 130 states have internal predecessors, (187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:16,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 187 transitions. [2022-11-03 02:04:16,201 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 187 transitions. Word has length 74 [2022-11-03 02:04:16,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:16,201 INFO L495 AbstractCegarLoop]: Abstraction has 131 states and 187 transitions. [2022-11-03 02:04:16,202 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:16,202 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 187 transitions. [2022-11-03 02:04:16,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:16,203 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:16,204 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:16,237 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:16,429 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:16,430 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:16,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:16,430 INFO L85 PathProgramCache]: Analyzing trace with hash 1660206019, now seen corresponding path program 1 times [2022-11-03 02:04:16,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:16,432 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [891627429] [2022-11-03 02:04:16,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:16,433 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:16,433 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:16,434 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:16,471 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 02:04:17,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:17,196 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:04:17,204 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:17,803 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:17,803 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:17,804 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:17,804 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [891627429] [2022-11-03 02:04:17,804 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [891627429] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:17,804 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:17,804 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-11-03 02:04:17,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712490097] [2022-11-03 02:04:17,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:17,805 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-11-03 02:04:17,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:17,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-11-03 02:04:17,806 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:04:17,807 INFO L87 Difference]: Start difference. First operand 131 states and 187 transitions. Second operand has 9 states, 9 states have (on average 8.222222222222221) internal successors, (74), 9 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:18,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:18,325 INFO L93 Difference]: Finished difference Result 280 states and 402 transitions. [2022-11-03 02:04:18,326 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:04:18,326 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 8.222222222222221) internal successors, (74), 9 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:18,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:18,327 INFO L225 Difference]: With dead ends: 280 [2022-11-03 02:04:18,327 INFO L226 Difference]: Without dead ends: 207 [2022-11-03 02:04:18,328 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2022-11-03 02:04:18,329 INFO L413 NwaCegarLoop]: 135 mSDtfsCounter, 129 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 129 SdHoareTripleChecker+Valid, 665 SdHoareTripleChecker+Invalid, 268 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 159 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:18,329 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [129 Valid, 665 Invalid, 268 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 106 Invalid, 0 Unknown, 159 Unchecked, 0.4s Time] [2022-11-03 02:04:18,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2022-11-03 02:04:18,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 135. [2022-11-03 02:04:18,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 134 states have (on average 1.4328358208955223) internal successors, (192), 134 states have internal predecessors, (192), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:18,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 192 transitions. [2022-11-03 02:04:18,337 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 192 transitions. Word has length 74 [2022-11-03 02:04:18,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:18,338 INFO L495 AbstractCegarLoop]: Abstraction has 135 states and 192 transitions. [2022-11-03 02:04:18,338 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 8.222222222222221) internal successors, (74), 9 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:18,339 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 192 transitions. [2022-11-03 02:04:18,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:18,340 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:18,340 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:18,373 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:18,565 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:18,565 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:18,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:18,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1933161403, now seen corresponding path program 1 times [2022-11-03 02:04:18,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:18,568 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [535867811] [2022-11-03 02:04:18,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:18,568 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:18,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:18,573 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:18,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 02:04:19,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:19,328 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:04:19,333 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:19,580 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:19,581 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:19,581 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:19,581 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [535867811] [2022-11-03 02:04:19,581 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [535867811] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:19,582 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:19,582 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:04:19,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1788178823] [2022-11-03 02:04:19,582 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:19,583 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:04:19,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:19,584 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:04:19,584 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:04:19,584 INFO L87 Difference]: Start difference. First operand 135 states and 192 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:19,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:19,765 INFO L93 Difference]: Finished difference Result 228 states and 328 transitions. [2022-11-03 02:04:19,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:04:19,767 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:19,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:19,768 INFO L225 Difference]: With dead ends: 228 [2022-11-03 02:04:19,768 INFO L226 Difference]: Without dead ends: 155 [2022-11-03 02:04:19,768 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:04:19,770 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 27 mSDsluCounter, 445 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 544 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:19,770 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 544 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 14 Invalid, 0 Unknown, 27 Unchecked, 0.2s Time] [2022-11-03 02:04:19,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-11-03 02:04:19,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 155. [2022-11-03 02:04:19,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 154 states have (on average 1.4350649350649352) internal successors, (221), 154 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:19,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 221 transitions. [2022-11-03 02:04:19,778 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 221 transitions. Word has length 74 [2022-11-03 02:04:19,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:19,779 INFO L495 AbstractCegarLoop]: Abstraction has 155 states and 221 transitions. [2022-11-03 02:04:19,779 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:19,780 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 221 transitions. [2022-11-03 02:04:19,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:19,781 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:19,781 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:19,812 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:19,998 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:19,998 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:19,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:19,998 INFO L85 PathProgramCache]: Analyzing trace with hash 1939104067, now seen corresponding path program 1 times [2022-11-03 02:04:19,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:20,000 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1822410106] [2022-11-03 02:04:20,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:20,000 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:20,000 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:20,001 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:20,003 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 02:04:20,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:20,744 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 5 conjunts are in the unsatisfiable core [2022-11-03 02:04:20,752 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:20,958 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:20,959 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:04:20,959 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:20,959 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1822410106] [2022-11-03 02:04:20,960 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1822410106] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:04:20,960 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:04:20,960 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:04:20,960 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914547855] [2022-11-03 02:04:20,961 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:04:20,961 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:04:20,961 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:20,962 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:04:20,962 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:04:20,962 INFO L87 Difference]: Start difference. First operand 155 states and 221 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:21,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:21,004 INFO L93 Difference]: Finished difference Result 321 states and 462 transitions. [2022-11-03 02:04:21,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:04:21,005 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:21,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:21,007 INFO L225 Difference]: With dead ends: 321 [2022-11-03 02:04:21,007 INFO L226 Difference]: Without dead ends: 248 [2022-11-03 02:04:21,008 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:04:21,009 INFO L413 NwaCegarLoop]: 203 mSDtfsCounter, 137 mSDsluCounter, 205 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 137 SdHoareTripleChecker+Valid, 408 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:21,009 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [137 Valid, 408 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-11-03 02:04:21,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2022-11-03 02:04:21,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 175. [2022-11-03 02:04:21,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 175 states, 174 states have (on average 1.4367816091954022) internal successors, (250), 174 states have internal predecessors, (250), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:21,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 250 transitions. [2022-11-03 02:04:21,019 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 250 transitions. Word has length 74 [2022-11-03 02:04:21,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:21,020 INFO L495 AbstractCegarLoop]: Abstraction has 175 states and 250 transitions. [2022-11-03 02:04:21,020 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:21,020 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 250 transitions. [2022-11-03 02:04:21,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:21,021 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:21,022 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:21,045 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:21,231 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:04:21,232 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:21,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:21,232 INFO L85 PathProgramCache]: Analyzing trace with hash 1940951109, now seen corresponding path program 1 times [2022-11-03 02:04:21,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:21,233 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [201241937] [2022-11-03 02:04:21,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:21,234 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:21,234 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:21,235 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:21,238 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 02:04:21,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:21,916 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-03 02:04:21,923 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:22,840 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:22,841 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:24,439 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:24,440 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:24,440 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [201241937] [2022-11-03 02:04:24,440 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [201241937] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:24,440 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [331436059] [2022-11-03 02:04:24,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:24,441 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:24,441 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:04:24,447 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:04:24,450 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Waiting until timeout for monitored process [2022-11-03 02:04:25,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:25,734 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 30 conjunts are in the unsatisfiable core [2022-11-03 02:04:25,743 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:26,346 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:26,347 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:27,270 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:27,271 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [331436059] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:27,271 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1831832688] [2022-11-03 02:04:27,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:27,271 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:04:27,272 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:04:27,275 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:04:27,303 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-11-03 02:04:27,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:27,853 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 02:04:27,859 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:28,495 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:28,495 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:29,557 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:29,557 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1831832688] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:29,557 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:04:29,558 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 10, 10] total 18 [2022-11-03 02:04:29,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494422180] [2022-11-03 02:04:29,558 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:04:29,560 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-11-03 02:04:29,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:29,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-11-03 02:04:29,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=242, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:04:29,562 INFO L87 Difference]: Start difference. First operand 175 states and 250 transitions. Second operand has 18 states, 18 states have (on average 8.333333333333334) internal successors, (150), 18 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:29,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:29,672 INFO L93 Difference]: Finished difference Result 250 states and 358 transitions. [2022-11-03 02:04:29,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-11-03 02:04:29,673 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 8.333333333333334) internal successors, (150), 18 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:29,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:29,675 INFO L225 Difference]: With dead ends: 250 [2022-11-03 02:04:29,675 INFO L226 Difference]: Without dead ends: 248 [2022-11-03 02:04:29,676 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 439 GetRequests, 418 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=74, Invalid=268, Unknown=0, NotChecked=0, Total=342 [2022-11-03 02:04:29,676 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 277 mSDsluCounter, 836 mSDsCounter, 0 mSdLazyCounter, 4 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 277 SdHoareTripleChecker+Valid, 922 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 4 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 35 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:29,677 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [277 Valid, 922 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 4 Invalid, 0 Unknown, 35 Unchecked, 0.0s Time] [2022-11-03 02:04:29,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2022-11-03 02:04:29,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2022-11-03 02:04:29,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 248 states, 247 states have (on average 1.4412955465587045) internal successors, (356), 247 states have internal predecessors, (356), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:29,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 356 transitions. [2022-11-03 02:04:29,687 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 356 transitions. Word has length 74 [2022-11-03 02:04:29,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:29,688 INFO L495 AbstractCegarLoop]: Abstraction has 248 states and 356 transitions. [2022-11-03 02:04:29,688 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 8.333333333333334) internal successors, (150), 18 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:29,689 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 356 transitions. [2022-11-03 02:04:29,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:29,690 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:29,690 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:29,723 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:29,940 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:30,120 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (11)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:30,313 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:30,313 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:30,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:30,314 INFO L85 PathProgramCache]: Analyzing trace with hash -579008825, now seen corresponding path program 1 times [2022-11-03 02:04:30,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:30,315 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [804249273] [2022-11-03 02:04:30,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:30,315 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:30,315 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:30,316 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:30,317 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Waiting until timeout for monitored process [2022-11-03 02:04:30,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:31,006 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 27 conjunts are in the unsatisfiable core [2022-11-03 02:04:31,011 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:31,937 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:31,937 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:34,325 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:34,326 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:34,326 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [804249273] [2022-11-03 02:04:34,326 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [804249273] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:34,326 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1879378095] [2022-11-03 02:04:34,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:34,326 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:34,327 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:04:34,328 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:04:34,331 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Waiting until timeout for monitored process [2022-11-03 02:04:35,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:35,549 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-03 02:04:35,557 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:36,528 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:36,528 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:39,311 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:39,312 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1879378095] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:39,312 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [253559046] [2022-11-03 02:04:39,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:39,312 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:04:39,312 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:04:39,313 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:04:39,315 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-11-03 02:04:39,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:39,855 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-03 02:04:39,862 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:40,872 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:40,873 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:43,735 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:43,736 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [253559046] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:43,736 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:04:43,736 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 9, 9, 12, 12] total 44 [2022-11-03 02:04:43,736 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166600616] [2022-11-03 02:04:43,736 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:04:43,737 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2022-11-03 02:04:43,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:43,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-11-03 02:04:43,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=204, Invalid=1688, Unknown=0, NotChecked=0, Total=1892 [2022-11-03 02:04:43,738 INFO L87 Difference]: Start difference. First operand 248 states and 356 transitions. Second operand has 44 states, 44 states have (on average 9.636363636363637) internal successors, (424), 44 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:44,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:44,752 INFO L93 Difference]: Finished difference Result 406 states and 582 transitions. [2022-11-03 02:04:44,752 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-11-03 02:04:44,753 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 44 states have (on average 9.636363636363637) internal successors, (424), 44 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:44,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:44,755 INFO L225 Difference]: With dead ends: 406 [2022-11-03 02:04:44,755 INFO L226 Difference]: Without dead ends: 404 [2022-11-03 02:04:44,757 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 452 GetRequests, 397 SyntacticMatches, 1 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 812 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=351, Invalid=2729, Unknown=0, NotChecked=0, Total=3080 [2022-11-03 02:04:44,758 INFO L413 NwaCegarLoop]: 74 mSDtfsCounter, 405 mSDsluCounter, 1784 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 405 SdHoareTripleChecker+Valid, 1858 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 65 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:44,758 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [405 Valid, 1858 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 13 Invalid, 0 Unknown, 65 Unchecked, 0.1s Time] [2022-11-03 02:04:44,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2022-11-03 02:04:44,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 399. [2022-11-03 02:04:44,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 399 states, 398 states have (on average 1.4422110552763818) internal successors, (574), 398 states have internal predecessors, (574), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:44,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 399 states to 399 states and 574 transitions. [2022-11-03 02:04:44,772 INFO L78 Accepts]: Start accepts. Automaton has 399 states and 574 transitions. Word has length 74 [2022-11-03 02:04:44,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:44,773 INFO L495 AbstractCegarLoop]: Abstraction has 399 states and 574 transitions. [2022-11-03 02:04:44,773 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 44 states, 44 states have (on average 9.636363636363637) internal successors, (424), 44 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:44,773 INFO L276 IsEmpty]: Start isEmpty. Operand 399 states and 574 transitions. [2022-11-03 02:04:44,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-11-03 02:04:44,774 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:44,775 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:44,807 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (13)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:45,008 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (14)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:45,226 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:45,400 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:04:45,401 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:45,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:45,401 INFO L85 PathProgramCache]: Analyzing trace with hash 101049545, now seen corresponding path program 1 times [2022-11-03 02:04:45,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:45,402 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2056915502] [2022-11-03 02:04:45,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:45,403 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:45,403 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:45,404 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:45,405 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Waiting until timeout for monitored process [2022-11-03 02:04:45,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:46,002 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 24 conjunts are in the unsatisfiable core [2022-11-03 02:04:46,007 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:46,460 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:46,461 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:48,094 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:48,094 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:48,094 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2056915502] [2022-11-03 02:04:48,094 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2056915502] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:48,095 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [291145553] [2022-11-03 02:04:48,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:48,095 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:48,095 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:04:48,100 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:04:48,119 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2022-11-03 02:04:49,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:49,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 26 conjunts are in the unsatisfiable core [2022-11-03 02:04:49,424 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:50,247 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:50,247 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:52,331 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:52,332 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [291145553] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:52,332 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1857657477] [2022-11-03 02:04:52,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:52,332 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:04:52,333 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:04:52,334 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:04:52,343 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-11-03 02:04:52,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:52,918 INFO L263 TraceCheckSpWp]: Trace formula consists of 1287 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-03 02:04:52,924 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:53,459 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:53,459 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:54,557 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:04:54,557 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1857657477] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:54,558 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:04:54,558 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 12, 12] total 32 [2022-11-03 02:04:54,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151914761] [2022-11-03 02:04:54,558 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:04:54,559 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-11-03 02:04:54,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:04:54,560 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-11-03 02:04:54,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=870, Unknown=0, NotChecked=0, Total=992 [2022-11-03 02:04:54,562 INFO L87 Difference]: Start difference. First operand 399 states and 574 transitions. Second operand has 32 states, 32 states have (on average 8.9375) internal successors, (286), 32 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:56,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:04:56,014 INFO L93 Difference]: Finished difference Result 556 states and 798 transitions. [2022-11-03 02:04:56,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-11-03 02:04:56,019 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 8.9375) internal successors, (286), 32 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2022-11-03 02:04:56,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:04:56,021 INFO L225 Difference]: With dead ends: 556 [2022-11-03 02:04:56,022 INFO L226 Difference]: Without dead ends: 554 [2022-11-03 02:04:56,023 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 407 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 371 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=347, Invalid=1459, Unknown=0, NotChecked=0, Total=1806 [2022-11-03 02:04:56,024 INFO L413 NwaCegarLoop]: 170 mSDtfsCounter, 591 mSDsluCounter, 1723 mSDsCounter, 0 mSdLazyCounter, 215 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 591 SdHoareTripleChecker+Valid, 1893 SdHoareTripleChecker+Invalid, 535 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 215 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 316 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-11-03 02:04:56,024 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [591 Valid, 1893 Invalid, 535 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 215 Invalid, 0 Unknown, 316 Unchecked, 0.7s Time] [2022-11-03 02:04:56,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 554 states. [2022-11-03 02:04:56,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 554 to 405. [2022-11-03 02:04:56,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 405 states, 404 states have (on average 1.443069306930693) internal successors, (583), 404 states have internal predecessors, (583), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:56,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 405 states to 405 states and 583 transitions. [2022-11-03 02:04:56,041 INFO L78 Accepts]: Start accepts. Automaton has 405 states and 583 transitions. Word has length 74 [2022-11-03 02:04:56,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:04:56,042 INFO L495 AbstractCegarLoop]: Abstraction has 405 states and 583 transitions. [2022-11-03 02:04:56,042 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 8.9375) internal successors, (286), 32 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:04:56,043 INFO L276 IsEmpty]: Start isEmpty. Operand 405 states and 583 transitions. [2022-11-03 02:04:56,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:04:56,045 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:04:56,045 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:04:56,096 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:56,287 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (16)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:56,479 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (17)] Forceful destruction successful, exit code 0 [2022-11-03 02:04:56,672 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:56,672 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:04:56,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:04:56,672 INFO L85 PathProgramCache]: Analyzing trace with hash 379215757, now seen corresponding path program 1 times [2022-11-03 02:04:56,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:04:56,674 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [306402079] [2022-11-03 02:04:56,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:56,674 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:04:56,674 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:04:56,675 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:04:56,676 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Waiting until timeout for monitored process [2022-11-03 02:04:57,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:04:57,662 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:04:57,670 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:04:58,332 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 67 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:04:58,332 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:04:58,911 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 61 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:04:58,912 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:04:58,912 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [306402079] [2022-11-03 02:04:58,912 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [306402079] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:04:58,912 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [451782243] [2022-11-03 02:04:58,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:04:58,913 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:04:58,913 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:04:58,916 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:04:58,943 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Waiting until timeout for monitored process [2022-11-03 02:05:00,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:00,357 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:05:00,362 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:00,460 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 70 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:00,460 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:05:00,461 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [451782243] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:05:00,461 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:05:00,461 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9, 9] total 18 [2022-11-03 02:05:00,461 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849471212] [2022-11-03 02:05:00,461 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:05:00,462 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:05:00,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:00,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:05:00,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:05:00,463 INFO L87 Difference]: Start difference. First operand 405 states and 583 transitions. Second operand has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:00,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:00,689 INFO L93 Difference]: Finished difference Result 1447 states and 2098 transitions. [2022-11-03 02:05:00,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:05:00,690 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2022-11-03 02:05:00,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:00,695 INFO L225 Difference]: With dead ends: 1447 [2022-11-03 02:05:00,696 INFO L226 Difference]: Without dead ends: 1152 [2022-11-03 02:05:00,697 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 432 GetRequests, 413 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2022-11-03 02:05:00,697 INFO L413 NwaCegarLoop]: 123 mSDtfsCounter, 471 mSDsluCounter, 295 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 471 SdHoareTripleChecker+Valid, 418 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:00,698 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [471 Valid, 418 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:05:00,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1152 states. [2022-11-03 02:05:00,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1152 to 461. [2022-11-03 02:05:00,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 461 states, 460 states have (on average 1.441304347826087) internal successors, (663), 460 states have internal predecessors, (663), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:00,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 461 states and 663 transitions. [2022-11-03 02:05:00,723 INFO L78 Accepts]: Start accepts. Automaton has 461 states and 663 transitions. Word has length 143 [2022-11-03 02:05:00,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:00,724 INFO L495 AbstractCegarLoop]: Abstraction has 461 states and 663 transitions. [2022-11-03 02:05:00,724 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:00,724 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 663 transitions. [2022-11-03 02:05:00,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:05:00,726 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:00,727 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:00,736 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (20)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:00,959 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (19)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:01,136 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:05:01,136 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:01,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:01,136 INFO L85 PathProgramCache]: Analyzing trace with hash -64684917, now seen corresponding path program 1 times [2022-11-03 02:05:01,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:01,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1319341627] [2022-11-03 02:05:01,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:01,138 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:01,138 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:01,139 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:01,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-03 02:05:02,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:02,102 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:05:02,108 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:02,833 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 67 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:02,833 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:03,478 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 61 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:03,479 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:03,479 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1319341627] [2022-11-03 02:05:03,479 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1319341627] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:03,480 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1446892916] [2022-11-03 02:05:03,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:03,480 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:03,480 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:05:03,484 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:05:03,507 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (22)] Waiting until timeout for monitored process [2022-11-03 02:05:04,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:04,916 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:05:04,920 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:05,004 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-11-03 02:05:05,004 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:05:05,005 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1446892916] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:05:05,005 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:05:05,005 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9, 9] total 18 [2022-11-03 02:05:05,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [118934477] [2022-11-03 02:05:05,006 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:05:05,006 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:05:05,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:05,007 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:05:05,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:05:05,007 INFO L87 Difference]: Start difference. First operand 461 states and 663 transitions. Second operand has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:05,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:05,256 INFO L93 Difference]: Finished difference Result 1421 states and 2051 transitions. [2022-11-03 02:05:05,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:05:05,257 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2022-11-03 02:05:05,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:05,262 INFO L225 Difference]: With dead ends: 1421 [2022-11-03 02:05:05,262 INFO L226 Difference]: Without dead ends: 1070 [2022-11-03 02:05:05,263 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 432 GetRequests, 413 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2022-11-03 02:05:05,266 INFO L413 NwaCegarLoop]: 151 mSDtfsCounter, 316 mSDsluCounter, 379 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 316 SdHoareTripleChecker+Valid, 530 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:05,266 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [316 Valid, 530 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-11-03 02:05:05,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1070 states. [2022-11-03 02:05:05,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1070 to 485. [2022-11-03 02:05:05,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 485 states, 484 states have (on average 1.4359504132231404) internal successors, (695), 484 states have internal predecessors, (695), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:05,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 695 transitions. [2022-11-03 02:05:05,296 INFO L78 Accepts]: Start accepts. Automaton has 485 states and 695 transitions. Word has length 143 [2022-11-03 02:05:05,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:05,297 INFO L495 AbstractCegarLoop]: Abstraction has 485 states and 695 transitions. [2022-11-03 02:05:05,297 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:05,298 INFO L276 IsEmpty]: Start isEmpty. Operand 485 states and 695 transitions. [2022-11-03 02:05:05,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:05:05,304 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:05,304 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:05,332 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:05,512 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (22)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:05,704 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:05,705 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:05,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:05,705 INFO L85 PathProgramCache]: Analyzing trace with hash 779320585, now seen corresponding path program 1 times [2022-11-03 02:05:05,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:05,707 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2124502648] [2022-11-03 02:05:05,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:05,707 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:05,707 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:05,708 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:05,709 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Waiting until timeout for monitored process [2022-11-03 02:05:06,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:06,668 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:05:06,673 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:07,475 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 67 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:07,475 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:08,128 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 61 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:08,128 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:08,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2124502648] [2022-11-03 02:05:08,129 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2124502648] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:08,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [21092387] [2022-11-03 02:05:08,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:08,129 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:08,129 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:05:08,130 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:05:08,132 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (24)] Waiting until timeout for monitored process [2022-11-03 02:05:09,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:09,596 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 4 conjunts are in the unsatisfiable core [2022-11-03 02:05:09,601 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:09,681 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2022-11-03 02:05:09,681 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:05:09,681 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [21092387] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:05:09,681 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-11-03 02:05:09,682 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9, 9] total 18 [2022-11-03 02:05:09,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [665634950] [2022-11-03 02:05:09,682 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:05:09,682 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-11-03 02:05:09,682 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:09,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-11-03 02:05:09,683 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2022-11-03 02:05:09,683 INFO L87 Difference]: Start difference. First operand 485 states and 695 transitions. Second operand has 5 states, 5 states have (on average 19.8) internal successors, (99), 5 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:09,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:09,913 INFO L93 Difference]: Finished difference Result 1387 states and 1990 transitions. [2022-11-03 02:05:09,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:05:09,914 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 19.8) internal successors, (99), 5 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2022-11-03 02:05:09,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:09,918 INFO L225 Difference]: With dead ends: 1387 [2022-11-03 02:05:09,918 INFO L226 Difference]: Without dead ends: 1012 [2022-11-03 02:05:09,919 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 432 GetRequests, 413 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2022-11-03 02:05:09,927 INFO L413 NwaCegarLoop]: 172 mSDtfsCounter, 222 mSDsluCounter, 427 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 599 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:09,928 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [222 Valid, 599 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:05:09,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1012 states. [2022-11-03 02:05:09,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1012 to 501. [2022-11-03 02:05:09,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 501 states, 500 states have (on average 1.43) internal successors, (715), 500 states have internal predecessors, (715), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:09,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 501 states to 501 states and 715 transitions. [2022-11-03 02:05:09,952 INFO L78 Accepts]: Start accepts. Automaton has 501 states and 715 transitions. Word has length 143 [2022-11-03 02:05:09,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:09,952 INFO L495 AbstractCegarLoop]: Abstraction has 501 states and 715 transitions. [2022-11-03 02:05:09,952 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 19.8) internal successors, (99), 5 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:09,953 INFO L276 IsEmpty]: Start isEmpty. Operand 501 states and 715 transitions. [2022-11-03 02:05:09,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:05:09,955 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:09,955 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:09,992 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:10,186 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (24)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:10,371 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:10,372 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:10,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:10,372 INFO L85 PathProgramCache]: Analyzing trace with hash 356618759, now seen corresponding path program 1 times [2022-11-03 02:05:10,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:10,374 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1268149548] [2022-11-03 02:05:10,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:10,374 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:10,375 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:10,376 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:10,378 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Waiting until timeout for monitored process [2022-11-03 02:05:11,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:11,328 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:05:11,333 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:11,999 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 67 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:12,000 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:12,674 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 61 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:12,675 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:12,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1268149548] [2022-11-03 02:05:12,675 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1268149548] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:12,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [425020183] [2022-11-03 02:05:12,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:12,676 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:12,676 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:05:12,680 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:05:12,690 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (26)] Waiting until timeout for monitored process [2022-11-03 02:05:14,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:14,788 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-03 02:05:14,793 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:15,394 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 66 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:15,395 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:15,874 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 61 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:15,874 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [425020183] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:15,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [470196809] [2022-11-03 02:05:15,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:15,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:05:15,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:05:15,875 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:05:15,876 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-11-03 02:05:16,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:16,665 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:05:16,670 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:17,253 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 67 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:17,253 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:17,666 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 61 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-11-03 02:05:17,667 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [470196809] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:17,667 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:05:17,668 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10, 9, 9, 9] total 16 [2022-11-03 02:05:17,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1858250746] [2022-11-03 02:05:17,668 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:05:17,671 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-11-03 02:05:17,671 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:17,682 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-11-03 02:05:17,683 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2022-11-03 02:05:17,684 INFO L87 Difference]: Start difference. First operand 501 states and 715 transitions. Second operand has 16 states, 16 states have (on average 13.9375) internal successors, (223), 16 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:19,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:19,388 INFO L93 Difference]: Finished difference Result 2087 states and 2980 transitions. [2022-11-03 02:05:19,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-11-03 02:05:19,390 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 13.9375) internal successors, (223), 16 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2022-11-03 02:05:19,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:19,396 INFO L225 Difference]: With dead ends: 2087 [2022-11-03 02:05:19,396 INFO L226 Difference]: Without dead ends: 1696 [2022-11-03 02:05:19,403 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 863 GetRequests, 836 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=132, Invalid=570, Unknown=0, NotChecked=0, Total=702 [2022-11-03 02:05:19,404 INFO L413 NwaCegarLoop]: 204 mSDtfsCounter, 708 mSDsluCounter, 1392 mSDsCounter, 0 mSdLazyCounter, 591 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 708 SdHoareTripleChecker+Valid, 1596 SdHoareTripleChecker+Invalid, 938 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 591 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 344 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:19,405 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [708 Valid, 1596 Invalid, 938 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 591 Invalid, 0 Unknown, 344 Unchecked, 1.3s Time] [2022-11-03 02:05:19,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1696 states. [2022-11-03 02:05:19,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1696 to 509. [2022-11-03 02:05:19,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 509 states, 508 states have (on average 1.4232283464566928) internal successors, (723), 508 states have internal predecessors, (723), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:19,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 509 states to 509 states and 723 transitions. [2022-11-03 02:05:19,435 INFO L78 Accepts]: Start accepts. Automaton has 509 states and 723 transitions. Word has length 143 [2022-11-03 02:05:19,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:19,435 INFO L495 AbstractCegarLoop]: Abstraction has 509 states and 723 transitions. [2022-11-03 02:05:19,436 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 13.9375) internal successors, (223), 16 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:19,436 INFO L276 IsEmpty]: Start isEmpty. Operand 509 states and 723 transitions. [2022-11-03 02:05:19,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:05:19,438 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:19,439 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:19,481 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (25)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:19,675 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (26)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:19,907 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:20,056 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:05:20,056 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:20,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:20,056 INFO L85 PathProgramCache]: Analyzing trace with hash -1976773879, now seen corresponding path program 1 times [2022-11-03 02:05:20,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:20,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [106732697] [2022-11-03 02:05:20,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:20,058 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:20,059 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:20,060 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:20,063 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Waiting until timeout for monitored process [2022-11-03 02:05:20,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:20,954 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:05:20,960 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:21,898 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 39 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-11-03 02:05:21,898 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:22,676 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 31 proven. 11 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-11-03 02:05:22,676 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:22,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [106732697] [2022-11-03 02:05:22,677 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [106732697] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:22,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1398532689] [2022-11-03 02:05:22,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:22,677 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:22,677 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:05:22,680 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:05:22,690 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (29)] Waiting until timeout for monitored process [2022-11-03 02:05:24,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:24,628 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-03 02:05:24,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:25,461 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 39 proven. 5 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-11-03 02:05:25,461 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:26,032 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 31 proven. 11 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-11-03 02:05:26,032 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1398532689] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:26,032 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [141230028] [2022-11-03 02:05:26,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:26,032 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:05:26,032 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:05:26,033 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:05:26,034 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-11-03 02:05:26,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:26,798 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 21 conjunts are in the unsatisfiable core [2022-11-03 02:05:26,804 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:27,586 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 39 proven. 3 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-11-03 02:05:27,587 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:28,186 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 31 proven. 11 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-11-03 02:05:28,186 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [141230028] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:28,186 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:05:28,186 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 11, 9, 9, 9] total 17 [2022-11-03 02:05:28,187 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1573887544] [2022-11-03 02:05:28,187 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:05:28,188 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-11-03 02:05:28,188 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:28,188 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-11-03 02:05:28,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2022-11-03 02:05:28,189 INFO L87 Difference]: Start difference. First operand 509 states and 723 transitions. Second operand has 17 states, 17 states have (on average 11.647058823529411) internal successors, (198), 17 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:29,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:29,603 INFO L93 Difference]: Finished difference Result 1733 states and 2454 transitions. [2022-11-03 02:05:29,604 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-11-03 02:05:29,604 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 11.647058823529411) internal successors, (198), 17 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2022-11-03 02:05:29,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:29,609 INFO L225 Difference]: With dead ends: 1733 [2022-11-03 02:05:29,609 INFO L226 Difference]: Without dead ends: 1334 [2022-11-03 02:05:29,610 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 867 GetRequests, 835 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=187, Invalid=805, Unknown=0, NotChecked=0, Total=992 [2022-11-03 02:05:29,611 INFO L413 NwaCegarLoop]: 168 mSDtfsCounter, 833 mSDsluCounter, 1198 mSDsCounter, 0 mSdLazyCounter, 413 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 833 SdHoareTripleChecker+Valid, 1366 SdHoareTripleChecker+Invalid, 740 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 413 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 321 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:29,611 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [833 Valid, 1366 Invalid, 740 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 413 Invalid, 0 Unknown, 321 Unchecked, 0.9s Time] [2022-11-03 02:05:29,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1334 states. [2022-11-03 02:05:29,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1334 to 525. [2022-11-03 02:05:29,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 525 states, 524 states have (on average 1.41793893129771) internal successors, (743), 524 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:29,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 525 states to 525 states and 743 transitions. [2022-11-03 02:05:29,634 INFO L78 Accepts]: Start accepts. Automaton has 525 states and 743 transitions. Word has length 143 [2022-11-03 02:05:29,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:29,634 INFO L495 AbstractCegarLoop]: Abstraction has 525 states and 743 transitions. [2022-11-03 02:05:29,634 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 11.647058823529411) internal successors, (198), 17 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:29,635 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 743 transitions. [2022-11-03 02:05:29,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:05:29,637 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:29,637 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:29,652 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (29)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:29,872 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (28)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:30,080 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:30,251 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:05:30,251 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:30,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:30,251 INFO L85 PathProgramCache]: Analyzing trace with hash -1275174005, now seen corresponding path program 1 times [2022-11-03 02:05:30,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:30,253 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [88696556] [2022-11-03 02:05:30,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:30,254 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:30,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:30,255 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:30,266 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Waiting until timeout for monitored process [2022-11-03 02:05:31,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:31,154 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-03 02:05:31,159 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:32,427 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 2 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:32,427 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:05:34,738 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:34,738 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:34,738 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [88696556] [2022-11-03 02:05:34,738 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [88696556] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:05:34,739 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1459283176] [2022-11-03 02:05:34,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:34,739 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:34,739 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:05:34,748 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:05:34,749 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (32)] Waiting until timeout for monitored process [2022-11-03 02:05:36,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:36,658 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 132 conjunts are in the unsatisfiable core [2022-11-03 02:05:36,666 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:44,371 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 16 proven. 56 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:05:44,372 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:17,788 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:07:17,788 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1459283176] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:17,789 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1270896876] [2022-11-03 02:07:17,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:07:17,789 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:07:17,789 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:07:17,790 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:07:17,792 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-11-03 02:07:18,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:07:18,773 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-03 02:07:18,784 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:07:30,835 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:30,835 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:44,841 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:44,841 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1270896876] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:44,841 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:07:44,842 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 23, 23, 18, 18] total 88 [2022-11-03 02:07:44,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772806050] [2022-11-03 02:07:44,842 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:07:44,843 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 88 states [2022-11-03 02:07:44,844 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:07:44,844 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 88 interpolants. [2022-11-03 02:07:44,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=583, Invalid=7060, Unknown=13, NotChecked=0, Total=7656 [2022-11-03 02:07:44,848 INFO L87 Difference]: Start difference. First operand 525 states and 743 transitions. Second operand has 88 states, 88 states have (on average 9.386363636363637) internal successors, (826), 88 states have internal predecessors, (826), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:27,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:09:27,046 INFO L93 Difference]: Finished difference Result 2421 states and 3435 transitions. [2022-11-03 02:09:27,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 149 states. [2022-11-03 02:09:27,047 INFO L78 Accepts]: Start accepts. Automaton has has 88 states, 88 states have (on average 9.386363636363637) internal successors, (826), 88 states have internal predecessors, (826), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2022-11-03 02:09:27,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:09:27,054 INFO L225 Difference]: With dead ends: 2421 [2022-11-03 02:09:27,055 INFO L226 Difference]: Without dead ends: 2419 [2022-11-03 02:09:27,069 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 1078 GetRequests, 853 SyntacticMatches, 3 SemanticMatches, 222 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14352 ImplicationChecksByTransitivity, 204.5s TimeCoverageRelationStatistics Valid=3850, Invalid=46089, Unknown=13, NotChecked=0, Total=49952 [2022-11-03 02:09:27,070 INFO L413 NwaCegarLoop]: 164 mSDtfsCounter, 3384 mSDsluCounter, 7002 mSDsCounter, 0 mSdLazyCounter, 28 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3384 SdHoareTripleChecker+Valid, 7166 SdHoareTripleChecker+Invalid, 1293 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 28 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1263 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:09:27,071 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3384 Valid, 7166 Invalid, 1293 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 28 Invalid, 0 Unknown, 1263 Unchecked, 0.1s Time] [2022-11-03 02:09:27,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2419 states. [2022-11-03 02:09:27,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2419 to 2171. [2022-11-03 02:09:27,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2171 states, 2170 states have (on average 1.4276497695852535) internal successors, (3098), 2170 states have internal predecessors, (3098), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:27,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2171 states to 2171 states and 3098 transitions. [2022-11-03 02:09:27,165 INFO L78 Accepts]: Start accepts. Automaton has 2171 states and 3098 transitions. Word has length 143 [2022-11-03 02:09:27,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:09:27,166 INFO L495 AbstractCegarLoop]: Abstraction has 2171 states and 3098 transitions. [2022-11-03 02:09:27,167 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 88 states, 88 states have (on average 9.386363636363637) internal successors, (826), 88 states have internal predecessors, (826), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:27,167 INFO L276 IsEmpty]: Start isEmpty. Operand 2171 states and 3098 transitions. [2022-11-03 02:09:27,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:09:27,172 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:09:27,172 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:09:27,190 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (32)] Forceful destruction successful, exit code 0 [2022-11-03 02:09:27,414 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (31)] Ended with exit code 0 [2022-11-03 02:09:27,657 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2022-11-03 02:09:27,786 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:09:27,786 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:09:27,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:09:27,787 INFO L85 PathProgramCache]: Analyzing trace with hash 1174426125, now seen corresponding path program 1 times [2022-11-03 02:09:27,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:09:27,789 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2107170285] [2022-11-03 02:09:27,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:09:27,790 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:09:27,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:09:27,791 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:09:27,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Waiting until timeout for monitored process [2022-11-03 02:09:28,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:09:28,874 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 29 conjunts are in the unsatisfiable core [2022-11-03 02:09:28,880 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:09:30,506 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 2 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:30,506 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:09:33,344 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:33,344 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:09:33,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2107170285] [2022-11-03 02:09:33,344 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2107170285] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:09:33,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1676481216] [2022-11-03 02:09:33,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:09:33,345 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:09:33,345 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:09:33,346 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:09:33,351 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Waiting until timeout for monitored process [2022-11-03 02:09:35,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:09:35,692 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 97 conjunts are in the unsatisfiable core [2022-11-03 02:09:35,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:09:41,435 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 46 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:09:41,435 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:10:27,878 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-11-03 02:10:27,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1676481216] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:10:27,879 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [828372511] [2022-11-03 02:10:27,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:10:27,879 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:10:27,879 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:10:27,880 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:10:27,898 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-11-03 02:10:28,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:10:28,914 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 40 conjunts are in the unsatisfiable core [2022-11-03 02:10:28,921 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:10:34,817 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:34,817 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:10:41,900 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 0 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:41,900 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [828372511] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:10:41,900 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:10:41,901 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 18, 18, 18, 18] total 78 [2022-11-03 02:10:41,901 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971006407] [2022-11-03 02:10:41,901 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:10:41,902 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 78 states [2022-11-03 02:10:41,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:10:41,903 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2022-11-03 02:10:41,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=533, Invalid=5463, Unknown=10, NotChecked=0, Total=6006 [2022-11-03 02:10:41,905 INFO L87 Difference]: Start difference. First operand 2171 states and 3098 transitions. Second operand has 78 states, 78 states have (on average 10.666666666666666) internal successors, (832), 78 states have internal predecessors, (832), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:11:03,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:11:03,327 INFO L93 Difference]: Finished difference Result 5298 states and 7552 transitions. [2022-11-03 02:11:03,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2022-11-03 02:11:03,328 INFO L78 Accepts]: Start accepts. Automaton has has 78 states, 78 states have (on average 10.666666666666666) internal successors, (832), 78 states have internal predecessors, (832), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2022-11-03 02:11:03,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:11:03,337 INFO L225 Difference]: With dead ends: 5298 [2022-11-03 02:11:03,337 INFO L226 Difference]: Without dead ends: 4671 [2022-11-03 02:11:03,340 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 945 GetRequests, 801 SyntacticMatches, 5 SemanticMatches, 139 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5456 ImplicationChecksByTransitivity, 70.2s TimeCoverageRelationStatistics Valid=2026, Invalid=17704, Unknown=10, NotChecked=0, Total=19740 [2022-11-03 02:11:03,340 INFO L413 NwaCegarLoop]: 129 mSDtfsCounter, 1971 mSDsluCounter, 4506 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1971 SdHoareTripleChecker+Valid, 4635 SdHoareTripleChecker+Invalid, 560 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 501 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:11:03,341 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1971 Valid, 4635 Invalid, 560 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 56 Invalid, 0 Unknown, 501 Unchecked, 0.2s Time] [2022-11-03 02:11:03,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4671 states. [2022-11-03 02:11:03,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4671 to 4423. [2022-11-03 02:11:03,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4423 states, 4422 states have (on average 1.4276345545002262) internal successors, (6313), 4422 states have internal predecessors, (6313), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:11:03,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4423 states to 4423 states and 6313 transitions. [2022-11-03 02:11:03,509 INFO L78 Accepts]: Start accepts. Automaton has 4423 states and 6313 transitions. Word has length 143 [2022-11-03 02:11:03,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:11:03,509 INFO L495 AbstractCegarLoop]: Abstraction has 4423 states and 6313 transitions. [2022-11-03 02:11:03,510 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 78 states, 78 states have (on average 10.666666666666666) internal successors, (832), 78 states have internal predecessors, (832), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:11:03,510 INFO L276 IsEmpty]: Start isEmpty. Operand 4423 states and 6313 transitions. [2022-11-03 02:11:03,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2022-11-03 02:11:03,516 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:11:03,517 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:11:03,560 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (34)] Ended with exit code 0 [2022-11-03 02:11:03,756 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (35)] Forceful destruction successful, exit code 0 [2022-11-03 02:11:03,967 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2022-11-03 02:11:04,136 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:11:04,136 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:11:04,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:11:04,136 INFO L85 PathProgramCache]: Analyzing trace with hash 1875490703, now seen corresponding path program 1 times [2022-11-03 02:11:04,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:11:04,138 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [946592929] [2022-11-03 02:11:04,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:11:04,139 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:11:04,139 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:11:04,140 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:11:04,142 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_30c1035e-5f30-4ba2-8ad8-4e6bc7bc3c21/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (37)] Waiting until timeout for monitored process [2022-11-03 02:11:05,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:11:05,239 INFO L263 TraceCheckSpWp]: Trace formula consists of 2395 conjuncts, 100 conjunts are in the unsatisfiable core [2022-11-03 02:11:05,246 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:12:11,493 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 1 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:12:11,493 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:12:24,690 WARN L234 SmtUtils]: Spent 10.36s on a formula simplification. DAG size of input: 266 DAG size of output: 265 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-11-03 02:12:36,103 WARN L234 SmtUtils]: Spent 8.16s on a formula simplification that was a NOOP. DAG size: 266 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)