./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a361373e956dcb1a0ba49792873eb36685a16d617d11e5cd672388145ef281c --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:01:40,957 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:01:40,960 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:01:40,995 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:01:40,995 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:01:40,997 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:01:40,999 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:01:41,002 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:01:41,004 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:01:41,006 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:01:41,007 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:01:41,009 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:01:41,010 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:01:41,012 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:01:41,014 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:01:41,016 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:01:41,017 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:01:41,019 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:01:41,022 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:01:41,025 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:01:41,027 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:01:41,029 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:01:41,031 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:01:41,033 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:01:41,038 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:01:41,039 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:01:41,039 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:01:41,041 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:01:41,042 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:01:41,043 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:01:41,044 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:01:41,045 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:01:41,047 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:01:41,048 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:01:41,050 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:01:41,051 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:01:41,052 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:01:41,053 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:01:41,053 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:01:41,055 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:01:41,056 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:01:41,058 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 02:01:41,090 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:01:41,090 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:01:41,091 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:01:41,091 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:01:41,092 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:01:41,093 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:01:41,093 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:01:41,094 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:01:41,094 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:01:41,094 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 02:01:41,095 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:01:41,095 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:01:41,095 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 02:01:41,096 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 02:01:41,096 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:01:41,097 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 02:01:41,097 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 02:01:41,098 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 02:01:41,099 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:01:41,099 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 02:01:41,100 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:01:41,100 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:01:41,101 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:01:41,101 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:01:41,101 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:01:41,102 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:01:41,102 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:01:41,103 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:01:41,103 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:01:41,104 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:01:41,104 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:01:41,105 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 02:01:41,105 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:01:41,106 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:01:41,106 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 02:01:41,106 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 02:01:41,107 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:01:41,107 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:01:41,108 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a361373e956dcb1a0ba49792873eb36685a16d617d11e5cd672388145ef281c [2022-11-03 02:01:41,487 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:01:41,522 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:01:41,527 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:01:41,528 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:01:41,530 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:01:41,531 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c [2022-11-03 02:01:41,625 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/d17b4e0bd/0bae11516a564d2cb7c775589762f9c8/FLAG65a67beee [2022-11-03 02:01:42,393 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:01:42,394 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c [2022-11-03 02:01:42,428 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/d17b4e0bd/0bae11516a564d2cb7c775589762f9c8/FLAG65a67beee [2022-11-03 02:01:42,621 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/d17b4e0bd/0bae11516a564d2cb7c775589762f9c8 [2022-11-03 02:01:42,625 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:01:42,626 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:01:42,632 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:01:42,632 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:01:42,637 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:01:42,638 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:01:42" (1/1) ... [2022-11-03 02:01:42,640 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5fe8eca7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:42, skipping insertion in model container [2022-11-03 02:01:42,640 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:01:42" (1/1) ... [2022-11-03 02:01:42,649 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:01:42,765 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:01:43,095 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c[1014,1027] [2022-11-03 02:01:43,598 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:01:43,617 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:01:43,632 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c[1014,1027] [2022-11-03 02:01:43,807 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:01:43,823 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:01:43,824 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43 WrapperNode [2022-11-03 02:01:43,824 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:01:43,826 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:01:43,826 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:01:43,826 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:01:43,836 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:43,904 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,100 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1645 [2022-11-03 02:01:44,101 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:01:44,101 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:01:44,102 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:01:44,102 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:01:44,114 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,114 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,142 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,142 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,202 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,211 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,226 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,243 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,269 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:01:44,270 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:01:44,270 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:01:44,271 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:01:44,273 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (1/1) ... [2022-11-03 02:01:44,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:01:44,296 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:01:44,311 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:01:44,328 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:01:44,368 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:01:44,368 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:01:45,060 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:01:45,063 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:02:39,656 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:02:55,290 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:02:55,290 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:02:55,293 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:02:55 BoogieIcfgContainer [2022-11-03 02:02:55,294 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:02:55,297 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:02:55,298 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:02:55,308 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:02:55,308 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:01:42" (1/3) ... [2022-11-03 02:02:55,309 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@165ba162 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:02:55, skipping insertion in model container [2022-11-03 02:02:55,309 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:01:43" (2/3) ... [2022-11-03 02:02:55,310 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@165ba162 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:02:55, skipping insertion in model container [2022-11-03 02:02:55,310 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:02:55" (3/3) ... [2022-11-03 02:02:55,312 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c [2022-11-03 02:02:55,337 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:02:55,337 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:02:55,424 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:02:55,445 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@409e983e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:02:55,445 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:02:55,451 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:55,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 02:02:55,462 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:55,463 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 02:02:55,465 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:55,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:55,476 INFO L85 PathProgramCache]: Analyzing trace with hash 13296814, now seen corresponding path program 1 times [2022-11-03 02:02:55,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:02:55,494 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337848402] [2022-11-03 02:02:55,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:55,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:02:55,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:02:57,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:02:57,288 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 02:02:57,289 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337848402] [2022-11-03 02:02:57,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [337848402] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:02:57,290 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:02:57,291 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 02:02:57,293 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1737750404] [2022-11-03 02:02:57,294 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:02:57,299 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:02:57,300 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 02:02:57,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:02:57,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:02:57,337 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:59,623 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.21s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 02:02:59,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:02:59,735 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-03 02:02:59,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:02:59,750 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-03 02:02:59,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:02:59,759 INFO L225 Difference]: With dead ends: 15 [2022-11-03 02:02:59,760 INFO L226 Difference]: Without dead ends: 9 [2022-11-03 02:02:59,763 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:02:59,768 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time [2022-11-03 02:02:59,770 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 2.4s Time] [2022-11-03 02:02:59,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-03 02:02:59,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-03 02:02:59,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:59,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-03 02:02:59,816 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-03 02:02:59,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:02:59,817 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-03 02:02:59,817 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:02:59,817 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-03 02:02:59,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 02:02:59,818 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:02:59,819 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-03 02:02:59,819 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 02:02:59,820 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:02:59,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:02:59,821 INFO L85 PathProgramCache]: Analyzing trace with hash 1009943563, now seen corresponding path program 1 times [2022-11-03 02:02:59,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:02:59,822 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982619625] [2022-11-03 02:02:59,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:02:59,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:04:25,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:04:25,784 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 02:05:48,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:05:48,929 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 02:05:48,929 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 02:05:48,931 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:05:48,933 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 02:05:48,937 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-03 02:05:48,941 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:05:49,090 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:05:49,091 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:05:49,140 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:05:49 BoogieIcfgContainer [2022-11-03 02:05:49,140 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:05:49,141 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:05:49,141 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:05:49,141 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:05:49,142 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:02:55" (3/4) ... [2022-11-03 02:05:49,145 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 02:05:49,145 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:05:49,146 INFO L158 Benchmark]: Toolchain (without parser) took 246519.40ms. Allocated memory was 90.2MB in the beginning and 4.1GB in the end (delta: 4.0GB). Free memory was 50.9MB in the beginning and 3.6GB in the end (delta: -3.6GB). Peak memory consumption was 426.2MB. Max. memory is 16.1GB. [2022-11-03 02:05:49,147 INFO L158 Benchmark]: CDTParser took 0.43ms. Allocated memory is still 90.2MB. Free memory was 69.8MB in the beginning and 69.8MB in the end (delta: 39.5kB). There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:05:49,147 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1192.68ms. Allocated memory was 90.2MB in the beginning and 117.4MB in the end (delta: 27.3MB). Free memory was 50.7MB in the beginning and 54.9MB in the end (delta: -4.2MB). Peak memory consumption was 23.3MB. Max. memory is 16.1GB. [2022-11-03 02:05:49,148 INFO L158 Benchmark]: Boogie Procedure Inliner took 275.35ms. Allocated memory is still 117.4MB. Free memory was 54.9MB in the beginning and 64.1MB in the end (delta: -9.2MB). Peak memory consumption was 12.2MB. Max. memory is 16.1GB. [2022-11-03 02:05:49,148 INFO L158 Benchmark]: Boogie Preprocessor took 167.80ms. Allocated memory is still 117.4MB. Free memory was 64.1MB in the beginning and 49.5MB in the end (delta: 14.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. [2022-11-03 02:05:49,149 INFO L158 Benchmark]: RCFGBuilder took 71023.74ms. Allocated memory was 117.4MB in the beginning and 2.3GB in the end (delta: 2.2GB). Free memory was 49.5MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 770.6MB. Max. memory is 16.1GB. [2022-11-03 02:05:49,150 INFO L158 Benchmark]: TraceAbstraction took 173842.88ms. Allocated memory was 2.3GB in the beginning and 4.1GB in the end (delta: 1.8GB). Free memory was 1.6GB in the beginning and 3.6GB in the end (delta: -2.0GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. [2022-11-03 02:05:49,150 INFO L158 Benchmark]: Witness Printer took 4.50ms. Allocated memory is still 4.1GB. Free memory is still 3.6GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:05:49,154 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.43ms. Allocated memory is still 90.2MB. Free memory was 69.8MB in the beginning and 69.8MB in the end (delta: 39.5kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1192.68ms. Allocated memory was 90.2MB in the beginning and 117.4MB in the end (delta: 27.3MB). Free memory was 50.7MB in the beginning and 54.9MB in the end (delta: -4.2MB). Peak memory consumption was 23.3MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 275.35ms. Allocated memory is still 117.4MB. Free memory was 54.9MB in the beginning and 64.1MB in the end (delta: -9.2MB). Peak memory consumption was 12.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 167.80ms. Allocated memory is still 117.4MB. Free memory was 64.1MB in the beginning and 49.5MB in the end (delta: 14.7MB). Peak memory consumption was 14.7MB. Max. memory is 16.1GB. * RCFGBuilder took 71023.74ms. Allocated memory was 117.4MB in the beginning and 2.3GB in the end (delta: 2.2GB). Free memory was 49.5MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 770.6MB. Max. memory is 16.1GB. * TraceAbstraction took 173842.88ms. Allocated memory was 2.3GB in the beginning and 4.1GB in the end (delta: 1.8GB). Free memory was 1.6GB in the beginning and 3.6GB in the end (delta: -2.0GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. * Witness Printer took 4.50ms. Allocated memory is still 4.1GB. Free memory is still 3.6GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 361, overapproximation of bitwiseAnd at line 159, overapproximation of bitwiseComplement at line 192, overapproximation of bitwiseXOr at line 211. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 8); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (8 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 24); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (24 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_2 var_5 = 0; [L38] const SORT_1 var_58 = 0; [L39] const SORT_2 var_69 = 255; [L40] const SORT_2 var_73 = 1; [L41] const SORT_2 var_81 = 2; [L42] const SORT_2 var_89 = 3; [L43] const SORT_2 var_97 = 4; [L44] const SORT_2 var_139 = 0; [L45] const SORT_3 var_146 = 0; [L46] const SORT_4 var_222 = 1; [L47] const SORT_4 var_293 = 3; [L48] const SORT_4 var_305 = 0; [L49] const SORT_4 var_369 = 2; [L51] SORT_1 input_67; [L52] SORT_1 input_68; [L53] SORT_1 input_74; [L54] SORT_1 input_75; [L55] SORT_1 input_82; [L56] SORT_1 input_83; [L57] SORT_1 input_90; [L58] SORT_1 input_91; [L59] SORT_1 input_98; [L60] SORT_1 input_99; [L61] SORT_1 input_134; [L62] SORT_1 input_135; [L63] SORT_1 input_136; [L64] SORT_1 input_137; [L65] SORT_1 input_138; [L66] SORT_1 input_276; [L68] SORT_2 state_6 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L69] SORT_2 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L70] SORT_2 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L71] SORT_2 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L72] SORT_2 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L73] SORT_2 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L74] SORT_2 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L75] SORT_2 state_20 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L76] SORT_2 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L77] SORT_2 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L78] SORT_2 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L79] SORT_2 state_28 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L80] SORT_2 state_30 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L81] SORT_2 state_32 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L82] SORT_2 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L83] SORT_2 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L84] SORT_2 state_38 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L85] SORT_2 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L86] SORT_2 state_42 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L87] SORT_2 state_44 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L88] SORT_2 state_46 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L89] SORT_2 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L90] SORT_2 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L91] SORT_2 state_52 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L92] SORT_2 state_54 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L93] SORT_2 state_56 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L94] SORT_1 state_59 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] SORT_1 state_61 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] SORT_1 state_63 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] SORT_2 init_7_arg_1 = var_5; [L99] state_6 = init_7_arg_1 [L100] SORT_2 init_9_arg_1 = var_5; [L101] state_8 = init_9_arg_1 [L102] SORT_2 init_11_arg_1 = var_5; [L103] state_10 = init_11_arg_1 [L104] SORT_2 init_13_arg_1 = var_5; [L105] state_12 = init_13_arg_1 [L106] SORT_2 init_15_arg_1 = var_5; [L107] state_14 = init_15_arg_1 [L108] SORT_2 init_17_arg_1 = var_5; [L109] state_16 = init_17_arg_1 [L110] SORT_2 init_19_arg_1 = var_5; [L111] state_18 = init_19_arg_1 [L112] SORT_2 init_21_arg_1 = var_5; [L113] state_20 = init_21_arg_1 [L114] SORT_2 init_23_arg_1 = var_5; [L115] state_22 = init_23_arg_1 [L116] SORT_2 init_25_arg_1 = var_5; [L117] state_24 = init_25_arg_1 [L118] SORT_2 init_27_arg_1 = var_5; [L119] state_26 = init_27_arg_1 [L120] SORT_2 init_29_arg_1 = var_5; [L121] state_28 = init_29_arg_1 [L122] SORT_2 init_31_arg_1 = var_5; [L123] state_30 = init_31_arg_1 [L124] SORT_2 init_33_arg_1 = var_5; [L125] state_32 = init_33_arg_1 [L126] SORT_2 init_35_arg_1 = var_5; [L127] state_34 = init_35_arg_1 [L128] SORT_2 init_37_arg_1 = var_5; [L129] state_36 = init_37_arg_1 [L130] SORT_2 init_39_arg_1 = var_5; [L131] state_38 = init_39_arg_1 [L132] SORT_2 init_41_arg_1 = var_5; [L133] state_40 = init_41_arg_1 [L134] SORT_2 init_43_arg_1 = var_5; [L135] state_42 = init_43_arg_1 [L136] SORT_2 init_45_arg_1 = var_5; [L137] state_44 = init_45_arg_1 [L138] SORT_2 init_47_arg_1 = var_5; [L139] state_46 = init_47_arg_1 [L140] SORT_2 init_49_arg_1 = var_5; [L141] state_48 = init_49_arg_1 [L142] SORT_2 init_51_arg_1 = var_5; [L143] state_50 = init_51_arg_1 [L144] SORT_2 init_53_arg_1 = var_5; [L145] state_52 = init_53_arg_1 [L146] SORT_2 init_55_arg_1 = var_5; [L147] state_54 = init_55_arg_1 [L148] SORT_2 init_57_arg_1 = var_5; [L149] state_56 = init_57_arg_1 [L150] SORT_1 init_60_arg_1 = var_58; [L151] state_59 = init_60_arg_1 [L152] SORT_1 init_62_arg_1 = var_58; [L153] state_61 = init_62_arg_1 [L154] SORT_1 init_64_arg_1 = var_58; [L155] state_63 = init_64_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_29_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_39_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, init_45_arg_1=0, init_47_arg_1=0, init_49_arg_1=0, init_51_arg_1=0, init_53_arg_1=0, init_55_arg_1=0, init_57_arg_1=0, init_60_arg_1=0, init_62_arg_1=0, init_64_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_22=0, state_24=0, state_26=0, state_28=0, state_30=0, state_32=0, state_34=0, state_36=0, state_38=0, state_40=0, state_42=0, state_44=0, state_46=0, state_48=0, state_50=0, state_52=0, state_54=0, state_56=0, state_59=0, state_6=0, state_61=0, state_63=0, state_8=0, var_139=0, var_146=0, var_222=1, var_293=3, var_305=0, var_369=2, var_5=0, var_58=0, var_69=255, var_73=1, var_81=2, var_89=3, var_97=4] [L158] input_67 = __VERIFIER_nondet_uchar() [L159] input_67 = input_67 & mask_SORT_1 [L160] input_68 = __VERIFIER_nondet_uchar() [L161] input_68 = input_68 & mask_SORT_1 [L162] input_74 = __VERIFIER_nondet_uchar() [L163] input_74 = input_74 & mask_SORT_1 [L164] input_75 = __VERIFIER_nondet_uchar() [L165] input_75 = input_75 & mask_SORT_1 [L166] input_82 = __VERIFIER_nondet_uchar() [L167] input_82 = input_82 & mask_SORT_1 [L168] input_83 = __VERIFIER_nondet_uchar() [L169] input_83 = input_83 & mask_SORT_1 [L170] input_90 = __VERIFIER_nondet_uchar() [L171] input_90 = input_90 & mask_SORT_1 [L172] input_91 = __VERIFIER_nondet_uchar() [L173] input_91 = input_91 & mask_SORT_1 [L174] input_98 = __VERIFIER_nondet_uchar() [L175] input_98 = input_98 & mask_SORT_1 [L176] input_99 = __VERIFIER_nondet_uchar() [L177] input_99 = input_99 & mask_SORT_1 [L178] input_134 = __VERIFIER_nondet_uchar() [L179] input_134 = input_134 & mask_SORT_1 [L180] input_135 = __VERIFIER_nondet_uchar() [L181] input_135 = input_135 & mask_SORT_1 [L182] input_136 = __VERIFIER_nondet_uchar() [L183] input_136 = input_136 & mask_SORT_1 [L184] input_137 = __VERIFIER_nondet_uchar() [L185] input_137 = input_137 & mask_SORT_1 [L186] input_138 = __VERIFIER_nondet_uchar() [L187] input_138 = input_138 & mask_SORT_1 [L188] input_276 = __VERIFIER_nondet_uchar() [L191] SORT_1 var_65_arg_0 = state_61; [L192] SORT_1 var_65_arg_1 = ~state_63; [L193] var_65_arg_1 = var_65_arg_1 & mask_SORT_1 [L194] SORT_1 var_65 = var_65_arg_0 & var_65_arg_1; [L195] var_65 = var_65 & mask_SORT_1 [L196] SORT_1 bad_66_arg_0 = var_65; [L197] CALL __VERIFIER_assert(!(bad_66_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L197] RET __VERIFIER_assert(!(bad_66_arg_0)) [L199] SORT_1 var_70_arg_0 = input_68; [L200] SORT_2 var_70_arg_1 = var_69; [L201] SORT_2 var_70_arg_2 = state_6; [L202] EXPR var_70_arg_0 ? var_70_arg_1 : var_70_arg_2 [L202] SORT_2 var_70 = var_70_arg_0 ? var_70_arg_1 : var_70_arg_2; [L203] SORT_1 var_71_arg_0 = input_67; [L204] SORT_2 var_71_arg_1 = state_46; [L205] SORT_2 var_71_arg_2 = var_70; [L206] EXPR var_71_arg_0 ? var_71_arg_1 : var_71_arg_2 [L206] SORT_2 var_71 = var_71_arg_0 ? var_71_arg_1 : var_71_arg_2; [L207] var_71 = var_71 & mask_SORT_2 [L208] SORT_2 next_72_arg_1 = var_71; [L209] SORT_2 var_76_arg_0 = var_73; [L210] SORT_2 var_76_arg_1 = state_8; [L211] SORT_2 var_76 = var_76_arg_0 ^ var_76_arg_1; [L212] var_76 = var_76 & mask_SORT_2 [L213] SORT_1 var_77_arg_0 = input_75; [L214] SORT_2 var_77_arg_1 = var_69; [L215] SORT_2 var_77_arg_2 = var_76; [L216] EXPR var_77_arg_0 ? var_77_arg_1 : var_77_arg_2 [L216] SORT_2 var_77 = var_77_arg_0 ? var_77_arg_1 : var_77_arg_2; [L217] SORT_1 var_78_arg_0 = input_74; [L218] SORT_2 var_78_arg_1 = state_46; [L219] SORT_2 var_78_arg_2 = var_77; [L220] EXPR var_78_arg_0 ? var_78_arg_1 : var_78_arg_2 [L220] SORT_2 var_78 = var_78_arg_0 ? var_78_arg_1 : var_78_arg_2; [L221] SORT_2 var_79_arg_0 = var_73; [L222] SORT_2 var_79_arg_1 = var_78; [L223] SORT_2 var_79 = var_79_arg_0 ^ var_79_arg_1; [L224] SORT_2 next_80_arg_1 = var_79; [L225] SORT_2 var_84_arg_0 = var_81; [L226] SORT_2 var_84_arg_1 = state_10; [L227] SORT_2 var_84 = var_84_arg_0 ^ var_84_arg_1; [L228] var_84 = var_84 & mask_SORT_2 [L229] SORT_1 var_85_arg_0 = input_83; [L230] SORT_2 var_85_arg_1 = var_69; [L231] SORT_2 var_85_arg_2 = var_84; [L232] EXPR var_85_arg_0 ? var_85_arg_1 : var_85_arg_2 [L232] SORT_2 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L233] SORT_1 var_86_arg_0 = input_82; [L234] SORT_2 var_86_arg_1 = state_46; [L235] SORT_2 var_86_arg_2 = var_85; [L236] EXPR var_86_arg_0 ? var_86_arg_1 : var_86_arg_2 [L236] SORT_2 var_86 = var_86_arg_0 ? var_86_arg_1 : var_86_arg_2; [L237] SORT_2 var_87_arg_0 = var_81; [L238] SORT_2 var_87_arg_1 = var_86; [L239] SORT_2 var_87 = var_87_arg_0 ^ var_87_arg_1; [L240] SORT_2 next_88_arg_1 = var_87; [L241] SORT_2 var_92_arg_0 = var_89; [L242] SORT_2 var_92_arg_1 = state_12; [L243] SORT_2 var_92 = var_92_arg_0 ^ var_92_arg_1; [L244] var_92 = var_92 & mask_SORT_2 [L245] SORT_1 var_93_arg_0 = input_91; [L246] SORT_2 var_93_arg_1 = var_69; [L247] SORT_2 var_93_arg_2 = var_92; [L248] EXPR var_93_arg_0 ? var_93_arg_1 : var_93_arg_2 [L248] SORT_2 var_93 = var_93_arg_0 ? var_93_arg_1 : var_93_arg_2; [L249] SORT_1 var_94_arg_0 = input_90; [L250] SORT_2 var_94_arg_1 = state_46; [L251] SORT_2 var_94_arg_2 = var_93; [L252] EXPR var_94_arg_0 ? var_94_arg_1 : var_94_arg_2 [L252] SORT_2 var_94 = var_94_arg_0 ? var_94_arg_1 : var_94_arg_2; [L253] SORT_2 var_95_arg_0 = var_89; [L254] SORT_2 var_95_arg_1 = var_94; [L255] SORT_2 var_95 = var_95_arg_0 ^ var_95_arg_1; [L256] SORT_2 next_96_arg_1 = var_95; [L257] SORT_2 var_100_arg_0 = var_97; [L258] SORT_2 var_100_arg_1 = state_14; [L259] SORT_2 var_100 = var_100_arg_0 ^ var_100_arg_1; [L260] var_100 = var_100 & mask_SORT_2 [L261] SORT_1 var_101_arg_0 = input_99; [L262] SORT_2 var_101_arg_1 = var_69; [L263] SORT_2 var_101_arg_2 = var_100; [L264] EXPR var_101_arg_0 ? var_101_arg_1 : var_101_arg_2 [L264] SORT_2 var_101 = var_101_arg_0 ? var_101_arg_1 : var_101_arg_2; [L265] SORT_1 var_102_arg_0 = input_98; [L266] SORT_2 var_102_arg_1 = state_46; [L267] SORT_2 var_102_arg_2 = var_101; [L268] EXPR var_102_arg_0 ? var_102_arg_1 : var_102_arg_2 [L268] SORT_2 var_102 = var_102_arg_0 ? var_102_arg_1 : var_102_arg_2; [L269] SORT_2 var_103_arg_0 = var_97; [L270] SORT_2 var_103_arg_1 = var_102; [L271] SORT_2 var_103 = var_103_arg_0 ^ var_103_arg_1; [L272] SORT_2 next_104_arg_1 = var_103; [L273] SORT_2 var_105_arg_0 = var_73; [L274] SORT_2 var_105_arg_1 = state_16; [L275] SORT_2 var_105 = var_105_arg_0 ^ var_105_arg_1; [L276] var_105 = var_105 & mask_SORT_2 [L277] SORT_2 var_106_arg_0 = var_73; [L278] SORT_2 var_106_arg_1 = var_105; [L279] SORT_2 var_106 = var_106_arg_0 ^ var_106_arg_1; [L280] SORT_2 next_107_arg_1 = var_106; [L281] SORT_2 next_108_arg_1 = state_18; [L282] SORT_2 next_109_arg_1 = state_20; [L283] SORT_2 var_110_arg_0 = var_73; [L284] SORT_2 var_110_arg_1 = state_22; [L285] SORT_2 var_110 = var_110_arg_0 ^ var_110_arg_1; [L286] var_110 = var_110 & mask_SORT_2 [L287] SORT_2 var_111_arg_0 = var_73; [L288] SORT_2 var_111_arg_1 = var_110; [L289] SORT_2 var_111 = var_111_arg_0 ^ var_111_arg_1; [L290] SORT_2 next_112_arg_1 = var_111; [L291] SORT_2 var_113_arg_0 = var_73; [L292] SORT_2 var_113_arg_1 = state_24; [L293] SORT_2 var_113 = var_113_arg_0 ^ var_113_arg_1; [L294] var_113 = var_113 & mask_SORT_2 [L295] SORT_2 var_114_arg_0 = var_73; [L296] SORT_2 var_114_arg_1 = var_113; [L297] SORT_2 var_114 = var_114_arg_0 ^ var_114_arg_1; [L298] SORT_2 next_115_arg_1 = var_114; [L299] SORT_2 next_116_arg_1 = state_26; [L300] SORT_2 var_117_arg_0 = var_73; [L301] SORT_2 var_117_arg_1 = state_28; [L302] SORT_2 var_117 = var_117_arg_0 ^ var_117_arg_1; [L303] var_117 = var_117 & mask_SORT_2 [L304] SORT_2 var_118_arg_0 = var_73; [L305] SORT_2 var_118_arg_1 = var_117; [L306] SORT_2 var_118 = var_118_arg_0 ^ var_118_arg_1; [L307] SORT_2 next_119_arg_1 = var_118; [L308] SORT_2 var_120_arg_0 = var_73; [L309] SORT_2 var_120_arg_1 = state_30; [L310] SORT_2 var_120 = var_120_arg_0 ^ var_120_arg_1; [L311] var_120 = var_120 & mask_SORT_2 [L312] SORT_2 var_121_arg_0 = var_73; [L313] SORT_2 var_121_arg_1 = var_120; [L314] SORT_2 var_121 = var_121_arg_0 ^ var_121_arg_1; [L315] SORT_2 next_122_arg_1 = var_121; [L316] SORT_2 next_123_arg_1 = state_32; [L317] SORT_2 next_124_arg_1 = state_34; [L318] SORT_2 var_125_arg_0 = var_73; [L319] SORT_2 var_125_arg_1 = state_36; [L320] SORT_2 var_125 = var_125_arg_0 ^ var_125_arg_1; [L321] var_125 = var_125 & mask_SORT_2 [L322] SORT_2 var_126_arg_0 = var_73; [L323] SORT_2 var_126_arg_1 = var_125; [L324] SORT_2 var_126 = var_126_arg_0 ^ var_126_arg_1; [L325] SORT_2 next_127_arg_1 = var_126; [L326] SORT_2 var_128_arg_0 = var_73; [L327] SORT_2 var_128_arg_1 = state_38; [L328] SORT_2 var_128 = var_128_arg_0 ^ var_128_arg_1; [L329] var_128 = var_128 & mask_SORT_2 [L330] SORT_2 var_129_arg_0 = var_73; [L331] SORT_2 var_129_arg_1 = var_128; [L332] SORT_2 var_129 = var_129_arg_0 ^ var_129_arg_1; [L333] SORT_2 next_130_arg_1 = var_129; [L334] SORT_2 next_131_arg_1 = state_40; [L335] SORT_2 next_132_arg_1 = state_42; [L336] SORT_2 next_133_arg_1 = state_44; [L337] SORT_1 var_140_arg_0 = input_138; [L338] SORT_2 var_140_arg_1 = var_139; [L339] SORT_2 var_140_arg_2 = state_46; [L340] EXPR var_140_arg_0 ? var_140_arg_1 : var_140_arg_2 [L340] SORT_2 var_140 = var_140_arg_0 ? var_140_arg_1 : var_140_arg_2; [L341] SORT_1 var_141_arg_0 = input_137; [L342] SORT_2 var_141_arg_1 = var_73; [L343] SORT_2 var_141_arg_2 = var_140; [L344] EXPR var_141_arg_0 ? var_141_arg_1 : var_141_arg_2 [L344] SORT_2 var_141 = var_141_arg_0 ? var_141_arg_1 : var_141_arg_2; [L345] SORT_1 var_142_arg_0 = input_136; [L346] SORT_2 var_142_arg_1 = var_81; [L347] SORT_2 var_142_arg_2 = var_141; [L348] EXPR var_142_arg_0 ? var_142_arg_1 : var_142_arg_2 [L348] SORT_2 var_142 = var_142_arg_0 ? var_142_arg_1 : var_142_arg_2; [L349] SORT_1 var_143_arg_0 = input_135; [L350] SORT_2 var_143_arg_1 = var_89; [L351] SORT_2 var_143_arg_2 = var_142; [L352] EXPR var_143_arg_0 ? var_143_arg_1 : var_143_arg_2 [L352] SORT_2 var_143 = var_143_arg_0 ? var_143_arg_1 : var_143_arg_2; [L353] SORT_1 var_144_arg_0 = input_134; [L354] SORT_2 var_144_arg_1 = var_97; [L355] SORT_2 var_144_arg_2 = var_143; [L356] EXPR var_144_arg_0 ? var_144_arg_1 : var_144_arg_2 [L356] SORT_2 var_144 = var_144_arg_0 ? var_144_arg_1 : var_144_arg_2; [L357] var_144 = var_144 & mask_SORT_2 [L358] SORT_2 next_145_arg_1 = var_144; [L359] SORT_3 var_147_arg_0 = var_146; [L360] SORT_2 var_147_arg_1 = state_48; [L361] SORT_4 var_147 = ((SORT_4)var_147_arg_0 << 8) | var_147_arg_1; [L362] SORT_3 var_148_arg_0 = var_146; [L363] SORT_2 var_148_arg_1 = var_113; [L364] SORT_4 var_148 = ((SORT_4)var_148_arg_0 << 8) | var_148_arg_1; [L365] SORT_4 var_149_arg_0 = var_147; [L366] SORT_4 var_149_arg_1 = var_148; [L367] SORT_4 var_149 = var_149_arg_0 - var_149_arg_1; [L368] SORT_4 var_150_arg_0 = var_149; [L369] SORT_2 var_150 = var_150_arg_0 >> 0; [L370] SORT_3 var_151_arg_0 = var_146; [L371] SORT_2 var_151_arg_1 = var_110; [L372] SORT_4 var_151 = ((SORT_4)var_151_arg_0 << 8) | var_151_arg_1; [L373] SORT_4 var_152_arg_0 = var_147; [L374] SORT_4 var_152_arg_1 = var_151; [L375] SORT_4 var_152 = var_152_arg_0 - var_152_arg_1; [L376] SORT_4 var_153_arg_0 = var_152; [L377] SORT_2 var_153 = var_153_arg_0 >> 0; [L378] SORT_3 var_154_arg_0 = var_146; [L379] SORT_2 var_154_arg_1 = state_20; [L380] SORT_4 var_154 = ((SORT_4)var_154_arg_0 << 8) | var_154_arg_1; [L381] SORT_4 var_155_arg_0 = var_147; [L382] SORT_4 var_155_arg_1 = var_154; [L383] SORT_4 var_155 = var_155_arg_0 - var_155_arg_1; [L384] SORT_4 var_156_arg_0 = var_155; [L385] SORT_2 var_156 = var_156_arg_0 >> 0; [L386] SORT_3 var_157_arg_0 = var_146; [L387] SORT_2 var_157_arg_1 = state_18; [L388] SORT_4 var_157 = ((SORT_4)var_157_arg_0 << 8) | var_157_arg_1; [L389] SORT_4 var_158_arg_0 = var_147; [L390] SORT_4 var_158_arg_1 = var_157; [L391] SORT_4 var_158 = var_158_arg_0 - var_158_arg_1; [L392] SORT_4 var_159_arg_0 = var_158; [L393] SORT_2 var_159 = var_159_arg_0 >> 0; [L394] SORT_3 var_160_arg_0 = var_146; [L395] SORT_2 var_160_arg_1 = var_105; [L396] SORT_4 var_160 = ((SORT_4)var_160_arg_0 << 8) | var_160_arg_1; [L397] SORT_4 var_161_arg_0 = var_147; [L398] SORT_4 var_161_arg_1 = var_160; [L399] SORT_4 var_161 = var_161_arg_0 - var_161_arg_1; [L400] SORT_4 var_162_arg_0 = var_161; [L401] SORT_2 var_162 = var_162_arg_0 >> 0; [L402] SORT_4 var_163_arg_0 = var_147; [L403] SORT_4 var_163_arg_1 = var_148; [L404] SORT_4 var_163 = var_163_arg_0 + var_163_arg_1; [L405] SORT_4 var_164_arg_0 = var_163; [L406] SORT_2 var_164 = var_164_arg_0 >> 0; [L407] SORT_4 var_165_arg_0 = var_147; [L408] SORT_4 var_165_arg_1 = var_151; [L409] SORT_4 var_165 = var_165_arg_0 + var_165_arg_1; [L410] SORT_4 var_166_arg_0 = var_165; [L411] SORT_2 var_166 = var_166_arg_0 >> 0; [L412] SORT_4 var_167_arg_0 = var_147; [L413] SORT_4 var_167_arg_1 = var_154; [L414] SORT_4 var_167 = var_167_arg_0 + var_167_arg_1; [L415] SORT_4 var_168_arg_0 = var_167; [L416] SORT_2 var_168 = var_168_arg_0 >> 0; [L417] SORT_4 var_169_arg_0 = var_147; [L418] SORT_4 var_169_arg_1 = var_157; [L419] SORT_4 var_169 = var_169_arg_0 + var_169_arg_1; [L420] SORT_4 var_170_arg_0 = var_169; [L421] SORT_2 var_170 = var_170_arg_0 >> 0; [L422] SORT_4 var_171_arg_0 = var_147; [L423] SORT_4 var_171_arg_1 = var_160; [L424] SORT_4 var_171 = var_171_arg_0 + var_171_arg_1; [L425] SORT_4 var_172_arg_0 = var_171; [L426] SORT_2 var_172 = var_172_arg_0 >> 0; [L427] SORT_1 var_173_arg_0 = input_68; [L428] SORT_2 var_173_arg_1 = var_172; [L429] SORT_2 var_173_arg_2 = state_48; [L430] EXPR var_173_arg_0 ? var_173_arg_1 : var_173_arg_2 [L430] SORT_2 var_173 = var_173_arg_0 ? var_173_arg_1 : var_173_arg_2; [L431] SORT_1 var_174_arg_0 = input_75; [L432] SORT_2 var_174_arg_1 = var_170; [L433] SORT_2 var_174_arg_2 = var_173; [L434] EXPR var_174_arg_0 ? var_174_arg_1 : var_174_arg_2 [L434] SORT_2 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; [L435] SORT_1 var_175_arg_0 = input_83; [L436] SORT_2 var_175_arg_1 = var_168; [L437] SORT_2 var_175_arg_2 = var_174; [L438] EXPR var_175_arg_0 ? var_175_arg_1 : var_175_arg_2 [L438] SORT_2 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L439] SORT_1 var_176_arg_0 = input_91; [L440] SORT_2 var_176_arg_1 = var_166; [L441] SORT_2 var_176_arg_2 = var_175; [L442] EXPR var_176_arg_0 ? var_176_arg_1 : var_176_arg_2 [L442] SORT_2 var_176 = var_176_arg_0 ? var_176_arg_1 : var_176_arg_2; [L443] SORT_1 var_177_arg_0 = input_99; [L444] SORT_2 var_177_arg_1 = var_164; [L445] SORT_2 var_177_arg_2 = var_176; [L446] EXPR var_177_arg_0 ? var_177_arg_1 : var_177_arg_2 [L446] SORT_2 var_177 = var_177_arg_0 ? var_177_arg_1 : var_177_arg_2; [L447] SORT_1 var_178_arg_0 = input_67; [L448] SORT_2 var_178_arg_1 = var_162; [L449] SORT_2 var_178_arg_2 = var_177; [L450] EXPR var_178_arg_0 ? var_178_arg_1 : var_178_arg_2 [L450] SORT_2 var_178 = var_178_arg_0 ? var_178_arg_1 : var_178_arg_2; [L451] SORT_1 var_179_arg_0 = input_74; [L452] SORT_2 var_179_arg_1 = var_159; [L453] SORT_2 var_179_arg_2 = var_178; [L454] EXPR var_179_arg_0 ? var_179_arg_1 : var_179_arg_2 [L454] SORT_2 var_179 = var_179_arg_0 ? var_179_arg_1 : var_179_arg_2; [L455] SORT_1 var_180_arg_0 = input_82; [L456] SORT_2 var_180_arg_1 = var_156; [L457] SORT_2 var_180_arg_2 = var_179; [L458] EXPR var_180_arg_0 ? var_180_arg_1 : var_180_arg_2 [L458] SORT_2 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; [L459] SORT_1 var_181_arg_0 = input_90; [L460] SORT_2 var_181_arg_1 = var_153; [L461] SORT_2 var_181_arg_2 = var_180; [L462] EXPR var_181_arg_0 ? var_181_arg_1 : var_181_arg_2 [L462] SORT_2 var_181 = var_181_arg_0 ? var_181_arg_1 : var_181_arg_2; [L463] SORT_1 var_182_arg_0 = input_98; [L464] SORT_2 var_182_arg_1 = var_150; [L465] SORT_2 var_182_arg_2 = var_181; [L466] EXPR var_182_arg_0 ? var_182_arg_1 : var_182_arg_2 [L466] SORT_2 var_182 = var_182_arg_0 ? var_182_arg_1 : var_182_arg_2; [L467] var_182 = var_182 & mask_SORT_2 [L468] SORT_2 next_183_arg_1 = var_182; [L469] SORT_3 var_184_arg_0 = var_146; [L470] SORT_2 var_184_arg_1 = state_50; [L471] SORT_4 var_184 = ((SORT_4)var_184_arg_0 << 8) | var_184_arg_1; [L472] SORT_3 var_185_arg_0 = var_146; [L473] SORT_2 var_185_arg_1 = state_34; [L474] SORT_4 var_185 = ((SORT_4)var_185_arg_0 << 8) | var_185_arg_1; [L475] SORT_4 var_186_arg_0 = var_184; [L476] SORT_4 var_186_arg_1 = var_185; [L477] SORT_4 var_186 = var_186_arg_0 - var_186_arg_1; [L478] SORT_4 var_187_arg_0 = var_186; [L479] SORT_2 var_187 = var_187_arg_0 >> 0; [L480] SORT_3 var_188_arg_0 = var_146; [L481] SORT_2 var_188_arg_1 = state_32; [L482] SORT_4 var_188 = ((SORT_4)var_188_arg_0 << 8) | var_188_arg_1; [L483] SORT_4 var_189_arg_0 = var_184; [L484] SORT_4 var_189_arg_1 = var_188; [L485] SORT_4 var_189 = var_189_arg_0 - var_189_arg_1; [L486] SORT_4 var_190_arg_0 = var_189; [L487] SORT_2 var_190 = var_190_arg_0 >> 0; [L488] SORT_3 var_191_arg_0 = var_146; [L489] SORT_2 var_191_arg_1 = var_120; [L490] SORT_4 var_191 = ((SORT_4)var_191_arg_0 << 8) | var_191_arg_1; [L491] SORT_4 var_192_arg_0 = var_184; [L492] SORT_4 var_192_arg_1 = var_191; [L493] SORT_4 var_192 = var_192_arg_0 - var_192_arg_1; [L494] SORT_4 var_193_arg_0 = var_192; [L495] SORT_2 var_193 = var_193_arg_0 >> 0; [L496] SORT_3 var_194_arg_0 = var_146; [L497] SORT_2 var_194_arg_1 = var_117; [L498] SORT_4 var_194 = ((SORT_4)var_194_arg_0 << 8) | var_194_arg_1; [L499] SORT_4 var_195_arg_0 = var_184; [L500] SORT_4 var_195_arg_1 = var_194; [L501] SORT_4 var_195 = var_195_arg_0 - var_195_arg_1; [L502] SORT_4 var_196_arg_0 = var_195; [L503] SORT_2 var_196 = var_196_arg_0 >> 0; [L504] SORT_3 var_197_arg_0 = var_146; [L505] SORT_2 var_197_arg_1 = state_26; [L506] SORT_4 var_197 = ((SORT_4)var_197_arg_0 << 8) | var_197_arg_1; [L507] SORT_4 var_198_arg_0 = var_184; [L508] SORT_4 var_198_arg_1 = var_197; [L509] SORT_4 var_198 = var_198_arg_0 - var_198_arg_1; [L510] SORT_4 var_199_arg_0 = var_198; [L511] SORT_2 var_199 = var_199_arg_0 >> 0; [L512] SORT_4 var_200_arg_0 = var_184; [L513] SORT_4 var_200_arg_1 = var_185; [L514] SORT_4 var_200 = var_200_arg_0 + var_200_arg_1; [L515] SORT_4 var_201_arg_0 = var_200; [L516] SORT_2 var_201 = var_201_arg_0 >> 0; [L517] SORT_4 var_202_arg_0 = var_184; [L518] SORT_4 var_202_arg_1 = var_188; [L519] SORT_4 var_202 = var_202_arg_0 + var_202_arg_1; [L520] SORT_4 var_203_arg_0 = var_202; [L521] SORT_2 var_203 = var_203_arg_0 >> 0; [L522] SORT_4 var_204_arg_0 = var_184; [L523] SORT_4 var_204_arg_1 = var_191; [L524] SORT_4 var_204 = var_204_arg_0 + var_204_arg_1; [L525] SORT_4 var_205_arg_0 = var_204; [L526] SORT_2 var_205 = var_205_arg_0 >> 0; [L527] SORT_4 var_206_arg_0 = var_184; [L528] SORT_4 var_206_arg_1 = var_194; [L529] SORT_4 var_206 = var_206_arg_0 + var_206_arg_1; [L530] SORT_4 var_207_arg_0 = var_206; [L531] SORT_2 var_207 = var_207_arg_0 >> 0; [L532] SORT_4 var_208_arg_0 = var_184; [L533] SORT_4 var_208_arg_1 = var_197; [L534] SORT_4 var_208 = var_208_arg_0 + var_208_arg_1; [L535] SORT_4 var_209_arg_0 = var_208; [L536] SORT_2 var_209 = var_209_arg_0 >> 0; [L537] SORT_1 var_210_arg_0 = input_68; [L538] SORT_2 var_210_arg_1 = var_209; [L539] SORT_2 var_210_arg_2 = state_50; [L540] EXPR var_210_arg_0 ? var_210_arg_1 : var_210_arg_2 [L540] SORT_2 var_210 = var_210_arg_0 ? var_210_arg_1 : var_210_arg_2; [L541] SORT_1 var_211_arg_0 = input_75; [L542] SORT_2 var_211_arg_1 = var_207; [L543] SORT_2 var_211_arg_2 = var_210; [L544] EXPR var_211_arg_0 ? var_211_arg_1 : var_211_arg_2 [L544] SORT_2 var_211 = var_211_arg_0 ? var_211_arg_1 : var_211_arg_2; [L545] SORT_1 var_212_arg_0 = input_83; [L546] SORT_2 var_212_arg_1 = var_205; [L547] SORT_2 var_212_arg_2 = var_211; [L548] EXPR var_212_arg_0 ? var_212_arg_1 : var_212_arg_2 [L548] SORT_2 var_212 = var_212_arg_0 ? var_212_arg_1 : var_212_arg_2; [L549] SORT_1 var_213_arg_0 = input_91; [L550] SORT_2 var_213_arg_1 = var_203; [L551] SORT_2 var_213_arg_2 = var_212; [L552] EXPR var_213_arg_0 ? var_213_arg_1 : var_213_arg_2 [L552] SORT_2 var_213 = var_213_arg_0 ? var_213_arg_1 : var_213_arg_2; [L553] SORT_1 var_214_arg_0 = input_99; [L554] SORT_2 var_214_arg_1 = var_201; [L555] SORT_2 var_214_arg_2 = var_213; [L556] EXPR var_214_arg_0 ? var_214_arg_1 : var_214_arg_2 [L556] SORT_2 var_214 = var_214_arg_0 ? var_214_arg_1 : var_214_arg_2; [L557] SORT_1 var_215_arg_0 = input_67; [L558] SORT_2 var_215_arg_1 = var_199; [L559] SORT_2 var_215_arg_2 = var_214; [L560] EXPR var_215_arg_0 ? var_215_arg_1 : var_215_arg_2 [L560] SORT_2 var_215 = var_215_arg_0 ? var_215_arg_1 : var_215_arg_2; [L561] SORT_1 var_216_arg_0 = input_74; [L562] SORT_2 var_216_arg_1 = var_196; [L563] SORT_2 var_216_arg_2 = var_215; [L564] EXPR var_216_arg_0 ? var_216_arg_1 : var_216_arg_2 [L564] SORT_2 var_216 = var_216_arg_0 ? var_216_arg_1 : var_216_arg_2; [L565] SORT_1 var_217_arg_0 = input_82; [L566] SORT_2 var_217_arg_1 = var_193; [L567] SORT_2 var_217_arg_2 = var_216; [L568] EXPR var_217_arg_0 ? var_217_arg_1 : var_217_arg_2 [L568] SORT_2 var_217 = var_217_arg_0 ? var_217_arg_1 : var_217_arg_2; [L569] SORT_1 var_218_arg_0 = input_90; [L570] SORT_2 var_218_arg_1 = var_190; [L571] SORT_2 var_218_arg_2 = var_217; [L572] EXPR var_218_arg_0 ? var_218_arg_1 : var_218_arg_2 [L572] SORT_2 var_218 = var_218_arg_0 ? var_218_arg_1 : var_218_arg_2; [L573] SORT_1 var_219_arg_0 = input_98; [L574] SORT_2 var_219_arg_1 = var_187; [L575] SORT_2 var_219_arg_2 = var_218; [L576] EXPR var_219_arg_0 ? var_219_arg_1 : var_219_arg_2 [L576] SORT_2 var_219 = var_219_arg_0 ? var_219_arg_1 : var_219_arg_2; [L577] var_219 = var_219 & mask_SORT_2 [L578] SORT_2 next_220_arg_1 = var_219; [L579] SORT_3 var_221_arg_0 = var_146; [L580] SORT_2 var_221_arg_1 = state_52; [L581] SORT_4 var_221 = ((SORT_4)var_221_arg_0 << 8) | var_221_arg_1; [L582] var_221 = var_221 & mask_SORT_4 [L583] SORT_4 var_223_arg_0 = var_221; [L584] SORT_4 var_223_arg_1 = var_222; [L585] SORT_4 var_223 = var_223_arg_0 - var_223_arg_1; [L586] SORT_4 var_224_arg_0 = var_223; [L587] SORT_2 var_224 = var_224_arg_0 >> 0; [L588] SORT_4 var_225_arg_0 = var_222; [L589] SORT_4 var_225_arg_1 = var_221; [L590] SORT_4 var_225 = var_225_arg_0 + var_225_arg_1; [L591] SORT_4 var_226_arg_0 = var_225; [L592] SORT_2 var_226 = var_226_arg_0 >> 0; [L593] SORT_1 var_227_arg_0 = input_68; [L594] SORT_2 var_227_arg_1 = var_226; [L595] SORT_2 var_227_arg_2 = state_52; [L596] EXPR var_227_arg_0 ? var_227_arg_1 : var_227_arg_2 [L596] SORT_2 var_227 = var_227_arg_0 ? var_227_arg_1 : var_227_arg_2; [L597] SORT_1 var_228_arg_0 = input_75; [L598] SORT_2 var_228_arg_1 = var_226; [L599] SORT_2 var_228_arg_2 = var_227; [L600] EXPR var_228_arg_0 ? var_228_arg_1 : var_228_arg_2 [L600] SORT_2 var_228 = var_228_arg_0 ? var_228_arg_1 : var_228_arg_2; [L601] SORT_1 var_229_arg_0 = input_83; [L602] SORT_2 var_229_arg_1 = var_226; [L603] SORT_2 var_229_arg_2 = var_228; [L604] EXPR var_229_arg_0 ? var_229_arg_1 : var_229_arg_2 [L604] SORT_2 var_229 = var_229_arg_0 ? var_229_arg_1 : var_229_arg_2; [L605] SORT_1 var_230_arg_0 = input_91; [L606] SORT_2 var_230_arg_1 = var_226; [L607] SORT_2 var_230_arg_2 = var_229; [L608] EXPR var_230_arg_0 ? var_230_arg_1 : var_230_arg_2 [L608] SORT_2 var_230 = var_230_arg_0 ? var_230_arg_1 : var_230_arg_2; [L609] SORT_1 var_231_arg_0 = input_99; [L610] SORT_2 var_231_arg_1 = var_226; [L611] SORT_2 var_231_arg_2 = var_230; [L612] EXPR var_231_arg_0 ? var_231_arg_1 : var_231_arg_2 [L612] SORT_2 var_231 = var_231_arg_0 ? var_231_arg_1 : var_231_arg_2; [L613] SORT_1 var_232_arg_0 = input_67; [L614] SORT_2 var_232_arg_1 = var_224; [L615] SORT_2 var_232_arg_2 = var_231; [L616] EXPR var_232_arg_0 ? var_232_arg_1 : var_232_arg_2 [L616] SORT_2 var_232 = var_232_arg_0 ? var_232_arg_1 : var_232_arg_2; [L617] SORT_1 var_233_arg_0 = input_74; [L618] SORT_2 var_233_arg_1 = var_224; [L619] SORT_2 var_233_arg_2 = var_232; [L620] EXPR var_233_arg_0 ? var_233_arg_1 : var_233_arg_2 [L620] SORT_2 var_233 = var_233_arg_0 ? var_233_arg_1 : var_233_arg_2; [L621] SORT_1 var_234_arg_0 = input_82; [L622] SORT_2 var_234_arg_1 = var_224; [L623] SORT_2 var_234_arg_2 = var_233; [L624] EXPR var_234_arg_0 ? var_234_arg_1 : var_234_arg_2 [L624] SORT_2 var_234 = var_234_arg_0 ? var_234_arg_1 : var_234_arg_2; [L625] SORT_1 var_235_arg_0 = input_90; [L626] SORT_2 var_235_arg_1 = var_224; [L627] SORT_2 var_235_arg_2 = var_234; [L628] EXPR var_235_arg_0 ? var_235_arg_1 : var_235_arg_2 [L628] SORT_2 var_235 = var_235_arg_0 ? var_235_arg_1 : var_235_arg_2; [L629] SORT_1 var_236_arg_0 = input_98; [L630] SORT_2 var_236_arg_1 = var_224; [L631] SORT_2 var_236_arg_2 = var_235; [L632] EXPR var_236_arg_0 ? var_236_arg_1 : var_236_arg_2 [L632] SORT_2 var_236 = var_236_arg_0 ? var_236_arg_1 : var_236_arg_2; [L633] var_236 = var_236 & mask_SORT_2 [L634] SORT_2 next_237_arg_1 = var_236; [L635] SORT_3 var_238_arg_0 = var_146; [L636] SORT_2 var_238_arg_1 = state_54; [L637] SORT_4 var_238 = ((SORT_4)var_238_arg_0 << 8) | var_238_arg_1; [L638] SORT_3 var_239_arg_0 = var_146; [L639] SORT_2 var_239_arg_1 = state_44; [L640] SORT_4 var_239 = ((SORT_4)var_239_arg_0 << 8) | var_239_arg_1; [L641] SORT_4 var_240_arg_0 = var_238; [L642] SORT_4 var_240_arg_1 = var_239; [L643] SORT_4 var_240 = var_240_arg_0 - var_240_arg_1; [L644] var_240 = var_240 & mask_SORT_4 [L645] SORT_4 var_241_arg_0 = var_240; [L646] SORT_2 var_241 = var_241_arg_0 >> 0; [L647] SORT_3 var_242_arg_0 = var_146; [L648] SORT_2 var_242_arg_1 = state_42; [L649] SORT_4 var_242 = ((SORT_4)var_242_arg_0 << 8) | var_242_arg_1; [L650] SORT_4 var_243_arg_0 = var_238; [L651] SORT_4 var_243_arg_1 = var_242; [L652] SORT_4 var_243 = var_243_arg_0 - var_243_arg_1; [L653] var_243 = var_243 & mask_SORT_4 [L654] SORT_4 var_244_arg_0 = var_243; [L655] SORT_2 var_244 = var_244_arg_0 >> 0; [L656] SORT_3 var_245_arg_0 = var_146; [L657] SORT_2 var_245_arg_1 = state_40; [L658] SORT_4 var_245 = ((SORT_4)var_245_arg_0 << 8) | var_245_arg_1; [L659] SORT_4 var_246_arg_0 = var_238; [L660] SORT_4 var_246_arg_1 = var_245; [L661] SORT_4 var_246 = var_246_arg_0 - var_246_arg_1; [L662] var_246 = var_246 & mask_SORT_4 [L663] SORT_4 var_247_arg_0 = var_246; [L664] SORT_2 var_247 = var_247_arg_0 >> 0; [L665] SORT_3 var_248_arg_0 = var_146; [L666] SORT_2 var_248_arg_1 = var_128; [L667] SORT_4 var_248 = ((SORT_4)var_248_arg_0 << 8) | var_248_arg_1; [L668] SORT_4 var_249_arg_0 = var_238; [L669] SORT_4 var_249_arg_1 = var_248; [L670] SORT_4 var_249 = var_249_arg_0 - var_249_arg_1; [L671] var_249 = var_249 & mask_SORT_4 [L672] SORT_4 var_250_arg_0 = var_249; [L673] SORT_2 var_250 = var_250_arg_0 >> 0; [L674] SORT_3 var_251_arg_0 = var_146; [L675] SORT_2 var_251_arg_1 = var_125; [L676] SORT_4 var_251 = ((SORT_4)var_251_arg_0 << 8) | var_251_arg_1; [L677] SORT_4 var_252_arg_0 = var_238; [L678] SORT_4 var_252_arg_1 = var_251; [L679] SORT_4 var_252 = var_252_arg_0 - var_252_arg_1; [L680] var_252 = var_252 & mask_SORT_4 [L681] SORT_4 var_253_arg_0 = var_252; [L682] SORT_2 var_253 = var_253_arg_0 >> 0; [L683] SORT_4 var_254_arg_0 = var_238; [L684] SORT_4 var_254_arg_1 = var_239; [L685] SORT_4 var_254 = var_254_arg_0 + var_254_arg_1; [L686] SORT_4 var_255_arg_0 = var_254; [L687] SORT_2 var_255 = var_255_arg_0 >> 0; [L688] SORT_4 var_256_arg_0 = var_238; [L689] SORT_4 var_256_arg_1 = var_242; [L690] SORT_4 var_256 = var_256_arg_0 + var_256_arg_1; [L691] SORT_4 var_257_arg_0 = var_256; [L692] SORT_2 var_257 = var_257_arg_0 >> 0; [L693] SORT_4 var_258_arg_0 = var_238; [L694] SORT_4 var_258_arg_1 = var_245; [L695] SORT_4 var_258 = var_258_arg_0 + var_258_arg_1; [L696] SORT_4 var_259_arg_0 = var_258; [L697] SORT_2 var_259 = var_259_arg_0 >> 0; [L698] SORT_4 var_260_arg_0 = var_238; [L699] SORT_4 var_260_arg_1 = var_248; [L700] SORT_4 var_260 = var_260_arg_0 + var_260_arg_1; [L701] SORT_4 var_261_arg_0 = var_260; [L702] SORT_2 var_261 = var_261_arg_0 >> 0; [L703] SORT_4 var_262_arg_0 = var_238; [L704] SORT_4 var_262_arg_1 = var_251; [L705] SORT_4 var_262 = var_262_arg_0 + var_262_arg_1; [L706] SORT_4 var_263_arg_0 = var_262; [L707] SORT_2 var_263 = var_263_arg_0 >> 0; [L708] SORT_1 var_264_arg_0 = input_68; [L709] SORT_2 var_264_arg_1 = var_263; [L710] SORT_2 var_264_arg_2 = state_54; [L711] EXPR var_264_arg_0 ? var_264_arg_1 : var_264_arg_2 [L711] SORT_2 var_264 = var_264_arg_0 ? var_264_arg_1 : var_264_arg_2; [L712] SORT_1 var_265_arg_0 = input_75; [L713] SORT_2 var_265_arg_1 = var_261; [L714] SORT_2 var_265_arg_2 = var_264; [L715] EXPR var_265_arg_0 ? var_265_arg_1 : var_265_arg_2 [L715] SORT_2 var_265 = var_265_arg_0 ? var_265_arg_1 : var_265_arg_2; [L716] SORT_1 var_266_arg_0 = input_83; [L717] SORT_2 var_266_arg_1 = var_259; [L718] SORT_2 var_266_arg_2 = var_265; [L719] EXPR var_266_arg_0 ? var_266_arg_1 : var_266_arg_2 [L719] SORT_2 var_266 = var_266_arg_0 ? var_266_arg_1 : var_266_arg_2; [L720] SORT_1 var_267_arg_0 = input_91; [L721] SORT_2 var_267_arg_1 = var_257; [L722] SORT_2 var_267_arg_2 = var_266; [L723] EXPR var_267_arg_0 ? var_267_arg_1 : var_267_arg_2 [L723] SORT_2 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L724] SORT_1 var_268_arg_0 = input_99; [L725] SORT_2 var_268_arg_1 = var_255; [L726] SORT_2 var_268_arg_2 = var_267; [L727] EXPR var_268_arg_0 ? var_268_arg_1 : var_268_arg_2 [L727] SORT_2 var_268 = var_268_arg_0 ? var_268_arg_1 : var_268_arg_2; [L728] SORT_1 var_269_arg_0 = input_67; [L729] SORT_2 var_269_arg_1 = var_253; [L730] SORT_2 var_269_arg_2 = var_268; [L731] EXPR var_269_arg_0 ? var_269_arg_1 : var_269_arg_2 [L731] SORT_2 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L732] SORT_1 var_270_arg_0 = input_74; [L733] SORT_2 var_270_arg_1 = var_250; [L734] SORT_2 var_270_arg_2 = var_269; [L735] EXPR var_270_arg_0 ? var_270_arg_1 : var_270_arg_2 [L735] SORT_2 var_270 = var_270_arg_0 ? var_270_arg_1 : var_270_arg_2; [L736] SORT_1 var_271_arg_0 = input_82; [L737] SORT_2 var_271_arg_1 = var_247; [L738] SORT_2 var_271_arg_2 = var_270; [L739] EXPR var_271_arg_0 ? var_271_arg_1 : var_271_arg_2 [L739] SORT_2 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L740] SORT_1 var_272_arg_0 = input_90; [L741] SORT_2 var_272_arg_1 = var_244; [L742] SORT_2 var_272_arg_2 = var_271; [L743] EXPR var_272_arg_0 ? var_272_arg_1 : var_272_arg_2 [L743] SORT_2 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L744] SORT_1 var_273_arg_0 = input_98; [L745] SORT_2 var_273_arg_1 = var_241; [L746] SORT_2 var_273_arg_2 = var_272; [L747] EXPR var_273_arg_0 ? var_273_arg_1 : var_273_arg_2 [L747] SORT_2 var_273 = var_273_arg_0 ? var_273_arg_1 : var_273_arg_2; [L748] var_273 = var_273 & mask_SORT_2 [L749] SORT_2 next_274_arg_1 = var_273; [L750] SORT_2 next_275_arg_1 = state_56; [L751] SORT_1 var_277_arg_0 = ~state_59; [L752] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L753] SORT_1 var_277_arg_1 = ~input_276; [L754] var_277_arg_1 = var_277_arg_1 & mask_SORT_1 [L755] SORT_1 var_277 = var_277_arg_0 & var_277_arg_1; [L756] SORT_1 next_278_arg_1 = ~var_277; [L757] next_278_arg_1 = next_278_arg_1 & mask_SORT_1 [L758] SORT_1 var_279_arg_0 = state_61; [L759] SORT_1 var_279_arg_1 = input_276; [L760] SORT_1 var_279 = var_279_arg_0 | var_279_arg_1; [L761] SORT_1 next_280_arg_1 = var_279; [L762] SORT_2 var_281_arg_0 = var_139; [L763] SORT_2 var_281_arg_1 = state_6; [L764] SORT_1 var_281 = var_281_arg_0 == var_281_arg_1; [L765] SORT_2 var_282_arg_0 = var_139; [L766] SORT_2 var_282_arg_1 = var_76; [L767] SORT_1 var_282 = var_282_arg_0 == var_282_arg_1; [L768] SORT_1 var_283_arg_0 = var_281; [L769] SORT_1 var_283_arg_1 = var_282; [L770] SORT_1 var_283 = var_283_arg_0 & var_283_arg_1; [L771] SORT_2 var_284_arg_0 = var_139; [L772] SORT_2 var_284_arg_1 = var_84; [L773] SORT_1 var_284 = var_284_arg_0 == var_284_arg_1; [L774] SORT_1 var_285_arg_0 = var_283; [L775] SORT_1 var_285_arg_1 = var_284; [L776] SORT_1 var_285 = var_285_arg_0 & var_285_arg_1; [L777] SORT_2 var_286_arg_0 = var_139; [L778] SORT_2 var_286_arg_1 = var_92; [L779] SORT_1 var_286 = var_286_arg_0 == var_286_arg_1; [L780] SORT_1 var_287_arg_0 = var_285; [L781] SORT_1 var_287_arg_1 = var_286; [L782] SORT_1 var_287 = var_287_arg_0 & var_287_arg_1; [L783] SORT_2 var_288_arg_0 = var_139; [L784] SORT_2 var_288_arg_1 = var_100; [L785] SORT_1 var_288 = var_288_arg_0 == var_288_arg_1; [L786] SORT_1 var_289_arg_0 = var_287; [L787] SORT_1 var_289_arg_1 = var_288; [L788] SORT_1 var_289 = var_289_arg_0 & var_289_arg_1; [L789] SORT_1 var_290_arg_0 = ~state_59; [L790] var_290_arg_0 = var_290_arg_0 & mask_SORT_1 [L791] SORT_1 var_290_arg_1 = var_289; [L792] SORT_1 var_290 = var_290_arg_0 & var_290_arg_1; [L793] SORT_1 var_291_arg_0 = ~input_276; [L794] var_291_arg_0 = var_291_arg_0 & mask_SORT_1 [L795] SORT_1 var_291_arg_1 = var_290; [L796] SORT_1 var_291 = var_291_arg_0 | var_291_arg_1; [L797] SORT_2 var_292_arg_0 = state_6; [L798] SORT_2 var_292_arg_1 = state_46; [L799] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L800] SORT_4 var_294_arg_0 = var_293; [L801] SORT_4 var_294_arg_1 = var_221; [L802] SORT_1 var_294 = var_294_arg_0 <= var_294_arg_1; [L803] SORT_1 var_295_arg_0 = var_292; [L804] SORT_1 var_295_arg_1 = ~var_294; [L805] var_295_arg_1 = var_295_arg_1 & mask_SORT_1 [L806] SORT_1 var_295 = var_295_arg_0 & var_295_arg_1; [L807] SORT_2 var_296_arg_0 = var_139; [L808] SORT_2 var_296_arg_1 = var_105; [L809] SORT_1 var_296 = var_296_arg_0 == var_296_arg_1; [L810] SORT_2 var_297_arg_0 = var_139; [L811] SORT_2 var_297_arg_1 = state_50; [L812] SORT_1 var_297 = var_297_arg_0 == var_297_arg_1; [L813] SORT_1 var_298_arg_0 = var_296; [L814] SORT_1 var_298_arg_1 = var_297; [L815] SORT_1 var_298 = var_298_arg_0 | var_298_arg_1; [L816] SORT_1 var_299_arg_0 = var_295; [L817] SORT_1 var_299_arg_1 = var_298; [L818] SORT_1 var_299 = var_299_arg_0 & var_299_arg_1; [L819] SORT_2 var_300_arg_0 = var_139; [L820] SORT_2 var_300_arg_1 = state_26; [L821] SORT_1 var_300 = var_300_arg_0 == var_300_arg_1; [L822] SORT_2 var_301_arg_0 = var_139; [L823] SORT_2 var_301_arg_1 = state_48; [L824] SORT_1 var_301 = var_301_arg_0 == var_301_arg_1; [L825] SORT_1 var_302_arg_0 = var_300; [L826] SORT_1 var_302_arg_1 = var_301; [L827] SORT_1 var_302 = var_302_arg_0 | var_302_arg_1; [L828] SORT_1 var_303_arg_0 = var_299; [L829] SORT_1 var_303_arg_1 = var_302; [L830] SORT_1 var_303 = var_303_arg_0 & var_303_arg_1; [L831] SORT_2 var_304_arg_0 = var_139; [L832] SORT_2 var_304_arg_1 = var_125; [L833] SORT_1 var_304 = var_304_arg_0 == var_304_arg_1; [L834] SORT_4 var_306_arg_0 = var_221; [L835] SORT_4 var_306_arg_1 = var_305; [L836] SORT_1 var_306 = var_306_arg_0 <= var_306_arg_1; [L837] SORT_1 var_307_arg_0 = var_304; [L838] SORT_1 var_307_arg_1 = ~var_306; [L839] var_307_arg_1 = var_307_arg_1 & mask_SORT_1 [L840] SORT_1 var_307 = var_307_arg_0 | var_307_arg_1; [L841] SORT_1 var_308_arg_0 = var_303; [L842] SORT_1 var_308_arg_1 = var_307; [L843] SORT_1 var_308 = var_308_arg_0 & var_308_arg_1; [L844] SORT_1 var_309_arg_0 = ~state_59; [L845] var_309_arg_0 = var_309_arg_0 & mask_SORT_1 [L846] SORT_1 var_309_arg_1 = var_308; [L847] SORT_1 var_309 = var_309_arg_0 & var_309_arg_1; [L848] SORT_1 var_310_arg_0 = ~input_68; [L849] var_310_arg_0 = var_310_arg_0 & mask_SORT_1 [L850] SORT_1 var_310_arg_1 = var_309; [L851] SORT_1 var_310 = var_310_arg_0 | var_310_arg_1; [L852] SORT_1 var_311_arg_0 = var_291; [L853] SORT_1 var_311_arg_1 = var_310; [L854] SORT_1 var_311 = var_311_arg_0 & var_311_arg_1; [L855] SORT_2 var_312_arg_0 = var_76; [L856] SORT_2 var_312_arg_1 = state_46; [L857] SORT_1 var_312 = var_312_arg_0 == var_312_arg_1; [L858] SORT_1 var_313_arg_0 = ~var_294; [L859] var_313_arg_0 = var_313_arg_0 & mask_SORT_1 [L860] SORT_1 var_313_arg_1 = var_312; [L861] SORT_1 var_313 = var_313_arg_0 & var_313_arg_1; [L862] SORT_2 var_314_arg_0 = var_139; [L863] SORT_2 var_314_arg_1 = state_18; [L864] SORT_1 var_314 = var_314_arg_0 == var_314_arg_1; [L865] SORT_1 var_315_arg_0 = var_297; [L866] SORT_1 var_315_arg_1 = var_314; [L867] SORT_1 var_315 = var_315_arg_0 | var_315_arg_1; [L868] SORT_1 var_316_arg_0 = var_313; [L869] SORT_1 var_316_arg_1 = var_315; [L870] SORT_1 var_316 = var_316_arg_0 & var_316_arg_1; [L871] SORT_2 var_317_arg_0 = var_139; [L872] SORT_2 var_317_arg_1 = var_117; [L873] SORT_1 var_317 = var_317_arg_0 == var_317_arg_1; [L874] SORT_1 var_318_arg_0 = var_301; [L875] SORT_1 var_318_arg_1 = var_317; [L876] SORT_1 var_318 = var_318_arg_0 | var_318_arg_1; [L877] SORT_1 var_319_arg_0 = var_316; [L878] SORT_1 var_319_arg_1 = var_318; [L879] SORT_1 var_319 = var_319_arg_0 & var_319_arg_1; [L880] SORT_2 var_320_arg_0 = var_139; [L881] SORT_2 var_320_arg_1 = var_128; [L882] SORT_1 var_320 = var_320_arg_0 == var_320_arg_1; [L883] SORT_1 var_321_arg_0 = ~var_306; [L884] var_321_arg_0 = var_321_arg_0 & mask_SORT_1 [L885] SORT_1 var_321_arg_1 = var_320; [L886] SORT_1 var_321 = var_321_arg_0 | var_321_arg_1; [L887] SORT_1 var_322_arg_0 = var_319; [L888] SORT_1 var_322_arg_1 = var_321; [L889] SORT_1 var_322 = var_322_arg_0 & var_322_arg_1; [L890] SORT_1 var_323_arg_0 = ~state_59; [L891] var_323_arg_0 = var_323_arg_0 & mask_SORT_1 [L892] SORT_1 var_323_arg_1 = var_322; [L893] SORT_1 var_323 = var_323_arg_0 & var_323_arg_1; [L894] SORT_1 var_324_arg_0 = ~input_75; [L895] var_324_arg_0 = var_324_arg_0 & mask_SORT_1 [L896] SORT_1 var_324_arg_1 = var_323; [L897] SORT_1 var_324 = var_324_arg_0 | var_324_arg_1; [L898] SORT_1 var_325_arg_0 = var_311; [L899] SORT_1 var_325_arg_1 = var_324; [L900] SORT_1 var_325 = var_325_arg_0 & var_325_arg_1; [L901] SORT_2 var_326_arg_0 = var_84; [L902] SORT_2 var_326_arg_1 = state_46; [L903] SORT_1 var_326 = var_326_arg_0 == var_326_arg_1; [L904] SORT_1 var_327_arg_0 = ~var_294; [L905] var_327_arg_0 = var_327_arg_0 & mask_SORT_1 [L906] SORT_1 var_327_arg_1 = var_326; [L907] SORT_1 var_327 = var_327_arg_0 & var_327_arg_1; [L908] SORT_2 var_328_arg_0 = var_139; [L909] SORT_2 var_328_arg_1 = state_20; [L910] SORT_1 var_328 = var_328_arg_0 == var_328_arg_1; [L911] SORT_1 var_329_arg_0 = var_297; [L912] SORT_1 var_329_arg_1 = var_328; [L913] SORT_1 var_329 = var_329_arg_0 | var_329_arg_1; [L914] SORT_1 var_330_arg_0 = var_327; [L915] SORT_1 var_330_arg_1 = var_329; [L916] SORT_1 var_330 = var_330_arg_0 & var_330_arg_1; [L917] SORT_2 var_331_arg_0 = var_139; [L918] SORT_2 var_331_arg_1 = var_120; [L919] SORT_1 var_331 = var_331_arg_0 == var_331_arg_1; [L920] SORT_1 var_332_arg_0 = var_301; [L921] SORT_1 var_332_arg_1 = var_331; [L922] SORT_1 var_332 = var_332_arg_0 | var_332_arg_1; [L923] SORT_1 var_333_arg_0 = var_330; [L924] SORT_1 var_333_arg_1 = var_332; [L925] SORT_1 var_333 = var_333_arg_0 & var_333_arg_1; [L926] SORT_2 var_334_arg_0 = var_139; [L927] SORT_2 var_334_arg_1 = state_40; [L928] SORT_1 var_334 = var_334_arg_0 == var_334_arg_1; [L929] SORT_1 var_335_arg_0 = ~var_306; [L930] var_335_arg_0 = var_335_arg_0 & mask_SORT_1 [L931] SORT_1 var_335_arg_1 = var_334; [L932] SORT_1 var_335 = var_335_arg_0 | var_335_arg_1; [L933] SORT_1 var_336_arg_0 = var_333; [L934] SORT_1 var_336_arg_1 = var_335; [L935] SORT_1 var_336 = var_336_arg_0 & var_336_arg_1; [L936] SORT_1 var_337_arg_0 = ~state_59; [L937] var_337_arg_0 = var_337_arg_0 & mask_SORT_1 [L938] SORT_1 var_337_arg_1 = var_336; [L939] SORT_1 var_337 = var_337_arg_0 & var_337_arg_1; [L940] SORT_1 var_338_arg_0 = ~input_83; [L941] var_338_arg_0 = var_338_arg_0 & mask_SORT_1 [L942] SORT_1 var_338_arg_1 = var_337; [L943] SORT_1 var_338 = var_338_arg_0 | var_338_arg_1; [L944] SORT_1 var_339_arg_0 = var_325; [L945] SORT_1 var_339_arg_1 = var_338; [L946] SORT_1 var_339 = var_339_arg_0 & var_339_arg_1; [L947] SORT_2 var_340_arg_0 = var_92; [L948] SORT_2 var_340_arg_1 = state_46; [L949] SORT_1 var_340 = var_340_arg_0 == var_340_arg_1; [L950] SORT_1 var_341_arg_0 = ~var_294; [L951] var_341_arg_0 = var_341_arg_0 & mask_SORT_1 [L952] SORT_1 var_341_arg_1 = var_340; [L953] SORT_1 var_341 = var_341_arg_0 & var_341_arg_1; [L954] SORT_2 var_342_arg_0 = var_139; [L955] SORT_2 var_342_arg_1 = var_110; [L956] SORT_1 var_342 = var_342_arg_0 == var_342_arg_1; [L957] SORT_1 var_343_arg_0 = var_297; [L958] SORT_1 var_343_arg_1 = var_342; [L959] SORT_1 var_343 = var_343_arg_0 | var_343_arg_1; [L960] SORT_1 var_344_arg_0 = var_341; [L961] SORT_1 var_344_arg_1 = var_343; [L962] SORT_1 var_344 = var_344_arg_0 & var_344_arg_1; [L963] SORT_2 var_345_arg_0 = var_139; [L964] SORT_2 var_345_arg_1 = state_32; [L965] SORT_1 var_345 = var_345_arg_0 == var_345_arg_1; [L966] SORT_1 var_346_arg_0 = var_301; [L967] SORT_1 var_346_arg_1 = var_345; [L968] SORT_1 var_346 = var_346_arg_0 | var_346_arg_1; [L969] SORT_1 var_347_arg_0 = var_344; [L970] SORT_1 var_347_arg_1 = var_346; [L971] SORT_1 var_347 = var_347_arg_0 & var_347_arg_1; [L972] SORT_2 var_348_arg_0 = var_139; [L973] SORT_2 var_348_arg_1 = state_42; [L974] SORT_1 var_348 = var_348_arg_0 == var_348_arg_1; [L975] SORT_1 var_349_arg_0 = ~var_306; [L976] var_349_arg_0 = var_349_arg_0 & mask_SORT_1 [L977] SORT_1 var_349_arg_1 = var_348; [L978] SORT_1 var_349 = var_349_arg_0 | var_349_arg_1; [L979] SORT_1 var_350_arg_0 = var_347; [L980] SORT_1 var_350_arg_1 = var_349; [L981] SORT_1 var_350 = var_350_arg_0 & var_350_arg_1; [L982] SORT_1 var_351_arg_0 = ~state_59; [L983] var_351_arg_0 = var_351_arg_0 & mask_SORT_1 [L984] SORT_1 var_351_arg_1 = var_350; [L985] SORT_1 var_351 = var_351_arg_0 & var_351_arg_1; [L986] SORT_1 var_352_arg_0 = ~input_91; [L987] var_352_arg_0 = var_352_arg_0 & mask_SORT_1 [L988] SORT_1 var_352_arg_1 = var_351; [L989] SORT_1 var_352 = var_352_arg_0 | var_352_arg_1; [L990] SORT_1 var_353_arg_0 = var_339; [L991] SORT_1 var_353_arg_1 = var_352; [L992] SORT_1 var_353 = var_353_arg_0 & var_353_arg_1; [L993] SORT_2 var_354_arg_0 = var_100; [L994] SORT_2 var_354_arg_1 = state_46; [L995] SORT_1 var_354 = var_354_arg_0 == var_354_arg_1; [L996] SORT_1 var_355_arg_0 = ~var_294; [L997] var_355_arg_0 = var_355_arg_0 & mask_SORT_1 [L998] SORT_1 var_355_arg_1 = var_354; [L999] SORT_1 var_355 = var_355_arg_0 & var_355_arg_1; [L1000] SORT_2 var_356_arg_0 = var_139; [L1001] SORT_2 var_356_arg_1 = var_113; [L1002] SORT_1 var_356 = var_356_arg_0 == var_356_arg_1; [L1003] SORT_1 var_357_arg_0 = var_297; [L1004] SORT_1 var_357_arg_1 = var_356; [L1005] SORT_1 var_357 = var_357_arg_0 | var_357_arg_1; [L1006] SORT_1 var_358_arg_0 = var_355; [L1007] SORT_1 var_358_arg_1 = var_357; [L1008] SORT_1 var_358 = var_358_arg_0 & var_358_arg_1; [L1009] SORT_2 var_359_arg_0 = var_139; [L1010] SORT_2 var_359_arg_1 = state_34; [L1011] SORT_1 var_359 = var_359_arg_0 == var_359_arg_1; [L1012] SORT_1 var_360_arg_0 = var_301; [L1013] SORT_1 var_360_arg_1 = var_359; [L1014] SORT_1 var_360 = var_360_arg_0 | var_360_arg_1; [L1015] SORT_1 var_361_arg_0 = var_358; [L1016] SORT_1 var_361_arg_1 = var_360; [L1017] SORT_1 var_361 = var_361_arg_0 & var_361_arg_1; [L1018] SORT_2 var_362_arg_0 = var_139; [L1019] SORT_2 var_362_arg_1 = state_44; [L1020] SORT_1 var_362 = var_362_arg_0 == var_362_arg_1; [L1021] SORT_1 var_363_arg_0 = ~var_306; [L1022] var_363_arg_0 = var_363_arg_0 & mask_SORT_1 [L1023] SORT_1 var_363_arg_1 = var_362; [L1024] SORT_1 var_363 = var_363_arg_0 | var_363_arg_1; [L1025] SORT_1 var_364_arg_0 = var_361; [L1026] SORT_1 var_364_arg_1 = var_363; [L1027] SORT_1 var_364 = var_364_arg_0 & var_364_arg_1; [L1028] SORT_1 var_365_arg_0 = ~state_59; [L1029] var_365_arg_0 = var_365_arg_0 & mask_SORT_1 [L1030] SORT_1 var_365_arg_1 = var_364; [L1031] SORT_1 var_365 = var_365_arg_0 & var_365_arg_1; [L1032] SORT_1 var_366_arg_0 = ~input_99; [L1033] var_366_arg_0 = var_366_arg_0 & mask_SORT_1 [L1034] SORT_1 var_366_arg_1 = var_365; [L1035] SORT_1 var_366 = var_366_arg_0 | var_366_arg_1; [L1036] SORT_1 var_367_arg_0 = var_353; [L1037] SORT_1 var_367_arg_1 = var_366; [L1038] SORT_1 var_367 = var_367_arg_0 & var_367_arg_1; [L1039] SORT_2 var_368_arg_0 = var_69; [L1040] SORT_2 var_368_arg_1 = state_6; [L1041] SORT_1 var_368 = var_368_arg_0 == var_368_arg_1; [L1042] SORT_4 var_370_arg_0 = var_221; [L1043] SORT_4 var_370_arg_1 = var_369; [L1044] SORT_1 var_370 = var_370_arg_0 <= var_370_arg_1; [L1045] SORT_4 var_371_arg_0 = var_305; [L1046] SORT_4 var_371_arg_1 = var_252; [L1047] SORT_1 var_371 = var_371_arg_0 == var_371_arg_1; [L1048] SORT_1 var_372_arg_0 = ~var_370; [L1049] var_372_arg_0 = var_372_arg_0 & mask_SORT_1 [L1050] SORT_1 var_372_arg_1 = var_371; [L1051] SORT_1 var_372 = var_372_arg_0 | var_372_arg_1; [L1052] SORT_1 var_373_arg_0 = var_368; [L1053] SORT_1 var_373_arg_1 = var_372; [L1054] SORT_1 var_373 = var_373_arg_0 & var_373_arg_1; [L1055] SORT_1 var_374_arg_0 = ~state_59; [L1056] var_374_arg_0 = var_374_arg_0 & mask_SORT_1 [L1057] SORT_1 var_374_arg_1 = var_373; [L1058] SORT_1 var_374 = var_374_arg_0 & var_374_arg_1; [L1059] SORT_1 var_375_arg_0 = ~input_67; [L1060] var_375_arg_0 = var_375_arg_0 & mask_SORT_1 [L1061] SORT_1 var_375_arg_1 = var_374; [L1062] SORT_1 var_375 = var_375_arg_0 | var_375_arg_1; [L1063] SORT_1 var_376_arg_0 = var_367; [L1064] SORT_1 var_376_arg_1 = var_375; [L1065] SORT_1 var_376 = var_376_arg_0 & var_376_arg_1; [L1066] SORT_2 var_377_arg_0 = var_69; [L1067] SORT_2 var_377_arg_1 = var_76; [L1068] SORT_1 var_377 = var_377_arg_0 == var_377_arg_1; [L1069] SORT_4 var_378_arg_0 = var_305; [L1070] SORT_4 var_378_arg_1 = var_249; [L1071] SORT_1 var_378 = var_378_arg_0 == var_378_arg_1; [L1072] SORT_1 var_379_arg_0 = ~var_370; [L1073] var_379_arg_0 = var_379_arg_0 & mask_SORT_1 [L1074] SORT_1 var_379_arg_1 = var_378; [L1075] SORT_1 var_379 = var_379_arg_0 | var_379_arg_1; [L1076] SORT_1 var_380_arg_0 = var_377; [L1077] SORT_1 var_380_arg_1 = var_379; [L1078] SORT_1 var_380 = var_380_arg_0 & var_380_arg_1; [L1079] SORT_1 var_381_arg_0 = ~state_59; [L1080] var_381_arg_0 = var_381_arg_0 & mask_SORT_1 [L1081] SORT_1 var_381_arg_1 = var_380; [L1082] SORT_1 var_381 = var_381_arg_0 & var_381_arg_1; [L1083] SORT_1 var_382_arg_0 = ~input_74; [L1084] var_382_arg_0 = var_382_arg_0 & mask_SORT_1 [L1085] SORT_1 var_382_arg_1 = var_381; [L1086] SORT_1 var_382 = var_382_arg_0 | var_382_arg_1; [L1087] SORT_1 var_383_arg_0 = var_376; [L1088] SORT_1 var_383_arg_1 = var_382; [L1089] SORT_1 var_383 = var_383_arg_0 & var_383_arg_1; [L1090] SORT_2 var_384_arg_0 = var_69; [L1091] SORT_2 var_384_arg_1 = var_84; [L1092] SORT_1 var_384 = var_384_arg_0 == var_384_arg_1; [L1093] SORT_4 var_385_arg_0 = var_305; [L1094] SORT_4 var_385_arg_1 = var_246; [L1095] SORT_1 var_385 = var_385_arg_0 == var_385_arg_1; [L1096] SORT_1 var_386_arg_0 = ~var_370; [L1097] var_386_arg_0 = var_386_arg_0 & mask_SORT_1 [L1098] SORT_1 var_386_arg_1 = var_385; [L1099] SORT_1 var_386 = var_386_arg_0 | var_386_arg_1; [L1100] SORT_1 var_387_arg_0 = var_384; [L1101] SORT_1 var_387_arg_1 = var_386; [L1102] SORT_1 var_387 = var_387_arg_0 & var_387_arg_1; [L1103] SORT_1 var_388_arg_0 = ~state_59; [L1104] var_388_arg_0 = var_388_arg_0 & mask_SORT_1 [L1105] SORT_1 var_388_arg_1 = var_387; [L1106] SORT_1 var_388 = var_388_arg_0 & var_388_arg_1; [L1107] SORT_1 var_389_arg_0 = ~input_82; [L1108] var_389_arg_0 = var_389_arg_0 & mask_SORT_1 [L1109] SORT_1 var_389_arg_1 = var_388; [L1110] SORT_1 var_389 = var_389_arg_0 | var_389_arg_1; [L1111] SORT_1 var_390_arg_0 = var_383; [L1112] SORT_1 var_390_arg_1 = var_389; [L1113] SORT_1 var_390 = var_390_arg_0 & var_390_arg_1; [L1114] SORT_2 var_391_arg_0 = var_69; [L1115] SORT_2 var_391_arg_1 = var_92; [L1116] SORT_1 var_391 = var_391_arg_0 == var_391_arg_1; [L1117] SORT_4 var_392_arg_0 = var_305; [L1118] SORT_4 var_392_arg_1 = var_243; [L1119] SORT_1 var_392 = var_392_arg_0 == var_392_arg_1; [L1120] SORT_1 var_393_arg_0 = ~var_370; [L1121] var_393_arg_0 = var_393_arg_0 & mask_SORT_1 [L1122] SORT_1 var_393_arg_1 = var_392; [L1123] SORT_1 var_393 = var_393_arg_0 | var_393_arg_1; [L1124] SORT_1 var_394_arg_0 = var_391; [L1125] SORT_1 var_394_arg_1 = var_393; [L1126] SORT_1 var_394 = var_394_arg_0 & var_394_arg_1; [L1127] SORT_1 var_395_arg_0 = ~state_59; [L1128] var_395_arg_0 = var_395_arg_0 & mask_SORT_1 [L1129] SORT_1 var_395_arg_1 = var_394; [L1130] SORT_1 var_395 = var_395_arg_0 & var_395_arg_1; [L1131] SORT_1 var_396_arg_0 = ~input_90; [L1132] var_396_arg_0 = var_396_arg_0 & mask_SORT_1 [L1133] SORT_1 var_396_arg_1 = var_395; [L1134] SORT_1 var_396 = var_396_arg_0 | var_396_arg_1; [L1135] SORT_1 var_397_arg_0 = var_390; [L1136] SORT_1 var_397_arg_1 = var_396; [L1137] SORT_1 var_397 = var_397_arg_0 & var_397_arg_1; [L1138] SORT_2 var_398_arg_0 = var_69; [L1139] SORT_2 var_398_arg_1 = var_100; [L1140] SORT_1 var_398 = var_398_arg_0 == var_398_arg_1; [L1141] SORT_4 var_399_arg_0 = var_305; [L1142] SORT_4 var_399_arg_1 = var_240; [L1143] SORT_1 var_399 = var_399_arg_0 == var_399_arg_1; [L1144] SORT_1 var_400_arg_0 = ~var_370; [L1145] var_400_arg_0 = var_400_arg_0 & mask_SORT_1 [L1146] SORT_1 var_400_arg_1 = var_399; [L1147] SORT_1 var_400 = var_400_arg_0 | var_400_arg_1; [L1148] SORT_1 var_401_arg_0 = var_398; [L1149] SORT_1 var_401_arg_1 = var_400; [L1150] SORT_1 var_401 = var_401_arg_0 & var_401_arg_1; [L1151] SORT_1 var_402_arg_0 = ~state_59; [L1152] var_402_arg_0 = var_402_arg_0 & mask_SORT_1 [L1153] SORT_1 var_402_arg_1 = var_401; [L1154] SORT_1 var_402 = var_402_arg_0 & var_402_arg_1; [L1155] SORT_1 var_403_arg_0 = ~input_98; [L1156] var_403_arg_0 = var_403_arg_0 & mask_SORT_1 [L1157] SORT_1 var_403_arg_1 = var_402; [L1158] SORT_1 var_403 = var_403_arg_0 | var_403_arg_1; [L1159] SORT_1 var_404_arg_0 = var_397; [L1160] SORT_1 var_404_arg_1 = var_403; [L1161] SORT_1 var_404 = var_404_arg_0 & var_404_arg_1; [L1162] SORT_1 var_405_arg_0 = ~state_59; [L1163] var_405_arg_0 = var_405_arg_0 & mask_SORT_1 [L1164] SORT_1 var_405_arg_1 = ~input_138; [L1165] var_405_arg_1 = var_405_arg_1 & mask_SORT_1 [L1166] SORT_1 var_405 = var_405_arg_0 | var_405_arg_1; [L1167] SORT_1 var_406_arg_0 = var_404; [L1168] SORT_1 var_406_arg_1 = var_405; [L1169] SORT_1 var_406 = var_406_arg_0 & var_406_arg_1; [L1170] SORT_1 var_407_arg_0 = ~state_59; [L1171] var_407_arg_0 = var_407_arg_0 & mask_SORT_1 [L1172] SORT_1 var_407_arg_1 = ~input_137; [L1173] var_407_arg_1 = var_407_arg_1 & mask_SORT_1 [L1174] SORT_1 var_407 = var_407_arg_0 | var_407_arg_1; [L1175] SORT_1 var_408_arg_0 = var_406; [L1176] SORT_1 var_408_arg_1 = var_407; [L1177] SORT_1 var_408 = var_408_arg_0 & var_408_arg_1; [L1178] SORT_1 var_409_arg_0 = ~state_59; [L1179] var_409_arg_0 = var_409_arg_0 & mask_SORT_1 [L1180] SORT_1 var_409_arg_1 = ~input_136; [L1181] var_409_arg_1 = var_409_arg_1 & mask_SORT_1 [L1182] SORT_1 var_409 = var_409_arg_0 | var_409_arg_1; [L1183] SORT_1 var_410_arg_0 = var_408; [L1184] SORT_1 var_410_arg_1 = var_409; [L1185] SORT_1 var_410 = var_410_arg_0 & var_410_arg_1; [L1186] SORT_1 var_411_arg_0 = ~state_59; [L1187] var_411_arg_0 = var_411_arg_0 & mask_SORT_1 [L1188] SORT_1 var_411_arg_1 = ~input_135; [L1189] var_411_arg_1 = var_411_arg_1 & mask_SORT_1 [L1190] SORT_1 var_411 = var_411_arg_0 | var_411_arg_1; [L1191] SORT_1 var_412_arg_0 = var_410; [L1192] SORT_1 var_412_arg_1 = var_411; [L1193] SORT_1 var_412 = var_412_arg_0 & var_412_arg_1; [L1194] SORT_1 var_413_arg_0 = ~state_59; [L1195] var_413_arg_0 = var_413_arg_0 & mask_SORT_1 [L1196] SORT_1 var_413_arg_1 = ~input_134; [L1197] var_413_arg_1 = var_413_arg_1 & mask_SORT_1 [L1198] SORT_1 var_413 = var_413_arg_0 | var_413_arg_1; [L1199] SORT_1 var_414_arg_0 = var_412; [L1200] SORT_1 var_414_arg_1 = var_413; [L1201] SORT_1 var_414 = var_414_arg_0 & var_414_arg_1; [L1202] SORT_1 var_415_arg_0 = input_276; [L1203] SORT_1 var_415_arg_1 = input_68; [L1204] SORT_1 var_415 = var_415_arg_0 | var_415_arg_1; [L1205] SORT_1 var_416_arg_0 = input_75; [L1206] SORT_1 var_416_arg_1 = var_415; [L1207] SORT_1 var_416 = var_416_arg_0 | var_416_arg_1; [L1208] SORT_1 var_417_arg_0 = input_83; [L1209] SORT_1 var_417_arg_1 = var_416; [L1210] SORT_1 var_417 = var_417_arg_0 | var_417_arg_1; [L1211] SORT_1 var_418_arg_0 = input_91; [L1212] SORT_1 var_418_arg_1 = var_417; [L1213] SORT_1 var_418 = var_418_arg_0 | var_418_arg_1; [L1214] SORT_1 var_419_arg_0 = input_99; [L1215] SORT_1 var_419_arg_1 = var_418; [L1216] SORT_1 var_419 = var_419_arg_0 | var_419_arg_1; [L1217] SORT_1 var_420_arg_0 = input_67; [L1218] SORT_1 var_420_arg_1 = var_419; [L1219] SORT_1 var_420 = var_420_arg_0 | var_420_arg_1; [L1220] SORT_1 var_421_arg_0 = input_74; [L1221] SORT_1 var_421_arg_1 = var_420; [L1222] SORT_1 var_421 = var_421_arg_0 | var_421_arg_1; [L1223] SORT_1 var_422_arg_0 = input_82; [L1224] SORT_1 var_422_arg_1 = var_421; [L1225] SORT_1 var_422 = var_422_arg_0 | var_422_arg_1; [L1226] SORT_1 var_423_arg_0 = input_90; [L1227] SORT_1 var_423_arg_1 = var_422; [L1228] SORT_1 var_423 = var_423_arg_0 | var_423_arg_1; [L1229] SORT_1 var_424_arg_0 = input_98; [L1230] SORT_1 var_424_arg_1 = var_423; [L1231] SORT_1 var_424 = var_424_arg_0 | var_424_arg_1; [L1232] SORT_1 var_425_arg_0 = input_138; [L1233] SORT_1 var_425_arg_1 = var_424; [L1234] SORT_1 var_425 = var_425_arg_0 | var_425_arg_1; [L1235] SORT_1 var_426_arg_0 = input_137; [L1236] SORT_1 var_426_arg_1 = var_425; [L1237] SORT_1 var_426 = var_426_arg_0 | var_426_arg_1; [L1238] SORT_1 var_427_arg_0 = input_136; [L1239] SORT_1 var_427_arg_1 = var_426; [L1240] SORT_1 var_427 = var_427_arg_0 | var_427_arg_1; [L1241] SORT_1 var_428_arg_0 = input_135; [L1242] SORT_1 var_428_arg_1 = var_427; [L1243] SORT_1 var_428 = var_428_arg_0 | var_428_arg_1; [L1244] SORT_1 var_429_arg_0 = input_134; [L1245] SORT_1 var_429_arg_1 = var_428; [L1246] SORT_1 var_429 = var_429_arg_0 | var_429_arg_1; [L1247] SORT_1 var_430_arg_0 = var_414; [L1248] SORT_1 var_430_arg_1 = var_429; [L1249] SORT_1 var_430 = var_430_arg_0 & var_430_arg_1; [L1250] SORT_1 var_431_arg_0 = input_276; [L1251] SORT_1 var_431_arg_1 = input_68; [L1252] SORT_1 var_431 = var_431_arg_0 & var_431_arg_1; [L1253] SORT_1 var_432_arg_0 = input_75; [L1254] SORT_1 var_432_arg_1 = var_415; [L1255] SORT_1 var_432 = var_432_arg_0 & var_432_arg_1; [L1256] SORT_1 var_433_arg_0 = var_431; [L1257] SORT_1 var_433_arg_1 = var_432; [L1258] SORT_1 var_433 = var_433_arg_0 | var_433_arg_1; [L1259] SORT_1 var_434_arg_0 = input_83; [L1260] SORT_1 var_434_arg_1 = var_416; [L1261] SORT_1 var_434 = var_434_arg_0 & var_434_arg_1; [L1262] SORT_1 var_435_arg_0 = var_433; [L1263] SORT_1 var_435_arg_1 = var_434; [L1264] SORT_1 var_435 = var_435_arg_0 | var_435_arg_1; [L1265] SORT_1 var_436_arg_0 = input_91; [L1266] SORT_1 var_436_arg_1 = var_417; [L1267] SORT_1 var_436 = var_436_arg_0 & var_436_arg_1; [L1268] SORT_1 var_437_arg_0 = var_435; [L1269] SORT_1 var_437_arg_1 = var_436; [L1270] SORT_1 var_437 = var_437_arg_0 | var_437_arg_1; [L1271] SORT_1 var_438_arg_0 = input_99; [L1272] SORT_1 var_438_arg_1 = var_418; [L1273] SORT_1 var_438 = var_438_arg_0 & var_438_arg_1; [L1274] SORT_1 var_439_arg_0 = var_437; [L1275] SORT_1 var_439_arg_1 = var_438; [L1276] SORT_1 var_439 = var_439_arg_0 | var_439_arg_1; [L1277] SORT_1 var_440_arg_0 = input_67; [L1278] SORT_1 var_440_arg_1 = var_419; [L1279] SORT_1 var_440 = var_440_arg_0 & var_440_arg_1; [L1280] SORT_1 var_441_arg_0 = var_439; [L1281] SORT_1 var_441_arg_1 = var_440; [L1282] SORT_1 var_441 = var_441_arg_0 | var_441_arg_1; [L1283] SORT_1 var_442_arg_0 = input_74; [L1284] SORT_1 var_442_arg_1 = var_420; [L1285] SORT_1 var_442 = var_442_arg_0 & var_442_arg_1; [L1286] SORT_1 var_443_arg_0 = var_441; [L1287] SORT_1 var_443_arg_1 = var_442; [L1288] SORT_1 var_443 = var_443_arg_0 | var_443_arg_1; [L1289] SORT_1 var_444_arg_0 = input_82; [L1290] SORT_1 var_444_arg_1 = var_421; [L1291] SORT_1 var_444 = var_444_arg_0 & var_444_arg_1; [L1292] SORT_1 var_445_arg_0 = var_443; [L1293] SORT_1 var_445_arg_1 = var_444; [L1294] SORT_1 var_445 = var_445_arg_0 | var_445_arg_1; [L1295] SORT_1 var_446_arg_0 = input_90; [L1296] SORT_1 var_446_arg_1 = var_422; [L1297] SORT_1 var_446 = var_446_arg_0 & var_446_arg_1; [L1298] SORT_1 var_447_arg_0 = var_445; [L1299] SORT_1 var_447_arg_1 = var_446; [L1300] SORT_1 var_447 = var_447_arg_0 | var_447_arg_1; [L1301] SORT_1 var_448_arg_0 = input_98; [L1302] SORT_1 var_448_arg_1 = var_423; [L1303] SORT_1 var_448 = var_448_arg_0 & var_448_arg_1; [L1304] SORT_1 var_449_arg_0 = var_447; [L1305] SORT_1 var_449_arg_1 = var_448; [L1306] SORT_1 var_449 = var_449_arg_0 | var_449_arg_1; [L1307] SORT_1 var_450_arg_0 = input_138; [L1308] SORT_1 var_450_arg_1 = var_424; [L1309] SORT_1 var_450 = var_450_arg_0 & var_450_arg_1; [L1310] SORT_1 var_451_arg_0 = var_449; [L1311] SORT_1 var_451_arg_1 = var_450; [L1312] SORT_1 var_451 = var_451_arg_0 | var_451_arg_1; [L1313] SORT_1 var_452_arg_0 = input_137; [L1314] SORT_1 var_452_arg_1 = var_425; [L1315] SORT_1 var_452 = var_452_arg_0 & var_452_arg_1; [L1316] SORT_1 var_453_arg_0 = var_451; [L1317] SORT_1 var_453_arg_1 = var_452; [L1318] SORT_1 var_453 = var_453_arg_0 | var_453_arg_1; [L1319] SORT_1 var_454_arg_0 = input_136; [L1320] SORT_1 var_454_arg_1 = var_426; [L1321] SORT_1 var_454 = var_454_arg_0 & var_454_arg_1; [L1322] SORT_1 var_455_arg_0 = var_453; [L1323] SORT_1 var_455_arg_1 = var_454; [L1324] SORT_1 var_455 = var_455_arg_0 | var_455_arg_1; [L1325] SORT_1 var_456_arg_0 = input_135; [L1326] SORT_1 var_456_arg_1 = var_427; [L1327] SORT_1 var_456 = var_456_arg_0 & var_456_arg_1; [L1328] SORT_1 var_457_arg_0 = var_455; [L1329] SORT_1 var_457_arg_1 = var_456; [L1330] SORT_1 var_457 = var_457_arg_0 | var_457_arg_1; [L1331] SORT_1 var_458_arg_0 = input_134; [L1332] SORT_1 var_458_arg_1 = var_428; [L1333] SORT_1 var_458 = var_458_arg_0 & var_458_arg_1; [L1334] SORT_1 var_459_arg_0 = var_457; [L1335] SORT_1 var_459_arg_1 = var_458; [L1336] SORT_1 var_459 = var_459_arg_0 | var_459_arg_1; [L1337] SORT_1 var_460_arg_0 = var_430; [L1338] SORT_1 var_460_arg_1 = ~var_459; [L1339] var_460_arg_1 = var_460_arg_1 & mask_SORT_1 [L1340] SORT_1 var_460 = var_460_arg_0 & var_460_arg_1; [L1341] SORT_1 var_461_arg_0 = ~state_59; [L1342] var_461_arg_0 = var_461_arg_0 & mask_SORT_1 [L1343] SORT_1 var_461_arg_1 = state_61; [L1344] SORT_1 var_461 = var_461_arg_0 & var_461_arg_1; [L1345] SORT_1 var_462_arg_0 = ~state_59; [L1346] var_462_arg_0 = var_462_arg_0 & mask_SORT_1 [L1347] SORT_1 var_462_arg_1 = state_61; [L1348] SORT_1 var_462 = var_462_arg_0 | var_462_arg_1; [L1349] SORT_1 var_463_arg_0 = ~var_461; [L1350] var_463_arg_0 = var_463_arg_0 & mask_SORT_1 [L1351] SORT_1 var_463_arg_1 = var_462; [L1352] SORT_1 var_463 = var_463_arg_0 & var_463_arg_1; [L1353] SORT_1 var_464_arg_0 = var_460; [L1354] SORT_1 var_464_arg_1 = var_463; [L1355] SORT_1 var_464 = var_464_arg_0 & var_464_arg_1; [L1356] SORT_1 var_465_arg_0 = var_277; [L1357] SORT_1 var_465_arg_1 = var_279; [L1358] SORT_1 var_465 = var_465_arg_0 & var_465_arg_1; [L1359] SORT_1 var_466_arg_0 = var_277; [L1360] SORT_1 var_466_arg_1 = var_279; [L1361] SORT_1 var_466 = var_466_arg_0 | var_466_arg_1; [L1362] SORT_1 var_467_arg_0 = ~var_465; [L1363] var_467_arg_0 = var_467_arg_0 & mask_SORT_1 [L1364] SORT_1 var_467_arg_1 = var_466; [L1365] SORT_1 var_467 = var_467_arg_0 & var_467_arg_1; [L1366] SORT_1 var_468_arg_0 = var_464; [L1367] SORT_1 var_468_arg_1 = var_467; [L1368] SORT_1 var_468 = var_468_arg_0 & var_468_arg_1; [L1369] SORT_1 var_469_arg_0 = var_468; [L1370] SORT_1 var_469_arg_1 = ~state_63; [L1371] var_469_arg_1 = var_469_arg_1 & mask_SORT_1 [L1372] SORT_1 var_469 = var_469_arg_0 & var_469_arg_1; [L1373] SORT_1 next_470_arg_1 = ~var_469; [L1374] next_470_arg_1 = next_470_arg_1 & mask_SORT_1 [L1376] state_6 = next_72_arg_1 [L1377] state_8 = next_80_arg_1 [L1378] state_10 = next_88_arg_1 [L1379] state_12 = next_96_arg_1 [L1380] state_14 = next_104_arg_1 [L1381] state_16 = next_107_arg_1 [L1382] state_18 = next_108_arg_1 [L1383] state_20 = next_109_arg_1 [L1384] state_22 = next_112_arg_1 [L1385] state_24 = next_115_arg_1 [L1386] state_26 = next_116_arg_1 [L1387] state_28 = next_119_arg_1 [L1388] state_30 = next_122_arg_1 [L1389] state_32 = next_123_arg_1 [L1390] state_34 = next_124_arg_1 [L1391] state_36 = next_127_arg_1 [L1392] state_38 = next_130_arg_1 [L1393] state_40 = next_131_arg_1 [L1394] state_42 = next_132_arg_1 [L1395] state_44 = next_133_arg_1 [L1396] state_46 = next_145_arg_1 [L1397] state_48 = next_183_arg_1 [L1398] state_50 = next_220_arg_1 [L1399] state_52 = next_237_arg_1 [L1400] state_54 = next_274_arg_1 [L1401] state_56 = next_275_arg_1 [L1402] state_59 = next_278_arg_1 [L1403] state_61 = next_280_arg_1 [L1404] state_63 = next_470_arg_1 VAL [bad_66_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_29_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_39_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, init_45_arg_1=0, init_47_arg_1=0, init_49_arg_1=0, init_51_arg_1=0, init_53_arg_1=0, init_55_arg_1=0, init_57_arg_1=0, init_60_arg_1=0, init_62_arg_1=0, init_64_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_134=1, input_135=0, input_136=1, input_137=0, input_138=1, input_276=253, input_67=1, input_68=1, input_74=1, input_75=0, input_82=1, input_83=0, input_90=1, input_91=0, input_98=0, input_99=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, next_104_arg_1=4, next_107_arg_1=0, next_108_arg_1=0, next_109_arg_1=0, next_112_arg_1=0, next_115_arg_1=0, next_116_arg_1=0, next_119_arg_1=0, next_122_arg_1=0, next_123_arg_1=0, next_124_arg_1=0, next_127_arg_1=0, next_130_arg_1=0, next_131_arg_1=0, next_132_arg_1=0, next_133_arg_1=0, next_145_arg_1=0, next_183_arg_1=0, next_220_arg_1=0, next_237_arg_1=255, next_274_arg_1=0, next_275_arg_1=0, next_278_arg_1=0, next_280_arg_1=253, next_470_arg_1=1, next_72_arg_1=0, next_80_arg_1=1, next_88_arg_1=2, next_96_arg_1=3, state_10=2, state_12=3, state_14=4, state_16=0, state_18=0, state_20=0, state_22=0, state_24=0, state_26=0, state_28=0, state_30=0, state_32=0, state_34=0, state_36=0, state_38=0, state_40=0, state_42=0, state_44=0, state_46=0, state_48=0, state_50=0, state_52=255, state_54=0, state_56=0, state_59=0, state_6=0, state_61=253, state_63=1, state_8=1, var_100=252, var_100_arg_0=4, var_100_arg_1=0, var_101=252, var_101_arg_0=0, var_101_arg_1=255, var_101_arg_2=252, var_102=252, var_102_arg_0=0, var_102_arg_1=0, var_102_arg_2=252, var_103=4, var_103_arg_0=4, var_103_arg_1=252, var_105=1, var_105_arg_0=1, var_105_arg_1=0, var_106=0, var_106_arg_0=1, var_106_arg_1=1, var_110=1, var_110_arg_0=1, var_110_arg_1=0, var_111=0, var_111_arg_0=1, var_111_arg_1=1, var_113=1, var_113_arg_0=1, var_113_arg_1=0, var_114=0, var_114_arg_0=1, var_114_arg_1=1, var_117=1, var_117_arg_0=1, var_117_arg_1=0, var_118=0, var_118_arg_0=1, var_118_arg_1=1, var_120=1, var_120_arg_0=1, var_120_arg_1=0, var_121=0, var_121_arg_0=1, var_121_arg_1=1, var_125=1, var_125_arg_0=1, var_125_arg_1=0, var_126=0, var_126_arg_0=1, var_126_arg_1=1, var_128=1, var_128_arg_0=1, var_128_arg_1=0, var_129=0, var_129_arg_0=1, var_129_arg_1=1, var_139=0, var_140=0, var_140_arg_0=1, var_140_arg_1=0, var_140_arg_2=0, var_141=0, var_141_arg_0=0, var_141_arg_1=1, var_141_arg_2=0, var_142=2, var_142_arg_0=1, var_142_arg_1=2, var_142_arg_2=0, var_143=2, var_143_arg_0=0, var_143_arg_1=3, var_143_arg_2=2, var_144=0, var_144_arg_0=1, var_144_arg_1=4, var_144_arg_2=2, var_146=0, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_148=1, var_148_arg_0=0, var_148_arg_1=1, var_149=4294967295, var_149_arg_0=0, var_149_arg_1=1, var_150=255, var_150_arg_0=4294967295, var_151=1, var_151_arg_0=0, var_151_arg_1=1, var_152=4294967295, var_152_arg_0=0, var_152_arg_1=1, var_153=255, var_153_arg_0=4294967295, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_155=0, var_155_arg_0=0, var_155_arg_1=0, var_156=0, var_156_arg_0=0, var_157=0, var_157_arg_0=0, var_157_arg_1=0, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_159=0, var_159_arg_0=0, var_160=1, var_160_arg_0=0, var_160_arg_1=1, var_161=4294967295, var_161_arg_0=0, var_161_arg_1=1, var_162=255, var_162_arg_0=4294967295, var_163=1, var_163_arg_0=0, var_163_arg_1=1, var_164=1, var_164_arg_0=1, var_165=1, var_165_arg_0=0, var_165_arg_1=1, var_166=1, var_166_arg_0=1, var_167=0, var_167_arg_0=0, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_169=0, var_169_arg_0=0, var_169_arg_1=0, var_170=0, var_170_arg_0=0, var_171=1, var_171_arg_0=0, var_171_arg_1=1, var_172=1, var_172_arg_0=1, var_173=1, var_173_arg_0=1, var_173_arg_1=1, var_173_arg_2=0, var_174=1, var_174_arg_0=0, var_174_arg_1=0, var_174_arg_2=1, var_175=1, var_175_arg_0=0, var_175_arg_1=0, var_175_arg_2=1, var_176=1, var_176_arg_0=0, var_176_arg_1=1, var_176_arg_2=1, var_177=1, var_177_arg_0=0, var_177_arg_1=1, var_177_arg_2=1, var_178=255, var_178_arg_0=1, var_178_arg_1=255, var_178_arg_2=1, var_179=0, var_179_arg_0=1, var_179_arg_1=0, var_179_arg_2=255, var_180=0, var_180_arg_0=1, var_180_arg_1=0, var_180_arg_2=0, var_181=255, var_181_arg_0=1, var_181_arg_1=255, var_181_arg_2=0, var_182=0, var_182_arg_0=0, var_182_arg_1=255, var_182_arg_2=255, var_184=0, var_184_arg_0=0, var_184_arg_1=0, var_185=0, var_185_arg_0=0, var_185_arg_1=0, var_186=0, var_186_arg_0=0, var_186_arg_1=0, var_187=0, var_187_arg_0=0, var_188=0, var_188_arg_0=0, var_188_arg_1=0, var_189=0, var_189_arg_0=0, var_189_arg_1=0, var_190=0, var_190_arg_0=0, var_191=1, var_191_arg_0=0, var_191_arg_1=1, var_192=4294967295, var_192_arg_0=0, var_192_arg_1=1, var_193=255, var_193_arg_0=4294967295, var_194=1, var_194_arg_0=0, var_194_arg_1=1, var_195=4294967295, var_195_arg_0=0, var_195_arg_1=1, var_196=255, var_196_arg_0=4294967295, var_197=0, var_197_arg_0=0, var_197_arg_1=0, var_198=0, var_198_arg_0=0, var_198_arg_1=0, var_199=0, var_199_arg_0=0, var_200=0, var_200_arg_0=0, var_200_arg_1=0, var_201=0, var_201_arg_0=0, var_202=0, var_202_arg_0=0, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_204=1, var_204_arg_0=0, var_204_arg_1=1, var_205=1, var_205_arg_0=1, var_206=1, var_206_arg_0=0, var_206_arg_1=1, var_207=1, var_207_arg_0=1, var_208=0, var_208_arg_0=0, var_208_arg_1=0, var_209=0, var_209_arg_0=0, var_210=0, var_210_arg_0=1, var_210_arg_1=0, var_210_arg_2=0, var_211=0, var_211_arg_0=0, var_211_arg_1=1, var_211_arg_2=0, var_212=0, var_212_arg_0=0, var_212_arg_1=1, var_212_arg_2=0, var_213=0, var_213_arg_0=0, var_213_arg_1=0, var_213_arg_2=0, var_214=0, var_214_arg_0=0, var_214_arg_1=0, var_214_arg_2=0, var_215=0, var_215_arg_0=1, var_215_arg_1=0, var_215_arg_2=0, var_216=255, var_216_arg_0=1, var_216_arg_1=255, var_216_arg_2=0, var_217=255, var_217_arg_0=1, var_217_arg_1=255, var_217_arg_2=255, var_218=0, var_218_arg_0=1, var_218_arg_1=0, var_218_arg_2=255, var_219=0, var_219_arg_0=0, var_219_arg_1=0, var_219_arg_2=0, var_221=0, var_221_arg_0=0, var_221_arg_1=0, var_222=1, var_223=4294967295, var_223_arg_0=0, var_223_arg_1=1, var_224=255, var_224_arg_0=4294967295, var_225=1, var_225_arg_0=1, var_225_arg_1=0, var_226=1, var_226_arg_0=1, var_227=1, var_227_arg_0=1, var_227_arg_1=1, var_227_arg_2=0, var_228=1, var_228_arg_0=0, var_228_arg_1=1, var_228_arg_2=1, var_229=1, var_229_arg_0=0, var_229_arg_1=1, var_229_arg_2=1, var_230=1, var_230_arg_0=0, var_230_arg_1=1, var_230_arg_2=1, var_231=1, var_231_arg_0=0, var_231_arg_1=1, var_231_arg_2=1, var_232=255, var_232_arg_0=1, var_232_arg_1=255, var_232_arg_2=1, var_233=255, var_233_arg_0=1, var_233_arg_1=255, var_233_arg_2=255, var_234=255, var_234_arg_0=1, var_234_arg_1=255, var_234_arg_2=255, var_235=255, var_235_arg_0=1, var_235_arg_1=255, var_235_arg_2=255, var_236=255, var_236_arg_0=0, var_236_arg_1=255, var_236_arg_2=255, var_238=0, var_238_arg_0=0, var_238_arg_1=0, var_239=0, var_239_arg_0=0, var_239_arg_1=0, var_240=0, var_240_arg_0=0, var_240_arg_1=0, var_241=0, var_241_arg_0=0, var_242=0, var_242_arg_0=0, var_242_arg_1=0, var_243=0, var_243_arg_0=0, var_243_arg_1=0, var_244=0, var_244_arg_0=0, var_245=0, var_245_arg_0=0, var_245_arg_1=0, var_246=0, var_246_arg_0=0, var_246_arg_1=0, var_247=0, var_247_arg_0=0, var_248=1, var_248_arg_0=0, var_248_arg_1=1, var_249=0, var_249_arg_0=0, var_249_arg_1=1, var_250=0, var_250_arg_0=0, var_251=1, var_251_arg_0=0, var_251_arg_1=1, var_252=0, var_252_arg_0=0, var_252_arg_1=1, var_253=0, var_253_arg_0=0, var_254=0, var_254_arg_0=0, var_254_arg_1=0, var_255=0, var_255_arg_0=0, var_256=0, var_256_arg_0=0, var_256_arg_1=0, var_257=0, var_257_arg_0=0, var_258=0, var_258_arg_0=0, var_258_arg_1=0, var_259=0, var_259_arg_0=0, var_260=1, var_260_arg_0=0, var_260_arg_1=1, var_261=1, var_261_arg_0=1, var_262=1, var_262_arg_0=0, var_262_arg_1=1, var_263=1, var_263_arg_0=1, var_264=1, var_264_arg_0=1, var_264_arg_1=1, var_264_arg_2=0, var_265=1, var_265_arg_0=0, var_265_arg_1=1, var_265_arg_2=1, var_266=1, var_266_arg_0=0, var_266_arg_1=0, var_266_arg_2=1, var_267=1, var_267_arg_0=0, var_267_arg_1=0, var_267_arg_2=1, var_268=1, var_268_arg_0=0, var_268_arg_1=0, var_268_arg_2=1, var_269=0, var_269_arg_0=1, var_269_arg_1=0, var_269_arg_2=1, var_270=0, var_270_arg_0=1, var_270_arg_1=0, var_270_arg_2=0, var_271=0, var_271_arg_0=1, var_271_arg_1=0, var_271_arg_2=0, var_272=0, var_272_arg_0=1, var_272_arg_1=0, var_272_arg_2=0, var_273=0, var_273_arg_0=0, var_273_arg_1=0, var_273_arg_2=0, var_277=0, var_277_arg_0=0, var_277_arg_1=1, var_279=253, var_279_arg_0=0, var_279_arg_1=253, var_281=1, var_281_arg_0=0, var_281_arg_1=0, var_282=0, var_282_arg_0=0, var_282_arg_1=1, var_283=0, var_283_arg_0=1, var_283_arg_1=0, var_284=0, var_284_arg_0=0, var_284_arg_1=255, var_285=0, var_285_arg_0=0, var_285_arg_1=0, var_286=1, var_286_arg_0=0, var_286_arg_1=0, var_287=0, var_287_arg_0=0, var_287_arg_1=1, var_288=0, var_288_arg_0=0, var_288_arg_1=252, var_289=0, var_289_arg_0=0, var_289_arg_1=0, var_290=0, var_290_arg_0=1, var_290_arg_1=0, var_291=1, var_291_arg_0=1, var_291_arg_1=0, var_292=1, var_292_arg_0=0, var_292_arg_1=0, var_293=3, var_294=0, var_294_arg_0=3, var_294_arg_1=0, var_295=0, var_295_arg_0=1, var_295_arg_1=0, var_296=0, var_296_arg_0=0, var_296_arg_1=1, var_297=1, var_297_arg_0=0, var_297_arg_1=0, var_298=1, var_298_arg_0=0, var_298_arg_1=1, var_299=0, var_299_arg_0=0, var_299_arg_1=1, var_300=1, var_300_arg_0=0, var_300_arg_1=0, var_301=1, var_301_arg_0=0, var_301_arg_1=0, var_302=1, var_302_arg_0=1, var_302_arg_1=1, var_303=0, var_303_arg_0=0, var_303_arg_1=1, var_304=0, var_304_arg_0=0, var_304_arg_1=1, var_305=0, var_306=1, var_306_arg_0=0, var_306_arg_1=0, var_307=1, var_307_arg_0=0, var_307_arg_1=1, var_308=0, var_308_arg_0=0, var_308_arg_1=1, var_309=0, var_309_arg_0=0, var_309_arg_1=0, var_310=1, var_310_arg_0=1, var_310_arg_1=0, var_311=1, var_311_arg_0=1, var_311_arg_1=1, var_312=0, var_312_arg_0=1, var_312_arg_1=0, var_313=0, var_313_arg_0=1, var_313_arg_1=0, var_314=1, var_314_arg_0=0, var_314_arg_1=0, var_315=1, var_315_arg_0=1, var_315_arg_1=1, var_316=0, var_316_arg_0=0, var_316_arg_1=1, var_317=0, var_317_arg_0=0, var_317_arg_1=1, var_318=1, var_318_arg_0=1, var_318_arg_1=0, var_319=0, var_319_arg_0=0, var_319_arg_1=1, var_320=0, var_320_arg_0=0, var_320_arg_1=1, var_321=1, var_321_arg_0=1, var_321_arg_1=0, var_322=0, var_322_arg_0=0, var_322_arg_1=1, var_323=0, var_323_arg_0=1, var_323_arg_1=0, var_324=1, var_324_arg_0=1, var_324_arg_1=0, var_325=1, var_325_arg_0=1, var_325_arg_1=1, var_326=0, var_326_arg_0=255, var_326_arg_1=0, var_327=0, var_327_arg_0=1, var_327_arg_1=0, var_328=1, var_328_arg_0=0, var_328_arg_1=0, var_329=1, var_329_arg_0=1, var_329_arg_1=1, var_330=0, var_330_arg_0=0, var_330_arg_1=1, var_331=0, var_331_arg_0=0, var_331_arg_1=1, var_332=1, var_332_arg_0=1, var_332_arg_1=0, var_333=0, var_333_arg_0=0, var_333_arg_1=1, var_334=1, var_334_arg_0=0, var_334_arg_1=0, var_335=1, var_335_arg_0=1, var_335_arg_1=1, var_336=0, var_336_arg_0=0, var_336_arg_1=1, var_337=0, var_337_arg_0=1, var_337_arg_1=0, var_338=1, var_338_arg_0=1, var_338_arg_1=0, var_339=1, var_339_arg_0=1, var_339_arg_1=1, var_340=1, var_340_arg_0=0, var_340_arg_1=0, var_341=1, var_341_arg_0=1, var_341_arg_1=1, var_342=0, var_342_arg_0=0, var_342_arg_1=1, var_343=1, var_343_arg_0=1, var_343_arg_1=0, var_344=1, var_344_arg_0=1, var_344_arg_1=1, var_345=1, var_345_arg_0=0, var_345_arg_1=0, var_346=1, var_346_arg_0=1, var_346_arg_1=1, var_347=1, var_347_arg_0=1, var_347_arg_1=1, var_348=1, var_348_arg_0=0, var_348_arg_1=0, var_349=1, var_349_arg_0=1, var_349_arg_1=1, var_350=1, var_350_arg_0=1, var_350_arg_1=1, var_351=1, var_351_arg_0=1, var_351_arg_1=1, var_352=1, var_352_arg_0=0, var_352_arg_1=1, var_353=1, var_353_arg_0=1, var_353_arg_1=1, var_354=0, var_354_arg_0=252, var_354_arg_1=0, var_355=0, var_355_arg_0=0, var_355_arg_1=0, var_356=0, var_356_arg_0=0, var_356_arg_1=1, var_357=1, var_357_arg_0=1, var_357_arg_1=0, var_358=0, var_358_arg_0=0, var_358_arg_1=1, var_359=1, var_359_arg_0=0, var_359_arg_1=0, var_360=1, var_360_arg_0=1, var_360_arg_1=1, var_361=0, var_361_arg_0=0, var_361_arg_1=1, var_362=1, var_362_arg_0=0, var_362_arg_1=0, var_363=1, var_363_arg_0=1, var_363_arg_1=1, var_364=0, var_364_arg_0=0, var_364_arg_1=1, var_365=0, var_365_arg_0=1, var_365_arg_1=0, var_366=0, var_366_arg_0=0, var_366_arg_1=0, var_367=0, var_367_arg_0=1, var_367_arg_1=0, var_368=0, var_368_arg_0=255, var_368_arg_1=0, var_369=2, var_370=1, var_370_arg_0=0, var_370_arg_1=2, var_371=1, var_371_arg_0=0, var_371_arg_1=0, var_372=1, var_372_arg_0=0, var_372_arg_1=1, var_373=0, var_373_arg_0=0, var_373_arg_1=1, var_374=0, var_374_arg_0=1, var_374_arg_1=0, var_375=1, var_375_arg_0=1, var_375_arg_1=0, var_376=0, var_376_arg_0=0, var_376_arg_1=1, var_377=0, var_377_arg_0=255, var_377_arg_1=1, var_378=1, var_378_arg_0=0, var_378_arg_1=0, var_379=1, var_379_arg_0=1, var_379_arg_1=1, var_380=0, var_380_arg_0=0, var_380_arg_1=1, var_381=0, var_381_arg_0=1, var_381_arg_1=0, var_382=0, var_382_arg_0=0, var_382_arg_1=0, var_383=0, var_383_arg_0=0, var_383_arg_1=0, var_384=1, var_384_arg_0=255, var_384_arg_1=255, var_385=1, var_385_arg_0=0, var_385_arg_1=0, var_386=1, var_386_arg_0=1, var_386_arg_1=1, var_387=1, var_387_arg_0=1, var_387_arg_1=1, var_388=0, var_388_arg_0=0, var_388_arg_1=1, var_389=1, var_389_arg_0=1, var_389_arg_1=0, var_390=0, var_390_arg_0=0, var_390_arg_1=1, var_391=0, var_391_arg_0=255, var_391_arg_1=0, var_392=1, var_392_arg_0=0, var_392_arg_1=0, var_393=1, var_393_arg_0=1, var_393_arg_1=1, var_394=0, var_394_arg_0=0, var_394_arg_1=1, var_395=0, var_395_arg_0=1, var_395_arg_1=0, var_396=1, var_396_arg_0=1, var_396_arg_1=0, var_397=0, var_397_arg_0=0, var_397_arg_1=1, var_398=0, var_398_arg_0=255, var_398_arg_1=252, var_399=1, var_399_arg_0=0, var_399_arg_1=0, var_400=1, var_400_arg_0=1, var_400_arg_1=1, var_401=0, var_401_arg_0=0, var_401_arg_1=1, var_402=0, var_402_arg_0=1, var_402_arg_1=0, var_403=1, var_403_arg_0=1, var_403_arg_1=0, var_404=0, var_404_arg_0=0, var_404_arg_1=1, var_405=1, var_405_arg_0=1, var_405_arg_1=1, var_406=0, var_406_arg_0=0, var_406_arg_1=1, var_407=1, var_407_arg_0=1, var_407_arg_1=1, var_408=0, var_408_arg_0=0, var_408_arg_1=1, var_409=1, var_409_arg_0=0, var_409_arg_1=1, var_410=0, var_410_arg_0=0, var_410_arg_1=1, var_411=1, var_411_arg_0=0, var_411_arg_1=1, var_412=0, var_412_arg_0=0, var_412_arg_1=1, var_413=1, var_413_arg_0=1, var_413_arg_1=0, var_414=0, var_414_arg_0=0, var_414_arg_1=1, var_415=254, var_415_arg_0=253, var_415_arg_1=1, var_416=254, var_416_arg_0=0, var_416_arg_1=254, var_417=12, var_417_arg_0=0, var_417_arg_1=254, var_418=1, var_418_arg_0=0, var_418_arg_1=12, var_419=1, var_419_arg_0=0, var_419_arg_1=1, var_420=1, var_420_arg_0=1, var_420_arg_1=1, var_421=1, var_421_arg_0=1, var_421_arg_1=1, var_422=1, var_422_arg_0=1, var_422_arg_1=1, var_423=1, var_423_arg_0=1, var_423_arg_1=1, var_424=1, var_424_arg_0=0, var_424_arg_1=1, var_425=1, var_425_arg_0=1, var_425_arg_1=1, var_426=1, var_426_arg_0=0, var_426_arg_1=1, var_427=1, var_427_arg_0=1, var_427_arg_1=1, var_428=1, var_428_arg_0=0, var_428_arg_1=1, var_429=1, var_429_arg_0=1, var_429_arg_1=1, var_430=0, var_430_arg_0=0, var_430_arg_1=1, var_431=1, var_431_arg_0=253, var_431_arg_1=1, var_432=0, var_432_arg_0=0, var_432_arg_1=254, var_433=1, var_433_arg_0=1, var_433_arg_1=0, var_434=0, var_434_arg_0=0, var_434_arg_1=254, var_435=1, var_435_arg_0=1, var_435_arg_1=0, var_436=0, var_436_arg_0=0, var_436_arg_1=12, var_437=1, var_437_arg_0=1, var_437_arg_1=0, var_438=0, var_438_arg_0=0, var_438_arg_1=1, var_439=1, var_439_arg_0=1, var_439_arg_1=0, var_440=1, var_440_arg_0=1, var_440_arg_1=1, var_441=1, var_441_arg_0=1, var_441_arg_1=1, var_442=1, var_442_arg_0=1, var_442_arg_1=1, var_443=1, var_443_arg_0=1, var_443_arg_1=1, var_444=1, var_444_arg_0=1, var_444_arg_1=1, var_445=1, var_445_arg_0=1, var_445_arg_1=1, var_446=1, var_446_arg_0=1, var_446_arg_1=1, var_447=1, var_447_arg_0=1, var_447_arg_1=1, var_448=0, var_448_arg_0=0, var_448_arg_1=1, var_449=1, var_449_arg_0=1, var_449_arg_1=0, var_450=1, var_450_arg_0=1, var_450_arg_1=1, var_451=1, var_451_arg_0=1, var_451_arg_1=1, var_452=0, var_452_arg_0=0, var_452_arg_1=1, var_453=1, var_453_arg_0=1, var_453_arg_1=0, var_454=1, var_454_arg_0=1, var_454_arg_1=1, var_455=1, var_455_arg_0=1, var_455_arg_1=1, var_456=0, var_456_arg_0=0, var_456_arg_1=1, var_457=1, var_457_arg_0=1, var_457_arg_1=0, var_458=1, var_458_arg_0=1, var_458_arg_1=1, var_459=1, var_459_arg_0=1, var_459_arg_1=1, var_460=0, var_460_arg_0=0, var_460_arg_1=0, var_461=0, var_461_arg_0=0, var_461_arg_1=0, var_462=0, var_462_arg_0=0, var_462_arg_1=0, var_463=0, var_463_arg_0=0, var_463_arg_1=0, var_464=0, var_464_arg_0=0, var_464_arg_1=0, var_465=0, var_465_arg_0=0, var_465_arg_1=253, var_466=253, var_466_arg_0=0, var_466_arg_1=253, var_467=0, var_467_arg_0=0, var_467_arg_1=253, var_468=0, var_468_arg_0=0, var_468_arg_1=0, var_469=0, var_469_arg_0=0, var_469_arg_1=0, var_5=0, var_58=0, var_65=0, var_65_arg_0=0, var_65_arg_1=1, var_69=255, var_70=255, var_70_arg_0=1, var_70_arg_1=255, var_70_arg_2=0, var_71=0, var_71_arg_0=1, var_71_arg_1=0, var_71_arg_2=255, var_73=1, var_76=1, var_76_arg_0=1, var_76_arg_1=0, var_77=1, var_77_arg_0=0, var_77_arg_1=255, var_77_arg_2=1, var_78=0, var_78_arg_0=1, var_78_arg_1=0, var_78_arg_2=1, var_79=1, var_79_arg_0=1, var_79_arg_1=0, var_81=2, var_84=255, var_84_arg_0=2, var_84_arg_1=0, var_85=255, var_85_arg_0=0, var_85_arg_1=255, var_85_arg_2=255, var_86=0, var_86_arg_0=1, var_86_arg_1=0, var_86_arg_2=255, var_87=2, var_87_arg_0=2, var_87_arg_1=0, var_89=3, var_92=0, var_92_arg_0=3, var_92_arg_1=0, var_93=0, var_93_arg_0=0, var_93_arg_1=255, var_93_arg_2=0, var_94=0, var_94_arg_0=1, var_94_arg_1=0, var_94_arg_2=0, var_95=3, var_95_arg_0=3, var_95_arg_1=0, var_97=4] [L158] input_67 = __VERIFIER_nondet_uchar() [L159] input_67 = input_67 & mask_SORT_1 [L160] input_68 = __VERIFIER_nondet_uchar() [L161] input_68 = input_68 & mask_SORT_1 [L162] input_74 = __VERIFIER_nondet_uchar() [L163] input_74 = input_74 & mask_SORT_1 [L164] input_75 = __VERIFIER_nondet_uchar() [L165] input_75 = input_75 & mask_SORT_1 [L166] input_82 = __VERIFIER_nondet_uchar() [L167] input_82 = input_82 & mask_SORT_1 [L168] input_83 = __VERIFIER_nondet_uchar() [L169] input_83 = input_83 & mask_SORT_1 [L170] input_90 = __VERIFIER_nondet_uchar() [L171] input_90 = input_90 & mask_SORT_1 [L172] input_91 = __VERIFIER_nondet_uchar() [L173] input_91 = input_91 & mask_SORT_1 [L174] input_98 = __VERIFIER_nondet_uchar() [L175] input_98 = input_98 & mask_SORT_1 [L176] input_99 = __VERIFIER_nondet_uchar() [L177] input_99 = input_99 & mask_SORT_1 [L178] input_134 = __VERIFIER_nondet_uchar() [L179] input_134 = input_134 & mask_SORT_1 [L180] input_135 = __VERIFIER_nondet_uchar() [L181] input_135 = input_135 & mask_SORT_1 [L182] input_136 = __VERIFIER_nondet_uchar() [L183] input_136 = input_136 & mask_SORT_1 [L184] input_137 = __VERIFIER_nondet_uchar() [L185] input_137 = input_137 & mask_SORT_1 [L186] input_138 = __VERIFIER_nondet_uchar() [L187] input_138 = input_138 & mask_SORT_1 [L188] input_276 = __VERIFIER_nondet_uchar() [L191] SORT_1 var_65_arg_0 = state_61; [L192] SORT_1 var_65_arg_1 = ~state_63; [L193] var_65_arg_1 = var_65_arg_1 & mask_SORT_1 [L194] SORT_1 var_65 = var_65_arg_0 & var_65_arg_1; [L195] var_65 = var_65 & mask_SORT_1 [L196] SORT_1 bad_66_arg_0 = var_65; [L197] CALL __VERIFIER_assert(!(bad_66_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 173.5s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 2.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 2.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 2.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 86.0s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 8 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 02:05:49,206 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a361373e956dcb1a0ba49792873eb36685a16d617d11e5cd672388145ef281c --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:05:51,798 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:05:51,801 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:05:51,864 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:05:51,864 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:05:51,869 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:05:51,871 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:05:51,875 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:05:51,881 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:05:51,889 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:05:51,890 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:05:51,891 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:05:51,892 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:05:51,895 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:05:51,897 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:05:51,898 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:05:51,900 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:05:51,901 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:05:51,903 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:05:51,912 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:05:51,915 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:05:51,917 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:05:51,919 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:05:51,920 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:05:51,927 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:05:51,930 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:05:51,931 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:05:51,932 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:05:51,933 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:05:51,934 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:05:51,935 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:05:51,936 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:05:51,937 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:05:51,938 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:05:51,939 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:05:51,940 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:05:51,940 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:05:51,941 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:05:51,941 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:05:51,943 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:05:51,944 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:05:51,944 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 02:05:51,970 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:05:51,971 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:05:51,971 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:05:51,971 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:05:51,972 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:05:51,972 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:05:51,973 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:05:51,973 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:05:51,973 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:05:51,973 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:05:51,973 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:05:51,974 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:05:51,975 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:05:51,975 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:05:51,975 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:05:51,975 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:05:51,975 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:05:51,976 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 02:05:51,976 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 02:05:51,976 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 02:05:51,976 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:05:51,976 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:05:51,977 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:05:51,977 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:05:51,977 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 02:05:51,977 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:05:51,978 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:05:51,978 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:05:51,978 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:05:51,978 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:05:51,979 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 02:05:51,979 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 02:05:51,979 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:05:51,979 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:05:51,979 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 02:05:51,980 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a361373e956dcb1a0ba49792873eb36685a16d617d11e5cd672388145ef281c [2022-11-03 02:05:52,397 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:05:52,424 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:05:52,429 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:05:52,430 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:05:52,431 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:05:52,433 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c [2022-11-03 02:05:52,508 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/2ca56979e/49ff8829eaa0471694b3fa87f8a489e0/FLAG3a912753f [2022-11-03 02:05:53,223 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:05:53,224 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c [2022-11-03 02:05:53,236 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/2ca56979e/49ff8829eaa0471694b3fa87f8a489e0/FLAG3a912753f [2022-11-03 02:05:53,422 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/data/2ca56979e/49ff8829eaa0471694b3fa87f8a489e0 [2022-11-03 02:05:53,425 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:05:53,426 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:05:53,428 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:05:53,428 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:05:53,432 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:05:53,433 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:05:53" (1/1) ... [2022-11-03 02:05:53,434 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@455deff8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:53, skipping insertion in model container [2022-11-03 02:05:53,434 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:05:53" (1/1) ... [2022-11-03 02:05:53,441 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:05:53,514 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:05:53,708 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c[1014,1027] [2022-11-03 02:05:54,090 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:05:54,094 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:05:54,107 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c[1014,1027] [2022-11-03 02:05:54,233 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:05:54,245 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:05:54,246 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54 WrapperNode [2022-11-03 02:05:54,246 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:05:54,247 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:05:54,247 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:05:54,247 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:05:54,254 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,285 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,400 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1645 [2022-11-03 02:05:54,402 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:05:54,403 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:05:54,403 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:05:54,404 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:05:54,413 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,413 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,434 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,436 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,481 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,500 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,525 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,532 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,542 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:05:54,543 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:05:54,543 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:05:54,544 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:05:54,544 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (1/1) ... [2022-11-03 02:05:54,552 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:05:54,569 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:05:54,597 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:05:54,632 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:05:54,659 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:05:54,659 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:05:55,189 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:05:55,206 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:05:57,106 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:05:57,115 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:05:57,115 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:05:57,118 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:05:57 BoogieIcfgContainer [2022-11-03 02:05:57,118 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:05:57,120 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:05:57,120 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:05:57,123 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:05:57,124 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:05:53" (1/3) ... [2022-11-03 02:05:57,124 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f93c284 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:05:57, skipping insertion in model container [2022-11-03 02:05:57,125 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:54" (2/3) ... [2022-11-03 02:05:57,125 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@f93c284 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:05:57, skipping insertion in model container [2022-11-03 02:05:57,125 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:05:57" (3/3) ... [2022-11-03 02:05:57,127 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.elevator_planning.1.prop1-func-interl.c [2022-11-03 02:05:57,146 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:05:57,146 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:05:57,198 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:05:57,205 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@191d39fa, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:05:57,205 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:05:57,210 INFO L276 IsEmpty]: Start isEmpty. Operand has 121 states, 119 states have (on average 1.495798319327731) internal successors, (178), 120 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:57,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 02:05:57,217 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:57,217 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 02:05:57,218 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:57,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:57,224 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 02:05:57,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:57,237 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [375058880] [2022-11-03 02:05:57,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:57,238 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:57,238 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:57,244 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:57,245 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 02:05:57,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:57,644 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:05:57,654 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:57,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:57,753 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:05:57,753 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:57,754 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [375058880] [2022-11-03 02:05:57,754 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [375058880] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:05:57,754 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:05:57,755 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:05:57,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735131646] [2022-11-03 02:05:57,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:05:57,762 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:05:57,762 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:57,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:05:57,800 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:05:57,803 INFO L87 Difference]: Start difference. First operand has 121 states, 119 states have (on average 1.495798319327731) internal successors, (178), 120 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:57,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:57,991 INFO L93 Difference]: Finished difference Result 350 states and 525 transitions. [2022-11-03 02:05:57,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:05:57,994 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 02:05:57,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:58,007 INFO L225 Difference]: With dead ends: 350 [2022-11-03 02:05:58,011 INFO L226 Difference]: Without dead ends: 231 [2022-11-03 02:05:58,014 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:05:58,031 INFO L413 NwaCegarLoop]: 170 mSDtfsCounter, 333 mSDsluCounter, 338 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 333 SdHoareTripleChecker+Valid, 508 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:58,032 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [333 Valid, 508 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:05:58,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2022-11-03 02:05:58,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 119. [2022-11-03 02:05:58,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 119 states, 118 states have (on average 1.4745762711864407) internal successors, (174), 118 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:58,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 174 transitions. [2022-11-03 02:05:58,101 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 174 transitions. Word has length 5 [2022-11-03 02:05:58,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:58,102 INFO L495 AbstractCegarLoop]: Abstraction has 119 states and 174 transitions. [2022-11-03 02:05:58,102 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:58,102 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 174 transitions. [2022-11-03 02:05:58,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:05:58,108 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:58,113 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:58,133 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 02:05:58,329 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:05:58,329 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:58,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:58,330 INFO L85 PathProgramCache]: Analyzing trace with hash 297480277, now seen corresponding path program 1 times [2022-11-03 02:05:58,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:05:58,334 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1319903884] [2022-11-03 02:05:58,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:58,335 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:05:58,335 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:05:58,336 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:05:58,341 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 02:05:59,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:59,142 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:05:59,155 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:05:59,612 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:59,613 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:05:59,613 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:05:59,614 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1319903884] [2022-11-03 02:05:59,614 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1319903884] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:05:59,614 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:05:59,615 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:05:59,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1855702072] [2022-11-03 02:05:59,619 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:05:59,620 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:05:59,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:05:59,623 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:05:59,623 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:05:59,624 INFO L87 Difference]: Start difference. First operand 119 states and 174 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:59,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:59,790 INFO L93 Difference]: Finished difference Result 270 states and 398 transitions. [2022-11-03 02:05:59,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:05:59,791 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:05:59,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:59,793 INFO L225 Difference]: With dead ends: 270 [2022-11-03 02:05:59,793 INFO L226 Difference]: Without dead ends: 155 [2022-11-03 02:05:59,793 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:05:59,795 INFO L413 NwaCegarLoop]: 166 mSDtfsCounter, 66 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 718 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 16 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:59,795 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 718 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 16 Unchecked, 0.1s Time] [2022-11-03 02:05:59,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-11-03 02:05:59,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 155. [2022-11-03 02:05:59,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 154 states have (on average 1.474025974025974) internal successors, (227), 154 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:59,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 227 transitions. [2022-11-03 02:05:59,804 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 227 transitions. Word has length 118 [2022-11-03 02:05:59,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:59,805 INFO L495 AbstractCegarLoop]: Abstraction has 155 states and 227 transitions. [2022-11-03 02:05:59,805 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:59,805 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 227 transitions. [2022-11-03 02:05:59,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:05:59,807 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:59,807 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:05:59,840 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 02:06:00,020 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:00,021 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:00,021 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:00,021 INFO L85 PathProgramCache]: Analyzing trace with hash 57240531, now seen corresponding path program 1 times [2022-11-03 02:06:00,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:00,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1973289628] [2022-11-03 02:06:00,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:00,024 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:00,025 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:00,026 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:00,044 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 02:06:00,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:00,883 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:00,893 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:01,097 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:01,098 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:01,098 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:01,098 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1973289628] [2022-11-03 02:06:01,098 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1973289628] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:01,099 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:01,099 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:01,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313780564] [2022-11-03 02:06:01,099 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:01,099 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:01,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:01,100 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:01,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:01,101 INFO L87 Difference]: Start difference. First operand 155 states and 227 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:01,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:01,414 INFO L93 Difference]: Finished difference Result 504 states and 743 transitions. [2022-11-03 02:06:01,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:06:01,415 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:01,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:01,417 INFO L225 Difference]: With dead ends: 504 [2022-11-03 02:06:01,417 INFO L226 Difference]: Without dead ends: 389 [2022-11-03 02:06:01,418 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:06:01,419 INFO L413 NwaCegarLoop]: 222 mSDtfsCounter, 447 mSDsluCounter, 1194 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 447 SdHoareTripleChecker+Valid, 1416 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 32 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:01,420 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [447 Valid, 1416 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 32 Unchecked, 0.3s Time] [2022-11-03 02:06:01,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2022-11-03 02:06:01,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 203. [2022-11-03 02:06:01,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 203 states, 202 states have (on average 1.4702970297029703) internal successors, (297), 202 states have internal predecessors, (297), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:01,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 297 transitions. [2022-11-03 02:06:01,432 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 297 transitions. Word has length 118 [2022-11-03 02:06:01,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:01,432 INFO L495 AbstractCegarLoop]: Abstraction has 203 states and 297 transitions. [2022-11-03 02:06:01,432 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:01,433 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 297 transitions. [2022-11-03 02:06:01,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:01,434 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:01,435 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:01,461 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 02:06:01,652 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:01,652 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:01,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:01,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1791344981, now seen corresponding path program 1 times [2022-11-03 02:06:01,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:01,655 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1873338722] [2022-11-03 02:06:01,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:01,656 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:01,656 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:01,661 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:01,671 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 02:06:02,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:02,418 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:02,426 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:02,600 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:02,601 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:02,601 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:02,601 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1873338722] [2022-11-03 02:06:02,601 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1873338722] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:02,601 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:02,601 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:02,601 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817230336] [2022-11-03 02:06:02,602 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:02,602 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:02,602 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:02,603 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:02,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:02,603 INFO L87 Difference]: Start difference. First operand 203 states and 297 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:02,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:02,875 INFO L93 Difference]: Finished difference Result 606 states and 892 transitions. [2022-11-03 02:06:02,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:06:02,876 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:02,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:02,877 INFO L225 Difference]: With dead ends: 606 [2022-11-03 02:06:02,878 INFO L226 Difference]: Without dead ends: 491 [2022-11-03 02:06:02,878 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:06:02,879 INFO L413 NwaCegarLoop]: 225 mSDtfsCounter, 437 mSDsluCounter, 1244 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 437 SdHoareTripleChecker+Valid, 1469 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 41 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:02,879 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [437 Valid, 1469 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 41 Unchecked, 0.2s Time] [2022-11-03 02:06:02,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 491 states. [2022-11-03 02:06:02,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 491 to 307. [2022-11-03 02:06:02,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 307 states, 306 states have (on average 1.4673202614379084) internal successors, (449), 306 states have internal predecessors, (449), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:02,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 449 transitions. [2022-11-03 02:06:02,890 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 449 transitions. Word has length 118 [2022-11-03 02:06:02,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:02,891 INFO L495 AbstractCegarLoop]: Abstraction has 307 states and 449 transitions. [2022-11-03 02:06:02,891 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:02,891 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 449 transitions. [2022-11-03 02:06:02,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:02,893 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:02,894 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:02,927 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 02:06:03,108 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:03,108 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:03,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:03,109 INFO L85 PathProgramCache]: Analyzing trace with hash -119697577, now seen corresponding path program 1 times [2022-11-03 02:06:03,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:03,110 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2019001633] [2022-11-03 02:06:03,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:03,111 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:03,111 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:03,112 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:03,114 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-03 02:06:03,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:03,843 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:03,851 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:04,205 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:04,205 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:04,206 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:04,207 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2019001633] [2022-11-03 02:06:04,207 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2019001633] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:04,207 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:04,207 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:04,213 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1578042702] [2022-11-03 02:06:04,214 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:04,215 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:04,215 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:04,216 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:04,216 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:04,216 INFO L87 Difference]: Start difference. First operand 307 states and 449 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:04,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:04,435 INFO L93 Difference]: Finished difference Result 580 states and 849 transitions. [2022-11-03 02:06:04,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:06:04,436 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:04,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:04,438 INFO L225 Difference]: With dead ends: 580 [2022-11-03 02:06:04,438 INFO L226 Difference]: Without dead ends: 465 [2022-11-03 02:06:04,438 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:06:04,439 INFO L413 NwaCegarLoop]: 166 mSDtfsCounter, 80 mSDsluCounter, 720 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 886 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 15 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:04,440 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [80 Valid, 886 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 15 Unchecked, 0.2s Time] [2022-11-03 02:06:04,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 465 states. [2022-11-03 02:06:04,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 465 to 465. [2022-11-03 02:06:04,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 465 states, 464 states have (on average 1.4612068965517242) internal successors, (678), 464 states have internal predecessors, (678), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:04,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 465 states to 465 states and 678 transitions. [2022-11-03 02:06:04,451 INFO L78 Accepts]: Start accepts. Automaton has 465 states and 678 transitions. Word has length 118 [2022-11-03 02:06:04,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:04,452 INFO L495 AbstractCegarLoop]: Abstraction has 465 states and 678 transitions. [2022-11-03 02:06:04,452 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:04,452 INFO L276 IsEmpty]: Start isEmpty. Operand 465 states and 678 transitions. [2022-11-03 02:06:04,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:04,454 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:04,455 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:04,484 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Ended with exit code 0 [2022-11-03 02:06:04,679 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:04,679 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:04,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:04,680 INFO L85 PathProgramCache]: Analyzing trace with hash 1566482261, now seen corresponding path program 1 times [2022-11-03 02:06:04,681 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:04,681 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1751296729] [2022-11-03 02:06:04,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:04,681 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:04,681 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:04,682 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:04,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 02:06:05,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:05,443 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:05,453 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:05,666 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:05,666 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:05,666 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:05,666 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1751296729] [2022-11-03 02:06:05,667 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1751296729] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:05,667 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:05,667 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:05,667 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112896586] [2022-11-03 02:06:05,667 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:05,668 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:05,668 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:05,668 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:05,669 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:05,669 INFO L87 Difference]: Start difference. First operand 465 states and 678 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:05,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:05,993 INFO L93 Difference]: Finished difference Result 780 states and 1141 transitions. [2022-11-03 02:06:05,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:06:05,994 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:05,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:05,997 INFO L225 Difference]: With dead ends: 780 [2022-11-03 02:06:05,997 INFO L226 Difference]: Without dead ends: 665 [2022-11-03 02:06:05,998 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:06:05,999 INFO L413 NwaCegarLoop]: 252 mSDtfsCounter, 415 mSDsluCounter, 1254 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 415 SdHoareTripleChecker+Valid, 1506 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 38 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:05,999 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [415 Valid, 1506 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 38 Unchecked, 0.3s Time] [2022-11-03 02:06:06,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 665 states. [2022-11-03 02:06:06,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 665 to 499. [2022-11-03 02:06:06,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 499 states, 498 states have (on average 1.4558232931726907) internal successors, (725), 498 states have internal predecessors, (725), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:06,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 725 transitions. [2022-11-03 02:06:06,011 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 725 transitions. Word has length 118 [2022-11-03 02:06:06,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:06,012 INFO L495 AbstractCegarLoop]: Abstraction has 499 states and 725 transitions. [2022-11-03 02:06:06,012 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:06,013 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 725 transitions. [2022-11-03 02:06:06,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:06,015 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:06,015 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:06,045 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 02:06:06,231 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:06,232 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:06,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:06,232 INFO L85 PathProgramCache]: Analyzing trace with hash -1341699625, now seen corresponding path program 1 times [2022-11-03 02:06:06,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:06,233 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [396325435] [2022-11-03 02:06:06,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:06,234 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:06,234 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:06,235 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:06,237 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 02:06:06,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:06,949 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:06,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:07,164 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:07,165 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:07,165 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:07,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [396325435] [2022-11-03 02:06:07,165 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [396325435] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:07,165 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:07,165 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:07,166 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [987469938] [2022-11-03 02:06:07,166 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:07,166 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:07,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:07,167 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:07,167 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:07,167 INFO L87 Difference]: Start difference. First operand 499 states and 725 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:07,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:07,378 INFO L93 Difference]: Finished difference Result 832 states and 1215 transitions. [2022-11-03 02:06:07,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:06:07,378 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:07,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:07,382 INFO L225 Difference]: With dead ends: 832 [2022-11-03 02:06:07,382 INFO L226 Difference]: Without dead ends: 717 [2022-11-03 02:06:07,383 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:06:07,383 INFO L413 NwaCegarLoop]: 255 mSDtfsCounter, 508 mSDsluCounter, 892 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 508 SdHoareTripleChecker+Valid, 1147 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:07,384 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [508 Valid, 1147 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 20 Unchecked, 0.2s Time] [2022-11-03 02:06:07,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 717 states. [2022-11-03 02:06:07,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 717 to 553. [2022-11-03 02:06:07,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 552 states have (on average 1.4528985507246377) internal successors, (802), 552 states have internal predecessors, (802), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:07,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 802 transitions. [2022-11-03 02:06:07,397 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 802 transitions. Word has length 118 [2022-11-03 02:06:07,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:07,398 INFO L495 AbstractCegarLoop]: Abstraction has 553 states and 802 transitions. [2022-11-03 02:06:07,398 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:07,398 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 802 transitions. [2022-11-03 02:06:07,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:07,400 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:07,401 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:07,422 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Ended with exit code 0 [2022-11-03 02:06:07,616 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:07,616 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:07,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:07,617 INFO L85 PathProgramCache]: Analyzing trace with hash -897798951, now seen corresponding path program 1 times [2022-11-03 02:06:07,618 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:07,618 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [49508249] [2022-11-03 02:06:07,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:07,619 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:07,619 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:07,620 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:07,625 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 02:06:08,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:08,315 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:08,321 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:08,752 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:08,753 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:08,753 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:08,753 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [49508249] [2022-11-03 02:06:08,764 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [49508249] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:08,764 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:08,764 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:08,764 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2026406550] [2022-11-03 02:06:08,765 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:08,765 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:08,765 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:08,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:08,766 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:08,766 INFO L87 Difference]: Start difference. First operand 553 states and 802 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:08,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:08,927 INFO L93 Difference]: Finished difference Result 1110 states and 1612 transitions. [2022-11-03 02:06:08,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:06:08,929 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:08,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:08,933 INFO L225 Difference]: With dead ends: 1110 [2022-11-03 02:06:08,933 INFO L226 Difference]: Without dead ends: 995 [2022-11-03 02:06:08,933 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:06:08,934 INFO L413 NwaCegarLoop]: 165 mSDtfsCounter, 129 mSDsluCounter, 605 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 129 SdHoareTripleChecker+Valid, 770 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 16 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:08,935 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [129 Valid, 770 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 16 Unchecked, 0.1s Time] [2022-11-03 02:06:08,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 995 states. [2022-11-03 02:06:08,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 995 to 995. [2022-11-03 02:06:08,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 995 states, 994 states have (on average 1.4496981891348089) internal successors, (1441), 994 states have internal predecessors, (1441), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:08,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 995 states to 995 states and 1441 transitions. [2022-11-03 02:06:08,955 INFO L78 Accepts]: Start accepts. Automaton has 995 states and 1441 transitions. Word has length 118 [2022-11-03 02:06:08,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:08,956 INFO L495 AbstractCegarLoop]: Abstraction has 995 states and 1441 transitions. [2022-11-03 02:06:08,956 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:08,956 INFO L276 IsEmpty]: Start isEmpty. Operand 995 states and 1441 transitions. [2022-11-03 02:06:08,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:08,959 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:08,959 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:08,993 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 02:06:09,178 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:09,179 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:09,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:09,179 INFO L85 PathProgramCache]: Analyzing trace with hash -544710569, now seen corresponding path program 1 times [2022-11-03 02:06:09,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:09,180 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [274538377] [2022-11-03 02:06:09,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:09,181 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:09,181 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:09,182 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:09,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 02:06:09,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:09,852 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:09,858 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:10,103 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:10,103 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:10,103 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:10,103 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [274538377] [2022-11-03 02:06:10,103 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [274538377] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:10,103 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:10,103 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:10,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435416725] [2022-11-03 02:06:10,104 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:10,104 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:10,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:10,104 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:10,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:10,105 INFO L87 Difference]: Start difference. First operand 995 states and 1441 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:10,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:10,344 INFO L93 Difference]: Finished difference Result 1288 states and 1871 transitions. [2022-11-03 02:06:10,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:06:10,345 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:10,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:10,349 INFO L225 Difference]: With dead ends: 1288 [2022-11-03 02:06:10,350 INFO L226 Difference]: Without dead ends: 1173 [2022-11-03 02:06:10,351 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:06:10,351 INFO L413 NwaCegarLoop]: 282 mSDtfsCounter, 461 mSDsluCounter, 896 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 461 SdHoareTripleChecker+Valid, 1178 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 25 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:10,352 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [461 Valid, 1178 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 22 Invalid, 0 Unknown, 25 Unchecked, 0.2s Time] [2022-11-03 02:06:10,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1173 states. [2022-11-03 02:06:10,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1173 to 1027. [2022-11-03 02:06:10,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1027 states, 1026 states have (on average 1.4473684210526316) internal successors, (1485), 1026 states have internal predecessors, (1485), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:10,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1027 states to 1027 states and 1485 transitions. [2022-11-03 02:06:10,375 INFO L78 Accepts]: Start accepts. Automaton has 1027 states and 1485 transitions. Word has length 118 [2022-11-03 02:06:10,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:10,375 INFO L495 AbstractCegarLoop]: Abstraction has 1027 states and 1485 transitions. [2022-11-03 02:06:10,376 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:10,376 INFO L276 IsEmpty]: Start isEmpty. Operand 1027 states and 1485 transitions. [2022-11-03 02:06:10,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:10,379 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:10,379 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:10,408 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 02:06:10,595 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:10,595 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:10,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:10,596 INFO L85 PathProgramCache]: Analyzing trace with hash -1388716071, now seen corresponding path program 1 times [2022-11-03 02:06:10,597 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:10,597 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [22875912] [2022-11-03 02:06:10,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:10,597 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:10,597 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:10,599 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:10,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-03 02:06:11,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:11,238 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:06:11,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:11,523 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:11,524 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:06:11,524 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:11,524 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [22875912] [2022-11-03 02:06:11,524 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [22875912] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:06:11,524 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:06:11,524 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:06:11,524 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [261818329] [2022-11-03 02:06:11,525 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:06:11,525 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:06:11,525 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:06:11,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:06:11,526 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:06:11,526 INFO L87 Difference]: Start difference. First operand 1027 states and 1485 transitions. Second operand has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:11,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:06:11,914 INFO L93 Difference]: Finished difference Result 1336 states and 1939 transitions. [2022-11-03 02:06:11,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:06:11,915 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:06:11,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:06:11,919 INFO L225 Difference]: With dead ends: 1336 [2022-11-03 02:06:11,919 INFO L226 Difference]: Without dead ends: 1221 [2022-11-03 02:06:11,920 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:06:11,921 INFO L413 NwaCegarLoop]: 315 mSDtfsCounter, 345 mSDsluCounter, 1417 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 345 SdHoareTripleChecker+Valid, 1732 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 42 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:06:11,922 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [345 Valid, 1732 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 42 Unchecked, 0.3s Time] [2022-11-03 02:06:11,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1221 states. [2022-11-03 02:06:11,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1221 to 1097. [2022-11-03 02:06:11,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1097 states, 1096 states have (on average 1.447080291970803) internal successors, (1586), 1096 states have internal predecessors, (1586), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:11,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1097 states to 1097 states and 1586 transitions. [2022-11-03 02:06:11,946 INFO L78 Accepts]: Start accepts. Automaton has 1097 states and 1586 transitions. Word has length 118 [2022-11-03 02:06:11,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:06:11,947 INFO L495 AbstractCegarLoop]: Abstraction has 1097 states and 1586 transitions. [2022-11-03 02:06:11,947 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.857142857142858) internal successors, (118), 7 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:06:11,947 INFO L276 IsEmpty]: Start isEmpty. Operand 1097 states and 1586 transitions. [2022-11-03 02:06:11,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:06:11,950 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:06:11,951 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:06:11,976 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-03 02:06:12,164 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:06:12,164 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:06:12,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:06:12,165 INFO L85 PathProgramCache]: Analyzing trace with hash -1975522085, now seen corresponding path program 1 times [2022-11-03 02:06:12,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:06:12,166 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [76341062] [2022-11-03 02:06:12,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:12,166 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:06:12,166 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:06:12,167 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:06:12,168 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Waiting until timeout for monitored process [2022-11-03 02:06:12,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:12,920 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:06:12,928 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:14,805 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:14,805 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:06:19,336 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:19,337 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:06:19,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [76341062] [2022-11-03 02:06:19,337 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [76341062] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:06:19,337 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [351666202] [2022-11-03 02:06:19,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:06:19,338 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:06:19,338 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:06:19,344 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:06:19,348 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (13)] Waiting until timeout for monitored process [2022-11-03 02:06:20,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:06:20,713 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:06:20,719 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:06:22,253 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:06:22,253 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:16,692 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:16,693 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [351666202] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:16,693 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1461848628] [2022-11-03 02:07:16,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:07:16,693 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:07:16,693 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:07:16,695 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:07:16,696 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-11-03 02:07:17,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:07:17,267 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 02:07:17,273 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:07:19,452 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:19,452 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:36,517 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:36,517 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1461848628] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:36,517 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:07:36,518 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 36 [2022-11-03 02:07:36,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430668120] [2022-11-03 02:07:36,518 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:07:36,519 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-11-03 02:07:36,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:07:36,520 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-11-03 02:07:36,521 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=1038, Unknown=25, NotChecked=0, Total=1260 [2022-11-03 02:07:36,521 INFO L87 Difference]: Start difference. First operand 1097 states and 1586 transitions. Second operand has 36 states, 36 states have (on average 15.944444444444445) internal successors, (574), 36 states have internal predecessors, (574), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:07:37,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:07:37,529 INFO L93 Difference]: Finished difference Result 1978 states and 2850 transitions. [2022-11-03 02:07:37,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-11-03 02:07:37,530 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 15.944444444444445) internal successors, (574), 36 states have internal predecessors, (574), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:07:37,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:07:37,536 INFO L225 Difference]: With dead ends: 1978 [2022-11-03 02:07:37,537 INFO L226 Difference]: Without dead ends: 1976 [2022-11-03 02:07:37,538 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 715 GetRequests, 665 SyntacticMatches, 5 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 608 ImplicationChecksByTransitivity, 73.7s TimeCoverageRelationStatistics Valid=427, Invalid=1710, Unknown=25, NotChecked=0, Total=2162 [2022-11-03 02:07:37,539 INFO L413 NwaCegarLoop]: 157 mSDtfsCounter, 1285 mSDsluCounter, 3384 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1285 SdHoareTripleChecker+Valid, 3541 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 38 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:07:37,539 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1285 Valid, 3541 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 38 Unchecked, 0.0s Time] [2022-11-03 02:07:37,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1976 states. [2022-11-03 02:07:37,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1976 to 1976. [2022-11-03 02:07:37,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1976 states, 1975 states have (on average 1.4420253164556962) internal successors, (2848), 1975 states have internal predecessors, (2848), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:07:37,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1976 states to 1976 states and 2848 transitions. [2022-11-03 02:07:37,575 INFO L78 Accepts]: Start accepts. Automaton has 1976 states and 2848 transitions. Word has length 118 [2022-11-03 02:07:37,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:07:37,575 INFO L495 AbstractCegarLoop]: Abstraction has 1976 states and 2848 transitions. [2022-11-03 02:07:37,576 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 15.944444444444445) internal successors, (574), 36 states have internal predecessors, (574), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:07:37,576 INFO L276 IsEmpty]: Start isEmpty. Operand 1976 states and 2848 transitions. [2022-11-03 02:07:37,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:07:37,580 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:07:37,580 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:07:37,625 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-11-03 02:07:37,809 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (13)] Forceful destruction successful, exit code 0 [2022-11-03 02:07:38,018 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (12)] Forceful destruction successful, exit code 0 [2022-11-03 02:07:38,202 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:07:38,202 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:07:38,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:07:38,203 INFO L85 PathProgramCache]: Analyzing trace with hash -99039267, now seen corresponding path program 1 times [2022-11-03 02:07:38,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:07:38,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1519096973] [2022-11-03 02:07:38,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:07:38,205 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:07:38,205 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:07:38,206 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:07:38,212 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Waiting until timeout for monitored process [2022-11-03 02:07:38,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:07:38,892 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:07:38,896 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:07:40,738 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:40,738 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:07:45,454 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:45,454 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:07:45,454 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1519096973] [2022-11-03 02:07:45,454 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1519096973] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:07:45,454 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1917529903] [2022-11-03 02:07:45,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:07:45,455 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:07:45,455 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:07:45,458 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:07:45,459 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (16)] Waiting until timeout for monitored process [2022-11-03 02:07:46,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:07:46,636 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:07:46,640 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:07:48,192 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:07:48,192 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:08:41,826 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:41,826 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1917529903] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:08:41,826 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1754499180] [2022-11-03 02:08:41,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:41,827 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:08:41,827 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:08:41,828 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:08:41,830 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-11-03 02:08:42,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:42,384 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 02:08:42,390 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:44,975 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:44,976 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:09:15,633 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:15,634 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1754499180] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:09:15,634 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:09:15,634 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 37 [2022-11-03 02:09:15,634 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774404010] [2022-11-03 02:09:15,634 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:09:15,636 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-03 02:09:15,636 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:09:15,637 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-03 02:09:15,640 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=1085, Unknown=37, NotChecked=0, Total=1332 [2022-11-03 02:09:15,641 INFO L87 Difference]: Start difference. First operand 1976 states and 2848 transitions. Second operand has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:17,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:09:17,189 INFO L93 Difference]: Finished difference Result 2671 states and 3833 transitions. [2022-11-03 02:09:17,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 02:09:17,190 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:09:17,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:09:17,201 INFO L225 Difference]: With dead ends: 2671 [2022-11-03 02:09:17,201 INFO L226 Difference]: Without dead ends: 2669 [2022-11-03 02:09:17,203 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 713 GetRequests, 665 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 614 ImplicationChecksByTransitivity, 87.2s TimeCoverageRelationStatistics Valid=399, Invalid=1634, Unknown=37, NotChecked=0, Total=2070 [2022-11-03 02:09:17,204 INFO L413 NwaCegarLoop]: 160 mSDtfsCounter, 785 mSDsluCounter, 4049 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 785 SdHoareTripleChecker+Valid, 4209 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 27 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:09:17,204 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [785 Valid, 4209 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 27 Unchecked, 0.0s Time] [2022-11-03 02:09:17,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2669 states. [2022-11-03 02:09:17,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2669 to 1976. [2022-11-03 02:09:17,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1976 states, 1975 states have (on average 1.4420253164556962) internal successors, (2848), 1975 states have internal predecessors, (2848), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:17,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1976 states to 1976 states and 2848 transitions. [2022-11-03 02:09:17,250 INFO L78 Accepts]: Start accepts. Automaton has 1976 states and 2848 transitions. Word has length 118 [2022-11-03 02:09:17,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:09:17,252 INFO L495 AbstractCegarLoop]: Abstraction has 1976 states and 2848 transitions. [2022-11-03 02:09:17,252 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:17,253 INFO L276 IsEmpty]: Start isEmpty. Operand 1976 states and 2848 transitions. [2022-11-03 02:09:17,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:09:17,258 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:09:17,258 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:09:17,273 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (16)] Forceful destruction successful, exit code 0 [2022-11-03 02:09:17,495 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (15)] Forceful destruction successful, exit code 0 [2022-11-03 02:09:17,692 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-11-03 02:09:17,867 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:09:17,867 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:09:17,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:09:17,868 INFO L85 PathProgramCache]: Analyzing trace with hash 1733168989, now seen corresponding path program 1 times [2022-11-03 02:09:17,869 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:09:17,869 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1395828627] [2022-11-03 02:09:17,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:09:17,869 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:09:17,869 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:09:17,870 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:09:17,871 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Waiting until timeout for monitored process [2022-11-03 02:09:18,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:09:18,481 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:09:18,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:09:21,429 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:21,429 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:09:26,304 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:26,304 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:09:26,305 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1395828627] [2022-11-03 02:09:26,305 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1395828627] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:09:26,305 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [486187169] [2022-11-03 02:09:26,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:09:26,305 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:09:26,306 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:09:26,307 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:09:26,312 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Waiting until timeout for monitored process [2022-11-03 02:09:27,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:09:27,644 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:09:27,648 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:09:30,310 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:30,310 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:10:20,936 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:20,936 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [486187169] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:10:20,936 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2120904371] [2022-11-03 02:10:20,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:10:20,937 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:10:20,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:10:20,944 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:10:20,949 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-11-03 02:10:21,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:10:21,541 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 02:10:21,546 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:10:25,013 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:25,013 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:10:46,997 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:46,998 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2120904371] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:10:46,998 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:10:46,998 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 37 [2022-11-03 02:10:46,998 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1924987533] [2022-11-03 02:10:46,998 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:10:46,999 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-03 02:10:46,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:10:47,000 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-03 02:10:47,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=217, Invalid=1088, Unknown=27, NotChecked=0, Total=1332 [2022-11-03 02:10:47,001 INFO L87 Difference]: Start difference. First operand 1976 states and 2848 transitions. Second operand has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:10:48,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:10:48,301 INFO L93 Difference]: Finished difference Result 3426 states and 4909 transitions. [2022-11-03 02:10:48,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 02:10:48,302 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:10:48,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:10:48,310 INFO L225 Difference]: With dead ends: 3426 [2022-11-03 02:10:48,310 INFO L226 Difference]: Without dead ends: 3424 [2022-11-03 02:10:48,311 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 714 GetRequests, 666 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 645 ImplicationChecksByTransitivity, 74.7s TimeCoverageRelationStatistics Valid=406, Invalid=1637, Unknown=27, NotChecked=0, Total=2070 [2022-11-03 02:10:48,312 INFO L413 NwaCegarLoop]: 160 mSDtfsCounter, 1399 mSDsluCounter, 3446 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1399 SdHoareTripleChecker+Valid, 3606 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 37 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:10:48,312 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1399 Valid, 3606 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 37 Unchecked, 0.0s Time] [2022-11-03 02:10:48,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3424 states. [2022-11-03 02:10:48,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3424 to 3424. [2022-11-03 02:10:48,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3424 states, 3423 states have (on average 1.4335378323108385) internal successors, (4907), 3423 states have internal predecessors, (4907), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:10:48,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3424 states to 3424 states and 4907 transitions. [2022-11-03 02:10:48,372 INFO L78 Accepts]: Start accepts. Automaton has 3424 states and 4907 transitions. Word has length 118 [2022-11-03 02:10:48,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:10:48,373 INFO L495 AbstractCegarLoop]: Abstraction has 3424 states and 4907 transitions. [2022-11-03 02:10:48,373 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:10:48,373 INFO L276 IsEmpty]: Start isEmpty. Operand 3424 states and 4907 transitions. [2022-11-03 02:10:48,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:10:48,380 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:10:48,381 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:10:48,422 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-11-03 02:10:48,616 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (18)] Forceful destruction successful, exit code 0 [2022-11-03 02:10:48,807 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (19)] Forceful destruction successful, exit code 0 [2022-11-03 02:10:49,000 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:10:49,001 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:10:49,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:10:49,001 INFO L85 PathProgramCache]: Analyzing trace with hash -685315489, now seen corresponding path program 1 times [2022-11-03 02:10:49,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:10:49,002 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [525934301] [2022-11-03 02:10:49,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:10:49,003 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:10:49,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:10:49,004 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:10:49,006 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Waiting until timeout for monitored process [2022-11-03 02:10:49,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:10:49,615 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:10:49,621 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:10:52,158 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:52,159 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:11:00,556 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:00,556 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:11:00,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [525934301] [2022-11-03 02:11:00,556 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [525934301] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:11:00,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1887123257] [2022-11-03 02:11:00,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:11:00,557 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:11:00,557 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:11:00,558 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:11:00,560 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (22)] Waiting until timeout for monitored process [2022-11-03 02:11:01,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:11:01,783 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:11:01,787 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:11:04,065 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:04,065 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:11:59,029 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:59,029 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1887123257] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:11:59,029 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [43810304] [2022-11-03 02:11:59,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:11:59,029 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:11:59,029 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:11:59,031 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:11:59,043 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-11-03 02:11:59,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:11:59,579 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-03 02:11:59,584 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:12:02,081 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:12:02,081 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:14:01,578 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:14:01,578 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [43810304] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:14:01,578 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:14:01,579 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 32 [2022-11-03 02:14:01,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776883387] [2022-11-03 02:14:01,579 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:14:01,579 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-11-03 02:14:01,580 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:14:01,580 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-11-03 02:14:01,581 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=730, Unknown=82, NotChecked=0, Total=992 [2022-11-03 02:14:01,581 INFO L87 Difference]: Start difference. First operand 3424 states and 4907 transitions. Second operand has 32 states, 32 states have (on average 14.5) internal successors, (464), 32 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:14:01,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:14:01,769 INFO L93 Difference]: Finished difference Result 4119 states and 5892 transitions. [2022-11-03 02:14:01,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:14:01,770 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 14.5) internal successors, (464), 32 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:14:01,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:14:01,780 INFO L225 Difference]: With dead ends: 4119 [2022-11-03 02:14:01,780 INFO L226 Difference]: Without dead ends: 4117 [2022-11-03 02:14:01,782 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 703 GetRequests, 668 SyntacticMatches, 4 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 178.7s TimeCoverageRelationStatistics Valid=194, Invalid=780, Unknown=82, NotChecked=0, Total=1056 [2022-11-03 02:14:01,783 INFO L413 NwaCegarLoop]: 163 mSDtfsCounter, 1068 mSDsluCounter, 3227 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1068 SdHoareTripleChecker+Valid, 3390 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 35 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:14:01,783 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1068 Valid, 3390 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 35 Unchecked, 0.0s Time] [2022-11-03 02:14:01,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4117 states. [2022-11-03 02:14:01,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4117 to 1976. [2022-11-03 02:14:01,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1976 states, 1975 states have (on average 1.4420253164556962) internal successors, (2848), 1975 states have internal predecessors, (2848), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:14:01,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1976 states to 1976 states and 2848 transitions. [2022-11-03 02:14:01,828 INFO L78 Accepts]: Start accepts. Automaton has 1976 states and 2848 transitions. Word has length 118 [2022-11-03 02:14:01,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:14:01,829 INFO L495 AbstractCegarLoop]: Abstraction has 1976 states and 2848 transitions. [2022-11-03 02:14:01,829 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 14.5) internal successors, (464), 32 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:14:01,829 INFO L276 IsEmpty]: Start isEmpty. Operand 1976 states and 2848 transitions. [2022-11-03 02:14:01,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:14:01,833 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:14:01,834 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:14:01,880 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-11-03 02:14:02,075 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (21)] Forceful destruction successful, exit code 0 [2022-11-03 02:14:02,266 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (22)] Forceful destruction successful, exit code 0 [2022-11-03 02:14:02,460 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:14:02,461 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:14:02,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:14:02,461 INFO L85 PathProgramCache]: Analyzing trace with hash 1548711645, now seen corresponding path program 1 times [2022-11-03 02:14:02,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:14:02,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1005511966] [2022-11-03 02:14:02,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:14:02,462 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:14:02,462 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:14:02,463 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:14:02,464 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Waiting until timeout for monitored process [2022-11-03 02:14:03,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:14:03,097 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:14:03,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:14:05,882 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:14:05,883 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:14:14,225 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:14:14,225 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:14:14,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1005511966] [2022-11-03 02:14:14,225 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1005511966] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:14:14,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1924512096] [2022-11-03 02:14:14,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:14:14,225 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:14:14,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:14:14,226 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:14:14,230 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (25)] Waiting until timeout for monitored process [2022-11-03 02:14:15,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:14:15,386 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:14:15,391 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:14:17,881 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:14:17,881 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:15:13,890 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:15:13,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1924512096] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:15:13,890 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1825308256] [2022-11-03 02:15:13,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:15:13,890 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:15:13,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:15:13,892 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:15:13,893 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-11-03 02:15:14,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:15:14,405 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 02:15:14,409 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:15:17,414 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:15:17,414 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:15:47,339 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:15:47,339 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1825308256] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:15:47,339 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:15:47,339 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 37 [2022-11-03 02:15:47,340 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731836726] [2022-11-03 02:15:47,340 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:15:47,341 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-03 02:15:47,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:15:47,341 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-03 02:15:47,342 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=1086, Unknown=35, NotChecked=0, Total=1332 [2022-11-03 02:15:47,342 INFO L87 Difference]: Start difference. First operand 1976 states and 2848 transitions. Second operand has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:15:48,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:15:48,736 INFO L93 Difference]: Finished difference Result 3550 states and 5095 transitions. [2022-11-03 02:15:48,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 02:15:48,737 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2022-11-03 02:15:48,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:15:48,744 INFO L225 Difference]: With dead ends: 3550 [2022-11-03 02:15:48,744 INFO L226 Difference]: Without dead ends: 3548 [2022-11-03 02:15:48,746 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 714 GetRequests, 666 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 638 ImplicationChecksByTransitivity, 92.0s TimeCoverageRelationStatistics Valid=402, Invalid=1633, Unknown=35, NotChecked=0, Total=2070 [2022-11-03 02:15:48,746 INFO L413 NwaCegarLoop]: 160 mSDtfsCounter, 999 mSDsluCounter, 3569 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 999 SdHoareTripleChecker+Valid, 3729 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 42 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:15:48,747 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [999 Valid, 3729 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 42 Unchecked, 0.0s Time] [2022-11-03 02:15:48,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3548 states. [2022-11-03 02:15:48,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3548 to 3548. [2022-11-03 02:15:48,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3548 states, 3547 states have (on average 1.435861291232027) internal successors, (5093), 3547 states have internal predecessors, (5093), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:15:48,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3548 states to 3548 states and 5093 transitions. [2022-11-03 02:15:48,808 INFO L78 Accepts]: Start accepts. Automaton has 3548 states and 5093 transitions. Word has length 118 [2022-11-03 02:15:48,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:15:48,809 INFO L495 AbstractCegarLoop]: Abstraction has 3548 states and 5093 transitions. [2022-11-03 02:15:48,810 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 15.54054054054054) internal successors, (575), 37 states have internal predecessors, (575), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:15:48,810 INFO L276 IsEmpty]: Start isEmpty. Operand 3548 states and 5093 transitions. [2022-11-03 02:15:48,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2022-11-03 02:15:48,816 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:15:48,816 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:15:48,856 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-11-03 02:15:49,049 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (24)] Forceful destruction successful, exit code 0 [2022-11-03 02:15:49,240 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (25)] Forceful destruction successful, exit code 0 [2022-11-03 02:15:49,434 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:15:49,434 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:15:49,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:15:49,434 INFO L85 PathProgramCache]: Analyzing trace with hash -869772833, now seen corresponding path program 1 times [2022-11-03 02:15:49,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:15:49,435 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2127759714] [2022-11-03 02:15:49,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:15:49,436 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:15:49,436 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:15:49,436 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:15:49,438 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_29c0c65d-67e2-46bd-8259-fc4648296393/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (27)] Waiting until timeout for monitored process [2022-11-03 02:15:50,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:15:50,049 INFO L263 TraceCheckSpWp]: Trace formula consists of 1364 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:15:50,053 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:15:52,612 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:15:52,612 INFO L328 TraceCheckSpWp]: Computing backward predicates...