./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 5e519f3a Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash dea0d0a9989b3a552213db02ac3bbd658516afb9b7556684b1452dba6e0c2bc0 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:05:09,434 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:05:09,437 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:05:09,486 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:05:09,487 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:05:09,492 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:05:09,494 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:05:09,499 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:05:09,501 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:05:09,506 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:05:09,507 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:05:09,510 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:05:09,510 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:05:09,513 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:05:09,514 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:05:09,516 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:05:09,518 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:05:09,519 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:05:09,520 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:05:09,527 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:05:09,529 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:05:09,530 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:05:09,533 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:05:09,534 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:05:09,543 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:05:09,543 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:05:09,543 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:05:09,545 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:05:09,546 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:05:09,547 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:05:09,547 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:05:09,548 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:05:09,550 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:05:09,551 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:05:09,553 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:05:09,554 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:05:09,554 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:05:09,555 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:05:09,555 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:05:09,556 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:05:09,557 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:05:09,562 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Default.epf [2022-11-03 02:05:09,603 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:05:09,603 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:05:09,604 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:05:09,604 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:05:09,605 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:05:09,605 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:05:09,606 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:05:09,606 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:05:09,606 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:05:09,606 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2022-11-03 02:05:09,608 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:05:09,608 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:05:09,608 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2022-11-03 02:05:09,608 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2022-11-03 02:05:09,609 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:05:09,609 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2022-11-03 02:05:09,609 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2022-11-03 02:05:09,609 INFO L138 SettingsManager]: * Simplification Technique=POLY_PAC [2022-11-03 02:05:09,610 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:05:09,610 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-11-03 02:05:09,611 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:05:09,611 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:05:09,611 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:05:09,611 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:05:09,612 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:05:09,612 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:05:09,612 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:05:09,612 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:05:09,613 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:05:09,613 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:05:09,613 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:05:09,614 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2022-11-03 02:05:09,614 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:05:09,614 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:05:09,614 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2022-11-03 02:05:09,614 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-11-03 02:05:09,615 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:05:09,615 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:05:09,615 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dea0d0a9989b3a552213db02ac3bbd658516afb9b7556684b1452dba6e0c2bc0 [2022-11-03 02:05:09,950 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:05:09,971 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:05:09,974 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:05:09,975 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:05:09,976 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:05:09,977 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c [2022-11-03 02:05:10,038 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/3e0000ecf/08fbd595d26d44558f710cf436cef0bd/FLAG9fe9fde4b [2022-11-03 02:05:10,601 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:05:10,602 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c [2022-11-03 02:05:10,623 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/3e0000ecf/08fbd595d26d44558f710cf436cef0bd/FLAG9fe9fde4b [2022-11-03 02:05:10,891 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/3e0000ecf/08fbd595d26d44558f710cf436cef0bd [2022-11-03 02:05:10,893 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:05:10,894 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:05:10,898 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:05:10,898 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:05:10,903 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:05:10,904 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:05:10" (1/1) ... [2022-11-03 02:05:10,905 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@60f41fd9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:10, skipping insertion in model container [2022-11-03 02:05:10,905 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:05:10" (1/1) ... [2022-11-03 02:05:10,934 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:05:11,009 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:05:11,166 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c[1014,1027] [2022-11-03 02:05:11,463 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:05:11,466 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:05:11,477 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c[1014,1027] [2022-11-03 02:05:11,715 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:05:11,728 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:05:11,728 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11 WrapperNode [2022-11-03 02:05:11,729 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:05:11,730 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:05:11,730 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:05:11,730 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:05:11,738 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:11,776 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:11,931 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1439 [2022-11-03 02:05:11,931 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:05:11,932 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:05:11,932 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:05:11,932 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:05:11,941 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:11,941 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:11,960 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:11,961 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:12,011 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:12,018 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:12,028 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:12,054 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:12,130 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:05:12,131 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:05:12,131 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:05:12,131 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:05:12,132 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (1/1) ... [2022-11-03 02:05:12,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:05:12,149 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:05:12,161 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:05:12,194 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:05:12,213 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:05:12,214 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:05:12,665 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:05:12,672 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:05:46,941 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:05:54,296 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:05:54,296 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:05:54,299 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:05:54 BoogieIcfgContainer [2022-11-03 02:05:54,299 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:05:54,301 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:05:54,301 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:05:54,304 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:05:54,305 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:05:10" (1/3) ... [2022-11-03 02:05:54,305 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a594d10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:05:54, skipping insertion in model container [2022-11-03 02:05:54,306 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:05:11" (2/3) ... [2022-11-03 02:05:54,306 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3a594d10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:05:54, skipping insertion in model container [2022-11-03 02:05:54,306 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:05:54" (3/3) ... [2022-11-03 02:05:54,308 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c [2022-11-03 02:05:54,326 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:05:54,326 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:05:54,372 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:05:54,379 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@be8cc60, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:05:54,379 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:05:54,383 INFO L276 IsEmpty]: Start isEmpty. Operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:54,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2022-11-03 02:05:54,389 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:54,390 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1] [2022-11-03 02:05:54,391 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:54,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:54,396 INFO L85 PathProgramCache]: Analyzing trace with hash 11837055, now seen corresponding path program 1 times [2022-11-03 02:05:54,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:05:54,406 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1898865426] [2022-11-03 02:05:54,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:54,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:05:54,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:05:55,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:05:55,611 INFO L136 FreeRefinementEngine]: Strategy SIFA_TAIPAN found an infeasible trace [2022-11-03 02:05:55,612 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1898865426] [2022-11-03 02:05:55,613 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1898865426] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:05:55,613 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:05:55,613 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-11-03 02:05:55,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094425460] [2022-11-03 02:05:55,617 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:05:55,621 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:05:55,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2022-11-03 02:05:55,649 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:05:55,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:05:55,653 INFO L87 Difference]: Start difference. First operand has 7 states, 5 states have (on average 1.6) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:57,868 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.15s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-11-03 02:05:57,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:05:57,955 INFO L93 Difference]: Finished difference Result 15 states and 20 transitions. [2022-11-03 02:05:57,957 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:05:57,958 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 4 [2022-11-03 02:05:57,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:05:57,967 INFO L225 Difference]: With dead ends: 15 [2022-11-03 02:05:57,967 INFO L226 Difference]: Without dead ends: 9 [2022-11-03 02:05:57,970 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:05:57,976 INFO L413 NwaCegarLoop]: 2 mSDtfsCounter, 3 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-11-03 02:05:57,978 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 6 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 1 Unknown, 0 Unchecked, 2.3s Time] [2022-11-03 02:05:57,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states. [2022-11-03 02:05:58,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2022-11-03 02:05:58,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:58,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 8 transitions. [2022-11-03 02:05:58,009 INFO L78 Accepts]: Start accepts. Automaton has 8 states and 8 transitions. Word has length 4 [2022-11-03 02:05:58,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:05:58,010 INFO L495 AbstractCegarLoop]: Abstraction has 8 states and 8 transitions. [2022-11-03 02:05:58,010 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:05:58,010 INFO L276 IsEmpty]: Start isEmpty. Operand 8 states and 8 transitions. [2022-11-03 02:05:58,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2022-11-03 02:05:58,011 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:05:58,011 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1] [2022-11-03 02:05:58,011 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-11-03 02:05:58,012 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:05:58,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:05:58,012 INFO L85 PathProgramCache]: Analyzing trace with hash 469850784, now seen corresponding path program 1 times [2022-11-03 02:05:58,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2022-11-03 02:05:58,013 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317231089] [2022-11-03 02:05:58,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:05:58,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-11-03 02:07:08,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:07:08,891 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-11-03 02:08:01,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-11-03 02:08:01,772 INFO L130 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2022-11-03 02:08:01,773 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-11-03 02:08:01,775 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2022-11-03 02:08:01,776 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-11-03 02:08:01,780 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1] [2022-11-03 02:08:01,783 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-11-03 02:08:01,908 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:08:01,908 WARN L320 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2022-11-03 02:08:01,963 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 03.11 02:08:01 BoogieIcfgContainer [2022-11-03 02:08:01,963 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-11-03 02:08:01,965 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2022-11-03 02:08:01,966 INFO L271 PluginConnector]: Initializing Witness Printer... [2022-11-03 02:08:01,966 INFO L275 PluginConnector]: Witness Printer initialized [2022-11-03 02:08:01,967 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:05:54" (3/4) ... [2022-11-03 02:08:01,970 INFO L140 WitnessPrinter]: No result that supports witness generation found [2022-11-03 02:08:01,970 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2022-11-03 02:08:01,972 INFO L158 Benchmark]: Toolchain (without parser) took 171076.78ms. Allocated memory was 109.1MB in the beginning and 3.2GB in the end (delta: 3.1GB). Free memory was 68.6MB in the beginning and 2.6GB in the end (delta: -2.5GB). Peak memory consumption was 580.8MB. Max. memory is 16.1GB. [2022-11-03 02:08:01,974 INFO L158 Benchmark]: CDTParser took 0.26ms. Allocated memory is still 109.1MB. Free memory is still 87.6MB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:08:01,978 INFO L158 Benchmark]: CACSL2BoogieTranslator took 831.56ms. Allocated memory was 109.1MB in the beginning and 136.3MB in the end (delta: 27.3MB). Free memory was 68.5MB in the beginning and 98.1MB in the end (delta: -29.6MB). Peak memory consumption was 29.6MB. Max. memory is 16.1GB. [2022-11-03 02:08:01,980 INFO L158 Benchmark]: Boogie Procedure Inliner took 201.23ms. Allocated memory is still 136.3MB. Free memory was 98.1MB in the beginning and 72.6MB in the end (delta: 25.4MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. [2022-11-03 02:08:01,980 INFO L158 Benchmark]: Boogie Preprocessor took 198.90ms. Allocated memory is still 136.3MB. Free memory was 72.6MB in the beginning and 86.3MB in the end (delta: -13.7MB). Peak memory consumption was 31.9MB. Max. memory is 16.1GB. [2022-11-03 02:08:01,981 INFO L158 Benchmark]: RCFGBuilder took 42167.77ms. Allocated memory was 136.3MB in the beginning and 1.2GB in the end (delta: 1.1GB). Free memory was 86.3MB in the beginning and 779.2MB in the end (delta: -693.0MB). Peak memory consumption was 733.1MB. Max. memory is 16.1GB. [2022-11-03 02:08:01,981 INFO L158 Benchmark]: TraceAbstraction took 127663.21ms. Allocated memory was 1.2GB in the beginning and 3.2GB in the end (delta: 2.0GB). Free memory was 778.2MB in the beginning and 2.6GB in the end (delta: -1.8GB). Peak memory consumption was 1.6GB. Max. memory is 16.1GB. [2022-11-03 02:08:01,984 INFO L158 Benchmark]: Witness Printer took 4.94ms. Allocated memory is still 3.2GB. Free memory is still 2.6GB. There was no memory consumed. Max. memory is 16.1GB. [2022-11-03 02:08:01,989 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26ms. Allocated memory is still 109.1MB. Free memory is still 87.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 831.56ms. Allocated memory was 109.1MB in the beginning and 136.3MB in the end (delta: 27.3MB). Free memory was 68.5MB in the beginning and 98.1MB in the end (delta: -29.6MB). Peak memory consumption was 29.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 201.23ms. Allocated memory is still 136.3MB. Free memory was 98.1MB in the beginning and 72.6MB in the end (delta: 25.4MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. * Boogie Preprocessor took 198.90ms. Allocated memory is still 136.3MB. Free memory was 72.6MB in the beginning and 86.3MB in the end (delta: -13.7MB). Peak memory consumption was 31.9MB. Max. memory is 16.1GB. * RCFGBuilder took 42167.77ms. Allocated memory was 136.3MB in the beginning and 1.2GB in the end (delta: 1.1GB). Free memory was 86.3MB in the beginning and 779.2MB in the end (delta: -693.0MB). Peak memory consumption was 733.1MB. Max. memory is 16.1GB. * TraceAbstraction took 127663.21ms. Allocated memory was 1.2GB in the beginning and 3.2GB in the end (delta: 2.0GB). Free memory was 778.2MB in the beginning and 2.6GB in the end (delta: -1.8GB). Peak memory consumption was 1.6GB. Max. memory is 16.1GB. * Witness Printer took 4.94ms. Allocated memory is still 3.2GB. Free memory is still 2.6GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 20]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 305, overapproximation of bitwiseAnd at line 151, overapproximation of bitwiseComplement at line 186, overapproximation of bitwiseXOr at line 195. Possible FailurePath: [L25] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L26] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L28] const SORT_2 mask_SORT_2 = (SORT_2)-1 >> (sizeof(SORT_2) * 8 - 8); [L29] const SORT_2 msb_SORT_2 = (SORT_2)1 << (8 - 1); [L31] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 24); [L32] const SORT_3 msb_SORT_3 = (SORT_3)1 << (24 - 1); [L34] const SORT_4 mask_SORT_4 = (SORT_4)-1 >> (sizeof(SORT_4) * 8 - 32); [L35] const SORT_4 msb_SORT_4 = (SORT_4)1 << (32 - 1); [L37] const SORT_2 var_5 = 0; [L38] const SORT_1 var_50 = 0; [L39] const SORT_2 var_59 = 7; [L40] const SORT_2 var_62 = 255; [L41] const SORT_2 var_68 = 2; [L42] const SORT_2 var_76 = 6; [L43] const SORT_2 var_84 = 5; [L44] const SORT_2 var_108 = 4; [L45] const SORT_2 var_110 = 3; [L46] const SORT_2 var_113 = 1; [L47] const SORT_2 var_115 = 0; [L48] const SORT_3 var_125 = 0; [L49] const SORT_4 var_187 = 1; [L50] const SORT_4 var_247 = 4; [L51] const SORT_4 var_259 = 0; [L52] const SORT_4 var_309 = 2; [L54] SORT_1 input_60; [L55] SORT_1 input_61; [L56] SORT_1 input_69; [L57] SORT_1 input_70; [L58] SORT_1 input_77; [L59] SORT_1 input_78; [L60] SORT_1 input_85; [L61] SORT_1 input_86; [L62] SORT_1 input_104; [L63] SORT_1 input_105; [L64] SORT_1 input_106; [L65] SORT_1 input_107; [L66] SORT_1 input_109; [L67] SORT_1 input_111; [L68] SORT_1 input_112; [L69] SORT_1 input_114; [L70] SORT_1 input_232; [L72] SORT_2 state_6 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L73] SORT_2 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L74] SORT_2 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L75] SORT_2 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L76] SORT_2 state_14 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L77] SORT_2 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L78] SORT_2 state_18 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L79] SORT_2 state_20 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L80] SORT_2 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L81] SORT_2 state_24 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L82] SORT_2 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L83] SORT_2 state_28 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L84] SORT_2 state_30 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L85] SORT_2 state_32 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L86] SORT_2 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L87] SORT_2 state_36 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L88] SORT_2 state_38 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L89] SORT_2 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L90] SORT_2 state_42 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L91] SORT_2 state_44 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L92] SORT_2 state_46 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L93] SORT_2 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_2; [L94] SORT_1 state_51 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] SORT_1 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] SORT_1 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] SORT_2 init_7_arg_1 = var_5; [L99] state_6 = init_7_arg_1 [L100] SORT_2 init_9_arg_1 = var_5; [L101] state_8 = init_9_arg_1 [L102] SORT_2 init_11_arg_1 = var_5; [L103] state_10 = init_11_arg_1 [L104] SORT_2 init_13_arg_1 = var_5; [L105] state_12 = init_13_arg_1 [L106] SORT_2 init_15_arg_1 = var_5; [L107] state_14 = init_15_arg_1 [L108] SORT_2 init_17_arg_1 = var_5; [L109] state_16 = init_17_arg_1 [L110] SORT_2 init_19_arg_1 = var_5; [L111] state_18 = init_19_arg_1 [L112] SORT_2 init_21_arg_1 = var_5; [L113] state_20 = init_21_arg_1 [L114] SORT_2 init_23_arg_1 = var_5; [L115] state_22 = init_23_arg_1 [L116] SORT_2 init_25_arg_1 = var_5; [L117] state_24 = init_25_arg_1 [L118] SORT_2 init_27_arg_1 = var_5; [L119] state_26 = init_27_arg_1 [L120] SORT_2 init_29_arg_1 = var_5; [L121] state_28 = init_29_arg_1 [L122] SORT_2 init_31_arg_1 = var_5; [L123] state_30 = init_31_arg_1 [L124] SORT_2 init_33_arg_1 = var_5; [L125] state_32 = init_33_arg_1 [L126] SORT_2 init_35_arg_1 = var_5; [L127] state_34 = init_35_arg_1 [L128] SORT_2 init_37_arg_1 = var_5; [L129] state_36 = init_37_arg_1 [L130] SORT_2 init_39_arg_1 = var_5; [L131] state_38 = init_39_arg_1 [L132] SORT_2 init_41_arg_1 = var_5; [L133] state_40 = init_41_arg_1 [L134] SORT_2 init_43_arg_1 = var_5; [L135] state_42 = init_43_arg_1 [L136] SORT_2 init_45_arg_1 = var_5; [L137] state_44 = init_45_arg_1 [L138] SORT_2 init_47_arg_1 = var_5; [L139] state_46 = init_47_arg_1 [L140] SORT_2 init_49_arg_1 = var_5; [L141] state_48 = init_49_arg_1 [L142] SORT_1 init_52_arg_1 = var_50; [L143] state_51 = init_52_arg_1 [L144] SORT_1 init_54_arg_1 = var_50; [L145] state_53 = init_54_arg_1 [L146] SORT_1 init_56_arg_1 = var_50; [L147] state_55 = init_56_arg_1 VAL [init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_29_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_39_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, init_45_arg_1=0, init_47_arg_1=0, init_49_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, state_10=0, state_12=0, state_14=0, state_16=0, state_18=0, state_20=0, state_22=0, state_24=0, state_26=0, state_28=0, state_30=0, state_32=0, state_34=0, state_36=0, state_38=0, state_40=0, state_42=0, state_44=0, state_46=0, state_48=0, state_51=0, state_53=0, state_55=0, state_6=0, state_8=0, var_108=4, var_110=3, var_113=1, var_115=0, var_125=0, var_187=1, var_247=4, var_259=0, var_309=2, var_5=0, var_50=0, var_59=7, var_62=255, var_68=2, var_76=6, var_84=5] [L150] input_60 = __VERIFIER_nondet_uchar() [L151] input_60 = input_60 & mask_SORT_1 [L152] input_61 = __VERIFIER_nondet_uchar() [L153] input_61 = input_61 & mask_SORT_1 [L154] input_69 = __VERIFIER_nondet_uchar() [L155] input_69 = input_69 & mask_SORT_1 [L156] input_70 = __VERIFIER_nondet_uchar() [L157] input_70 = input_70 & mask_SORT_1 [L158] input_77 = __VERIFIER_nondet_uchar() [L159] input_77 = input_77 & mask_SORT_1 [L160] input_78 = __VERIFIER_nondet_uchar() [L161] input_78 = input_78 & mask_SORT_1 [L162] input_85 = __VERIFIER_nondet_uchar() [L163] input_85 = input_85 & mask_SORT_1 [L164] input_86 = __VERIFIER_nondet_uchar() [L165] input_86 = input_86 & mask_SORT_1 [L166] input_104 = __VERIFIER_nondet_uchar() [L167] input_104 = input_104 & mask_SORT_1 [L168] input_105 = __VERIFIER_nondet_uchar() [L169] input_105 = input_105 & mask_SORT_1 [L170] input_106 = __VERIFIER_nondet_uchar() [L171] input_106 = input_106 & mask_SORT_1 [L172] input_107 = __VERIFIER_nondet_uchar() [L173] input_107 = input_107 & mask_SORT_1 [L174] input_109 = __VERIFIER_nondet_uchar() [L175] input_109 = input_109 & mask_SORT_1 [L176] input_111 = __VERIFIER_nondet_uchar() [L177] input_111 = input_111 & mask_SORT_1 [L178] input_112 = __VERIFIER_nondet_uchar() [L179] input_112 = input_112 & mask_SORT_1 [L180] input_114 = __VERIFIER_nondet_uchar() [L181] input_114 = input_114 & mask_SORT_1 [L182] input_232 = __VERIFIER_nondet_uchar() [L185] SORT_1 var_57_arg_0 = state_53; [L186] SORT_1 var_57_arg_1 = ~state_55; [L187] var_57_arg_1 = var_57_arg_1 & mask_SORT_1 [L188] SORT_1 var_57 = var_57_arg_0 & var_57_arg_1; [L189] var_57 = var_57 & mask_SORT_1 [L190] SORT_1 bad_58_arg_0 = var_57; [L191] CALL __VERIFIER_assert(!(bad_58_arg_0)) [L20] COND FALSE !(!(cond)) VAL [\old(cond)=1, cond=1] [L191] RET __VERIFIER_assert(!(bad_58_arg_0)) [L193] SORT_2 var_63_arg_0 = var_59; [L194] SORT_2 var_63_arg_1 = state_6; [L195] SORT_2 var_63 = var_63_arg_0 ^ var_63_arg_1; [L196] var_63 = var_63 & mask_SORT_2 [L197] SORT_1 var_64_arg_0 = input_61; [L198] SORT_2 var_64_arg_1 = var_62; [L199] SORT_2 var_64_arg_2 = var_63; [L200] EXPR var_64_arg_0 ? var_64_arg_1 : var_64_arg_2 [L200] SORT_2 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L201] SORT_1 var_65_arg_0 = input_60; [L202] SORT_2 var_65_arg_1 = state_38; [L203] SORT_2 var_65_arg_2 = var_64; [L204] EXPR var_65_arg_0 ? var_65_arg_1 : var_65_arg_2 [L204] SORT_2 var_65 = var_65_arg_0 ? var_65_arg_1 : var_65_arg_2; [L205] SORT_2 var_66_arg_0 = var_59; [L206] SORT_2 var_66_arg_1 = var_65; [L207] SORT_2 var_66 = var_66_arg_0 ^ var_66_arg_1; [L208] SORT_2 next_67_arg_1 = var_66; [L209] SORT_2 var_71_arg_0 = var_68; [L210] SORT_2 var_71_arg_1 = state_8; [L211] SORT_2 var_71 = var_71_arg_0 ^ var_71_arg_1; [L212] var_71 = var_71 & mask_SORT_2 [L213] SORT_1 var_72_arg_0 = input_70; [L214] SORT_2 var_72_arg_1 = var_62; [L215] SORT_2 var_72_arg_2 = var_71; [L216] EXPR var_72_arg_0 ? var_72_arg_1 : var_72_arg_2 [L216] SORT_2 var_72 = var_72_arg_0 ? var_72_arg_1 : var_72_arg_2; [L217] SORT_1 var_73_arg_0 = input_69; [L218] SORT_2 var_73_arg_1 = state_38; [L219] SORT_2 var_73_arg_2 = var_72; [L220] EXPR var_73_arg_0 ? var_73_arg_1 : var_73_arg_2 [L220] SORT_2 var_73 = var_73_arg_0 ? var_73_arg_1 : var_73_arg_2; [L221] SORT_2 var_74_arg_0 = var_68; [L222] SORT_2 var_74_arg_1 = var_73; [L223] SORT_2 var_74 = var_74_arg_0 ^ var_74_arg_1; [L224] SORT_2 next_75_arg_1 = var_74; [L225] SORT_2 var_79_arg_0 = var_76; [L226] SORT_2 var_79_arg_1 = state_10; [L227] SORT_2 var_79 = var_79_arg_0 ^ var_79_arg_1; [L228] var_79 = var_79 & mask_SORT_2 [L229] SORT_1 var_80_arg_0 = input_78; [L230] SORT_2 var_80_arg_1 = var_62; [L231] SORT_2 var_80_arg_2 = var_79; [L232] EXPR var_80_arg_0 ? var_80_arg_1 : var_80_arg_2 [L232] SORT_2 var_80 = var_80_arg_0 ? var_80_arg_1 : var_80_arg_2; [L233] SORT_1 var_81_arg_0 = input_77; [L234] SORT_2 var_81_arg_1 = state_38; [L235] SORT_2 var_81_arg_2 = var_80; [L236] EXPR var_81_arg_0 ? var_81_arg_1 : var_81_arg_2 [L236] SORT_2 var_81 = var_81_arg_0 ? var_81_arg_1 : var_81_arg_2; [L237] SORT_2 var_82_arg_0 = var_76; [L238] SORT_2 var_82_arg_1 = var_81; [L239] SORT_2 var_82 = var_82_arg_0 ^ var_82_arg_1; [L240] SORT_2 next_83_arg_1 = var_82; [L241] SORT_2 var_87_arg_0 = var_84; [L242] SORT_2 var_87_arg_1 = state_12; [L243] SORT_2 var_87 = var_87_arg_0 ^ var_87_arg_1; [L244] var_87 = var_87 & mask_SORT_2 [L245] SORT_1 var_88_arg_0 = input_86; [L246] SORT_2 var_88_arg_1 = var_62; [L247] SORT_2 var_88_arg_2 = var_87; [L248] EXPR var_88_arg_0 ? var_88_arg_1 : var_88_arg_2 [L248] SORT_2 var_88 = var_88_arg_0 ? var_88_arg_1 : var_88_arg_2; [L249] SORT_1 var_89_arg_0 = input_85; [L250] SORT_2 var_89_arg_1 = state_38; [L251] SORT_2 var_89_arg_2 = var_88; [L252] EXPR var_89_arg_0 ? var_89_arg_1 : var_89_arg_2 [L252] SORT_2 var_89 = var_89_arg_0 ? var_89_arg_1 : var_89_arg_2; [L253] SORT_2 var_90_arg_0 = var_84; [L254] SORT_2 var_90_arg_1 = var_89; [L255] SORT_2 var_90 = var_90_arg_0 ^ var_90_arg_1; [L256] SORT_2 next_91_arg_1 = var_90; [L257] SORT_2 next_92_arg_1 = state_14; [L258] SORT_2 next_93_arg_1 = state_16; [L259] SORT_2 next_94_arg_1 = state_18; [L260] SORT_2 next_95_arg_1 = state_20; [L261] SORT_2 next_96_arg_1 = state_22; [L262] SORT_2 next_97_arg_1 = state_24; [L263] SORT_2 next_98_arg_1 = state_26; [L264] SORT_2 next_99_arg_1 = state_28; [L265] SORT_2 next_100_arg_1 = state_30; [L266] SORT_2 next_101_arg_1 = state_32; [L267] SORT_2 next_102_arg_1 = state_34; [L268] SORT_2 next_103_arg_1 = state_36; [L269] SORT_1 var_116_arg_0 = input_114; [L270] SORT_2 var_116_arg_1 = var_115; [L271] SORT_2 var_116_arg_2 = state_38; [L272] EXPR var_116_arg_0 ? var_116_arg_1 : var_116_arg_2 [L272] SORT_2 var_116 = var_116_arg_0 ? var_116_arg_1 : var_116_arg_2; [L273] SORT_1 var_117_arg_0 = input_112; [L274] SORT_2 var_117_arg_1 = var_113; [L275] SORT_2 var_117_arg_2 = var_116; [L276] EXPR var_117_arg_0 ? var_117_arg_1 : var_117_arg_2 [L276] SORT_2 var_117 = var_117_arg_0 ? var_117_arg_1 : var_117_arg_2; [L277] SORT_1 var_118_arg_0 = input_111; [L278] SORT_2 var_118_arg_1 = var_68; [L279] SORT_2 var_118_arg_2 = var_117; [L280] EXPR var_118_arg_0 ? var_118_arg_1 : var_118_arg_2 [L280] SORT_2 var_118 = var_118_arg_0 ? var_118_arg_1 : var_118_arg_2; [L281] SORT_1 var_119_arg_0 = input_109; [L282] SORT_2 var_119_arg_1 = var_110; [L283] SORT_2 var_119_arg_2 = var_118; [L284] EXPR var_119_arg_0 ? var_119_arg_1 : var_119_arg_2 [L284] SORT_2 var_119 = var_119_arg_0 ? var_119_arg_1 : var_119_arg_2; [L285] SORT_1 var_120_arg_0 = input_107; [L286] SORT_2 var_120_arg_1 = var_108; [L287] SORT_2 var_120_arg_2 = var_119; [L288] EXPR var_120_arg_0 ? var_120_arg_1 : var_120_arg_2 [L288] SORT_2 var_120 = var_120_arg_0 ? var_120_arg_1 : var_120_arg_2; [L289] SORT_1 var_121_arg_0 = input_106; [L290] SORT_2 var_121_arg_1 = var_84; [L291] SORT_2 var_121_arg_2 = var_120; [L292] EXPR var_121_arg_0 ? var_121_arg_1 : var_121_arg_2 [L292] SORT_2 var_121 = var_121_arg_0 ? var_121_arg_1 : var_121_arg_2; [L293] SORT_1 var_122_arg_0 = input_105; [L294] SORT_2 var_122_arg_1 = var_76; [L295] SORT_2 var_122_arg_2 = var_121; [L296] EXPR var_122_arg_0 ? var_122_arg_1 : var_122_arg_2 [L296] SORT_2 var_122 = var_122_arg_0 ? var_122_arg_1 : var_122_arg_2; [L297] SORT_1 var_123_arg_0 = input_104; [L298] SORT_2 var_123_arg_1 = var_59; [L299] SORT_2 var_123_arg_2 = var_122; [L300] EXPR var_123_arg_0 ? var_123_arg_1 : var_123_arg_2 [L300] SORT_2 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; [L301] var_123 = var_123 & mask_SORT_2 [L302] SORT_2 next_124_arg_1 = var_123; [L303] SORT_3 var_126_arg_0 = var_125; [L304] SORT_2 var_126_arg_1 = state_40; [L305] SORT_4 var_126 = ((SORT_4)var_126_arg_0 << 8) | var_126_arg_1; [L306] SORT_3 var_127_arg_0 = var_125; [L307] SORT_2 var_127_arg_1 = state_20; [L308] SORT_4 var_127 = ((SORT_4)var_127_arg_0 << 8) | var_127_arg_1; [L309] SORT_4 var_128_arg_0 = var_126; [L310] SORT_4 var_128_arg_1 = var_127; [L311] SORT_4 var_128 = var_128_arg_0 - var_128_arg_1; [L312] SORT_4 var_129_arg_0 = var_128; [L313] SORT_2 var_129 = var_129_arg_0 >> 0; [L314] SORT_3 var_130_arg_0 = var_125; [L315] SORT_2 var_130_arg_1 = state_18; [L316] SORT_4 var_130 = ((SORT_4)var_130_arg_0 << 8) | var_130_arg_1; [L317] SORT_4 var_131_arg_0 = var_126; [L318] SORT_4 var_131_arg_1 = var_130; [L319] SORT_4 var_131 = var_131_arg_0 - var_131_arg_1; [L320] SORT_4 var_132_arg_0 = var_131; [L321] SORT_2 var_132 = var_132_arg_0 >> 0; [L322] SORT_3 var_133_arg_0 = var_125; [L323] SORT_2 var_133_arg_1 = state_16; [L324] SORT_4 var_133 = ((SORT_4)var_133_arg_0 << 8) | var_133_arg_1; [L325] SORT_4 var_134_arg_0 = var_126; [L326] SORT_4 var_134_arg_1 = var_133; [L327] SORT_4 var_134 = var_134_arg_0 - var_134_arg_1; [L328] SORT_4 var_135_arg_0 = var_134; [L329] SORT_2 var_135 = var_135_arg_0 >> 0; [L330] SORT_3 var_136_arg_0 = var_125; [L331] SORT_2 var_136_arg_1 = state_14; [L332] SORT_4 var_136 = ((SORT_4)var_136_arg_0 << 8) | var_136_arg_1; [L333] SORT_4 var_137_arg_0 = var_126; [L334] SORT_4 var_137_arg_1 = var_136; [L335] SORT_4 var_137 = var_137_arg_0 - var_137_arg_1; [L336] SORT_4 var_138_arg_0 = var_137; [L337] SORT_2 var_138 = var_138_arg_0 >> 0; [L338] SORT_4 var_139_arg_0 = var_126; [L339] SORT_4 var_139_arg_1 = var_127; [L340] SORT_4 var_139 = var_139_arg_0 + var_139_arg_1; [L341] SORT_4 var_140_arg_0 = var_139; [L342] SORT_2 var_140 = var_140_arg_0 >> 0; [L343] SORT_4 var_141_arg_0 = var_126; [L344] SORT_4 var_141_arg_1 = var_130; [L345] SORT_4 var_141 = var_141_arg_0 + var_141_arg_1; [L346] SORT_4 var_142_arg_0 = var_141; [L347] SORT_2 var_142 = var_142_arg_0 >> 0; [L348] SORT_4 var_143_arg_0 = var_126; [L349] SORT_4 var_143_arg_1 = var_133; [L350] SORT_4 var_143 = var_143_arg_0 + var_143_arg_1; [L351] SORT_4 var_144_arg_0 = var_143; [L352] SORT_2 var_144 = var_144_arg_0 >> 0; [L353] SORT_4 var_145_arg_0 = var_126; [L354] SORT_4 var_145_arg_1 = var_136; [L355] SORT_4 var_145 = var_145_arg_0 + var_145_arg_1; [L356] SORT_4 var_146_arg_0 = var_145; [L357] SORT_2 var_146 = var_146_arg_0 >> 0; [L358] SORT_1 var_147_arg_0 = input_61; [L359] SORT_2 var_147_arg_1 = var_146; [L360] SORT_2 var_147_arg_2 = state_40; [L361] EXPR var_147_arg_0 ? var_147_arg_1 : var_147_arg_2 [L361] SORT_2 var_147 = var_147_arg_0 ? var_147_arg_1 : var_147_arg_2; [L362] SORT_1 var_148_arg_0 = input_70; [L363] SORT_2 var_148_arg_1 = var_144; [L364] SORT_2 var_148_arg_2 = var_147; [L365] EXPR var_148_arg_0 ? var_148_arg_1 : var_148_arg_2 [L365] SORT_2 var_148 = var_148_arg_0 ? var_148_arg_1 : var_148_arg_2; [L366] SORT_1 var_149_arg_0 = input_78; [L367] SORT_2 var_149_arg_1 = var_142; [L368] SORT_2 var_149_arg_2 = var_148; [L369] EXPR var_149_arg_0 ? var_149_arg_1 : var_149_arg_2 [L369] SORT_2 var_149 = var_149_arg_0 ? var_149_arg_1 : var_149_arg_2; [L370] SORT_1 var_150_arg_0 = input_86; [L371] SORT_2 var_150_arg_1 = var_140; [L372] SORT_2 var_150_arg_2 = var_149; [L373] EXPR var_150_arg_0 ? var_150_arg_1 : var_150_arg_2 [L373] SORT_2 var_150 = var_150_arg_0 ? var_150_arg_1 : var_150_arg_2; [L374] SORT_1 var_151_arg_0 = input_60; [L375] SORT_2 var_151_arg_1 = var_138; [L376] SORT_2 var_151_arg_2 = var_150; [L377] EXPR var_151_arg_0 ? var_151_arg_1 : var_151_arg_2 [L377] SORT_2 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L378] SORT_1 var_152_arg_0 = input_69; [L379] SORT_2 var_152_arg_1 = var_135; [L380] SORT_2 var_152_arg_2 = var_151; [L381] EXPR var_152_arg_0 ? var_152_arg_1 : var_152_arg_2 [L381] SORT_2 var_152 = var_152_arg_0 ? var_152_arg_1 : var_152_arg_2; [L382] SORT_1 var_153_arg_0 = input_77; [L383] SORT_2 var_153_arg_1 = var_132; [L384] SORT_2 var_153_arg_2 = var_152; [L385] EXPR var_153_arg_0 ? var_153_arg_1 : var_153_arg_2 [L385] SORT_2 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L386] SORT_1 var_154_arg_0 = input_85; [L387] SORT_2 var_154_arg_1 = var_129; [L388] SORT_2 var_154_arg_2 = var_153; [L389] EXPR var_154_arg_0 ? var_154_arg_1 : var_154_arg_2 [L389] SORT_2 var_154 = var_154_arg_0 ? var_154_arg_1 : var_154_arg_2; [L390] var_154 = var_154 & mask_SORT_2 [L391] SORT_2 next_155_arg_1 = var_154; [L392] SORT_3 var_156_arg_0 = var_125; [L393] SORT_2 var_156_arg_1 = state_42; [L394] SORT_4 var_156 = ((SORT_4)var_156_arg_0 << 8) | var_156_arg_1; [L395] SORT_3 var_157_arg_0 = var_125; [L396] SORT_2 var_157_arg_1 = state_28; [L397] SORT_4 var_157 = ((SORT_4)var_157_arg_0 << 8) | var_157_arg_1; [L398] SORT_4 var_158_arg_0 = var_156; [L399] SORT_4 var_158_arg_1 = var_157; [L400] SORT_4 var_158 = var_158_arg_0 - var_158_arg_1; [L401] SORT_4 var_159_arg_0 = var_158; [L402] SORT_2 var_159 = var_159_arg_0 >> 0; [L403] SORT_3 var_160_arg_0 = var_125; [L404] SORT_2 var_160_arg_1 = state_26; [L405] SORT_4 var_160 = ((SORT_4)var_160_arg_0 << 8) | var_160_arg_1; [L406] SORT_4 var_161_arg_0 = var_156; [L407] SORT_4 var_161_arg_1 = var_160; [L408] SORT_4 var_161 = var_161_arg_0 - var_161_arg_1; [L409] SORT_4 var_162_arg_0 = var_161; [L410] SORT_2 var_162 = var_162_arg_0 >> 0; [L411] SORT_3 var_163_arg_0 = var_125; [L412] SORT_2 var_163_arg_1 = state_24; [L413] SORT_4 var_163 = ((SORT_4)var_163_arg_0 << 8) | var_163_arg_1; [L414] SORT_4 var_164_arg_0 = var_156; [L415] SORT_4 var_164_arg_1 = var_163; [L416] SORT_4 var_164 = var_164_arg_0 - var_164_arg_1; [L417] SORT_4 var_165_arg_0 = var_164; [L418] SORT_2 var_165 = var_165_arg_0 >> 0; [L419] SORT_3 var_166_arg_0 = var_125; [L420] SORT_2 var_166_arg_1 = state_22; [L421] SORT_4 var_166 = ((SORT_4)var_166_arg_0 << 8) | var_166_arg_1; [L422] SORT_4 var_167_arg_0 = var_156; [L423] SORT_4 var_167_arg_1 = var_166; [L424] SORT_4 var_167 = var_167_arg_0 - var_167_arg_1; [L425] SORT_4 var_168_arg_0 = var_167; [L426] SORT_2 var_168 = var_168_arg_0 >> 0; [L427] SORT_4 var_169_arg_0 = var_156; [L428] SORT_4 var_169_arg_1 = var_157; [L429] SORT_4 var_169 = var_169_arg_0 + var_169_arg_1; [L430] SORT_4 var_170_arg_0 = var_169; [L431] SORT_2 var_170 = var_170_arg_0 >> 0; [L432] SORT_4 var_171_arg_0 = var_156; [L433] SORT_4 var_171_arg_1 = var_160; [L434] SORT_4 var_171 = var_171_arg_0 + var_171_arg_1; [L435] SORT_4 var_172_arg_0 = var_171; [L436] SORT_2 var_172 = var_172_arg_0 >> 0; [L437] SORT_4 var_173_arg_0 = var_156; [L438] SORT_4 var_173_arg_1 = var_163; [L439] SORT_4 var_173 = var_173_arg_0 + var_173_arg_1; [L440] SORT_4 var_174_arg_0 = var_173; [L441] SORT_2 var_174 = var_174_arg_0 >> 0; [L442] SORT_4 var_175_arg_0 = var_156; [L443] SORT_4 var_175_arg_1 = var_166; [L444] SORT_4 var_175 = var_175_arg_0 + var_175_arg_1; [L445] SORT_4 var_176_arg_0 = var_175; [L446] SORT_2 var_176 = var_176_arg_0 >> 0; [L447] SORT_1 var_177_arg_0 = input_61; [L448] SORT_2 var_177_arg_1 = var_176; [L449] SORT_2 var_177_arg_2 = state_42; [L450] EXPR var_177_arg_0 ? var_177_arg_1 : var_177_arg_2 [L450] SORT_2 var_177 = var_177_arg_0 ? var_177_arg_1 : var_177_arg_2; [L451] SORT_1 var_178_arg_0 = input_70; [L452] SORT_2 var_178_arg_1 = var_174; [L453] SORT_2 var_178_arg_2 = var_177; [L454] EXPR var_178_arg_0 ? var_178_arg_1 : var_178_arg_2 [L454] SORT_2 var_178 = var_178_arg_0 ? var_178_arg_1 : var_178_arg_2; [L455] SORT_1 var_179_arg_0 = input_78; [L456] SORT_2 var_179_arg_1 = var_172; [L457] SORT_2 var_179_arg_2 = var_178; [L458] EXPR var_179_arg_0 ? var_179_arg_1 : var_179_arg_2 [L458] SORT_2 var_179 = var_179_arg_0 ? var_179_arg_1 : var_179_arg_2; [L459] SORT_1 var_180_arg_0 = input_86; [L460] SORT_2 var_180_arg_1 = var_170; [L461] SORT_2 var_180_arg_2 = var_179; [L462] EXPR var_180_arg_0 ? var_180_arg_1 : var_180_arg_2 [L462] SORT_2 var_180 = var_180_arg_0 ? var_180_arg_1 : var_180_arg_2; [L463] SORT_1 var_181_arg_0 = input_60; [L464] SORT_2 var_181_arg_1 = var_168; [L465] SORT_2 var_181_arg_2 = var_180; [L466] EXPR var_181_arg_0 ? var_181_arg_1 : var_181_arg_2 [L466] SORT_2 var_181 = var_181_arg_0 ? var_181_arg_1 : var_181_arg_2; [L467] SORT_1 var_182_arg_0 = input_69; [L468] SORT_2 var_182_arg_1 = var_165; [L469] SORT_2 var_182_arg_2 = var_181; [L470] EXPR var_182_arg_0 ? var_182_arg_1 : var_182_arg_2 [L470] SORT_2 var_182 = var_182_arg_0 ? var_182_arg_1 : var_182_arg_2; [L471] SORT_1 var_183_arg_0 = input_77; [L472] SORT_2 var_183_arg_1 = var_162; [L473] SORT_2 var_183_arg_2 = var_182; [L474] EXPR var_183_arg_0 ? var_183_arg_1 : var_183_arg_2 [L474] SORT_2 var_183 = var_183_arg_0 ? var_183_arg_1 : var_183_arg_2; [L475] SORT_1 var_184_arg_0 = input_85; [L476] SORT_2 var_184_arg_1 = var_159; [L477] SORT_2 var_184_arg_2 = var_183; [L478] EXPR var_184_arg_0 ? var_184_arg_1 : var_184_arg_2 [L478] SORT_2 var_184 = var_184_arg_0 ? var_184_arg_1 : var_184_arg_2; [L479] var_184 = var_184 & mask_SORT_2 [L480] SORT_2 next_185_arg_1 = var_184; [L481] SORT_3 var_186_arg_0 = var_125; [L482] SORT_2 var_186_arg_1 = state_44; [L483] SORT_4 var_186 = ((SORT_4)var_186_arg_0 << 8) | var_186_arg_1; [L484] var_186 = var_186 & mask_SORT_4 [L485] SORT_4 var_188_arg_0 = var_186; [L486] SORT_4 var_188_arg_1 = var_187; [L487] SORT_4 var_188 = var_188_arg_0 - var_188_arg_1; [L488] SORT_4 var_189_arg_0 = var_188; [L489] SORT_2 var_189 = var_189_arg_0 >> 0; [L490] SORT_4 var_190_arg_0 = var_187; [L491] SORT_4 var_190_arg_1 = var_186; [L492] SORT_4 var_190 = var_190_arg_0 + var_190_arg_1; [L493] SORT_4 var_191_arg_0 = var_190; [L494] SORT_2 var_191 = var_191_arg_0 >> 0; [L495] SORT_1 var_192_arg_0 = input_61; [L496] SORT_2 var_192_arg_1 = var_191; [L497] SORT_2 var_192_arg_2 = state_44; [L498] EXPR var_192_arg_0 ? var_192_arg_1 : var_192_arg_2 [L498] SORT_2 var_192 = var_192_arg_0 ? var_192_arg_1 : var_192_arg_2; [L499] SORT_1 var_193_arg_0 = input_70; [L500] SORT_2 var_193_arg_1 = var_191; [L501] SORT_2 var_193_arg_2 = var_192; [L502] EXPR var_193_arg_0 ? var_193_arg_1 : var_193_arg_2 [L502] SORT_2 var_193 = var_193_arg_0 ? var_193_arg_1 : var_193_arg_2; [L503] SORT_1 var_194_arg_0 = input_78; [L504] SORT_2 var_194_arg_1 = var_191; [L505] SORT_2 var_194_arg_2 = var_193; [L506] EXPR var_194_arg_0 ? var_194_arg_1 : var_194_arg_2 [L506] SORT_2 var_194 = var_194_arg_0 ? var_194_arg_1 : var_194_arg_2; [L507] SORT_1 var_195_arg_0 = input_86; [L508] SORT_2 var_195_arg_1 = var_191; [L509] SORT_2 var_195_arg_2 = var_194; [L510] EXPR var_195_arg_0 ? var_195_arg_1 : var_195_arg_2 [L510] SORT_2 var_195 = var_195_arg_0 ? var_195_arg_1 : var_195_arg_2; [L511] SORT_1 var_196_arg_0 = input_60; [L512] SORT_2 var_196_arg_1 = var_189; [L513] SORT_2 var_196_arg_2 = var_195; [L514] EXPR var_196_arg_0 ? var_196_arg_1 : var_196_arg_2 [L514] SORT_2 var_196 = var_196_arg_0 ? var_196_arg_1 : var_196_arg_2; [L515] SORT_1 var_197_arg_0 = input_69; [L516] SORT_2 var_197_arg_1 = var_189; [L517] SORT_2 var_197_arg_2 = var_196; [L518] EXPR var_197_arg_0 ? var_197_arg_1 : var_197_arg_2 [L518] SORT_2 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L519] SORT_1 var_198_arg_0 = input_77; [L520] SORT_2 var_198_arg_1 = var_189; [L521] SORT_2 var_198_arg_2 = var_197; [L522] EXPR var_198_arg_0 ? var_198_arg_1 : var_198_arg_2 [L522] SORT_2 var_198 = var_198_arg_0 ? var_198_arg_1 : var_198_arg_2; [L523] SORT_1 var_199_arg_0 = input_85; [L524] SORT_2 var_199_arg_1 = var_189; [L525] SORT_2 var_199_arg_2 = var_198; [L526] EXPR var_199_arg_0 ? var_199_arg_1 : var_199_arg_2 [L526] SORT_2 var_199 = var_199_arg_0 ? var_199_arg_1 : var_199_arg_2; [L527] var_199 = var_199 & mask_SORT_2 [L528] SORT_2 next_200_arg_1 = var_199; [L529] SORT_3 var_201_arg_0 = var_125; [L530] SORT_2 var_201_arg_1 = state_46; [L531] SORT_4 var_201 = ((SORT_4)var_201_arg_0 << 8) | var_201_arg_1; [L532] SORT_3 var_202_arg_0 = var_125; [L533] SORT_2 var_202_arg_1 = state_36; [L534] SORT_4 var_202 = ((SORT_4)var_202_arg_0 << 8) | var_202_arg_1; [L535] SORT_4 var_203_arg_0 = var_201; [L536] SORT_4 var_203_arg_1 = var_202; [L537] SORT_4 var_203 = var_203_arg_0 - var_203_arg_1; [L538] var_203 = var_203 & mask_SORT_4 [L539] SORT_4 var_204_arg_0 = var_203; [L540] SORT_2 var_204 = var_204_arg_0 >> 0; [L541] SORT_3 var_205_arg_0 = var_125; [L542] SORT_2 var_205_arg_1 = state_34; [L543] SORT_4 var_205 = ((SORT_4)var_205_arg_0 << 8) | var_205_arg_1; [L544] SORT_4 var_206_arg_0 = var_201; [L545] SORT_4 var_206_arg_1 = var_205; [L546] SORT_4 var_206 = var_206_arg_0 - var_206_arg_1; [L547] var_206 = var_206 & mask_SORT_4 [L548] SORT_4 var_207_arg_0 = var_206; [L549] SORT_2 var_207 = var_207_arg_0 >> 0; [L550] SORT_3 var_208_arg_0 = var_125; [L551] SORT_2 var_208_arg_1 = state_32; [L552] SORT_4 var_208 = ((SORT_4)var_208_arg_0 << 8) | var_208_arg_1; [L553] SORT_4 var_209_arg_0 = var_201; [L554] SORT_4 var_209_arg_1 = var_208; [L555] SORT_4 var_209 = var_209_arg_0 - var_209_arg_1; [L556] var_209 = var_209 & mask_SORT_4 [L557] SORT_4 var_210_arg_0 = var_209; [L558] SORT_2 var_210 = var_210_arg_0 >> 0; [L559] SORT_3 var_211_arg_0 = var_125; [L560] SORT_2 var_211_arg_1 = state_30; [L561] SORT_4 var_211 = ((SORT_4)var_211_arg_0 << 8) | var_211_arg_1; [L562] SORT_4 var_212_arg_0 = var_201; [L563] SORT_4 var_212_arg_1 = var_211; [L564] SORT_4 var_212 = var_212_arg_0 - var_212_arg_1; [L565] var_212 = var_212 & mask_SORT_4 [L566] SORT_4 var_213_arg_0 = var_212; [L567] SORT_2 var_213 = var_213_arg_0 >> 0; [L568] SORT_4 var_214_arg_0 = var_201; [L569] SORT_4 var_214_arg_1 = var_202; [L570] SORT_4 var_214 = var_214_arg_0 + var_214_arg_1; [L571] SORT_4 var_215_arg_0 = var_214; [L572] SORT_2 var_215 = var_215_arg_0 >> 0; [L573] SORT_4 var_216_arg_0 = var_201; [L574] SORT_4 var_216_arg_1 = var_205; [L575] SORT_4 var_216 = var_216_arg_0 + var_216_arg_1; [L576] SORT_4 var_217_arg_0 = var_216; [L577] SORT_2 var_217 = var_217_arg_0 >> 0; [L578] SORT_4 var_218_arg_0 = var_201; [L579] SORT_4 var_218_arg_1 = var_208; [L580] SORT_4 var_218 = var_218_arg_0 + var_218_arg_1; [L581] SORT_4 var_219_arg_0 = var_218; [L582] SORT_2 var_219 = var_219_arg_0 >> 0; [L583] SORT_4 var_220_arg_0 = var_201; [L584] SORT_4 var_220_arg_1 = var_211; [L585] SORT_4 var_220 = var_220_arg_0 + var_220_arg_1; [L586] SORT_4 var_221_arg_0 = var_220; [L587] SORT_2 var_221 = var_221_arg_0 >> 0; [L588] SORT_1 var_222_arg_0 = input_61; [L589] SORT_2 var_222_arg_1 = var_221; [L590] SORT_2 var_222_arg_2 = state_46; [L591] EXPR var_222_arg_0 ? var_222_arg_1 : var_222_arg_2 [L591] SORT_2 var_222 = var_222_arg_0 ? var_222_arg_1 : var_222_arg_2; [L592] SORT_1 var_223_arg_0 = input_70; [L593] SORT_2 var_223_arg_1 = var_219; [L594] SORT_2 var_223_arg_2 = var_222; [L595] EXPR var_223_arg_0 ? var_223_arg_1 : var_223_arg_2 [L595] SORT_2 var_223 = var_223_arg_0 ? var_223_arg_1 : var_223_arg_2; [L596] SORT_1 var_224_arg_0 = input_78; [L597] SORT_2 var_224_arg_1 = var_217; [L598] SORT_2 var_224_arg_2 = var_223; [L599] EXPR var_224_arg_0 ? var_224_arg_1 : var_224_arg_2 [L599] SORT_2 var_224 = var_224_arg_0 ? var_224_arg_1 : var_224_arg_2; [L600] SORT_1 var_225_arg_0 = input_86; [L601] SORT_2 var_225_arg_1 = var_215; [L602] SORT_2 var_225_arg_2 = var_224; [L603] EXPR var_225_arg_0 ? var_225_arg_1 : var_225_arg_2 [L603] SORT_2 var_225 = var_225_arg_0 ? var_225_arg_1 : var_225_arg_2; [L604] SORT_1 var_226_arg_0 = input_60; [L605] SORT_2 var_226_arg_1 = var_213; [L606] SORT_2 var_226_arg_2 = var_225; [L607] EXPR var_226_arg_0 ? var_226_arg_1 : var_226_arg_2 [L607] SORT_2 var_226 = var_226_arg_0 ? var_226_arg_1 : var_226_arg_2; [L608] SORT_1 var_227_arg_0 = input_69; [L609] SORT_2 var_227_arg_1 = var_210; [L610] SORT_2 var_227_arg_2 = var_226; [L611] EXPR var_227_arg_0 ? var_227_arg_1 : var_227_arg_2 [L611] SORT_2 var_227 = var_227_arg_0 ? var_227_arg_1 : var_227_arg_2; [L612] SORT_1 var_228_arg_0 = input_77; [L613] SORT_2 var_228_arg_1 = var_207; [L614] SORT_2 var_228_arg_2 = var_227; [L615] EXPR var_228_arg_0 ? var_228_arg_1 : var_228_arg_2 [L615] SORT_2 var_228 = var_228_arg_0 ? var_228_arg_1 : var_228_arg_2; [L616] SORT_1 var_229_arg_0 = input_85; [L617] SORT_2 var_229_arg_1 = var_204; [L618] SORT_2 var_229_arg_2 = var_228; [L619] EXPR var_229_arg_0 ? var_229_arg_1 : var_229_arg_2 [L619] SORT_2 var_229 = var_229_arg_0 ? var_229_arg_1 : var_229_arg_2; [L620] var_229 = var_229 & mask_SORT_2 [L621] SORT_2 next_230_arg_1 = var_229; [L622] SORT_2 next_231_arg_1 = state_48; [L623] SORT_1 var_233_arg_0 = ~state_51; [L624] var_233_arg_0 = var_233_arg_0 & mask_SORT_1 [L625] SORT_1 var_233_arg_1 = ~input_232; [L626] var_233_arg_1 = var_233_arg_1 & mask_SORT_1 [L627] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L628] SORT_1 next_234_arg_1 = ~var_233; [L629] next_234_arg_1 = next_234_arg_1 & mask_SORT_1 [L630] SORT_1 var_235_arg_0 = state_53; [L631] SORT_1 var_235_arg_1 = input_232; [L632] SORT_1 var_235 = var_235_arg_0 | var_235_arg_1; [L633] SORT_1 next_236_arg_1 = var_235; [L634] SORT_2 var_237_arg_0 = var_115; [L635] SORT_2 var_237_arg_1 = var_63; [L636] SORT_1 var_237 = var_237_arg_0 == var_237_arg_1; [L637] SORT_2 var_238_arg_0 = var_115; [L638] SORT_2 var_238_arg_1 = var_71; [L639] SORT_1 var_238 = var_238_arg_0 == var_238_arg_1; [L640] SORT_1 var_239_arg_0 = var_237; [L641] SORT_1 var_239_arg_1 = var_238; [L642] SORT_1 var_239 = var_239_arg_0 & var_239_arg_1; [L643] SORT_2 var_240_arg_0 = var_115; [L644] SORT_2 var_240_arg_1 = var_79; [L645] SORT_1 var_240 = var_240_arg_0 == var_240_arg_1; [L646] SORT_1 var_241_arg_0 = var_239; [L647] SORT_1 var_241_arg_1 = var_240; [L648] SORT_1 var_241 = var_241_arg_0 & var_241_arg_1; [L649] SORT_2 var_242_arg_0 = var_115; [L650] SORT_2 var_242_arg_1 = var_87; [L651] SORT_1 var_242 = var_242_arg_0 == var_242_arg_1; [L652] SORT_1 var_243_arg_0 = var_241; [L653] SORT_1 var_243_arg_1 = var_242; [L654] SORT_1 var_243 = var_243_arg_0 & var_243_arg_1; [L655] SORT_1 var_244_arg_0 = ~state_51; [L656] var_244_arg_0 = var_244_arg_0 & mask_SORT_1 [L657] SORT_1 var_244_arg_1 = var_243; [L658] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L659] SORT_1 var_245_arg_0 = ~input_232; [L660] var_245_arg_0 = var_245_arg_0 & mask_SORT_1 [L661] SORT_1 var_245_arg_1 = var_244; [L662] SORT_1 var_245 = var_245_arg_0 | var_245_arg_1; [L663] SORT_2 var_246_arg_0 = var_63; [L664] SORT_2 var_246_arg_1 = state_38; [L665] SORT_1 var_246 = var_246_arg_0 == var_246_arg_1; [L666] SORT_4 var_248_arg_0 = var_247; [L667] SORT_4 var_248_arg_1 = var_186; [L668] SORT_1 var_248 = var_248_arg_0 <= var_248_arg_1; [L669] SORT_1 var_249_arg_0 = var_246; [L670] SORT_1 var_249_arg_1 = ~var_248; [L671] var_249_arg_1 = var_249_arg_1 & mask_SORT_1 [L672] SORT_1 var_249 = var_249_arg_0 & var_249_arg_1; [L673] SORT_2 var_250_arg_0 = var_115; [L674] SORT_2 var_250_arg_1 = state_14; [L675] SORT_1 var_250 = var_250_arg_0 == var_250_arg_1; [L676] SORT_2 var_251_arg_0 = var_115; [L677] SORT_2 var_251_arg_1 = state_42; [L678] SORT_1 var_251 = var_251_arg_0 == var_251_arg_1; [L679] SORT_1 var_252_arg_0 = var_250; [L680] SORT_1 var_252_arg_1 = var_251; [L681] SORT_1 var_252 = var_252_arg_0 | var_252_arg_1; [L682] SORT_1 var_253_arg_0 = var_249; [L683] SORT_1 var_253_arg_1 = var_252; [L684] SORT_1 var_253 = var_253_arg_0 & var_253_arg_1; [L685] SORT_2 var_254_arg_0 = var_115; [L686] SORT_2 var_254_arg_1 = state_22; [L687] SORT_1 var_254 = var_254_arg_0 == var_254_arg_1; [L688] SORT_2 var_255_arg_0 = var_115; [L689] SORT_2 var_255_arg_1 = state_40; [L690] SORT_1 var_255 = var_255_arg_0 == var_255_arg_1; [L691] SORT_1 var_256_arg_0 = var_254; [L692] SORT_1 var_256_arg_1 = var_255; [L693] SORT_1 var_256 = var_256_arg_0 | var_256_arg_1; [L694] SORT_1 var_257_arg_0 = var_253; [L695] SORT_1 var_257_arg_1 = var_256; [L696] SORT_1 var_257 = var_257_arg_0 & var_257_arg_1; [L697] SORT_2 var_258_arg_0 = var_115; [L698] SORT_2 var_258_arg_1 = state_30; [L699] SORT_1 var_258 = var_258_arg_0 == var_258_arg_1; [L700] SORT_4 var_260_arg_0 = var_186; [L701] SORT_4 var_260_arg_1 = var_259; [L702] SORT_1 var_260 = var_260_arg_0 <= var_260_arg_1; [L703] SORT_1 var_261_arg_0 = var_258; [L704] SORT_1 var_261_arg_1 = ~var_260; [L705] var_261_arg_1 = var_261_arg_1 & mask_SORT_1 [L706] SORT_1 var_261 = var_261_arg_0 | var_261_arg_1; [L707] SORT_1 var_262_arg_0 = var_257; [L708] SORT_1 var_262_arg_1 = var_261; [L709] SORT_1 var_262 = var_262_arg_0 & var_262_arg_1; [L710] SORT_1 var_263_arg_0 = ~state_51; [L711] var_263_arg_0 = var_263_arg_0 & mask_SORT_1 [L712] SORT_1 var_263_arg_1 = var_262; [L713] SORT_1 var_263 = var_263_arg_0 & var_263_arg_1; [L714] SORT_1 var_264_arg_0 = ~input_61; [L715] var_264_arg_0 = var_264_arg_0 & mask_SORT_1 [L716] SORT_1 var_264_arg_1 = var_263; [L717] SORT_1 var_264 = var_264_arg_0 | var_264_arg_1; [L718] SORT_1 var_265_arg_0 = var_245; [L719] SORT_1 var_265_arg_1 = var_264; [L720] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L721] SORT_2 var_266_arg_0 = var_71; [L722] SORT_2 var_266_arg_1 = state_38; [L723] SORT_1 var_266 = var_266_arg_0 == var_266_arg_1; [L724] SORT_1 var_267_arg_0 = ~var_248; [L725] var_267_arg_0 = var_267_arg_0 & mask_SORT_1 [L726] SORT_1 var_267_arg_1 = var_266; [L727] SORT_1 var_267 = var_267_arg_0 & var_267_arg_1; [L728] SORT_2 var_268_arg_0 = var_115; [L729] SORT_2 var_268_arg_1 = state_16; [L730] SORT_1 var_268 = var_268_arg_0 == var_268_arg_1; [L731] SORT_1 var_269_arg_0 = var_251; [L732] SORT_1 var_269_arg_1 = var_268; [L733] SORT_1 var_269 = var_269_arg_0 | var_269_arg_1; [L734] SORT_1 var_270_arg_0 = var_267; [L735] SORT_1 var_270_arg_1 = var_269; [L736] SORT_1 var_270 = var_270_arg_0 & var_270_arg_1; [L737] SORT_2 var_271_arg_0 = var_115; [L738] SORT_2 var_271_arg_1 = state_24; [L739] SORT_1 var_271 = var_271_arg_0 == var_271_arg_1; [L740] SORT_1 var_272_arg_0 = var_255; [L741] SORT_1 var_272_arg_1 = var_271; [L742] SORT_1 var_272 = var_272_arg_0 | var_272_arg_1; [L743] SORT_1 var_273_arg_0 = var_270; [L744] SORT_1 var_273_arg_1 = var_272; [L745] SORT_1 var_273 = var_273_arg_0 & var_273_arg_1; [L746] SORT_2 var_274_arg_0 = var_115; [L747] SORT_2 var_274_arg_1 = state_32; [L748] SORT_1 var_274 = var_274_arg_0 == var_274_arg_1; [L749] SORT_1 var_275_arg_0 = ~var_260; [L750] var_275_arg_0 = var_275_arg_0 & mask_SORT_1 [L751] SORT_1 var_275_arg_1 = var_274; [L752] SORT_1 var_275 = var_275_arg_0 | var_275_arg_1; [L753] SORT_1 var_276_arg_0 = var_273; [L754] SORT_1 var_276_arg_1 = var_275; [L755] SORT_1 var_276 = var_276_arg_0 & var_276_arg_1; [L756] SORT_1 var_277_arg_0 = ~state_51; [L757] var_277_arg_0 = var_277_arg_0 & mask_SORT_1 [L758] SORT_1 var_277_arg_1 = var_276; [L759] SORT_1 var_277 = var_277_arg_0 & var_277_arg_1; [L760] SORT_1 var_278_arg_0 = ~input_70; [L761] var_278_arg_0 = var_278_arg_0 & mask_SORT_1 [L762] SORT_1 var_278_arg_1 = var_277; [L763] SORT_1 var_278 = var_278_arg_0 | var_278_arg_1; [L764] SORT_1 var_279_arg_0 = var_265; [L765] SORT_1 var_279_arg_1 = var_278; [L766] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L767] SORT_2 var_280_arg_0 = var_79; [L768] SORT_2 var_280_arg_1 = state_38; [L769] SORT_1 var_280 = var_280_arg_0 == var_280_arg_1; [L770] SORT_1 var_281_arg_0 = ~var_248; [L771] var_281_arg_0 = var_281_arg_0 & mask_SORT_1 [L772] SORT_1 var_281_arg_1 = var_280; [L773] SORT_1 var_281 = var_281_arg_0 & var_281_arg_1; [L774] SORT_2 var_282_arg_0 = var_115; [L775] SORT_2 var_282_arg_1 = state_18; [L776] SORT_1 var_282 = var_282_arg_0 == var_282_arg_1; [L777] SORT_1 var_283_arg_0 = var_251; [L778] SORT_1 var_283_arg_1 = var_282; [L779] SORT_1 var_283 = var_283_arg_0 | var_283_arg_1; [L780] SORT_1 var_284_arg_0 = var_281; [L781] SORT_1 var_284_arg_1 = var_283; [L782] SORT_1 var_284 = var_284_arg_0 & var_284_arg_1; [L783] SORT_2 var_285_arg_0 = var_115; [L784] SORT_2 var_285_arg_1 = state_26; [L785] SORT_1 var_285 = var_285_arg_0 == var_285_arg_1; [L786] SORT_1 var_286_arg_0 = var_255; [L787] SORT_1 var_286_arg_1 = var_285; [L788] SORT_1 var_286 = var_286_arg_0 | var_286_arg_1; [L789] SORT_1 var_287_arg_0 = var_284; [L790] SORT_1 var_287_arg_1 = var_286; [L791] SORT_1 var_287 = var_287_arg_0 & var_287_arg_1; [L792] SORT_2 var_288_arg_0 = var_115; [L793] SORT_2 var_288_arg_1 = state_34; [L794] SORT_1 var_288 = var_288_arg_0 == var_288_arg_1; [L795] SORT_1 var_289_arg_0 = ~var_260; [L796] var_289_arg_0 = var_289_arg_0 & mask_SORT_1 [L797] SORT_1 var_289_arg_1 = var_288; [L798] SORT_1 var_289 = var_289_arg_0 | var_289_arg_1; [L799] SORT_1 var_290_arg_0 = var_287; [L800] SORT_1 var_290_arg_1 = var_289; [L801] SORT_1 var_290 = var_290_arg_0 & var_290_arg_1; [L802] SORT_1 var_291_arg_0 = ~state_51; [L803] var_291_arg_0 = var_291_arg_0 & mask_SORT_1 [L804] SORT_1 var_291_arg_1 = var_290; [L805] SORT_1 var_291 = var_291_arg_0 & var_291_arg_1; [L806] SORT_1 var_292_arg_0 = ~input_78; [L807] var_292_arg_0 = var_292_arg_0 & mask_SORT_1 [L808] SORT_1 var_292_arg_1 = var_291; [L809] SORT_1 var_292 = var_292_arg_0 | var_292_arg_1; [L810] SORT_1 var_293_arg_0 = var_279; [L811] SORT_1 var_293_arg_1 = var_292; [L812] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L813] SORT_2 var_294_arg_0 = var_87; [L814] SORT_2 var_294_arg_1 = state_38; [L815] SORT_1 var_294 = var_294_arg_0 == var_294_arg_1; [L816] SORT_1 var_295_arg_0 = ~var_248; [L817] var_295_arg_0 = var_295_arg_0 & mask_SORT_1 [L818] SORT_1 var_295_arg_1 = var_294; [L819] SORT_1 var_295 = var_295_arg_0 & var_295_arg_1; [L820] SORT_2 var_296_arg_0 = var_115; [L821] SORT_2 var_296_arg_1 = state_20; [L822] SORT_1 var_296 = var_296_arg_0 == var_296_arg_1; [L823] SORT_1 var_297_arg_0 = var_251; [L824] SORT_1 var_297_arg_1 = var_296; [L825] SORT_1 var_297 = var_297_arg_0 | var_297_arg_1; [L826] SORT_1 var_298_arg_0 = var_295; [L827] SORT_1 var_298_arg_1 = var_297; [L828] SORT_1 var_298 = var_298_arg_0 & var_298_arg_1; [L829] SORT_2 var_299_arg_0 = var_115; [L830] SORT_2 var_299_arg_1 = state_28; [L831] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L832] SORT_1 var_300_arg_0 = var_255; [L833] SORT_1 var_300_arg_1 = var_299; [L834] SORT_1 var_300 = var_300_arg_0 | var_300_arg_1; [L835] SORT_1 var_301_arg_0 = var_298; [L836] SORT_1 var_301_arg_1 = var_300; [L837] SORT_1 var_301 = var_301_arg_0 & var_301_arg_1; [L838] SORT_2 var_302_arg_0 = var_115; [L839] SORT_2 var_302_arg_1 = state_36; [L840] SORT_1 var_302 = var_302_arg_0 == var_302_arg_1; [L841] SORT_1 var_303_arg_0 = ~var_260; [L842] var_303_arg_0 = var_303_arg_0 & mask_SORT_1 [L843] SORT_1 var_303_arg_1 = var_302; [L844] SORT_1 var_303 = var_303_arg_0 | var_303_arg_1; [L845] SORT_1 var_304_arg_0 = var_301; [L846] SORT_1 var_304_arg_1 = var_303; [L847] SORT_1 var_304 = var_304_arg_0 & var_304_arg_1; [L848] SORT_1 var_305_arg_0 = ~state_51; [L849] var_305_arg_0 = var_305_arg_0 & mask_SORT_1 [L850] SORT_1 var_305_arg_1 = var_304; [L851] SORT_1 var_305 = var_305_arg_0 & var_305_arg_1; [L852] SORT_1 var_306_arg_0 = ~input_86; [L853] var_306_arg_0 = var_306_arg_0 & mask_SORT_1 [L854] SORT_1 var_306_arg_1 = var_305; [L855] SORT_1 var_306 = var_306_arg_0 | var_306_arg_1; [L856] SORT_1 var_307_arg_0 = var_293; [L857] SORT_1 var_307_arg_1 = var_306; [L858] SORT_1 var_307 = var_307_arg_0 & var_307_arg_1; [L859] SORT_2 var_308_arg_0 = var_62; [L860] SORT_2 var_308_arg_1 = var_63; [L861] SORT_1 var_308 = var_308_arg_0 == var_308_arg_1; [L862] SORT_4 var_310_arg_0 = var_186; [L863] SORT_4 var_310_arg_1 = var_309; [L864] SORT_1 var_310 = var_310_arg_0 <= var_310_arg_1; [L865] SORT_4 var_311_arg_0 = var_259; [L866] SORT_4 var_311_arg_1 = var_212; [L867] SORT_1 var_311 = var_311_arg_0 == var_311_arg_1; [L868] SORT_1 var_312_arg_0 = ~var_310; [L869] var_312_arg_0 = var_312_arg_0 & mask_SORT_1 [L870] SORT_1 var_312_arg_1 = var_311; [L871] SORT_1 var_312 = var_312_arg_0 | var_312_arg_1; [L872] SORT_1 var_313_arg_0 = var_308; [L873] SORT_1 var_313_arg_1 = var_312; [L874] SORT_1 var_313 = var_313_arg_0 & var_313_arg_1; [L875] SORT_1 var_314_arg_0 = ~state_51; [L876] var_314_arg_0 = var_314_arg_0 & mask_SORT_1 [L877] SORT_1 var_314_arg_1 = var_313; [L878] SORT_1 var_314 = var_314_arg_0 & var_314_arg_1; [L879] SORT_1 var_315_arg_0 = ~input_60; [L880] var_315_arg_0 = var_315_arg_0 & mask_SORT_1 [L881] SORT_1 var_315_arg_1 = var_314; [L882] SORT_1 var_315 = var_315_arg_0 | var_315_arg_1; [L883] SORT_1 var_316_arg_0 = var_307; [L884] SORT_1 var_316_arg_1 = var_315; [L885] SORT_1 var_316 = var_316_arg_0 & var_316_arg_1; [L886] SORT_2 var_317_arg_0 = var_62; [L887] SORT_2 var_317_arg_1 = var_71; [L888] SORT_1 var_317 = var_317_arg_0 == var_317_arg_1; [L889] SORT_4 var_318_arg_0 = var_259; [L890] SORT_4 var_318_arg_1 = var_209; [L891] SORT_1 var_318 = var_318_arg_0 == var_318_arg_1; [L892] SORT_1 var_319_arg_0 = ~var_310; [L893] var_319_arg_0 = var_319_arg_0 & mask_SORT_1 [L894] SORT_1 var_319_arg_1 = var_318; [L895] SORT_1 var_319 = var_319_arg_0 | var_319_arg_1; [L896] SORT_1 var_320_arg_0 = var_317; [L897] SORT_1 var_320_arg_1 = var_319; [L898] SORT_1 var_320 = var_320_arg_0 & var_320_arg_1; [L899] SORT_1 var_321_arg_0 = ~state_51; [L900] var_321_arg_0 = var_321_arg_0 & mask_SORT_1 [L901] SORT_1 var_321_arg_1 = var_320; [L902] SORT_1 var_321 = var_321_arg_0 & var_321_arg_1; [L903] SORT_1 var_322_arg_0 = ~input_69; [L904] var_322_arg_0 = var_322_arg_0 & mask_SORT_1 [L905] SORT_1 var_322_arg_1 = var_321; [L906] SORT_1 var_322 = var_322_arg_0 | var_322_arg_1; [L907] SORT_1 var_323_arg_0 = var_316; [L908] SORT_1 var_323_arg_1 = var_322; [L909] SORT_1 var_323 = var_323_arg_0 & var_323_arg_1; [L910] SORT_2 var_324_arg_0 = var_62; [L911] SORT_2 var_324_arg_1 = var_79; [L912] SORT_1 var_324 = var_324_arg_0 == var_324_arg_1; [L913] SORT_4 var_325_arg_0 = var_259; [L914] SORT_4 var_325_arg_1 = var_206; [L915] SORT_1 var_325 = var_325_arg_0 == var_325_arg_1; [L916] SORT_1 var_326_arg_0 = ~var_310; [L917] var_326_arg_0 = var_326_arg_0 & mask_SORT_1 [L918] SORT_1 var_326_arg_1 = var_325; [L919] SORT_1 var_326 = var_326_arg_0 | var_326_arg_1; [L920] SORT_1 var_327_arg_0 = var_324; [L921] SORT_1 var_327_arg_1 = var_326; [L922] SORT_1 var_327 = var_327_arg_0 & var_327_arg_1; [L923] SORT_1 var_328_arg_0 = ~state_51; [L924] var_328_arg_0 = var_328_arg_0 & mask_SORT_1 [L925] SORT_1 var_328_arg_1 = var_327; [L926] SORT_1 var_328 = var_328_arg_0 & var_328_arg_1; [L927] SORT_1 var_329_arg_0 = ~input_77; [L928] var_329_arg_0 = var_329_arg_0 & mask_SORT_1 [L929] SORT_1 var_329_arg_1 = var_328; [L930] SORT_1 var_329 = var_329_arg_0 | var_329_arg_1; [L931] SORT_1 var_330_arg_0 = var_323; [L932] SORT_1 var_330_arg_1 = var_329; [L933] SORT_1 var_330 = var_330_arg_0 & var_330_arg_1; [L934] SORT_2 var_331_arg_0 = var_62; [L935] SORT_2 var_331_arg_1 = var_87; [L936] SORT_1 var_331 = var_331_arg_0 == var_331_arg_1; [L937] SORT_4 var_332_arg_0 = var_259; [L938] SORT_4 var_332_arg_1 = var_203; [L939] SORT_1 var_332 = var_332_arg_0 == var_332_arg_1; [L940] SORT_1 var_333_arg_0 = ~var_310; [L941] var_333_arg_0 = var_333_arg_0 & mask_SORT_1 [L942] SORT_1 var_333_arg_1 = var_332; [L943] SORT_1 var_333 = var_333_arg_0 | var_333_arg_1; [L944] SORT_1 var_334_arg_0 = var_331; [L945] SORT_1 var_334_arg_1 = var_333; [L946] SORT_1 var_334 = var_334_arg_0 & var_334_arg_1; [L947] SORT_1 var_335_arg_0 = ~state_51; [L948] var_335_arg_0 = var_335_arg_0 & mask_SORT_1 [L949] SORT_1 var_335_arg_1 = var_334; [L950] SORT_1 var_335 = var_335_arg_0 & var_335_arg_1; [L951] SORT_1 var_336_arg_0 = ~input_85; [L952] var_336_arg_0 = var_336_arg_0 & mask_SORT_1 [L953] SORT_1 var_336_arg_1 = var_335; [L954] SORT_1 var_336 = var_336_arg_0 | var_336_arg_1; [L955] SORT_1 var_337_arg_0 = var_330; [L956] SORT_1 var_337_arg_1 = var_336; [L957] SORT_1 var_337 = var_337_arg_0 & var_337_arg_1; [L958] SORT_1 var_338_arg_0 = ~state_51; [L959] var_338_arg_0 = var_338_arg_0 & mask_SORT_1 [L960] SORT_1 var_338_arg_1 = ~input_114; [L961] var_338_arg_1 = var_338_arg_1 & mask_SORT_1 [L962] SORT_1 var_338 = var_338_arg_0 | var_338_arg_1; [L963] SORT_1 var_339_arg_0 = var_337; [L964] SORT_1 var_339_arg_1 = var_338; [L965] SORT_1 var_339 = var_339_arg_0 & var_339_arg_1; [L966] SORT_1 var_340_arg_0 = ~state_51; [L967] var_340_arg_0 = var_340_arg_0 & mask_SORT_1 [L968] SORT_1 var_340_arg_1 = ~input_112; [L969] var_340_arg_1 = var_340_arg_1 & mask_SORT_1 [L970] SORT_1 var_340 = var_340_arg_0 | var_340_arg_1; [L971] SORT_1 var_341_arg_0 = var_339; [L972] SORT_1 var_341_arg_1 = var_340; [L973] SORT_1 var_341 = var_341_arg_0 & var_341_arg_1; [L974] SORT_1 var_342_arg_0 = ~state_51; [L975] var_342_arg_0 = var_342_arg_0 & mask_SORT_1 [L976] SORT_1 var_342_arg_1 = ~input_111; [L977] var_342_arg_1 = var_342_arg_1 & mask_SORT_1 [L978] SORT_1 var_342 = var_342_arg_0 | var_342_arg_1; [L979] SORT_1 var_343_arg_0 = var_341; [L980] SORT_1 var_343_arg_1 = var_342; [L981] SORT_1 var_343 = var_343_arg_0 & var_343_arg_1; [L982] SORT_1 var_344_arg_0 = ~state_51; [L983] var_344_arg_0 = var_344_arg_0 & mask_SORT_1 [L984] SORT_1 var_344_arg_1 = ~input_109; [L985] var_344_arg_1 = var_344_arg_1 & mask_SORT_1 [L986] SORT_1 var_344 = var_344_arg_0 | var_344_arg_1; [L987] SORT_1 var_345_arg_0 = var_343; [L988] SORT_1 var_345_arg_1 = var_344; [L989] SORT_1 var_345 = var_345_arg_0 & var_345_arg_1; [L990] SORT_1 var_346_arg_0 = ~state_51; [L991] var_346_arg_0 = var_346_arg_0 & mask_SORT_1 [L992] SORT_1 var_346_arg_1 = ~input_107; [L993] var_346_arg_1 = var_346_arg_1 & mask_SORT_1 [L994] SORT_1 var_346 = var_346_arg_0 | var_346_arg_1; [L995] SORT_1 var_347_arg_0 = var_345; [L996] SORT_1 var_347_arg_1 = var_346; [L997] SORT_1 var_347 = var_347_arg_0 & var_347_arg_1; [L998] SORT_1 var_348_arg_0 = ~state_51; [L999] var_348_arg_0 = var_348_arg_0 & mask_SORT_1 [L1000] SORT_1 var_348_arg_1 = ~input_106; [L1001] var_348_arg_1 = var_348_arg_1 & mask_SORT_1 [L1002] SORT_1 var_348 = var_348_arg_0 | var_348_arg_1; [L1003] SORT_1 var_349_arg_0 = var_347; [L1004] SORT_1 var_349_arg_1 = var_348; [L1005] SORT_1 var_349 = var_349_arg_0 & var_349_arg_1; [L1006] SORT_1 var_350_arg_0 = ~state_51; [L1007] var_350_arg_0 = var_350_arg_0 & mask_SORT_1 [L1008] SORT_1 var_350_arg_1 = ~input_105; [L1009] var_350_arg_1 = var_350_arg_1 & mask_SORT_1 [L1010] SORT_1 var_350 = var_350_arg_0 | var_350_arg_1; [L1011] SORT_1 var_351_arg_0 = var_349; [L1012] SORT_1 var_351_arg_1 = var_350; [L1013] SORT_1 var_351 = var_351_arg_0 & var_351_arg_1; [L1014] SORT_1 var_352_arg_0 = ~state_51; [L1015] var_352_arg_0 = var_352_arg_0 & mask_SORT_1 [L1016] SORT_1 var_352_arg_1 = ~input_104; [L1017] var_352_arg_1 = var_352_arg_1 & mask_SORT_1 [L1018] SORT_1 var_352 = var_352_arg_0 | var_352_arg_1; [L1019] SORT_1 var_353_arg_0 = var_351; [L1020] SORT_1 var_353_arg_1 = var_352; [L1021] SORT_1 var_353 = var_353_arg_0 & var_353_arg_1; [L1022] SORT_1 var_354_arg_0 = input_232; [L1023] SORT_1 var_354_arg_1 = input_61; [L1024] SORT_1 var_354 = var_354_arg_0 | var_354_arg_1; [L1025] SORT_1 var_355_arg_0 = input_70; [L1026] SORT_1 var_355_arg_1 = var_354; [L1027] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L1028] SORT_1 var_356_arg_0 = input_78; [L1029] SORT_1 var_356_arg_1 = var_355; [L1030] SORT_1 var_356 = var_356_arg_0 | var_356_arg_1; [L1031] SORT_1 var_357_arg_0 = input_86; [L1032] SORT_1 var_357_arg_1 = var_356; [L1033] SORT_1 var_357 = var_357_arg_0 | var_357_arg_1; [L1034] SORT_1 var_358_arg_0 = input_60; [L1035] SORT_1 var_358_arg_1 = var_357; [L1036] SORT_1 var_358 = var_358_arg_0 | var_358_arg_1; [L1037] SORT_1 var_359_arg_0 = input_69; [L1038] SORT_1 var_359_arg_1 = var_358; [L1039] SORT_1 var_359 = var_359_arg_0 | var_359_arg_1; [L1040] SORT_1 var_360_arg_0 = input_77; [L1041] SORT_1 var_360_arg_1 = var_359; [L1042] SORT_1 var_360 = var_360_arg_0 | var_360_arg_1; [L1043] SORT_1 var_361_arg_0 = input_85; [L1044] SORT_1 var_361_arg_1 = var_360; [L1045] SORT_1 var_361 = var_361_arg_0 | var_361_arg_1; [L1046] SORT_1 var_362_arg_0 = input_114; [L1047] SORT_1 var_362_arg_1 = var_361; [L1048] SORT_1 var_362 = var_362_arg_0 | var_362_arg_1; [L1049] SORT_1 var_363_arg_0 = input_112; [L1050] SORT_1 var_363_arg_1 = var_362; [L1051] SORT_1 var_363 = var_363_arg_0 | var_363_arg_1; [L1052] SORT_1 var_364_arg_0 = input_111; [L1053] SORT_1 var_364_arg_1 = var_363; [L1054] SORT_1 var_364 = var_364_arg_0 | var_364_arg_1; [L1055] SORT_1 var_365_arg_0 = input_109; [L1056] SORT_1 var_365_arg_1 = var_364; [L1057] SORT_1 var_365 = var_365_arg_0 | var_365_arg_1; [L1058] SORT_1 var_366_arg_0 = input_107; [L1059] SORT_1 var_366_arg_1 = var_365; [L1060] SORT_1 var_366 = var_366_arg_0 | var_366_arg_1; [L1061] SORT_1 var_367_arg_0 = input_106; [L1062] SORT_1 var_367_arg_1 = var_366; [L1063] SORT_1 var_367 = var_367_arg_0 | var_367_arg_1; [L1064] SORT_1 var_368_arg_0 = input_105; [L1065] SORT_1 var_368_arg_1 = var_367; [L1066] SORT_1 var_368 = var_368_arg_0 | var_368_arg_1; [L1067] SORT_1 var_369_arg_0 = input_104; [L1068] SORT_1 var_369_arg_1 = var_368; [L1069] SORT_1 var_369 = var_369_arg_0 | var_369_arg_1; [L1070] SORT_1 var_370_arg_0 = var_353; [L1071] SORT_1 var_370_arg_1 = var_369; [L1072] SORT_1 var_370 = var_370_arg_0 & var_370_arg_1; [L1073] SORT_1 var_371_arg_0 = input_232; [L1074] SORT_1 var_371_arg_1 = input_61; [L1075] SORT_1 var_371 = var_371_arg_0 & var_371_arg_1; [L1076] SORT_1 var_372_arg_0 = input_70; [L1077] SORT_1 var_372_arg_1 = var_354; [L1078] SORT_1 var_372 = var_372_arg_0 & var_372_arg_1; [L1079] SORT_1 var_373_arg_0 = var_371; [L1080] SORT_1 var_373_arg_1 = var_372; [L1081] SORT_1 var_373 = var_373_arg_0 | var_373_arg_1; [L1082] SORT_1 var_374_arg_0 = input_78; [L1083] SORT_1 var_374_arg_1 = var_355; [L1084] SORT_1 var_374 = var_374_arg_0 & var_374_arg_1; [L1085] SORT_1 var_375_arg_0 = var_373; [L1086] SORT_1 var_375_arg_1 = var_374; [L1087] SORT_1 var_375 = var_375_arg_0 | var_375_arg_1; [L1088] SORT_1 var_376_arg_0 = input_86; [L1089] SORT_1 var_376_arg_1 = var_356; [L1090] SORT_1 var_376 = var_376_arg_0 & var_376_arg_1; [L1091] SORT_1 var_377_arg_0 = var_375; [L1092] SORT_1 var_377_arg_1 = var_376; [L1093] SORT_1 var_377 = var_377_arg_0 | var_377_arg_1; [L1094] SORT_1 var_378_arg_0 = input_60; [L1095] SORT_1 var_378_arg_1 = var_357; [L1096] SORT_1 var_378 = var_378_arg_0 & var_378_arg_1; [L1097] SORT_1 var_379_arg_0 = var_377; [L1098] SORT_1 var_379_arg_1 = var_378; [L1099] SORT_1 var_379 = var_379_arg_0 | var_379_arg_1; [L1100] SORT_1 var_380_arg_0 = input_69; [L1101] SORT_1 var_380_arg_1 = var_358; [L1102] SORT_1 var_380 = var_380_arg_0 & var_380_arg_1; [L1103] SORT_1 var_381_arg_0 = var_379; [L1104] SORT_1 var_381_arg_1 = var_380; [L1105] SORT_1 var_381 = var_381_arg_0 | var_381_arg_1; [L1106] SORT_1 var_382_arg_0 = input_77; [L1107] SORT_1 var_382_arg_1 = var_359; [L1108] SORT_1 var_382 = var_382_arg_0 & var_382_arg_1; [L1109] SORT_1 var_383_arg_0 = var_381; [L1110] SORT_1 var_383_arg_1 = var_382; [L1111] SORT_1 var_383 = var_383_arg_0 | var_383_arg_1; [L1112] SORT_1 var_384_arg_0 = input_85; [L1113] SORT_1 var_384_arg_1 = var_360; [L1114] SORT_1 var_384 = var_384_arg_0 & var_384_arg_1; [L1115] SORT_1 var_385_arg_0 = var_383; [L1116] SORT_1 var_385_arg_1 = var_384; [L1117] SORT_1 var_385 = var_385_arg_0 | var_385_arg_1; [L1118] SORT_1 var_386_arg_0 = input_114; [L1119] SORT_1 var_386_arg_1 = var_361; [L1120] SORT_1 var_386 = var_386_arg_0 & var_386_arg_1; [L1121] SORT_1 var_387_arg_0 = var_385; [L1122] SORT_1 var_387_arg_1 = var_386; [L1123] SORT_1 var_387 = var_387_arg_0 | var_387_arg_1; [L1124] SORT_1 var_388_arg_0 = input_112; [L1125] SORT_1 var_388_arg_1 = var_362; [L1126] SORT_1 var_388 = var_388_arg_0 & var_388_arg_1; [L1127] SORT_1 var_389_arg_0 = var_387; [L1128] SORT_1 var_389_arg_1 = var_388; [L1129] SORT_1 var_389 = var_389_arg_0 | var_389_arg_1; [L1130] SORT_1 var_390_arg_0 = input_111; [L1131] SORT_1 var_390_arg_1 = var_363; [L1132] SORT_1 var_390 = var_390_arg_0 & var_390_arg_1; [L1133] SORT_1 var_391_arg_0 = var_389; [L1134] SORT_1 var_391_arg_1 = var_390; [L1135] SORT_1 var_391 = var_391_arg_0 | var_391_arg_1; [L1136] SORT_1 var_392_arg_0 = input_109; [L1137] SORT_1 var_392_arg_1 = var_364; [L1138] SORT_1 var_392 = var_392_arg_0 & var_392_arg_1; [L1139] SORT_1 var_393_arg_0 = var_391; [L1140] SORT_1 var_393_arg_1 = var_392; [L1141] SORT_1 var_393 = var_393_arg_0 | var_393_arg_1; [L1142] SORT_1 var_394_arg_0 = input_107; [L1143] SORT_1 var_394_arg_1 = var_365; [L1144] SORT_1 var_394 = var_394_arg_0 & var_394_arg_1; [L1145] SORT_1 var_395_arg_0 = var_393; [L1146] SORT_1 var_395_arg_1 = var_394; [L1147] SORT_1 var_395 = var_395_arg_0 | var_395_arg_1; [L1148] SORT_1 var_396_arg_0 = input_106; [L1149] SORT_1 var_396_arg_1 = var_366; [L1150] SORT_1 var_396 = var_396_arg_0 & var_396_arg_1; [L1151] SORT_1 var_397_arg_0 = var_395; [L1152] SORT_1 var_397_arg_1 = var_396; [L1153] SORT_1 var_397 = var_397_arg_0 | var_397_arg_1; [L1154] SORT_1 var_398_arg_0 = input_105; [L1155] SORT_1 var_398_arg_1 = var_367; [L1156] SORT_1 var_398 = var_398_arg_0 & var_398_arg_1; [L1157] SORT_1 var_399_arg_0 = var_397; [L1158] SORT_1 var_399_arg_1 = var_398; [L1159] SORT_1 var_399 = var_399_arg_0 | var_399_arg_1; [L1160] SORT_1 var_400_arg_0 = input_104; [L1161] SORT_1 var_400_arg_1 = var_368; [L1162] SORT_1 var_400 = var_400_arg_0 & var_400_arg_1; [L1163] SORT_1 var_401_arg_0 = var_399; [L1164] SORT_1 var_401_arg_1 = var_400; [L1165] SORT_1 var_401 = var_401_arg_0 | var_401_arg_1; [L1166] SORT_1 var_402_arg_0 = var_370; [L1167] SORT_1 var_402_arg_1 = ~var_401; [L1168] var_402_arg_1 = var_402_arg_1 & mask_SORT_1 [L1169] SORT_1 var_402 = var_402_arg_0 & var_402_arg_1; [L1170] SORT_1 var_403_arg_0 = ~state_51; [L1171] var_403_arg_0 = var_403_arg_0 & mask_SORT_1 [L1172] SORT_1 var_403_arg_1 = state_53; [L1173] SORT_1 var_403 = var_403_arg_0 & var_403_arg_1; [L1174] SORT_1 var_404_arg_0 = ~state_51; [L1175] var_404_arg_0 = var_404_arg_0 & mask_SORT_1 [L1176] SORT_1 var_404_arg_1 = state_53; [L1177] SORT_1 var_404 = var_404_arg_0 | var_404_arg_1; [L1178] SORT_1 var_405_arg_0 = ~var_403; [L1179] var_405_arg_0 = var_405_arg_0 & mask_SORT_1 [L1180] SORT_1 var_405_arg_1 = var_404; [L1181] SORT_1 var_405 = var_405_arg_0 & var_405_arg_1; [L1182] SORT_1 var_406_arg_0 = var_402; [L1183] SORT_1 var_406_arg_1 = var_405; [L1184] SORT_1 var_406 = var_406_arg_0 & var_406_arg_1; [L1185] SORT_1 var_407_arg_0 = var_233; [L1186] SORT_1 var_407_arg_1 = var_235; [L1187] SORT_1 var_407 = var_407_arg_0 & var_407_arg_1; [L1188] SORT_1 var_408_arg_0 = var_233; [L1189] SORT_1 var_408_arg_1 = var_235; [L1190] SORT_1 var_408 = var_408_arg_0 | var_408_arg_1; [L1191] SORT_1 var_409_arg_0 = ~var_407; [L1192] var_409_arg_0 = var_409_arg_0 & mask_SORT_1 [L1193] SORT_1 var_409_arg_1 = var_408; [L1194] SORT_1 var_409 = var_409_arg_0 & var_409_arg_1; [L1195] SORT_1 var_410_arg_0 = var_406; [L1196] SORT_1 var_410_arg_1 = var_409; [L1197] SORT_1 var_410 = var_410_arg_0 & var_410_arg_1; [L1198] SORT_1 var_411_arg_0 = var_410; [L1199] SORT_1 var_411_arg_1 = ~state_55; [L1200] var_411_arg_1 = var_411_arg_1 & mask_SORT_1 [L1201] SORT_1 var_411 = var_411_arg_0 & var_411_arg_1; [L1202] SORT_1 next_412_arg_1 = ~var_411; [L1203] next_412_arg_1 = next_412_arg_1 & mask_SORT_1 [L1205] state_6 = next_67_arg_1 [L1206] state_8 = next_75_arg_1 [L1207] state_10 = next_83_arg_1 [L1208] state_12 = next_91_arg_1 [L1209] state_14 = next_92_arg_1 [L1210] state_16 = next_93_arg_1 [L1211] state_18 = next_94_arg_1 [L1212] state_20 = next_95_arg_1 [L1213] state_22 = next_96_arg_1 [L1214] state_24 = next_97_arg_1 [L1215] state_26 = next_98_arg_1 [L1216] state_28 = next_99_arg_1 [L1217] state_30 = next_100_arg_1 [L1218] state_32 = next_101_arg_1 [L1219] state_34 = next_102_arg_1 [L1220] state_36 = next_103_arg_1 [L1221] state_38 = next_124_arg_1 [L1222] state_40 = next_155_arg_1 [L1223] state_42 = next_185_arg_1 [L1224] state_44 = next_200_arg_1 [L1225] state_46 = next_230_arg_1 [L1226] state_48 = next_231_arg_1 [L1227] state_51 = next_234_arg_1 [L1228] state_53 = next_236_arg_1 [L1229] state_55 = next_412_arg_1 VAL [bad_58_arg_0=0, init_11_arg_1=0, init_13_arg_1=0, init_15_arg_1=0, init_17_arg_1=0, init_19_arg_1=0, init_21_arg_1=0, init_23_arg_1=0, init_25_arg_1=0, init_27_arg_1=0, init_29_arg_1=0, init_31_arg_1=0, init_33_arg_1=0, init_35_arg_1=0, init_37_arg_1=0, init_39_arg_1=0, init_41_arg_1=0, init_43_arg_1=0, init_45_arg_1=0, init_47_arg_1=0, init_49_arg_1=0, init_52_arg_1=0, init_54_arg_1=0, init_56_arg_1=0, init_7_arg_1=0, init_9_arg_1=0, input_104=0, input_105=0, input_106=0, input_107=1, input_109=1, input_111=0, input_112=1, input_114=1, input_232=3, input_60=1, input_61=0, input_69=0, input_70=0, input_77=1, input_78=1, input_85=0, input_86=0, mask_SORT_1=1, mask_SORT_2=255, mask_SORT_3=4294967295, mask_SORT_4=4294967295, msb_SORT_1=1, msb_SORT_2=128, msb_SORT_3=8388608, msb_SORT_4=2147483648, next_100_arg_1=0, next_101_arg_1=0, next_102_arg_1=0, next_103_arg_1=0, next_124_arg_1=0, next_155_arg_1=0, next_185_arg_1=0, next_200_arg_1=1, next_230_arg_1=0, next_231_arg_1=0, next_234_arg_1=0, next_236_arg_1=3, next_412_arg_1=0, next_67_arg_1=7, next_75_arg_1=2, next_83_arg_1=6, next_91_arg_1=5, next_92_arg_1=0, next_93_arg_1=0, next_94_arg_1=0, next_95_arg_1=0, next_96_arg_1=0, next_97_arg_1=0, next_98_arg_1=0, next_99_arg_1=0, state_10=6, state_12=5, state_14=0, state_16=0, state_18=0, state_20=0, state_22=0, state_24=0, state_26=0, state_28=0, state_30=0, state_32=0, state_34=0, state_36=0, state_38=0, state_40=0, state_42=0, state_44=1, state_46=0, state_48=0, state_51=0, state_53=3, state_55=0, state_6=7, state_8=2, var_108=4, var_110=3, var_113=1, var_115=0, var_116=0, var_116_arg_0=1, var_116_arg_1=0, var_116_arg_2=0, var_117=1, var_117_arg_0=1, var_117_arg_1=1, var_117_arg_2=0, var_118=1, var_118_arg_0=0, var_118_arg_1=2, var_118_arg_2=1, var_119=3, var_119_arg_0=1, var_119_arg_1=3, var_119_arg_2=1, var_120=4, var_120_arg_0=1, var_120_arg_1=4, var_120_arg_2=3, var_121=4, var_121_arg_0=0, var_121_arg_1=5, var_121_arg_2=4, var_122=4, var_122_arg_0=0, var_122_arg_1=6, var_122_arg_2=4, var_123=0, var_123_arg_0=0, var_123_arg_1=7, var_123_arg_2=4, var_125=0, var_126=0, var_126_arg_0=0, var_126_arg_1=0, var_127=0, var_127_arg_0=0, var_127_arg_1=0, var_128=0, var_128_arg_0=0, var_128_arg_1=0, var_129=0, var_129_arg_0=0, var_130=0, var_130_arg_0=0, var_130_arg_1=0, var_131=0, var_131_arg_0=0, var_131_arg_1=0, var_132=0, var_132_arg_0=0, var_133=0, var_133_arg_0=0, var_133_arg_1=0, var_134=0, var_134_arg_0=0, var_134_arg_1=0, var_135=0, var_135_arg_0=0, var_136=0, var_136_arg_0=0, var_136_arg_1=0, var_137=0, var_137_arg_0=0, var_137_arg_1=0, var_138=0, var_138_arg_0=0, var_139=0, var_139_arg_0=0, var_139_arg_1=0, var_140=0, var_140_arg_0=0, var_141=0, var_141_arg_0=0, var_141_arg_1=0, var_142=0, var_142_arg_0=0, var_143=0, var_143_arg_0=0, var_143_arg_1=0, var_144=0, var_144_arg_0=0, var_145=0, var_145_arg_0=0, var_145_arg_1=0, var_146=0, var_146_arg_0=0, var_147=0, var_147_arg_0=0, var_147_arg_1=0, var_147_arg_2=0, var_148=0, var_148_arg_0=0, var_148_arg_1=0, var_148_arg_2=0, var_149=0, var_149_arg_0=1, var_149_arg_1=0, var_149_arg_2=0, var_150=0, var_150_arg_0=0, var_150_arg_1=0, var_150_arg_2=0, var_151=0, var_151_arg_0=1, var_151_arg_1=0, var_151_arg_2=0, var_152=0, var_152_arg_0=0, var_152_arg_1=0, var_152_arg_2=0, var_153=0, var_153_arg_0=1, var_153_arg_1=0, var_153_arg_2=0, var_154=0, var_154_arg_0=0, var_154_arg_1=0, var_154_arg_2=0, var_156=0, var_156_arg_0=0, var_156_arg_1=0, var_157=0, var_157_arg_0=0, var_157_arg_1=0, var_158=0, var_158_arg_0=0, var_158_arg_1=0, var_159=0, var_159_arg_0=0, var_160=0, var_160_arg_0=0, var_160_arg_1=0, var_161=0, var_161_arg_0=0, var_161_arg_1=0, var_162=0, var_162_arg_0=0, var_163=0, var_163_arg_0=0, var_163_arg_1=0, var_164=0, var_164_arg_0=0, var_164_arg_1=0, var_165=0, var_165_arg_0=0, var_166=0, var_166_arg_0=0, var_166_arg_1=0, var_167=0, var_167_arg_0=0, var_167_arg_1=0, var_168=0, var_168_arg_0=0, var_169=0, var_169_arg_0=0, var_169_arg_1=0, var_170=0, var_170_arg_0=0, var_171=0, var_171_arg_0=0, var_171_arg_1=0, var_172=0, var_172_arg_0=0, var_173=0, var_173_arg_0=0, var_173_arg_1=0, var_174=0, var_174_arg_0=0, var_175=0, var_175_arg_0=0, var_175_arg_1=0, var_176=0, var_176_arg_0=0, var_177=0, var_177_arg_0=0, var_177_arg_1=0, var_177_arg_2=0, var_178=0, var_178_arg_0=0, var_178_arg_1=0, var_178_arg_2=0, var_179=0, var_179_arg_0=1, var_179_arg_1=0, var_179_arg_2=0, var_180=0, var_180_arg_0=0, var_180_arg_1=0, var_180_arg_2=0, var_181=0, var_181_arg_0=1, var_181_arg_1=0, var_181_arg_2=0, var_182=0, var_182_arg_0=0, var_182_arg_1=0, var_182_arg_2=0, var_183=0, var_183_arg_0=1, var_183_arg_1=0, var_183_arg_2=0, var_184=0, var_184_arg_0=0, var_184_arg_1=0, var_184_arg_2=0, var_186=0, var_186_arg_0=0, var_186_arg_1=0, var_187=1, var_188=4294967295, var_188_arg_0=0, var_188_arg_1=1, var_189=255, var_189_arg_0=4294967295, var_190=1, var_190_arg_0=1, var_190_arg_1=0, var_191=1, var_191_arg_0=1, var_192=0, var_192_arg_0=0, var_192_arg_1=1, var_192_arg_2=0, var_193=0, var_193_arg_0=0, var_193_arg_1=1, var_193_arg_2=0, var_194=1, var_194_arg_0=1, var_194_arg_1=1, var_194_arg_2=0, var_195=1, var_195_arg_0=0, var_195_arg_1=1, var_195_arg_2=1, var_196=255, var_196_arg_0=1, var_196_arg_1=255, var_196_arg_2=1, var_197=255, var_197_arg_0=0, var_197_arg_1=255, var_197_arg_2=255, var_198=255, var_198_arg_0=1, var_198_arg_1=255, var_198_arg_2=255, var_199=1, var_199_arg_0=0, var_199_arg_1=255, var_199_arg_2=255, var_201=0, var_201_arg_0=0, var_201_arg_1=0, var_202=0, var_202_arg_0=0, var_202_arg_1=0, var_203=0, var_203_arg_0=0, var_203_arg_1=0, var_204=0, var_204_arg_0=0, var_205=0, var_205_arg_0=0, var_205_arg_1=0, var_206=0, var_206_arg_0=0, var_206_arg_1=0, var_207=0, var_207_arg_0=0, var_208=0, var_208_arg_0=0, var_208_arg_1=0, var_209=0, var_209_arg_0=0, var_209_arg_1=0, var_210=0, var_210_arg_0=0, var_211=0, var_211_arg_0=0, var_211_arg_1=0, var_212=0, var_212_arg_0=0, var_212_arg_1=0, var_213=0, var_213_arg_0=0, var_214=0, var_214_arg_0=0, var_214_arg_1=0, var_215=0, var_215_arg_0=0, var_216=0, var_216_arg_0=0, var_216_arg_1=0, var_217=0, var_217_arg_0=0, var_218=0, var_218_arg_0=0, var_218_arg_1=0, var_219=0, var_219_arg_0=0, var_220=0, var_220_arg_0=0, var_220_arg_1=0, var_221=0, var_221_arg_0=0, var_222=0, var_222_arg_0=0, var_222_arg_1=0, var_222_arg_2=0, var_223=0, var_223_arg_0=0, var_223_arg_1=0, var_223_arg_2=0, var_224=0, var_224_arg_0=1, var_224_arg_1=0, var_224_arg_2=0, var_225=0, var_225_arg_0=0, var_225_arg_1=0, var_225_arg_2=0, var_226=0, var_226_arg_0=1, var_226_arg_1=0, var_226_arg_2=0, var_227=0, var_227_arg_0=0, var_227_arg_1=0, var_227_arg_2=0, var_228=0, var_228_arg_0=1, var_228_arg_1=0, var_228_arg_2=0, var_229=0, var_229_arg_0=0, var_229_arg_1=0, var_229_arg_2=0, var_233=1, var_233_arg_0=1, var_233_arg_1=1, var_235=3, var_235_arg_0=0, var_235_arg_1=3, var_237=1, var_237_arg_0=0, var_237_arg_1=0, var_238=0, var_238_arg_0=0, var_238_arg_1=9, var_239=0, var_239_arg_0=1, var_239_arg_1=0, var_240=1, var_240_arg_0=0, var_240_arg_1=0, var_241=0, var_241_arg_0=0, var_241_arg_1=1, var_242=0, var_242_arg_0=0, var_242_arg_1=255, var_243=0, var_243_arg_0=0, var_243_arg_1=0, var_244=0, var_244_arg_0=1, var_244_arg_1=0, var_245=1, var_245_arg_0=1, var_245_arg_1=0, var_246=1, var_246_arg_0=0, var_246_arg_1=0, var_247=4, var_248=0, var_248_arg_0=4, var_248_arg_1=0, var_249=1, var_249_arg_0=1, var_249_arg_1=1, var_250=1, var_250_arg_0=0, var_250_arg_1=0, var_251=1, var_251_arg_0=0, var_251_arg_1=0, var_252=1, var_252_arg_0=1, var_252_arg_1=1, var_253=1, var_253_arg_0=1, var_253_arg_1=1, var_254=1, var_254_arg_0=0, var_254_arg_1=0, var_255=1, var_255_arg_0=0, var_255_arg_1=0, var_256=1, var_256_arg_0=1, var_256_arg_1=1, var_257=1, var_257_arg_0=1, var_257_arg_1=1, var_258=1, var_258_arg_0=0, var_258_arg_1=0, var_259=0, var_260=1, var_260_arg_0=0, var_260_arg_1=0, var_261=1, var_261_arg_0=1, var_261_arg_1=1, var_262=1, var_262_arg_0=1, var_262_arg_1=1, var_263=0, var_263_arg_0=0, var_263_arg_1=1, var_264=0, var_264_arg_0=0, var_264_arg_1=0, var_265=0, var_265_arg_0=1, var_265_arg_1=0, var_266=0, var_266_arg_0=9, var_266_arg_1=0, var_267=0, var_267_arg_0=1, var_267_arg_1=0, var_268=1, var_268_arg_0=0, var_268_arg_1=0, var_269=1, var_269_arg_0=1, var_269_arg_1=1, var_270=0, var_270_arg_0=0, var_270_arg_1=1, var_271=1, var_271_arg_0=0, var_271_arg_1=0, var_272=1, var_272_arg_0=1, var_272_arg_1=1, var_273=0, var_273_arg_0=0, var_273_arg_1=1, var_274=1, var_274_arg_0=0, var_274_arg_1=0, var_275=1, var_275_arg_0=1, var_275_arg_1=1, var_276=0, var_276_arg_0=0, var_276_arg_1=1, var_277=0, var_277_arg_0=1, var_277_arg_1=0, var_278=1, var_278_arg_0=1, var_278_arg_1=0, var_279=0, var_279_arg_0=0, var_279_arg_1=1, var_280=1, var_280_arg_0=0, var_280_arg_1=0, var_281=1, var_281_arg_0=1, var_281_arg_1=1, var_282=1, var_282_arg_0=0, var_282_arg_1=0, var_283=1, var_283_arg_0=1, var_283_arg_1=1, var_284=1, var_284_arg_0=1, var_284_arg_1=1, var_285=1, var_285_arg_0=0, var_285_arg_1=0, var_286=1, var_286_arg_0=1, var_286_arg_1=1, var_287=1, var_287_arg_0=1, var_287_arg_1=1, var_288=1, var_288_arg_0=0, var_288_arg_1=0, var_289=1, var_289_arg_0=1, var_289_arg_1=1, var_290=1, var_290_arg_0=1, var_290_arg_1=1, var_291=1, var_291_arg_0=1, var_291_arg_1=1, var_292=1, var_292_arg_0=1, var_292_arg_1=1, var_293=0, var_293_arg_0=0, var_293_arg_1=1, var_294=0, var_294_arg_0=255, var_294_arg_1=0, var_295=0, var_295_arg_0=0, var_295_arg_1=0, var_296=1, var_296_arg_0=0, var_296_arg_1=0, var_297=1, var_297_arg_0=1, var_297_arg_1=1, var_298=0, var_298_arg_0=0, var_298_arg_1=1, var_299=1, var_299_arg_0=0, var_299_arg_1=0, var_300=1, var_300_arg_0=1, var_300_arg_1=1, var_301=0, var_301_arg_0=0, var_301_arg_1=1, var_302=1, var_302_arg_0=0, var_302_arg_1=0, var_303=1, var_303_arg_0=1, var_303_arg_1=1, var_304=0, var_304_arg_0=0, var_304_arg_1=1, var_305=0, var_305_arg_0=1, var_305_arg_1=0, var_306=1, var_306_arg_0=1, var_306_arg_1=0, var_307=0, var_307_arg_0=0, var_307_arg_1=1, var_308=0, var_308_arg_0=255, var_308_arg_1=0, var_309=2, var_310=1, var_310_arg_0=0, var_310_arg_1=2, var_311=1, var_311_arg_0=0, var_311_arg_1=0, var_312=1, var_312_arg_0=0, var_312_arg_1=1, var_313=0, var_313_arg_0=0, var_313_arg_1=1, var_314=0, var_314_arg_0=0, var_314_arg_1=0, var_315=1, var_315_arg_0=1, var_315_arg_1=0, var_316=0, var_316_arg_0=0, var_316_arg_1=1, var_317=0, var_317_arg_0=255, var_317_arg_1=9, var_318=1, var_318_arg_0=0, var_318_arg_1=0, var_319=1, var_319_arg_0=1, var_319_arg_1=1, var_320=0, var_320_arg_0=0, var_320_arg_1=1, var_321=0, var_321_arg_0=0, var_321_arg_1=0, var_322=1, var_322_arg_0=1, var_322_arg_1=0, var_323=0, var_323_arg_0=0, var_323_arg_1=1, var_324=0, var_324_arg_0=255, var_324_arg_1=0, var_325=1, var_325_arg_0=0, var_325_arg_1=0, var_326=1, var_326_arg_0=1, var_326_arg_1=1, var_327=0, var_327_arg_0=0, var_327_arg_1=1, var_328=0, var_328_arg_0=1, var_328_arg_1=0, var_329=1, var_329_arg_0=1, var_329_arg_1=0, var_330=0, var_330_arg_0=0, var_330_arg_1=1, var_331=1, var_331_arg_0=255, var_331_arg_1=255, var_332=1, var_332_arg_0=0, var_332_arg_1=0, var_333=1, var_333_arg_0=1, var_333_arg_1=1, var_334=1, var_334_arg_0=1, var_334_arg_1=1, var_335=0, var_335_arg_0=0, var_335_arg_1=1, var_336=1, var_336_arg_0=1, var_336_arg_1=0, var_337=0, var_337_arg_0=0, var_337_arg_1=1, var_338=1, var_338_arg_0=0, var_338_arg_1=1, var_339=0, var_339_arg_0=0, var_339_arg_1=1, var_340=1, var_340_arg_0=1, var_340_arg_1=0, var_341=0, var_341_arg_0=0, var_341_arg_1=1, var_342=0, var_342_arg_0=0, var_342_arg_1=0, var_343=0, var_343_arg_0=0, var_343_arg_1=0, var_344=1, var_344_arg_0=1, var_344_arg_1=0, var_345=0, var_345_arg_0=0, var_345_arg_1=1, var_346=1, var_346_arg_0=1, var_346_arg_1=0, var_347=0, var_347_arg_0=0, var_347_arg_1=1, var_348=0, var_348_arg_0=0, var_348_arg_1=0, var_349=0, var_349_arg_0=0, var_349_arg_1=0, var_350=1, var_350_arg_0=0, var_350_arg_1=1, var_351=0, var_351_arg_0=0, var_351_arg_1=1, var_352=1, var_352_arg_0=1, var_352_arg_1=0, var_353=0, var_353_arg_0=0, var_353_arg_1=1, var_354=0, var_354_arg_0=3, var_354_arg_1=0, var_355=0, var_355_arg_0=0, var_355_arg_1=0, var_356=1, var_356_arg_0=1, var_356_arg_1=0, var_357=1, var_357_arg_0=0, var_357_arg_1=1, var_358=1, var_358_arg_0=1, var_358_arg_1=1, var_359=1, var_359_arg_0=0, var_359_arg_1=1, var_360=1, var_360_arg_0=1, var_360_arg_1=1, var_361=1, var_361_arg_0=0, var_361_arg_1=1, var_362=1, var_362_arg_0=1, var_362_arg_1=1, var_363=1, var_363_arg_0=1, var_363_arg_1=1, var_364=1, var_364_arg_0=0, var_364_arg_1=1, var_365=1, var_365_arg_0=1, var_365_arg_1=1, var_366=1, var_366_arg_0=1, var_366_arg_1=1, var_367=1, var_367_arg_0=0, var_367_arg_1=1, var_368=1, var_368_arg_0=0, var_368_arg_1=1, var_369=1, var_369_arg_0=0, var_369_arg_1=1, var_370=0, var_370_arg_0=0, var_370_arg_1=1, var_371=0, var_371_arg_0=3, var_371_arg_1=0, var_372=0, var_372_arg_0=0, var_372_arg_1=0, var_373=0, var_373_arg_0=0, var_373_arg_1=0, var_374=0, var_374_arg_0=1, var_374_arg_1=0, var_375=0, var_375_arg_0=0, var_375_arg_1=0, var_376=0, var_376_arg_0=0, var_376_arg_1=1, var_377=0, var_377_arg_0=0, var_377_arg_1=0, var_378=1, var_378_arg_0=1, var_378_arg_1=1, var_379=1, var_379_arg_0=0, var_379_arg_1=1, var_380=0, var_380_arg_0=0, var_380_arg_1=1, var_381=1, var_381_arg_0=1, var_381_arg_1=0, var_382=1, var_382_arg_0=1, var_382_arg_1=1, var_383=1, var_383_arg_0=1, var_383_arg_1=1, var_384=0, var_384_arg_0=0, var_384_arg_1=1, var_385=1, var_385_arg_0=1, var_385_arg_1=0, var_386=1, var_386_arg_0=1, var_386_arg_1=1, var_387=1, var_387_arg_0=1, var_387_arg_1=1, var_388=1, var_388_arg_0=1, var_388_arg_1=1, var_389=1, var_389_arg_0=1, var_389_arg_1=1, var_390=0, var_390_arg_0=0, var_390_arg_1=1, var_391=1, var_391_arg_0=1, var_391_arg_1=0, var_392=1, var_392_arg_0=1, var_392_arg_1=1, var_393=1, var_393_arg_0=1, var_393_arg_1=1, var_394=1, var_394_arg_0=1, var_394_arg_1=1, var_395=1, var_395_arg_0=1, var_395_arg_1=1, var_396=0, var_396_arg_0=0, var_396_arg_1=1, var_397=1, var_397_arg_0=1, var_397_arg_1=0, var_398=0, var_398_arg_0=0, var_398_arg_1=1, var_399=1, var_399_arg_0=1, var_399_arg_1=0, var_400=0, var_400_arg_0=0, var_400_arg_1=1, var_401=1, var_401_arg_0=1, var_401_arg_1=0, var_402=0, var_402_arg_0=0, var_402_arg_1=0, var_403=0, var_403_arg_0=1, var_403_arg_1=0, var_404=0, var_404_arg_0=0, var_404_arg_1=0, var_405=0, var_405_arg_0=1, var_405_arg_1=0, var_406=0, var_406_arg_0=0, var_406_arg_1=0, var_407=1, var_407_arg_0=1, var_407_arg_1=3, var_408=1, var_408_arg_0=1, var_408_arg_1=3, var_409=0, var_409_arg_0=0, var_409_arg_1=1, var_410=0, var_410_arg_0=0, var_410_arg_1=0, var_411=0, var_411_arg_0=0, var_411_arg_1=0, var_5=0, var_50=0, var_57=0, var_57_arg_0=0, var_57_arg_1=0, var_59=7, var_62=255, var_63=0, var_63_arg_0=7, var_63_arg_1=0, var_64=0, var_64_arg_0=0, var_64_arg_1=255, var_64_arg_2=0, var_65=0, var_65_arg_0=1, var_65_arg_1=0, var_65_arg_2=0, var_66=7, var_66_arg_0=7, var_66_arg_1=0, var_68=2, var_71=9, var_71_arg_0=2, var_71_arg_1=0, var_72=9, var_72_arg_0=0, var_72_arg_1=255, var_72_arg_2=9, var_73=9, var_73_arg_0=0, var_73_arg_1=0, var_73_arg_2=9, var_74=2, var_74_arg_0=2, var_74_arg_1=9, var_76=6, var_79=0, var_79_arg_0=6, var_79_arg_1=0, var_80=255, var_80_arg_0=1, var_80_arg_1=255, var_80_arg_2=0, var_81=0, var_81_arg_0=1, var_81_arg_1=0, var_81_arg_2=255, var_82=6, var_82_arg_0=6, var_82_arg_1=0, var_84=5, var_87=255, var_87_arg_0=5, var_87_arg_1=0, var_88=255, var_88_arg_0=0, var_88_arg_1=255, var_88_arg_2=255, var_89=255, var_89_arg_0=0, var_89_arg_1=0, var_89_arg_2=255, var_90=5, var_90_arg_0=5, var_90_arg_1=255] [L150] input_60 = __VERIFIER_nondet_uchar() [L151] input_60 = input_60 & mask_SORT_1 [L152] input_61 = __VERIFIER_nondet_uchar() [L153] input_61 = input_61 & mask_SORT_1 [L154] input_69 = __VERIFIER_nondet_uchar() [L155] input_69 = input_69 & mask_SORT_1 [L156] input_70 = __VERIFIER_nondet_uchar() [L157] input_70 = input_70 & mask_SORT_1 [L158] input_77 = __VERIFIER_nondet_uchar() [L159] input_77 = input_77 & mask_SORT_1 [L160] input_78 = __VERIFIER_nondet_uchar() [L161] input_78 = input_78 & mask_SORT_1 [L162] input_85 = __VERIFIER_nondet_uchar() [L163] input_85 = input_85 & mask_SORT_1 [L164] input_86 = __VERIFIER_nondet_uchar() [L165] input_86 = input_86 & mask_SORT_1 [L166] input_104 = __VERIFIER_nondet_uchar() [L167] input_104 = input_104 & mask_SORT_1 [L168] input_105 = __VERIFIER_nondet_uchar() [L169] input_105 = input_105 & mask_SORT_1 [L170] input_106 = __VERIFIER_nondet_uchar() [L171] input_106 = input_106 & mask_SORT_1 [L172] input_107 = __VERIFIER_nondet_uchar() [L173] input_107 = input_107 & mask_SORT_1 [L174] input_109 = __VERIFIER_nondet_uchar() [L175] input_109 = input_109 & mask_SORT_1 [L176] input_111 = __VERIFIER_nondet_uchar() [L177] input_111 = input_111 & mask_SORT_1 [L178] input_112 = __VERIFIER_nondet_uchar() [L179] input_112 = input_112 & mask_SORT_1 [L180] input_114 = __VERIFIER_nondet_uchar() [L181] input_114 = input_114 & mask_SORT_1 [L182] input_232 = __VERIFIER_nondet_uchar() [L185] SORT_1 var_57_arg_0 = state_53; [L186] SORT_1 var_57_arg_1 = ~state_55; [L187] var_57_arg_1 = var_57_arg_1 & mask_SORT_1 [L188] SORT_1 var_57 = var_57_arg_0 & var_57_arg_1; [L189] var_57 = var_57 & mask_SORT_1 [L190] SORT_1 bad_58_arg_0 = var_57; [L191] CALL __VERIFIER_assert(!(bad_58_arg_0)) [L20] COND TRUE !(cond) VAL [\old(cond)=0, cond=0] [L20] reach_error() VAL [\old(cond)=0, cond=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 7 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 127.4s, OverallIterations: 2, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 2.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 3 SdHoareTripleChecker+Valid, 2.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3 mSDsluCounter, 6 SdHoareTripleChecker+Invalid, 2.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 5 mSDsCounter, 1 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 7 IncrementalHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1 mSolverCounterUnsat, 2 mSDtfsCounter, 7 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8occurred in iteration=1, InterpolantAutomatonStates: 5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 1 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 70.9s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 11 NumberOfCodeBlocks, 11 NumberOfCodeBlocksAsserted, 2 NumberOfCheckSat, 3 ConstructedInterpolants, 0 QuantifiedInterpolants, 8 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 1 InterpolantComputations, 1 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2022-11-03 02:08:02,058 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/config/TaipanReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash dea0d0a9989b3a552213db02ac3bbd658516afb9b7556684b1452dba6e0c2bc0 --- Real Ultimate output --- [0.001s][warning][os,container] Duplicate cpuset controllers detected. Picking /sys/fs/cgroup/cpuset, skipping /sys/fs/cgroup/cpuset. This is Ultimate 0.2.2-dev-5e519f3 [2022-11-03 02:08:04,523 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-11-03 02:08:04,526 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-11-03 02:08:04,579 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-11-03 02:08:04,580 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-11-03 02:08:04,583 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-11-03 02:08:04,585 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-11-03 02:08:04,590 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-11-03 02:08:04,595 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-11-03 02:08:04,602 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-11-03 02:08:04,604 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-11-03 02:08:04,606 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-11-03 02:08:04,607 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-11-03 02:08:04,609 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-11-03 02:08:04,611 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-11-03 02:08:04,612 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-11-03 02:08:04,614 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-11-03 02:08:04,615 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-11-03 02:08:04,616 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-11-03 02:08:04,624 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-11-03 02:08:04,626 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-11-03 02:08:04,627 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-11-03 02:08:04,630 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-11-03 02:08:04,632 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-11-03 02:08:04,640 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-11-03 02:08:04,641 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-11-03 02:08:04,641 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-11-03 02:08:04,643 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-11-03 02:08:04,644 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-11-03 02:08:04,645 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-11-03 02:08:04,645 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-11-03 02:08:04,646 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-11-03 02:08:04,647 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-11-03 02:08:04,648 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-11-03 02:08:04,649 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-11-03 02:08:04,650 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-11-03 02:08:04,650 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-11-03 02:08:04,651 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-11-03 02:08:04,651 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-11-03 02:08:04,653 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-11-03 02:08:04,654 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-11-03 02:08:04,659 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/config/svcomp-Reach-64bit-Taipan_Bitvector.epf [2022-11-03 02:08:04,696 INFO L113 SettingsManager]: Loading preferences was successful [2022-11-03 02:08:04,696 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-11-03 02:08:04,697 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-11-03 02:08:04,697 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-11-03 02:08:04,698 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-11-03 02:08:04,699 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-11-03 02:08:04,699 INFO L138 SettingsManager]: * User list type=DISABLED [2022-11-03 02:08:04,699 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2022-11-03 02:08:04,700 INFO L138 SettingsManager]: * Explicit value domain=true [2022-11-03 02:08:04,700 INFO L138 SettingsManager]: * Octagon Domain=false [2022-11-03 02:08:04,701 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2022-11-03 02:08:04,701 INFO L138 SettingsManager]: * Interval Domain=false [2022-11-03 02:08:04,703 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-11-03 02:08:04,703 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-11-03 02:08:04,703 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-11-03 02:08:04,704 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-11-03 02:08:04,704 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-11-03 02:08:04,704 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-11-03 02:08:04,704 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-11-03 02:08:04,705 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-11-03 02:08:04,705 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-11-03 02:08:04,705 INFO L138 SettingsManager]: * Use constant arrays=true [2022-11-03 02:08:04,705 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-11-03 02:08:04,706 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-11-03 02:08:04,706 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-11-03 02:08:04,706 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-11-03 02:08:04,707 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:08:04,707 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-11-03 02:08:04,707 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-11-03 02:08:04,707 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-11-03 02:08:04,708 INFO L138 SettingsManager]: * Trace refinement strategy=WALRUS [2022-11-03 02:08:04,708 INFO L138 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2022-11-03 02:08:04,709 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-11-03 02:08:04,709 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-11-03 02:08:04,709 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-11-03 02:08:04,710 INFO L138 SettingsManager]: * Logic for external solver=AUFBV WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dea0d0a9989b3a552213db02ac3bbd658516afb9b7556684b1452dba6e0c2bc0 [2022-11-03 02:08:05,109 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-11-03 02:08:05,142 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-11-03 02:08:05,145 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-11-03 02:08:05,147 INFO L271 PluginConnector]: Initializing CDTParser... [2022-11-03 02:08:05,147 INFO L275 PluginConnector]: CDTParser initialized [2022-11-03 02:08:05,149 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c [2022-11-03 02:08:05,219 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/0b4c36fac/e4002466d6674d74aae6dd3cf5088ff5/FLAGfe2466bfc [2022-11-03 02:08:05,817 INFO L306 CDTParser]: Found 1 translation units. [2022-11-03 02:08:05,818 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c [2022-11-03 02:08:05,832 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/0b4c36fac/e4002466d6674d74aae6dd3cf5088ff5/FLAGfe2466bfc [2022-11-03 02:08:06,111 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/data/0b4c36fac/e4002466d6674d74aae6dd3cf5088ff5 [2022-11-03 02:08:06,114 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-11-03 02:08:06,115 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-11-03 02:08:06,117 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-11-03 02:08:06,117 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-11-03 02:08:06,122 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-11-03 02:08:06,123 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:06,124 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@392b2fad and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06, skipping insertion in model container [2022-11-03 02:08:06,129 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:06,137 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-11-03 02:08:06,210 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-11-03 02:08:06,426 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c[1014,1027] [2022-11-03 02:08:06,788 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:08:06,800 INFO L203 MainTranslator]: Completed pre-run [2022-11-03 02:08:06,811 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c[1014,1027] [2022-11-03 02:08:06,921 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-11-03 02:08:06,933 INFO L208 MainTranslator]: Completed translation [2022-11-03 02:08:06,934 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06 WrapperNode [2022-11-03 02:08:06,934 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-11-03 02:08:06,935 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-11-03 02:08:06,935 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-11-03 02:08:06,936 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-11-03 02:08:06,942 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:06,970 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,040 INFO L138 Inliner]: procedures = 11, calls = 3, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1439 [2022-11-03 02:08:07,040 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-11-03 02:08:07,041 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-11-03 02:08:07,041 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-11-03 02:08:07,041 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-11-03 02:08:07,050 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,051 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,063 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,064 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,146 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,153 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,170 INFO L185 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,176 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,186 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-11-03 02:08:07,197 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-11-03 02:08:07,207 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-11-03 02:08:07,207 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-11-03 02:08:07,208 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (1/1) ... [2022-11-03 02:08:07,213 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-11-03 02:08:07,225 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:08:07,236 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-11-03 02:08:07,239 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-11-03 02:08:07,275 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-11-03 02:08:07,275 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-11-03 02:08:07,677 INFO L235 CfgBuilder]: Building ICFG [2022-11-03 02:08:07,679 INFO L261 CfgBuilder]: Building CFG for each procedure with an implementation [2022-11-03 02:08:09,047 INFO L276 CfgBuilder]: Performing block encoding [2022-11-03 02:08:09,056 INFO L295 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-11-03 02:08:09,057 INFO L300 CfgBuilder]: Removed 1 assume(true) statements. [2022-11-03 02:08:09,060 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:08:09 BoogieIcfgContainer [2022-11-03 02:08:09,060 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-11-03 02:08:09,062 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-11-03 02:08:09,062 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-11-03 02:08:09,065 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-11-03 02:08:09,066 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 03.11 02:08:06" (1/3) ... [2022-11-03 02:08:09,067 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b5a56fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:08:09, skipping insertion in model container [2022-11-03 02:08:09,067 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 03.11 02:08:06" (2/3) ... [2022-11-03 02:08:09,067 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b5a56fc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 03.11 02:08:09, skipping insertion in model container [2022-11-03 02:08:09,067 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 03.11 02:08:09" (3/3) ... [2022-11-03 02:08:09,068 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.elevator_planning.3.prop1-func-interl.c [2022-11-03 02:08:09,087 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-11-03 02:08:09,087 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-11-03 02:08:09,155 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-11-03 02:08:09,163 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@22858aee, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-11-03 02:08:09,164 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-11-03 02:08:09,168 INFO L276 IsEmpty]: Start isEmpty. Operand has 107 states, 105 states have (on average 1.4952380952380953) internal successors, (157), 106 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:09,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2022-11-03 02:08:09,175 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:09,175 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2022-11-03 02:08:09,176 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:09,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:09,185 INFO L85 PathProgramCache]: Analyzing trace with hash 28698761, now seen corresponding path program 1 times [2022-11-03 02:08:09,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:09,201 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [705055943] [2022-11-03 02:08:09,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:09,201 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:09,202 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:09,209 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:09,227 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2022-11-03 02:08:09,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:09,593 INFO L263 TraceCheckSpWp]: Trace formula consists of 102 conjuncts, 10 conjunts are in the unsatisfiable core [2022-11-03 02:08:09,603 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:09,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:09,704 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:09,705 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:09,705 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [705055943] [2022-11-03 02:08:09,706 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [705055943] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:09,706 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:09,706 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-11-03 02:08:09,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411797858] [2022-11-03 02:08:09,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:09,714 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-11-03 02:08:09,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:09,748 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-11-03 02:08:09,749 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-11-03 02:08:09,753 INFO L87 Difference]: Start difference. First operand has 107 states, 105 states have (on average 1.4952380952380953) internal successors, (157), 106 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:09,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:09,934 INFO L93 Difference]: Finished difference Result 308 states and 462 transitions. [2022-11-03 02:08:09,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-11-03 02:08:09,939 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2022-11-03 02:08:09,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:09,954 INFO L225 Difference]: With dead ends: 308 [2022-11-03 02:08:09,954 INFO L226 Difference]: Without dead ends: 203 [2022-11-03 02:08:09,958 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-11-03 02:08:09,961 INFO L413 NwaCegarLoop]: 149 mSDtfsCounter, 291 mSDsluCounter, 296 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 291 SdHoareTripleChecker+Valid, 445 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:09,963 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [291 Valid, 445 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-11-03 02:08:09,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2022-11-03 02:08:10,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 105. [2022-11-03 02:08:10,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 104 states have (on average 1.4711538461538463) internal successors, (153), 104 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:10,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 153 transitions. [2022-11-03 02:08:10,028 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 153 transitions. Word has length 5 [2022-11-03 02:08:10,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:10,028 INFO L495 AbstractCegarLoop]: Abstraction has 105 states and 153 transitions. [2022-11-03 02:08:10,029 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:10,029 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 153 transitions. [2022-11-03 02:08:10,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:10,034 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:10,034 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:10,070 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (2)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:10,261 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:10,261 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:10,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:10,262 INFO L85 PathProgramCache]: Analyzing trace with hash -691414481, now seen corresponding path program 1 times [2022-11-03 02:08:10,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:10,264 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [647376324] [2022-11-03 02:08:10,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:10,264 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:10,265 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:10,266 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:10,272 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2022-11-03 02:08:10,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:11,031 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:11,040 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:11,347 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:11,347 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:11,348 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:11,348 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [647376324] [2022-11-03 02:08:11,348 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [647376324] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:11,348 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:11,349 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:11,349 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979727463] [2022-11-03 02:08:11,349 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:11,350 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:11,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:11,351 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:11,351 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:11,352 INFO L87 Difference]: Start difference. First operand 105 states and 153 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:11,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:11,496 INFO L93 Difference]: Finished difference Result 242 states and 356 transitions. [2022-11-03 02:08:11,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:08:11,497 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:11,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:11,498 INFO L225 Difference]: With dead ends: 242 [2022-11-03 02:08:11,498 INFO L226 Difference]: Without dead ends: 141 [2022-11-03 02:08:11,499 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:08:11,500 INFO L413 NwaCegarLoop]: 145 mSDtfsCounter, 66 mSDsluCounter, 483 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 628 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 16 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:11,501 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 628 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 16 Unchecked, 0.1s Time] [2022-11-03 02:08:11,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2022-11-03 02:08:11,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2022-11-03 02:08:11,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 140 states have (on average 1.4714285714285715) internal successors, (206), 140 states have internal predecessors, (206), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:11,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 206 transitions. [2022-11-03 02:08:11,509 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 206 transitions. Word has length 104 [2022-11-03 02:08:11,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:11,510 INFO L495 AbstractCegarLoop]: Abstraction has 141 states and 206 transitions. [2022-11-03 02:08:11,510 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:11,511 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 206 transitions. [2022-11-03 02:08:11,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:11,512 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:11,512 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:11,545 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (3)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:11,726 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:11,727 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:11,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:11,728 INFO L85 PathProgramCache]: Analyzing trace with hash 994765357, now seen corresponding path program 1 times [2022-11-03 02:08:11,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:11,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1710181949] [2022-11-03 02:08:11,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:11,729 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:11,729 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:11,733 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:11,737 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Waiting until timeout for monitored process [2022-11-03 02:08:12,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:12,473 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:12,487 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:12,679 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:12,679 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:12,680 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:12,680 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1710181949] [2022-11-03 02:08:12,681 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1710181949] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:12,683 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:12,684 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:12,684 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612246856] [2022-11-03 02:08:12,685 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:12,685 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:12,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:12,686 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:12,687 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:12,687 INFO L87 Difference]: Start difference. First operand 141 states and 206 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:12,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:12,898 INFO L93 Difference]: Finished difference Result 466 states and 686 transitions. [2022-11-03 02:08:12,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:08:12,898 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:12,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:12,900 INFO L225 Difference]: With dead ends: 466 [2022-11-03 02:08:12,900 INFO L226 Difference]: Without dead ends: 365 [2022-11-03 02:08:12,901 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:08:12,902 INFO L413 NwaCegarLoop]: 204 mSDtfsCounter, 374 mSDsluCounter, 1097 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 374 SdHoareTripleChecker+Valid, 1301 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 35 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:12,902 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [374 Valid, 1301 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 33 Invalid, 0 Unknown, 35 Unchecked, 0.2s Time] [2022-11-03 02:08:12,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2022-11-03 02:08:12,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 209. [2022-11-03 02:08:12,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 209 states, 208 states have (on average 1.4711538461538463) internal successors, (306), 208 states have internal predecessors, (306), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:12,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 306 transitions. [2022-11-03 02:08:12,917 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 306 transitions. Word has length 104 [2022-11-03 02:08:12,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:12,918 INFO L495 AbstractCegarLoop]: Abstraction has 209 states and 306 transitions. [2022-11-03 02:08:12,918 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:12,918 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 306 transitions. [2022-11-03 02:08:12,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:12,920 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:12,920 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:12,946 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (4)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:13,146 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:13,146 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:13,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:13,147 INFO L85 PathProgramCache]: Analyzing trace with hash 1555465135, now seen corresponding path program 1 times [2022-11-03 02:08:13,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:13,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1411034434] [2022-11-03 02:08:13,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:13,148 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:13,148 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:13,149 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:13,160 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Waiting until timeout for monitored process [2022-11-03 02:08:13,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:13,819 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:13,826 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:14,184 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:14,185 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:14,185 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:14,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1411034434] [2022-11-03 02:08:14,185 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1411034434] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:14,185 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:14,186 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:14,186 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1215636654] [2022-11-03 02:08:14,186 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:14,187 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:14,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:14,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:14,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:14,188 INFO L87 Difference]: Start difference. First operand 209 states and 306 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:14,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:14,306 INFO L93 Difference]: Finished difference Result 456 states and 671 transitions. [2022-11-03 02:08:14,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:08:14,307 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:14,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:14,309 INFO L225 Difference]: With dead ends: 456 [2022-11-03 02:08:14,309 INFO L226 Difference]: Without dead ends: 355 [2022-11-03 02:08:14,310 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:08:14,310 INFO L413 NwaCegarLoop]: 144 mSDtfsCounter, 70 mSDsluCounter, 705 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 70 SdHoareTripleChecker+Valid, 849 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:14,311 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [70 Valid, 849 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-11-03 02:08:14,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2022-11-03 02:08:14,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 355. [2022-11-03 02:08:14,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 355 states, 354 states have (on average 1.4717514124293785) internal successors, (521), 354 states have internal predecessors, (521), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:14,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 355 states to 355 states and 521 transitions. [2022-11-03 02:08:14,322 INFO L78 Accepts]: Start accepts. Automaton has 355 states and 521 transitions. Word has length 104 [2022-11-03 02:08:14,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:14,323 INFO L495 AbstractCegarLoop]: Abstraction has 355 states and 521 transitions. [2022-11-03 02:08:14,323 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:14,324 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 521 transitions. [2022-11-03 02:08:14,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:14,326 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:14,326 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:14,351 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (5)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:14,548 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:14,548 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:14,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:14,548 INFO L85 PathProgramCache]: Analyzing trace with hash -710916051, now seen corresponding path program 1 times [2022-11-03 02:08:14,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:14,550 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1267147017] [2022-11-03 02:08:14,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:14,550 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:14,550 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:14,552 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:14,562 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Waiting until timeout for monitored process [2022-11-03 02:08:15,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:15,235 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:15,241 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:15,430 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:15,431 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:15,431 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:15,431 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1267147017] [2022-11-03 02:08:15,431 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1267147017] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:15,432 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:15,432 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:15,432 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1263355411] [2022-11-03 02:08:15,432 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:15,433 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:15,433 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:15,433 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:15,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:15,434 INFO L87 Difference]: Start difference. First operand 355 states and 521 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:15,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:15,618 INFO L93 Difference]: Finished difference Result 620 states and 911 transitions. [2022-11-03 02:08:15,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:08:15,619 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:15,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:15,621 INFO L225 Difference]: With dead ends: 620 [2022-11-03 02:08:15,621 INFO L226 Difference]: Without dead ends: 519 [2022-11-03 02:08:15,621 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:08:15,622 INFO L413 NwaCegarLoop]: 228 mSDtfsCounter, 434 mSDsluCounter, 779 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 434 SdHoareTripleChecker+Valid, 1007 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 24 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:15,622 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [434 Valid, 1007 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 29 Invalid, 0 Unknown, 24 Unchecked, 0.1s Time] [2022-11-03 02:08:15,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2022-11-03 02:08:15,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 379. [2022-11-03 02:08:15,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 379 states, 378 states have (on average 1.4682539682539681) internal successors, (555), 378 states have internal predecessors, (555), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:15,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 555 transitions. [2022-11-03 02:08:15,633 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 555 transitions. Word has length 104 [2022-11-03 02:08:15,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:15,634 INFO L495 AbstractCegarLoop]: Abstraction has 379 states and 555 transitions. [2022-11-03 02:08:15,634 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:15,634 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 555 transitions. [2022-11-03 02:08:15,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:15,636 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:15,637 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:15,663 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (6)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:15,849 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:15,850 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:15,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:15,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1608309329, now seen corresponding path program 1 times [2022-11-03 02:08:15,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:15,851 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [943152615] [2022-11-03 02:08:15,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:15,851 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:15,851 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:15,852 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:15,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Waiting until timeout for monitored process [2022-11-03 02:08:16,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:16,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:16,483 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:16,944 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:16,944 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:16,945 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:16,945 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [943152615] [2022-11-03 02:08:16,945 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [943152615] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:16,945 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:16,945 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:16,946 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115372878] [2022-11-03 02:08:16,946 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:16,946 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:16,946 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:16,947 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:16,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:16,947 INFO L87 Difference]: Start difference. First operand 379 states and 555 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:17,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:17,071 INFO L93 Difference]: Finished difference Result 562 states and 822 transitions. [2022-11-03 02:08:17,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:08:17,075 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:17,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:17,077 INFO L225 Difference]: With dead ends: 562 [2022-11-03 02:08:17,077 INFO L226 Difference]: Without dead ends: 461 [2022-11-03 02:08:17,078 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:08:17,079 INFO L413 NwaCegarLoop]: 143 mSDtfsCounter, 126 mSDsluCounter, 569 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 712 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 19 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:17,079 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 712 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 19 Unchecked, 0.1s Time] [2022-11-03 02:08:17,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states. [2022-11-03 02:08:17,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 461. [2022-11-03 02:08:17,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 461 states, 460 states have (on average 1.4608695652173913) internal successors, (672), 460 states have internal predecessors, (672), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:17,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 461 states and 672 transitions. [2022-11-03 02:08:17,090 INFO L78 Accepts]: Start accepts. Automaton has 461 states and 672 transitions. Word has length 104 [2022-11-03 02:08:17,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:17,092 INFO L495 AbstractCegarLoop]: Abstraction has 461 states and 672 transitions. [2022-11-03 02:08:17,092 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:17,092 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 672 transitions. [2022-11-03 02:08:17,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:17,094 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:17,094 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:17,122 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (7)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:17,316 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:17,317 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:17,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:17,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1535922771, now seen corresponding path program 1 times [2022-11-03 02:08:17,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:17,318 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [16816647] [2022-11-03 02:08:17,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:17,319 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:17,319 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:17,320 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:17,323 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Waiting until timeout for monitored process [2022-11-03 02:08:17,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:17,943 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:17,949 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:18,183 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:18,183 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:18,183 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:18,183 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [16816647] [2022-11-03 02:08:18,183 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [16816647] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:18,184 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:18,184 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:18,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181842951] [2022-11-03 02:08:18,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:18,185 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:18,185 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:18,185 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:18,185 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:18,186 INFO L87 Difference]: Start difference. First operand 461 states and 672 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:18,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:18,344 INFO L93 Difference]: Finished difference Result 712 states and 1041 transitions. [2022-11-03 02:08:18,344 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:08:18,344 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:18,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:18,347 INFO L225 Difference]: With dead ends: 712 [2022-11-03 02:08:18,347 INFO L226 Difference]: Without dead ends: 611 [2022-11-03 02:08:18,348 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:08:18,349 INFO L413 NwaCegarLoop]: 252 mSDtfsCounter, 392 mSDsluCounter, 803 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 392 SdHoareTripleChecker+Valid, 1055 SdHoareTripleChecker+Invalid, 51 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 25 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:18,349 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [392 Valid, 1055 Invalid, 51 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 25 Unchecked, 0.1s Time] [2022-11-03 02:08:18,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 611 states. [2022-11-03 02:08:18,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 611 to 487. [2022-11-03 02:08:18,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 487 states, 486 states have (on average 1.4588477366255144) internal successors, (709), 486 states have internal predecessors, (709), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:18,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 487 states to 487 states and 709 transitions. [2022-11-03 02:08:18,362 INFO L78 Accepts]: Start accepts. Automaton has 487 states and 709 transitions. Word has length 104 [2022-11-03 02:08:18,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:18,363 INFO L495 AbstractCegarLoop]: Abstraction has 487 states and 709 transitions. [2022-11-03 02:08:18,363 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:18,363 INFO L276 IsEmpty]: Start isEmpty. Operand 487 states and 709 transitions. [2022-11-03 02:08:18,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:18,365 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:18,366 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:18,387 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (8)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:18,586 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:18,587 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:18,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:18,587 INFO L85 PathProgramCache]: Analyzing trace with hash 387305263, now seen corresponding path program 1 times [2022-11-03 02:08:18,588 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:18,589 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1518488878] [2022-11-03 02:08:18,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:18,589 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:18,589 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:18,591 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:18,633 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Waiting until timeout for monitored process [2022-11-03 02:08:19,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:19,215 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:19,221 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:19,734 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:19,735 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:19,735 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:19,735 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1518488878] [2022-11-03 02:08:19,735 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1518488878] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:19,735 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:19,736 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:19,736 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1545439498] [2022-11-03 02:08:19,736 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:19,736 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:19,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:19,738 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:19,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:19,738 INFO L87 Difference]: Start difference. First operand 487 states and 709 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:19,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:19,831 INFO L93 Difference]: Finished difference Result 680 states and 991 transitions. [2022-11-03 02:08:19,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-11-03 02:08:19,836 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:19,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:19,838 INFO L225 Difference]: With dead ends: 680 [2022-11-03 02:08:19,838 INFO L226 Difference]: Without dead ends: 579 [2022-11-03 02:08:19,838 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-11-03 02:08:19,839 INFO L413 NwaCegarLoop]: 142 mSDtfsCounter, 153 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 677 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 16 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:19,839 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 677 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 16 Unchecked, 0.1s Time] [2022-11-03 02:08:19,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 579 states. [2022-11-03 02:08:19,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 579 to 579. [2022-11-03 02:08:19,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 579 states, 578 states have (on average 1.4550173010380623) internal successors, (841), 578 states have internal predecessors, (841), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:19,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 579 states to 579 states and 841 transitions. [2022-11-03 02:08:19,854 INFO L78 Accepts]: Start accepts. Automaton has 579 states and 841 transitions. Word has length 104 [2022-11-03 02:08:19,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:19,854 INFO L495 AbstractCegarLoop]: Abstraction has 579 states and 841 transitions. [2022-11-03 02:08:19,854 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:19,855 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 841 transitions. [2022-11-03 02:08:19,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:19,856 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:19,857 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:19,877 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (9)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:20,073 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:20,073 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:20,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:20,074 INFO L85 PathProgramCache]: Analyzing trace with hash 2076249005, now seen corresponding path program 1 times [2022-11-03 02:08:20,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:20,074 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [593769337] [2022-11-03 02:08:20,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:20,075 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:20,075 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:20,076 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:20,079 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Waiting until timeout for monitored process [2022-11-03 02:08:20,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:20,652 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 6 conjunts are in the unsatisfiable core [2022-11-03 02:08:20,657 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:20,925 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:20,925 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-11-03 02:08:20,925 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:20,925 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [593769337] [2022-11-03 02:08:20,925 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [593769337] provided 1 perfect and 0 imperfect interpolant sequences [2022-11-03 02:08:20,925 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-11-03 02:08:20,925 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-11-03 02:08:20,926 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402745755] [2022-11-03 02:08:20,926 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-11-03 02:08:20,926 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-11-03 02:08:20,926 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:08:20,926 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-11-03 02:08:20,927 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-11-03 02:08:20,927 INFO L87 Difference]: Start difference. First operand 579 states and 841 transitions. Second operand has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:21,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:08:21,095 INFO L93 Difference]: Finished difference Result 812 states and 1183 transitions. [2022-11-03 02:08:21,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-11-03 02:08:21,095 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:08:21,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:08:21,100 INFO L225 Difference]: With dead ends: 812 [2022-11-03 02:08:21,100 INFO L226 Difference]: Without dead ends: 711 [2022-11-03 02:08:21,101 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-11-03 02:08:21,103 INFO L413 NwaCegarLoop]: 276 mSDtfsCounter, 350 mSDsluCounter, 960 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 350 SdHoareTripleChecker+Valid, 1236 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 40 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-11-03 02:08:21,103 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [350 Valid, 1236 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 40 Unchecked, 0.1s Time] [2022-11-03 02:08:21,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2022-11-03 02:08:21,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 603. [2022-11-03 02:08:21,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 603 states, 602 states have (on average 1.4534883720930232) internal successors, (875), 602 states have internal predecessors, (875), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:21,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 603 states to 603 states and 875 transitions. [2022-11-03 02:08:21,128 INFO L78 Accepts]: Start accepts. Automaton has 603 states and 875 transitions. Word has length 104 [2022-11-03 02:08:21,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:08:21,129 INFO L495 AbstractCegarLoop]: Abstraction has 603 states and 875 transitions. [2022-11-03 02:08:21,129 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 14.857142857142858) internal successors, (104), 7 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:08:21,130 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 875 transitions. [2022-11-03 02:08:21,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:08:21,132 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:08:21,133 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:08:21,156 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (10)] Forceful destruction successful, exit code 0 [2022-11-03 02:08:21,347 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 [2022-11-03 02:08:21,348 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:08:21,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:08:21,348 INFO L85 PathProgramCache]: Analyzing trace with hash -1517653713, now seen corresponding path program 1 times [2022-11-03 02:08:21,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:08:21,350 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [921350947] [2022-11-03 02:08:21,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:21,350 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:08:21,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:08:21,351 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:08:21,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Waiting until timeout for monitored process [2022-11-03 02:08:21,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:21,901 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:08:21,908 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:23,517 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:23,517 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:08:28,433 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:28,433 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:08:28,433 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [921350947] [2022-11-03 02:08:28,433 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [921350947] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:08:28,434 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1072383561] [2022-11-03 02:08:28,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:08:28,434 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:08:28,434 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:08:28,464 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:08:28,465 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (12)] Waiting until timeout for monitored process [2022-11-03 02:08:29,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:08:29,657 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:08:29,663 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:08:30,985 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:08:30,985 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:09:25,822 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:25,823 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1072383561] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:09:25,823 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1999172118] [2022-11-03 02:09:25,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:09:25,823 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:09:25,823 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:09:25,825 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:09:25,829 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-11-03 02:09:26,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:09:26,329 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 33 conjunts are in the unsatisfiable core [2022-11-03 02:09:26,335 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:09:28,304 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:28,304 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:09:58,591 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:09:58,591 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1999172118] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:09:58,591 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:09:58,592 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 37 [2022-11-03 02:09:58,592 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [487837585] [2022-11-03 02:09:58,592 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:09:58,593 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-03 02:09:58,593 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:09:58,594 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-03 02:09:58,594 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=1087, Unknown=35, NotChecked=0, Total=1332 [2022-11-03 02:09:58,595 INFO L87 Difference]: Start difference. First operand 603 states and 875 transitions. Second operand has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:59,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:09:59,744 INFO L93 Difference]: Finished difference Result 1048 states and 1515 transitions. [2022-11-03 02:09:59,745 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 02:09:59,745 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:09:59,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:09:59,749 INFO L225 Difference]: With dead ends: 1048 [2022-11-03 02:09:59,749 INFO L226 Difference]: Without dead ends: 1046 [2022-11-03 02:09:59,750 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 630 GetRequests, 582 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 616 ImplicationChecksByTransitivity, 88.4s TimeCoverageRelationStatistics Valid=389, Invalid=1646, Unknown=35, NotChecked=0, Total=2070 [2022-11-03 02:09:59,751 INFO L413 NwaCegarLoop]: 139 mSDtfsCounter, 1057 mSDsluCounter, 2951 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1057 SdHoareTripleChecker+Valid, 3090 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 31 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:09:59,751 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1057 Valid, 3090 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 31 Unchecked, 0.0s Time] [2022-11-03 02:09:59,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1046 states. [2022-11-03 02:09:59,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1046 to 1046. [2022-11-03 02:09:59,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1046 states, 1045 states have (on average 1.447846889952153) internal successors, (1513), 1045 states have internal predecessors, (1513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:59,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 1046 states and 1513 transitions. [2022-11-03 02:09:59,774 INFO L78 Accepts]: Start accepts. Automaton has 1046 states and 1513 transitions. Word has length 104 [2022-11-03 02:09:59,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:09:59,774 INFO L495 AbstractCegarLoop]: Abstraction has 1046 states and 1513 transitions. [2022-11-03 02:09:59,775 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:09:59,775 INFO L276 IsEmpty]: Start isEmpty. Operand 1046 states and 1513 transitions. [2022-11-03 02:09:59,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:09:59,777 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:09:59,778 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:09:59,793 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (12)] Forceful destruction successful, exit code 0 [2022-11-03 02:10:00,000 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (11)] Forceful destruction successful, exit code 0 [2022-11-03 02:10:00,211 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-11-03 02:10:00,387 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:10:00,387 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:10:00,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:10:00,388 INFO L85 PathProgramCache]: Analyzing trace with hash -2010279887, now seen corresponding path program 1 times [2022-11-03 02:10:00,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:10:00,388 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1458569342] [2022-11-03 02:10:00,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:10:00,389 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:10:00,389 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:10:00,389 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:10:00,391 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Waiting until timeout for monitored process [2022-11-03 02:10:00,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:10:00,930 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:10:00,941 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:10:02,696 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:02,696 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:10:08,821 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:08,821 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:10:08,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1458569342] [2022-11-03 02:10:08,821 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1458569342] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:10:08,821 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1910984996] [2022-11-03 02:10:08,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:10:08,822 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:10:08,822 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:10:08,823 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:10:08,824 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (15)] Waiting until timeout for monitored process [2022-11-03 02:10:09,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:10:09,872 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:10:09,878 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:10:11,346 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:10:11,346 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:11:11,926 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:11,926 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1910984996] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:11:11,926 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1983900375] [2022-11-03 02:11:11,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:11:11,926 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:11:11,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:11:11,928 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:11:11,929 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-11-03 02:11:12,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:11:12,388 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 02:11:12,393 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:11:14,784 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:14,784 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:11:40,702 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:40,703 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1983900375] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:11:40,703 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:11:40,703 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 37 [2022-11-03 02:11:40,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931782632] [2022-11-03 02:11:40,703 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:11:40,704 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-03 02:11:40,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:11:40,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-03 02:11:40,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=212, Invalid=1087, Unknown=33, NotChecked=0, Total=1332 [2022-11-03 02:11:40,706 INFO L87 Difference]: Start difference. First operand 1046 states and 1513 transitions. Second operand has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:11:41,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:11:41,920 INFO L93 Difference]: Finished difference Result 1878 states and 2707 transitions. [2022-11-03 02:11:41,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 02:11:41,920 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:11:41,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:11:41,927 INFO L225 Difference]: With dead ends: 1878 [2022-11-03 02:11:41,927 INFO L226 Difference]: Without dead ends: 1876 [2022-11-03 02:11:41,928 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 629 GetRequests, 581 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 617 ImplicationChecksByTransitivity, 91.0s TimeCoverageRelationStatistics Valid=401, Invalid=1636, Unknown=33, NotChecked=0, Total=2070 [2022-11-03 02:11:41,929 INFO L413 NwaCegarLoop]: 139 mSDtfsCounter, 1053 mSDsluCounter, 2888 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1053 SdHoareTripleChecker+Valid, 3027 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 34 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:11:41,929 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1053 Valid, 3027 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3 Invalid, 0 Unknown, 34 Unchecked, 0.0s Time] [2022-11-03 02:11:41,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1876 states. [2022-11-03 02:11:41,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1876 to 1876. [2022-11-03 02:11:41,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1876 states, 1875 states have (on average 1.4426666666666668) internal successors, (2705), 1875 states have internal predecessors, (2705), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:11:41,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1876 states to 1876 states and 2705 transitions. [2022-11-03 02:11:41,970 INFO L78 Accepts]: Start accepts. Automaton has 1876 states and 2705 transitions. Word has length 104 [2022-11-03 02:11:41,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:11:41,970 INFO L495 AbstractCegarLoop]: Abstraction has 1876 states and 2705 transitions. [2022-11-03 02:11:41,971 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:11:41,971 INFO L276 IsEmpty]: Start isEmpty. Operand 1876 states and 2705 transitions. [2022-11-03 02:11:41,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:11:41,975 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:11:41,976 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:11:41,992 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (15)] Forceful destruction successful, exit code 0 [2022-11-03 02:11:42,203 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (14)] Forceful destruction successful, exit code 0 [2022-11-03 02:11:42,414 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-11-03 02:11:42,590 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:11:42,590 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:11:42,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:11:42,591 INFO L85 PathProgramCache]: Analyzing trace with hash 1809962929, now seen corresponding path program 1 times [2022-11-03 02:11:42,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:11:42,592 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [1712612051] [2022-11-03 02:11:42,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:11:42,592 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:11:42,592 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:11:42,593 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:11:42,596 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Waiting until timeout for monitored process [2022-11-03 02:11:43,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:11:43,107 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:11:43,112 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:11:45,079 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:45,079 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:11:50,078 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:50,078 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:11:50,078 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [1712612051] [2022-11-03 02:11:50,079 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [1712612051] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:11:50,079 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1300496617] [2022-11-03 02:11:50,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:11:50,079 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:11:50,079 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:11:50,080 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:11:50,081 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (18)] Waiting until timeout for monitored process [2022-11-03 02:11:51,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:11:51,091 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:11:51,114 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:11:52,761 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:11:52,762 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:12:54,053 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:12:54,053 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1300496617] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:12:54,054 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [766351412] [2022-11-03 02:12:54,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:12:54,054 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:12:54,054 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:12:54,061 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:12:54,064 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-11-03 02:12:54,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:12:54,519 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 35 conjunts are in the unsatisfiable core [2022-11-03 02:12:54,523 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:12:57,092 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:12:57,093 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:13:24,657 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:13:24,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [766351412] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:13:24,657 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:13:24,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 37 [2022-11-03 02:13:24,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [366451291] [2022-11-03 02:13:24,658 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:13:24,659 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-11-03 02:13:24,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:13:24,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-11-03 02:13:24,660 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=211, Invalid=1086, Unknown=35, NotChecked=0, Total=1332 [2022-11-03 02:13:24,660 INFO L87 Difference]: Start difference. First operand 1876 states and 2705 transitions. Second operand has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:13:26,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:13:26,046 INFO L93 Difference]: Finished difference Result 2293 states and 3303 transitions. [2022-11-03 02:13:26,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-11-03 02:13:26,047 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:13:26,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:13:26,054 INFO L225 Difference]: With dead ends: 2293 [2022-11-03 02:13:26,054 INFO L226 Difference]: Without dead ends: 2291 [2022-11-03 02:13:26,055 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 630 GetRequests, 582 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 618 ImplicationChecksByTransitivity, 92.1s TimeCoverageRelationStatistics Valid=390, Invalid=1645, Unknown=35, NotChecked=0, Total=2070 [2022-11-03 02:13:26,056 INFO L413 NwaCegarLoop]: 139 mSDtfsCounter, 1107 mSDsluCounter, 3047 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1107 SdHoareTripleChecker+Valid, 3186 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 34 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:13:26,056 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1107 Valid, 3186 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 34 Unchecked, 0.0s Time] [2022-11-03 02:13:26,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2291 states. [2022-11-03 02:13:26,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2291 to 2291. [2022-11-03 02:13:26,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2291 states, 2290 states have (on average 1.4414847161572053) internal successors, (3301), 2290 states have internal predecessors, (3301), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:13:26,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2291 states to 2291 states and 3301 transitions. [2022-11-03 02:13:26,103 INFO L78 Accepts]: Start accepts. Automaton has 2291 states and 3301 transitions. Word has length 104 [2022-11-03 02:13:26,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:13:26,104 INFO L495 AbstractCegarLoop]: Abstraction has 2291 states and 3301 transitions. [2022-11-03 02:13:26,104 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 13.64864864864865) internal successors, (505), 37 states have internal predecessors, (505), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:13:26,105 INFO L276 IsEmpty]: Start isEmpty. Operand 2291 states and 3301 transitions. [2022-11-03 02:13:26,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:13:26,110 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:13:26,111 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:13:26,124 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (18)] Forceful destruction successful, exit code 0 [2022-11-03 02:13:26,338 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (17)] Forceful destruction successful, exit code 0 [2022-11-03 02:13:26,550 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2022-11-03 02:13:26,724 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt,17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:13:26,724 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:13:26,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:13:26,724 INFO L85 PathProgramCache]: Analyzing trace with hash 1317336755, now seen corresponding path program 1 times [2022-11-03 02:13:26,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:13:26,725 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [188000505] [2022-11-03 02:13:26,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:13:26,726 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:13:26,726 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:13:26,726 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:13:26,732 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Waiting until timeout for monitored process [2022-11-03 02:13:27,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:13:27,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:13:27,247 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:13:29,451 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:13:29,451 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:13:37,805 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:13:37,805 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:13:37,805 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [188000505] [2022-11-03 02:13:37,806 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [188000505] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:13:37,806 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [128964534] [2022-11-03 02:13:37,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:13:37,806 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:13:37,806 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:13:37,807 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:13:37,808 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (21)] Waiting until timeout for monitored process [2022-11-03 02:13:38,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:13:38,825 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:13:38,829 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:13:40,594 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:13:40,595 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:14:40,669 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:14:40,669 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [128964534] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:14:40,669 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [484996997] [2022-11-03 02:14:40,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:14:40,670 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:14:40,670 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:14:40,671 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:14:40,673 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-11-03 02:14:41,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:14:41,138 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-03 02:14:41,144 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:14:43,483 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:14:43,484 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:16:50,281 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:16:50,281 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [484996997] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:16:50,281 INFO L184 FreeRefinementEngine]: Found 0 perfect and 6 imperfect interpolant sequences. [2022-11-03 02:16:50,282 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 11, 11] total 32 [2022-11-03 02:16:50,282 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072108214] [2022-11-03 02:16:50,282 INFO L85 oduleStraightlineAll]: Using 6 imperfect interpolants to construct interpolant automaton [2022-11-03 02:16:50,283 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-11-03 02:16:50,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WALRUS [2022-11-03 02:16:50,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-11-03 02:16:50,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=177, Invalid=731, Unknown=84, NotChecked=0, Total=992 [2022-11-03 02:16:50,284 INFO L87 Difference]: Start difference. First operand 2291 states and 3301 transitions. Second operand has 32 states, 32 states have (on average 12.75) internal successors, (408), 32 states have internal predecessors, (408), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:16:50,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-11-03 02:16:50,490 INFO L93 Difference]: Finished difference Result 2694 states and 3878 transitions. [2022-11-03 02:16:50,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-11-03 02:16:50,491 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 12.75) internal successors, (408), 32 states have internal predecessors, (408), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-11-03 02:16:50,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-11-03 02:16:50,499 INFO L225 Difference]: With dead ends: 2694 [2022-11-03 02:16:50,499 INFO L226 Difference]: Without dead ends: 2692 [2022-11-03 02:16:50,500 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 619 GetRequests, 584 SyntacticMatches, 4 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 379 ImplicationChecksByTransitivity, 191.8s TimeCoverageRelationStatistics Valid=191, Invalid=781, Unknown=84, NotChecked=0, Total=1056 [2022-11-03 02:16:50,501 INFO L413 NwaCegarLoop]: 142 mSDtfsCounter, 744 mSDsluCounter, 2845 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 744 SdHoareTripleChecker+Valid, 2987 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 14 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-11-03 02:16:50,501 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [744 Valid, 2987 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5 Invalid, 0 Unknown, 14 Unchecked, 0.0s Time] [2022-11-03 02:16:50,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2692 states. [2022-11-03 02:16:50,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2692 to 1890. [2022-11-03 02:16:50,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1890 states, 1889 states have (on average 1.4430915828480677) internal successors, (2726), 1889 states have internal predecessors, (2726), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:16:50,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1890 states to 1890 states and 2726 transitions. [2022-11-03 02:16:50,547 INFO L78 Accepts]: Start accepts. Automaton has 1890 states and 2726 transitions. Word has length 104 [2022-11-03 02:16:50,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-11-03 02:16:50,547 INFO L495 AbstractCegarLoop]: Abstraction has 1890 states and 2726 transitions. [2022-11-03 02:16:50,548 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 12.75) internal successors, (408), 32 states have internal predecessors, (408), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-11-03 02:16:50,548 INFO L276 IsEmpty]: Start isEmpty. Operand 1890 states and 2726 transitions. [2022-11-03 02:16:50,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-11-03 02:16:50,552 INFO L187 NwaCegarLoop]: Found error trace [2022-11-03 02:16:50,552 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-11-03 02:16:50,593 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-11-03 02:16:50,779 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (20)] Forceful destruction successful, exit code 0 [2022-11-03 02:16:50,971 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (21)] Forceful destruction successful, exit code 0 [2022-11-03 02:16:51,165 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt [2022-11-03 02:16:51,165 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-11-03 02:16:51,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-11-03 02:16:51,166 INFO L85 PathProgramCache]: Analyzing trace with hash 373644851, now seen corresponding path program 1 times [2022-11-03 02:16:51,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy WALRUS [2022-11-03 02:16:51,167 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2053966899] [2022-11-03 02:16:51,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:16:51,167 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -unsat_core_generation=3 [2022-11-03 02:16:51,167 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat [2022-11-03 02:16:51,168 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2022-11-03 02:16:51,169 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/mathsat -unsat_core_generation=3 (23)] Waiting until timeout for monitored process [2022-11-03 02:16:51,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:16:51,716 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:16:51,722 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:16:53,817 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:16:53,817 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:17:00,562 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:17:00,562 INFO L136 FreeRefinementEngine]: Strategy WALRUS found an infeasible trace [2022-11-03 02:17:00,563 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [2053966899] [2022-11-03 02:17:00,575 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleMathsat [2053966899] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:17:00,575 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1984232372] [2022-11-03 02:17:00,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:17:00,576 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2022-11-03 02:17:00,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 [2022-11-03 02:17:00,577 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2022-11-03 02:17:00,578 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/cvc4 --incremental --print-success --lang smt (24)] Waiting until timeout for monitored process [2022-11-03 02:17:01,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:17:01,572 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 34 conjunts are in the unsatisfiable core [2022-11-03 02:17:01,575 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:17:03,408 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:17:03,409 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-11-03 02:18:06,762 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:18:06,762 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1984232372] provided 0 perfect and 2 imperfect interpolant sequences [2022-11-03 02:18:06,762 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1935934655] [2022-11-03 02:18:06,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-11-03 02:18:06,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-11-03 02:18:06,762 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 [2022-11-03 02:18:06,764 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-11-03 02:18:06,765 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cbcfa185-3361-4621-94db-75c639955941/bin/utaipan-7li7fVZpFI/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-11-03 02:18:07,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-11-03 02:18:07,218 INFO L263 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 37 conjunts are in the unsatisfiable core [2022-11-03 02:18:07,222 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-11-03 02:18:09,201 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-11-03 02:18:09,201 INFO L328 TraceCheckSpWp]: Computing backward predicates...